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@@ -807,6 +807,9 @@ static int gen8_init_workarounds(struct intel_engine_cs *ring)
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WA_SET_BIT_MASKED(INSTPM, INSTPM_FORCE_ORDERING);
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+ /* WaDisableAsyncFlipPerfMode:bdw,chv */
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+ WA_SET_BIT_MASKED(MI_MODE, ASYNC_FLIP_PERF_DISABLE);
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+
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return 0;
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}
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@@ -820,9 +823,6 @@ static int bdw_init_workarounds(struct intel_engine_cs *ring)
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if (ret)
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return ret;
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- /* WaDisableAsyncFlipPerfMode:bdw */
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- WA_SET_BIT_MASKED(MI_MODE, ASYNC_FLIP_PERF_DISABLE);
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-
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/* WaDisablePartialInstShootdown:bdw */
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/* WaDisableThreadStallDopClockGating:bdw (pre-production) */
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WA_SET_BIT_MASKED(GEN8_ROW_CHICKEN,
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@@ -889,9 +889,6 @@ static int chv_init_workarounds(struct intel_engine_cs *ring)
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if (ret)
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return ret;
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- /* WaDisableAsyncFlipPerfMode:chv */
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- WA_SET_BIT_MASKED(MI_MODE, ASYNC_FLIP_PERF_DISABLE);
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-
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/* WaDisablePartialInstShootdown:chv */
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/* WaDisableThreadStallDopClockGating:chv */
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WA_SET_BIT_MASKED(GEN8_ROW_CHICKEN,
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