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@@ -948,6 +948,9 @@ static const char *lcd_parent[1] = { "pllsai-r-div" };
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static const char *i2s_parents[2] = { "plli2s-r", NULL };
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+static const char *sai_parents[4] = { "pllsai-q-div", "plli2s-q-div", NULL,
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+ "no-clock" };
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+
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struct stm32_aux_clk {
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int idx;
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const char *name;
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@@ -983,6 +986,18 @@ static const struct stm32_aux_clk stm32f429_aux_clk[] = {
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NO_GATE, 0,
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CLK_SET_RATE_PARENT
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},
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+ {
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+ CLK_SAI1, "sai1-a", sai_parents, ARRAY_SIZE(sai_parents),
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+ STM32F4_RCC_DCKCFGR, 20, 3,
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+ STM32F4_RCC_APB2ENR, 22,
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+ CLK_SET_RATE_PARENT
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+ },
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+ {
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+ CLK_SAI2, "sai1-b", sai_parents, ARRAY_SIZE(sai_parents),
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+ STM32F4_RCC_DCKCFGR, 22, 3,
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+ STM32F4_RCC_APB2ENR, 22,
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+ CLK_SET_RATE_PARENT
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+ },
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};
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static const struct stm32f4_clk_data stm32f429_clk_data = {
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@@ -1115,6 +1130,7 @@ static void __init stm32f4_rcc_init(struct device_node *np)
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i2s_in_clk = of_clk_get_parent_name(np, 1);
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i2s_parents[1] = i2s_in_clk;
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+ sai_parents[2] = i2s_in_clk;
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clk_register_fixed_rate_with_accuracy(NULL, "hsi", NULL, 0,
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16000000, 160000);
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