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@@ -108,11 +108,21 @@
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#define SPI_RXFR2 0x84
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#define SPI_RXFR3 0x88
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+#define SPI_CTARE(x) (0x11c + (((x) & 0x3) * 4))
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+#define SPI_CTARE_FMSZE(x) (((x) & 0x1) << 16)
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+#define SPI_CTARE_DTCP(x) ((x) & 0x7ff)
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+
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+#define SPI_SREX 0x13c
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+
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#define SPI_FRAME_BITS(bits) SPI_CTAR_FMSZ((bits) - 1)
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#define SPI_FRAME_BITS_MASK SPI_CTAR_FMSZ(0xf)
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#define SPI_FRAME_BITS_16 SPI_CTAR_FMSZ(0xf)
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#define SPI_FRAME_BITS_8 SPI_CTAR_FMSZ(0x7)
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+/* Register offsets for regmap_pushr */
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+#define PUSHR_CMD 0x0
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+#define PUSHR_TX 0x2
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+
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#define SPI_CS_INIT 0x01
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#define SPI_CS_ASSERT 0x02
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#define SPI_CS_DROP 0x04
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@@ -133,6 +143,7 @@ enum dspi_trans_mode {
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struct fsl_dspi_devtype_data {
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enum dspi_trans_mode trans_mode;
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u8 max_clock_factor;
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+ bool xspi_mode;
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};
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static const struct fsl_dspi_devtype_data vf610_data = {
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@@ -143,6 +154,7 @@ static const struct fsl_dspi_devtype_data vf610_data = {
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static const struct fsl_dspi_devtype_data ls1021a_v1_data = {
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.trans_mode = DSPI_TCFQ_MODE,
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.max_clock_factor = 8,
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+ .xspi_mode = true,
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};
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static const struct fsl_dspi_devtype_data ls2085a_data = {
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@@ -177,6 +189,7 @@ struct fsl_dspi {
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struct platform_device *pdev;
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struct regmap *regmap;
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+ struct regmap *regmap_pushr;
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int irq;
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struct clk *clk;
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@@ -876,6 +889,35 @@ static const struct regmap_config dspi_regmap_config = {
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.volatile_table = &dspi_volatile_table,
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};
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+static const struct regmap_range dspi_xspi_volatile_ranges[] = {
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+ regmap_reg_range(SPI_MCR, SPI_TCR),
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+ regmap_reg_range(SPI_SR, SPI_SR),
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+ regmap_reg_range(SPI_PUSHR, SPI_RXFR3),
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+ regmap_reg_range(SPI_SREX, SPI_SREX),
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+};
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+
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+static const struct regmap_access_table dspi_xspi_volatile_table = {
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+ .yes_ranges = dspi_xspi_volatile_ranges,
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+ .n_yes_ranges = ARRAY_SIZE(dspi_xspi_volatile_ranges),
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+};
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+
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+static const struct regmap_config dspi_xspi_regmap_config[] = {
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+ {
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+ .reg_bits = 32,
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+ .val_bits = 32,
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+ .reg_stride = 4,
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+ .max_register = 0x13c,
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+ .volatile_table = &dspi_xspi_volatile_table,
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+ },
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+ {
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+ .name = "pushr",
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+ .reg_bits = 16,
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+ .val_bits = 16,
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+ .reg_stride = 2,
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+ .max_register = 0x2,
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+ },
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+};
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+
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static void dspi_init(struct fsl_dspi *dspi)
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{
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regmap_write(dspi->regmap, SPI_MCR, SPI_MCR_MASTER | SPI_MCR_PCSIS);
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@@ -888,6 +930,7 @@ static int dspi_probe(struct platform_device *pdev)
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struct spi_master *master;
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struct fsl_dspi *dspi;
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struct resource *res;
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+ const struct regmap_config *regmap_config;
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void __iomem *base;
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struct fsl_dspi_platform_data *pdata;
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int ret = 0, cs_num, bus_num;
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@@ -946,8 +989,11 @@ static int dspi_probe(struct platform_device *pdev)
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goto out_master_put;
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}
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- dspi->regmap = devm_regmap_init_mmio_clk(&pdev->dev, NULL, base,
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- &dspi_regmap_config);
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+ if (dspi->devtype_data->xspi_mode)
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+ regmap_config = &dspi_xspi_regmap_config[0];
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+ else
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+ regmap_config = &dspi_regmap_config;
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+ dspi->regmap = devm_regmap_init_mmio(&pdev->dev, base, regmap_config);
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if (IS_ERR(dspi->regmap)) {
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dev_err(&pdev->dev, "failed to init regmap: %ld\n",
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PTR_ERR(dspi->regmap));
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@@ -955,6 +1001,19 @@ static int dspi_probe(struct platform_device *pdev)
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goto out_master_put;
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}
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+ if (dspi->devtype_data->xspi_mode) {
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+ dspi->regmap_pushr = devm_regmap_init_mmio(
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+ &pdev->dev, base + SPI_PUSHR,
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+ &dspi_xspi_regmap_config[1]);
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+ if (IS_ERR(dspi->regmap_pushr)) {
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+ dev_err(&pdev->dev,
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+ "failed to init pushr regmap: %ld\n",
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+ PTR_ERR(dspi->regmap_pushr));
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+ ret = PTR_ERR(dspi->regmap);
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+ goto out_master_put;
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+ }
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+ }
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+
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dspi_init(dspi);
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dspi->irq = platform_get_irq(pdev, 0);
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if (dspi->irq < 0) {
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