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@@ -146,6 +146,7 @@ static bool fsl_ssi_volatile_reg(struct device *dev, unsigned int reg)
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case CCSR_SSI_SRX1:
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case CCSR_SSI_SRX1:
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case CCSR_SSI_SISR:
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case CCSR_SSI_SISR:
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case CCSR_SSI_SFCSR:
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case CCSR_SSI_SFCSR:
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+ case CCSR_SSI_SACNT:
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case CCSR_SSI_SACADD:
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case CCSR_SSI_SACADD:
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case CCSR_SSI_SACDAT:
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case CCSR_SSI_SACDAT:
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case CCSR_SSI_SATAG:
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case CCSR_SSI_SATAG:
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@@ -156,6 +157,21 @@ static bool fsl_ssi_volatile_reg(struct device *dev, unsigned int reg)
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}
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}
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}
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}
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+static bool fsl_ssi_precious_reg(struct device *dev, unsigned int reg)
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+{
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+ switch (reg) {
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+ case CCSR_SSI_SRX0:
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+ case CCSR_SSI_SRX1:
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+ case CCSR_SSI_SISR:
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+ case CCSR_SSI_SACADD:
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+ case CCSR_SSI_SACDAT:
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+ case CCSR_SSI_SATAG:
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+ return true;
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+ default:
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+ return false;
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+ }
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+}
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+
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static bool fsl_ssi_writeable_reg(struct device *dev, unsigned int reg)
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static bool fsl_ssi_writeable_reg(struct device *dev, unsigned int reg)
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{
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{
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switch (reg) {
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switch (reg) {
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@@ -178,6 +194,7 @@ static const struct regmap_config fsl_ssi_regconfig = {
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.num_reg_defaults = ARRAY_SIZE(fsl_ssi_reg_defaults),
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.num_reg_defaults = ARRAY_SIZE(fsl_ssi_reg_defaults),
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.readable_reg = fsl_ssi_readable_reg,
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.readable_reg = fsl_ssi_readable_reg,
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.volatile_reg = fsl_ssi_volatile_reg,
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.volatile_reg = fsl_ssi_volatile_reg,
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+ .precious_reg = fsl_ssi_precious_reg,
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.writeable_reg = fsl_ssi_writeable_reg,
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.writeable_reg = fsl_ssi_writeable_reg,
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.cache_type = REGCACHE_RBTREE,
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.cache_type = REGCACHE_RBTREE,
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};
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};
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@@ -239,8 +256,9 @@ struct fsl_ssi_private {
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unsigned int baudclk_streams;
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unsigned int baudclk_streams;
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unsigned int bitclk_freq;
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unsigned int bitclk_freq;
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- /*regcache for SFCSR*/
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+ /* regcache for volatile regs */
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u32 regcache_sfcsr;
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u32 regcache_sfcsr;
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+ u32 regcache_sacnt;
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/* DMA params */
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/* DMA params */
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struct snd_dmaengine_dai_dma_data dma_params_tx;
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struct snd_dmaengine_dai_dma_data dma_params_tx;
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@@ -1587,6 +1605,8 @@ static int fsl_ssi_suspend(struct device *dev)
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regmap_read(regs, CCSR_SSI_SFCSR,
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regmap_read(regs, CCSR_SSI_SFCSR,
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&ssi_private->regcache_sfcsr);
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&ssi_private->regcache_sfcsr);
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+ regmap_read(regs, CCSR_SSI_SACNT,
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+ &ssi_private->regcache_sacnt);
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regcache_cache_only(regs, true);
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regcache_cache_only(regs, true);
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regcache_mark_dirty(regs);
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regcache_mark_dirty(regs);
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@@ -1605,6 +1625,8 @@ static int fsl_ssi_resume(struct device *dev)
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CCSR_SSI_SFCSR_RFWM1_MASK | CCSR_SSI_SFCSR_TFWM1_MASK |
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CCSR_SSI_SFCSR_RFWM1_MASK | CCSR_SSI_SFCSR_TFWM1_MASK |
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CCSR_SSI_SFCSR_RFWM0_MASK | CCSR_SSI_SFCSR_TFWM0_MASK,
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CCSR_SSI_SFCSR_RFWM0_MASK | CCSR_SSI_SFCSR_TFWM0_MASK,
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ssi_private->regcache_sfcsr);
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ssi_private->regcache_sfcsr);
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+ regmap_write(regs, CCSR_SSI_SACNT,
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+ ssi_private->regcache_sacnt);
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return regcache_sync(regs);
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return regcache_sync(regs);
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}
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}
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