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@@ -48,11 +48,6 @@ void __iomem *at91_aic_base;
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static struct irq_domain *at91_aic_domain;
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static struct device_node *at91_aic_np;
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static unsigned int n_irqs = NR_AIC_IRQS;
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-static unsigned long at91_aic_caps = 0;
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-
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-/* AIC5 introduces a Source Select Register */
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-#define AT91_AIC_CAP_AIC5 (1 << 0)
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-#define has_aic5() (at91_aic_caps & AT91_AIC_CAP_AIC5)
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#ifdef CONFIG_PM
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@@ -92,50 +87,14 @@ static int at91_aic_set_wake(struct irq_data *d, unsigned value)
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void at91_irq_suspend(void)
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{
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- int bit = -1;
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-
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- if (has_aic5()) {
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- /* disable enabled irqs */
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- while ((bit = find_next_bit(backups, n_irqs, bit + 1)) < n_irqs) {
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- at91_aic_write(AT91_AIC5_SSR,
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- bit & AT91_AIC5_INTSEL_MSK);
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- at91_aic_write(AT91_AIC5_IDCR, 1);
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- }
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- /* enable wakeup irqs */
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- bit = -1;
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- while ((bit = find_next_bit(wakeups, n_irqs, bit + 1)) < n_irqs) {
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- at91_aic_write(AT91_AIC5_SSR,
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- bit & AT91_AIC5_INTSEL_MSK);
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- at91_aic_write(AT91_AIC5_IECR, 1);
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- }
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- } else {
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- at91_aic_write(AT91_AIC_IDCR, *backups);
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- at91_aic_write(AT91_AIC_IECR, *wakeups);
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- }
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+ at91_aic_write(AT91_AIC_IDCR, *backups);
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+ at91_aic_write(AT91_AIC_IECR, *wakeups);
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}
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void at91_irq_resume(void)
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{
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- int bit = -1;
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-
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- if (has_aic5()) {
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- /* disable wakeup irqs */
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- while ((bit = find_next_bit(wakeups, n_irqs, bit + 1)) < n_irqs) {
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- at91_aic_write(AT91_AIC5_SSR,
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- bit & AT91_AIC5_INTSEL_MSK);
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- at91_aic_write(AT91_AIC5_IDCR, 1);
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- }
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- /* enable irqs disabled for suspend */
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- bit = -1;
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- while ((bit = find_next_bit(backups, n_irqs, bit + 1)) < n_irqs) {
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- at91_aic_write(AT91_AIC5_SSR,
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- bit & AT91_AIC5_INTSEL_MSK);
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- at91_aic_write(AT91_AIC5_IECR, 1);
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- }
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- } else {
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- at91_aic_write(AT91_AIC_IDCR, *wakeups);
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- at91_aic_write(AT91_AIC_IECR, *backups);
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- }
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+ at91_aic_write(AT91_AIC_IDCR, *wakeups);
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+ at91_aic_write(AT91_AIC_IECR, *backups);
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}
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#else
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@@ -169,21 +128,6 @@ at91_aic_handle_irq(struct pt_regs *regs)
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handle_IRQ(irqnr, regs);
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}
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-asmlinkage void __exception_irq_entry
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-at91_aic5_handle_irq(struct pt_regs *regs)
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-{
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- u32 irqnr;
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- u32 irqstat;
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-
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- irqnr = at91_aic_read(AT91_AIC5_IVR);
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- irqstat = at91_aic_read(AT91_AIC5_ISR);
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-
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- if (!irqstat)
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- at91_aic_write(AT91_AIC5_EOICR, 0);
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- else
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- handle_IRQ(irqnr, regs);
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-}
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-
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static void at91_aic_mask_irq(struct irq_data *d)
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{
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/* Disable interrupt on AIC */
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@@ -192,15 +136,6 @@ static void at91_aic_mask_irq(struct irq_data *d)
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clear_backup(d->hwirq);
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}
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-static void __maybe_unused at91_aic5_mask_irq(struct irq_data *d)
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-{
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- /* Disable interrupt on AIC5 */
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- at91_aic_write(AT91_AIC5_SSR, d->hwirq & AT91_AIC5_INTSEL_MSK);
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- at91_aic_write(AT91_AIC5_IDCR, 1);
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- /* Update ISR cache */
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- clear_backup(d->hwirq);
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-}
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-
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static void at91_aic_unmask_irq(struct irq_data *d)
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{
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/* Enable interrupt on AIC */
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@@ -209,15 +144,6 @@ static void at91_aic_unmask_irq(struct irq_data *d)
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set_backup(d->hwirq);
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}
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-static void __maybe_unused at91_aic5_unmask_irq(struct irq_data *d)
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-{
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- /* Enable interrupt on AIC5 */
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- at91_aic_write(AT91_AIC5_SSR, d->hwirq & AT91_AIC5_INTSEL_MSK);
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- at91_aic_write(AT91_AIC5_IECR, 1);
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- /* Update ISR cache */
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- set_backup(d->hwirq);
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-}
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-
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static void at91_aic_eoi(struct irq_data *d)
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{
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/*
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@@ -227,11 +153,6 @@ static void at91_aic_eoi(struct irq_data *d)
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at91_aic_write(AT91_AIC_EOICR, 0);
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}
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-static void __maybe_unused at91_aic5_eoi(struct irq_data *d)
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-{
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- at91_aic_write(AT91_AIC5_EOICR, 0);
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-}
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-
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static unsigned long *at91_extern_irq;
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u32 at91_get_extern_irq(void)
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@@ -282,16 +203,8 @@ static int at91_aic_set_type(struct irq_data *d, unsigned type)
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if (srctype < 0)
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return srctype;
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- if (has_aic5()) {
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- at91_aic_write(AT91_AIC5_SSR,
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- d->hwirq & AT91_AIC5_INTSEL_MSK);
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- smr = at91_aic_read(AT91_AIC5_SMR) & ~AT91_AIC_SRCTYPE;
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- at91_aic_write(AT91_AIC5_SMR, smr | srctype);
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- } else {
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- smr = at91_aic_read(AT91_AIC_SMR(d->hwirq))
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- & ~AT91_AIC_SRCTYPE;
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- at91_aic_write(AT91_AIC_SMR(d->hwirq), smr | srctype);
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- }
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+ smr = at91_aic_read(AT91_AIC_SMR(d->hwirq)) & ~AT91_AIC_SRCTYPE;
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+ at91_aic_write(AT91_AIC_SMR(d->hwirq), smr | srctype);
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return 0;
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}
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@@ -331,177 +244,6 @@ static void __init at91_aic_hw_init(unsigned int spu_vector)
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at91_aic_write(AT91_AIC_ICCR, 0xFFFFFFFF);
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}
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-static void __init __maybe_unused at91_aic5_hw_init(unsigned int spu_vector)
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-{
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- int i;
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-
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- /*
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- * Perform 8 End Of Interrupt Command to make sure AIC
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- * will not Lock out nIRQ
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- */
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- for (i = 0; i < 8; i++)
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- at91_aic_write(AT91_AIC5_EOICR, 0);
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-
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- /*
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- * Spurious Interrupt ID in Spurious Vector Register.
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- * When there is no current interrupt, the IRQ Vector Register
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- * reads the value stored in AIC_SPU
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- */
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- at91_aic_write(AT91_AIC5_SPU, spu_vector);
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-
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- /* No debugging in AIC: Debug (Protect) Control Register */
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- at91_aic_write(AT91_AIC5_DCR, 0);
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-
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- /* Disable and clear all interrupts initially */
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- for (i = 0; i < n_irqs; i++) {
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- at91_aic_write(AT91_AIC5_SSR, i & AT91_AIC5_INTSEL_MSK);
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- at91_aic_write(AT91_AIC5_IDCR, 1);
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- at91_aic_write(AT91_AIC5_ICCR, 1);
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- }
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-}
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-
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-#if defined(CONFIG_OF)
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-static unsigned int *at91_aic_irq_priorities;
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-
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-static int at91_aic_irq_map(struct irq_domain *h, unsigned int virq,
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- irq_hw_number_t hw)
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-{
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- /* Put virq number in Source Vector Register */
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- at91_aic_write(AT91_AIC_SVR(hw), virq);
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-
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- /* Active Low interrupt, with priority */
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- at91_aic_write(AT91_AIC_SMR(hw),
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- AT91_AIC_SRCTYPE_LOW | at91_aic_irq_priorities[hw]);
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-
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- irq_set_chip_and_handler(virq, &at91_aic_chip, handle_fasteoi_irq);
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- set_irq_flags(virq, IRQF_VALID | IRQF_PROBE);
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-
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- return 0;
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-}
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-
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-static int at91_aic5_irq_map(struct irq_domain *h, unsigned int virq,
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- irq_hw_number_t hw)
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-{
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- at91_aic_write(AT91_AIC5_SSR, hw & AT91_AIC5_INTSEL_MSK);
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-
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- /* Put virq number in Source Vector Register */
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- at91_aic_write(AT91_AIC5_SVR, virq);
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-
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- /* Active Low interrupt, with priority */
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- at91_aic_write(AT91_AIC5_SMR,
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- AT91_AIC_SRCTYPE_LOW | at91_aic_irq_priorities[hw]);
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-
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- irq_set_chip_and_handler(virq, &at91_aic_chip, handle_fasteoi_irq);
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- set_irq_flags(virq, IRQF_VALID | IRQF_PROBE);
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-
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- return 0;
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-}
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-
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-static int at91_aic_irq_domain_xlate(struct irq_domain *d, struct device_node *ctrlr,
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- const u32 *intspec, unsigned int intsize,
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- irq_hw_number_t *out_hwirq, unsigned int *out_type)
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-{
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- if (WARN_ON(intsize < 3))
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- return -EINVAL;
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- if (WARN_ON(intspec[0] >= n_irqs))
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- return -EINVAL;
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- if (WARN_ON((intspec[2] < AT91_AIC_IRQ_MIN_PRIORITY)
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- || (intspec[2] > AT91_AIC_IRQ_MAX_PRIORITY)))
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- return -EINVAL;
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-
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- *out_hwirq = intspec[0];
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- *out_type = intspec[1] & IRQ_TYPE_SENSE_MASK;
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- at91_aic_irq_priorities[*out_hwirq] = intspec[2];
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-
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- return 0;
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-}
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-
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-static struct irq_domain_ops at91_aic_irq_ops = {
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- .map = at91_aic_irq_map,
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- .xlate = at91_aic_irq_domain_xlate,
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-};
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-
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-int __init at91_aic_of_common_init(struct device_node *node,
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- struct device_node *parent)
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-{
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- struct property *prop;
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- const __be32 *p;
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- u32 val;
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-
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- at91_extern_irq = kzalloc(BITS_TO_LONGS(n_irqs)
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- * sizeof(*at91_extern_irq), GFP_KERNEL);
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- if (!at91_extern_irq)
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- return -ENOMEM;
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-
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- if (at91_aic_pm_init()) {
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- kfree(at91_extern_irq);
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- return -ENOMEM;
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- }
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-
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- at91_aic_irq_priorities = kzalloc(n_irqs
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- * sizeof(*at91_aic_irq_priorities),
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- GFP_KERNEL);
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- if (!at91_aic_irq_priorities)
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- return -ENOMEM;
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-
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- at91_aic_base = of_iomap(node, 0);
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- at91_aic_np = node;
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-
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- at91_aic_domain = irq_domain_add_linear(at91_aic_np, n_irqs,
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- &at91_aic_irq_ops, NULL);
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- if (!at91_aic_domain)
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- panic("Unable to add AIC irq domain (DT)\n");
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-
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- of_property_for_each_u32(node, "atmel,external-irqs", prop, p, val) {
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- if (val >= n_irqs)
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- pr_warn("AIC: external irq %d >= %d skip it\n",
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- val, n_irqs);
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- else
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- set_bit(val, at91_extern_irq);
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- }
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-
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- irq_set_default_host(at91_aic_domain);
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-
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- return 0;
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-}
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-
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-int __init at91_aic_of_init(struct device_node *node,
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- struct device_node *parent)
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-{
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- int err;
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-
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- err = at91_aic_of_common_init(node, parent);
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- if (err)
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- return err;
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-
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- at91_aic_hw_init(n_irqs);
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-
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- return 0;
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-}
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-
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-int __init at91_aic5_of_init(struct device_node *node,
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- struct device_node *parent)
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-{
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- int err;
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-
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- at91_aic_caps |= AT91_AIC_CAP_AIC5;
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- n_irqs = NR_AIC5_IRQS;
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- at91_aic_chip.irq_ack = at91_aic5_mask_irq;
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- at91_aic_chip.irq_mask = at91_aic5_mask_irq;
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- at91_aic_chip.irq_unmask = at91_aic5_unmask_irq;
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- at91_aic_chip.irq_eoi = at91_aic5_eoi;
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- at91_aic_irq_ops.map = at91_aic5_irq_map;
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-
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- err = at91_aic_of_common_init(node, parent);
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- if (err)
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- return err;
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-
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- at91_aic5_hw_init(n_irqs);
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-
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- return 0;
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-}
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-#endif
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-
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/*
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* Initialize the AIC interrupt controller.
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*/
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Nicolas Ferre