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@@ -30,6 +30,7 @@
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#include <asm/cache.h>
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#include <asm/cache.h>
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#include <asm/cputype.h>
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#include <asm/cputype.h>
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#include <asm/kernel-pgtable.h>
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#include <asm/kernel-pgtable.h>
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+#include <asm/kvm_arm.h>
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#include <asm/memory.h>
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#include <asm/memory.h>
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#include <asm/pgtable-hwdef.h>
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#include <asm/pgtable-hwdef.h>
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#include <asm/pgtable.h>
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#include <asm/pgtable.h>
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@@ -464,9 +465,27 @@ CPU_LE( bic x0, x0, #(3 << 24) ) // Clear the EE and E0E bits for EL1
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isb
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isb
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ret
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ret
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+2:
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+#ifdef CONFIG_ARM64_VHE
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+ /*
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+ * Check for VHE being present. For the rest of the EL2 setup,
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+ * x2 being non-zero indicates that we do have VHE, and that the
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+ * kernel is intended to run at EL2.
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+ */
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+ mrs x2, id_aa64mmfr1_el1
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+ ubfx x2, x2, #8, #4
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+#else
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+ mov x2, xzr
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+#endif
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+
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/* Hyp configuration. */
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/* Hyp configuration. */
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-2: mov x0, #(1 << 31) // 64-bit EL1
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+ mov x0, #HCR_RW // 64-bit EL1
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+ cbz x2, set_hcr
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+ orr x0, x0, #HCR_TGE // Enable Host Extensions
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+ orr x0, x0, #HCR_E2H
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+set_hcr:
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msr hcr_el2, x0
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msr hcr_el2, x0
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+ isb
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/* Generic timers. */
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/* Generic timers. */
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mrs x0, cnthctl_el2
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mrs x0, cnthctl_el2
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@@ -526,6 +545,13 @@ CPU_LE( movk x0, #0x30d0, lsl #16 ) // Clear EE and E0E on LE systems
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/* Stage-2 translation */
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/* Stage-2 translation */
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msr vttbr_el2, xzr
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msr vttbr_el2, xzr
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+ cbz x2, install_el2_stub
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+
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+ mov w20, #BOOT_CPU_MODE_EL2 // This CPU booted in EL2
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+ isb
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+ ret
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+
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+install_el2_stub:
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/* Hypervisor stub */
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/* Hypervisor stub */
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adrp x0, __hyp_stub_vectors
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adrp x0, __hyp_stub_vectors
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add x0, x0, #:lo12:__hyp_stub_vectors
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add x0, x0, #:lo12:__hyp_stub_vectors
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