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@@ -66,6 +66,20 @@ static u32 esdhc_readl_fixup(struct sdhci_host *host,
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return ret;
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}
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}
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+ /*
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+ * The DAT[3:0] line signal levels and the CMD line signal level are
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+ * not compatible with standard SDHC register. The line signal levels
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+ * DAT[7:0] are at bits 31:24 and the command line signal level is at
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+ * bit 23. All other bits are the same as in the standard SDHC
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+ * register.
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+ */
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+ if (spec_reg == SDHCI_PRESENT_STATE) {
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+ ret = value & 0x000fffff;
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+ ret |= (value >> 4) & SDHCI_DATA_LVL_MASK;
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+ ret |= (value << 1) & SDHCI_CMD_LVL;
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+ return ret;
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+ }
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+
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ret = value;
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return ret;
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}
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