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@@ -88,14 +88,14 @@ static u64 notrace omap_32k_read_sched_clock(void)
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return ti_32k_read_cycles(&ti_32k_timer.cs);
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return ti_32k_read_cycles(&ti_32k_timer.cs);
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}
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}
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-static void __init ti_32k_timer_init(struct device_node *np)
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+static int __init ti_32k_timer_init(struct device_node *np)
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{
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{
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int ret;
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int ret;
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ti_32k_timer.base = of_iomap(np, 0);
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ti_32k_timer.base = of_iomap(np, 0);
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if (!ti_32k_timer.base) {
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if (!ti_32k_timer.base) {
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pr_err("Can't ioremap 32k timer base\n");
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pr_err("Can't ioremap 32k timer base\n");
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- return;
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+ return -ENXIO;
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}
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}
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ti_32k_timer.counter = ti_32k_timer.base;
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ti_32k_timer.counter = ti_32k_timer.base;
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@@ -116,11 +116,13 @@ static void __init ti_32k_timer_init(struct device_node *np)
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ret = clocksource_register_hz(&ti_32k_timer.cs, 32768);
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ret = clocksource_register_hz(&ti_32k_timer.cs, 32768);
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if (ret) {
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if (ret) {
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pr_err("32k_counter: can't register clocksource\n");
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pr_err("32k_counter: can't register clocksource\n");
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- return;
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+ return ret;
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}
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}
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sched_clock_register(omap_32k_read_sched_clock, 32, 32768);
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sched_clock_register(omap_32k_read_sched_clock, 32, 32768);
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pr_info("OMAP clocksource: 32k_counter at 32768 Hz\n");
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pr_info("OMAP clocksource: 32k_counter at 32768 Hz\n");
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+
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+ return 0;
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}
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}
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-CLOCKSOURCE_OF_DECLARE(ti_32k_timer, "ti,omap-counter32k",
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+CLOCKSOURCE_OF_DECLARE_RET(ti_32k_timer, "ti,omap-counter32k",
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ti_32k_timer_init);
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ti_32k_timer_init);
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