dmaengine.c 36 KB

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  1. /*
  2. * Copyright(c) 2004 - 2006 Intel Corporation. All rights reserved.
  3. *
  4. * This program is free software; you can redistribute it and/or modify it
  5. * under the terms of the GNU General Public License as published by the Free
  6. * Software Foundation; either version 2 of the License, or (at your option)
  7. * any later version.
  8. *
  9. * This program is distributed in the hope that it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. * The full GNU General Public License is included in this distribution in the
  15. * file called COPYING.
  16. */
  17. /*
  18. * This code implements the DMA subsystem. It provides a HW-neutral interface
  19. * for other kernel code to use asynchronous memory copy capabilities,
  20. * if present, and allows different HW DMA drivers to register as providing
  21. * this capability.
  22. *
  23. * Due to the fact we are accelerating what is already a relatively fast
  24. * operation, the code goes to great lengths to avoid additional overhead,
  25. * such as locking.
  26. *
  27. * LOCKING:
  28. *
  29. * The subsystem keeps a global list of dma_device structs it is protected by a
  30. * mutex, dma_list_mutex.
  31. *
  32. * A subsystem can get access to a channel by calling dmaengine_get() followed
  33. * by dma_find_channel(), or if it has need for an exclusive channel it can call
  34. * dma_request_channel(). Once a channel is allocated a reference is taken
  35. * against its corresponding driver to disable removal.
  36. *
  37. * Each device has a channels list, which runs unlocked but is never modified
  38. * once the device is registered, it's just setup by the driver.
  39. *
  40. * See Documentation/driver-api/dmaengine for more details
  41. */
  42. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  43. #include <linux/platform_device.h>
  44. #include <linux/dma-mapping.h>
  45. #include <linux/init.h>
  46. #include <linux/module.h>
  47. #include <linux/mm.h>
  48. #include <linux/device.h>
  49. #include <linux/dmaengine.h>
  50. #include <linux/hardirq.h>
  51. #include <linux/spinlock.h>
  52. #include <linux/percpu.h>
  53. #include <linux/rcupdate.h>
  54. #include <linux/mutex.h>
  55. #include <linux/jiffies.h>
  56. #include <linux/rculist.h>
  57. #include <linux/idr.h>
  58. #include <linux/slab.h>
  59. #include <linux/acpi.h>
  60. #include <linux/acpi_dma.h>
  61. #include <linux/of_dma.h>
  62. #include <linux/mempool.h>
  63. static DEFINE_MUTEX(dma_list_mutex);
  64. static DEFINE_IDA(dma_ida);
  65. static LIST_HEAD(dma_device_list);
  66. static long dmaengine_ref_count;
  67. /* --- sysfs implementation --- */
  68. /**
  69. * dev_to_dma_chan - convert a device pointer to the its sysfs container object
  70. * @dev - device node
  71. *
  72. * Must be called under dma_list_mutex
  73. */
  74. static struct dma_chan *dev_to_dma_chan(struct device *dev)
  75. {
  76. struct dma_chan_dev *chan_dev;
  77. chan_dev = container_of(dev, typeof(*chan_dev), device);
  78. return chan_dev->chan;
  79. }
  80. static ssize_t memcpy_count_show(struct device *dev,
  81. struct device_attribute *attr, char *buf)
  82. {
  83. struct dma_chan *chan;
  84. unsigned long count = 0;
  85. int i;
  86. int err;
  87. mutex_lock(&dma_list_mutex);
  88. chan = dev_to_dma_chan(dev);
  89. if (chan) {
  90. for_each_possible_cpu(i)
  91. count += per_cpu_ptr(chan->local, i)->memcpy_count;
  92. err = sprintf(buf, "%lu\n", count);
  93. } else
  94. err = -ENODEV;
  95. mutex_unlock(&dma_list_mutex);
  96. return err;
  97. }
  98. static DEVICE_ATTR_RO(memcpy_count);
  99. static ssize_t bytes_transferred_show(struct device *dev,
  100. struct device_attribute *attr, char *buf)
  101. {
  102. struct dma_chan *chan;
  103. unsigned long count = 0;
  104. int i;
  105. int err;
  106. mutex_lock(&dma_list_mutex);
  107. chan = dev_to_dma_chan(dev);
  108. if (chan) {
  109. for_each_possible_cpu(i)
  110. count += per_cpu_ptr(chan->local, i)->bytes_transferred;
  111. err = sprintf(buf, "%lu\n", count);
  112. } else
  113. err = -ENODEV;
  114. mutex_unlock(&dma_list_mutex);
  115. return err;
  116. }
  117. static DEVICE_ATTR_RO(bytes_transferred);
  118. static ssize_t in_use_show(struct device *dev, struct device_attribute *attr,
  119. char *buf)
  120. {
  121. struct dma_chan *chan;
  122. int err;
  123. mutex_lock(&dma_list_mutex);
  124. chan = dev_to_dma_chan(dev);
  125. if (chan)
  126. err = sprintf(buf, "%d\n", chan->client_count);
  127. else
  128. err = -ENODEV;
  129. mutex_unlock(&dma_list_mutex);
  130. return err;
  131. }
  132. static DEVICE_ATTR_RO(in_use);
  133. static struct attribute *dma_dev_attrs[] = {
  134. &dev_attr_memcpy_count.attr,
  135. &dev_attr_bytes_transferred.attr,
  136. &dev_attr_in_use.attr,
  137. NULL,
  138. };
  139. ATTRIBUTE_GROUPS(dma_dev);
  140. static void chan_dev_release(struct device *dev)
  141. {
  142. struct dma_chan_dev *chan_dev;
  143. chan_dev = container_of(dev, typeof(*chan_dev), device);
  144. if (atomic_dec_and_test(chan_dev->idr_ref)) {
  145. ida_free(&dma_ida, chan_dev->dev_id);
  146. kfree(chan_dev->idr_ref);
  147. }
  148. kfree(chan_dev);
  149. }
  150. static struct class dma_devclass = {
  151. .name = "dma",
  152. .dev_groups = dma_dev_groups,
  153. .dev_release = chan_dev_release,
  154. };
  155. /* --- client and device registration --- */
  156. #define dma_device_satisfies_mask(device, mask) \
  157. __dma_device_satisfies_mask((device), &(mask))
  158. static int
  159. __dma_device_satisfies_mask(struct dma_device *device,
  160. const dma_cap_mask_t *want)
  161. {
  162. dma_cap_mask_t has;
  163. bitmap_and(has.bits, want->bits, device->cap_mask.bits,
  164. DMA_TX_TYPE_END);
  165. return bitmap_equal(want->bits, has.bits, DMA_TX_TYPE_END);
  166. }
  167. static struct module *dma_chan_to_owner(struct dma_chan *chan)
  168. {
  169. return chan->device->dev->driver->owner;
  170. }
  171. /**
  172. * balance_ref_count - catch up the channel reference count
  173. * @chan - channel to balance ->client_count versus dmaengine_ref_count
  174. *
  175. * balance_ref_count must be called under dma_list_mutex
  176. */
  177. static void balance_ref_count(struct dma_chan *chan)
  178. {
  179. struct module *owner = dma_chan_to_owner(chan);
  180. while (chan->client_count < dmaengine_ref_count) {
  181. __module_get(owner);
  182. chan->client_count++;
  183. }
  184. }
  185. /**
  186. * dma_chan_get - try to grab a dma channel's parent driver module
  187. * @chan - channel to grab
  188. *
  189. * Must be called under dma_list_mutex
  190. */
  191. static int dma_chan_get(struct dma_chan *chan)
  192. {
  193. struct module *owner = dma_chan_to_owner(chan);
  194. int ret;
  195. /* The channel is already in use, update client count */
  196. if (chan->client_count) {
  197. __module_get(owner);
  198. goto out;
  199. }
  200. if (!try_module_get(owner))
  201. return -ENODEV;
  202. /* allocate upon first client reference */
  203. if (chan->device->device_alloc_chan_resources) {
  204. ret = chan->device->device_alloc_chan_resources(chan);
  205. if (ret < 0)
  206. goto err_out;
  207. }
  208. if (!dma_has_cap(DMA_PRIVATE, chan->device->cap_mask))
  209. balance_ref_count(chan);
  210. out:
  211. chan->client_count++;
  212. return 0;
  213. err_out:
  214. module_put(owner);
  215. return ret;
  216. }
  217. /**
  218. * dma_chan_put - drop a reference to a dma channel's parent driver module
  219. * @chan - channel to release
  220. *
  221. * Must be called under dma_list_mutex
  222. */
  223. static void dma_chan_put(struct dma_chan *chan)
  224. {
  225. /* This channel is not in use, bail out */
  226. if (!chan->client_count)
  227. return;
  228. chan->client_count--;
  229. module_put(dma_chan_to_owner(chan));
  230. /* This channel is not in use anymore, free it */
  231. if (!chan->client_count && chan->device->device_free_chan_resources) {
  232. /* Make sure all operations have completed */
  233. dmaengine_synchronize(chan);
  234. chan->device->device_free_chan_resources(chan);
  235. }
  236. /* If the channel is used via a DMA request router, free the mapping */
  237. if (chan->router && chan->router->route_free) {
  238. chan->router->route_free(chan->router->dev, chan->route_data);
  239. chan->router = NULL;
  240. chan->route_data = NULL;
  241. }
  242. }
  243. enum dma_status dma_sync_wait(struct dma_chan *chan, dma_cookie_t cookie)
  244. {
  245. enum dma_status status;
  246. unsigned long dma_sync_wait_timeout = jiffies + msecs_to_jiffies(5000);
  247. dma_async_issue_pending(chan);
  248. do {
  249. status = dma_async_is_tx_complete(chan, cookie, NULL, NULL);
  250. if (time_after_eq(jiffies, dma_sync_wait_timeout)) {
  251. dev_err(chan->device->dev, "%s: timeout!\n", __func__);
  252. return DMA_ERROR;
  253. }
  254. if (status != DMA_IN_PROGRESS)
  255. break;
  256. cpu_relax();
  257. } while (1);
  258. return status;
  259. }
  260. EXPORT_SYMBOL(dma_sync_wait);
  261. /**
  262. * dma_cap_mask_all - enable iteration over all operation types
  263. */
  264. static dma_cap_mask_t dma_cap_mask_all;
  265. /**
  266. * dma_chan_tbl_ent - tracks channel allocations per core/operation
  267. * @chan - associated channel for this entry
  268. */
  269. struct dma_chan_tbl_ent {
  270. struct dma_chan *chan;
  271. };
  272. /**
  273. * channel_table - percpu lookup table for memory-to-memory offload providers
  274. */
  275. static struct dma_chan_tbl_ent __percpu *channel_table[DMA_TX_TYPE_END];
  276. static int __init dma_channel_table_init(void)
  277. {
  278. enum dma_transaction_type cap;
  279. int err = 0;
  280. bitmap_fill(dma_cap_mask_all.bits, DMA_TX_TYPE_END);
  281. /* 'interrupt', 'private', and 'slave' are channel capabilities,
  282. * but are not associated with an operation so they do not need
  283. * an entry in the channel_table
  284. */
  285. clear_bit(DMA_INTERRUPT, dma_cap_mask_all.bits);
  286. clear_bit(DMA_PRIVATE, dma_cap_mask_all.bits);
  287. clear_bit(DMA_SLAVE, dma_cap_mask_all.bits);
  288. for_each_dma_cap_mask(cap, dma_cap_mask_all) {
  289. channel_table[cap] = alloc_percpu(struct dma_chan_tbl_ent);
  290. if (!channel_table[cap]) {
  291. err = -ENOMEM;
  292. break;
  293. }
  294. }
  295. if (err) {
  296. pr_err("initialization failure\n");
  297. for_each_dma_cap_mask(cap, dma_cap_mask_all)
  298. free_percpu(channel_table[cap]);
  299. }
  300. return err;
  301. }
  302. arch_initcall(dma_channel_table_init);
  303. /**
  304. * dma_find_channel - find a channel to carry out the operation
  305. * @tx_type: transaction type
  306. */
  307. struct dma_chan *dma_find_channel(enum dma_transaction_type tx_type)
  308. {
  309. return this_cpu_read(channel_table[tx_type]->chan);
  310. }
  311. EXPORT_SYMBOL(dma_find_channel);
  312. /**
  313. * dma_issue_pending_all - flush all pending operations across all channels
  314. */
  315. void dma_issue_pending_all(void)
  316. {
  317. struct dma_device *device;
  318. struct dma_chan *chan;
  319. rcu_read_lock();
  320. list_for_each_entry_rcu(device, &dma_device_list, global_node) {
  321. if (dma_has_cap(DMA_PRIVATE, device->cap_mask))
  322. continue;
  323. list_for_each_entry(chan, &device->channels, device_node)
  324. if (chan->client_count)
  325. device->device_issue_pending(chan);
  326. }
  327. rcu_read_unlock();
  328. }
  329. EXPORT_SYMBOL(dma_issue_pending_all);
  330. /**
  331. * dma_chan_is_local - returns true if the channel is in the same numa-node as the cpu
  332. */
  333. static bool dma_chan_is_local(struct dma_chan *chan, int cpu)
  334. {
  335. int node = dev_to_node(chan->device->dev);
  336. return node == -1 || cpumask_test_cpu(cpu, cpumask_of_node(node));
  337. }
  338. /**
  339. * min_chan - returns the channel with min count and in the same numa-node as the cpu
  340. * @cap: capability to match
  341. * @cpu: cpu index which the channel should be close to
  342. *
  343. * If some channels are close to the given cpu, the one with the lowest
  344. * reference count is returned. Otherwise, cpu is ignored and only the
  345. * reference count is taken into account.
  346. * Must be called under dma_list_mutex.
  347. */
  348. static struct dma_chan *min_chan(enum dma_transaction_type cap, int cpu)
  349. {
  350. struct dma_device *device;
  351. struct dma_chan *chan;
  352. struct dma_chan *min = NULL;
  353. struct dma_chan *localmin = NULL;
  354. list_for_each_entry(device, &dma_device_list, global_node) {
  355. if (!dma_has_cap(cap, device->cap_mask) ||
  356. dma_has_cap(DMA_PRIVATE, device->cap_mask))
  357. continue;
  358. list_for_each_entry(chan, &device->channels, device_node) {
  359. if (!chan->client_count)
  360. continue;
  361. if (!min || chan->table_count < min->table_count)
  362. min = chan;
  363. if (dma_chan_is_local(chan, cpu))
  364. if (!localmin ||
  365. chan->table_count < localmin->table_count)
  366. localmin = chan;
  367. }
  368. }
  369. chan = localmin ? localmin : min;
  370. if (chan)
  371. chan->table_count++;
  372. return chan;
  373. }
  374. /**
  375. * dma_channel_rebalance - redistribute the available channels
  376. *
  377. * Optimize for cpu isolation (each cpu gets a dedicated channel for an
  378. * operation type) in the SMP case, and operation isolation (avoid
  379. * multi-tasking channels) in the non-SMP case. Must be called under
  380. * dma_list_mutex.
  381. */
  382. static void dma_channel_rebalance(void)
  383. {
  384. struct dma_chan *chan;
  385. struct dma_device *device;
  386. int cpu;
  387. int cap;
  388. /* undo the last distribution */
  389. for_each_dma_cap_mask(cap, dma_cap_mask_all)
  390. for_each_possible_cpu(cpu)
  391. per_cpu_ptr(channel_table[cap], cpu)->chan = NULL;
  392. list_for_each_entry(device, &dma_device_list, global_node) {
  393. if (dma_has_cap(DMA_PRIVATE, device->cap_mask))
  394. continue;
  395. list_for_each_entry(chan, &device->channels, device_node)
  396. chan->table_count = 0;
  397. }
  398. /* don't populate the channel_table if no clients are available */
  399. if (!dmaengine_ref_count)
  400. return;
  401. /* redistribute available channels */
  402. for_each_dma_cap_mask(cap, dma_cap_mask_all)
  403. for_each_online_cpu(cpu) {
  404. chan = min_chan(cap, cpu);
  405. per_cpu_ptr(channel_table[cap], cpu)->chan = chan;
  406. }
  407. }
  408. int dma_get_slave_caps(struct dma_chan *chan, struct dma_slave_caps *caps)
  409. {
  410. struct dma_device *device;
  411. if (!chan || !caps)
  412. return -EINVAL;
  413. device = chan->device;
  414. /* check if the channel supports slave transactions */
  415. if (!(test_bit(DMA_SLAVE, device->cap_mask.bits) ||
  416. test_bit(DMA_CYCLIC, device->cap_mask.bits)))
  417. return -ENXIO;
  418. /*
  419. * Check whether it reports it uses the generic slave
  420. * capabilities, if not, that means it doesn't support any
  421. * kind of slave capabilities reporting.
  422. */
  423. if (!device->directions)
  424. return -ENXIO;
  425. caps->src_addr_widths = device->src_addr_widths;
  426. caps->dst_addr_widths = device->dst_addr_widths;
  427. caps->directions = device->directions;
  428. caps->max_burst = device->max_burst;
  429. caps->residue_granularity = device->residue_granularity;
  430. caps->descriptor_reuse = device->descriptor_reuse;
  431. caps->cmd_pause = !!device->device_pause;
  432. caps->cmd_resume = !!device->device_resume;
  433. caps->cmd_terminate = !!device->device_terminate_all;
  434. return 0;
  435. }
  436. EXPORT_SYMBOL_GPL(dma_get_slave_caps);
  437. static struct dma_chan *private_candidate(const dma_cap_mask_t *mask,
  438. struct dma_device *dev,
  439. dma_filter_fn fn, void *fn_param)
  440. {
  441. struct dma_chan *chan;
  442. if (mask && !__dma_device_satisfies_mask(dev, mask)) {
  443. dev_dbg(dev->dev, "%s: wrong capabilities\n", __func__);
  444. return NULL;
  445. }
  446. /* devices with multiple channels need special handling as we need to
  447. * ensure that all channels are either private or public.
  448. */
  449. if (dev->chancnt > 1 && !dma_has_cap(DMA_PRIVATE, dev->cap_mask))
  450. list_for_each_entry(chan, &dev->channels, device_node) {
  451. /* some channels are already publicly allocated */
  452. if (chan->client_count)
  453. return NULL;
  454. }
  455. list_for_each_entry(chan, &dev->channels, device_node) {
  456. if (chan->client_count) {
  457. dev_dbg(dev->dev, "%s: %s busy\n",
  458. __func__, dma_chan_name(chan));
  459. continue;
  460. }
  461. if (fn && !fn(chan, fn_param)) {
  462. dev_dbg(dev->dev, "%s: %s filter said false\n",
  463. __func__, dma_chan_name(chan));
  464. continue;
  465. }
  466. return chan;
  467. }
  468. return NULL;
  469. }
  470. static struct dma_chan *find_candidate(struct dma_device *device,
  471. const dma_cap_mask_t *mask,
  472. dma_filter_fn fn, void *fn_param)
  473. {
  474. struct dma_chan *chan = private_candidate(mask, device, fn, fn_param);
  475. int err;
  476. if (chan) {
  477. /* Found a suitable channel, try to grab, prep, and return it.
  478. * We first set DMA_PRIVATE to disable balance_ref_count as this
  479. * channel will not be published in the general-purpose
  480. * allocator
  481. */
  482. dma_cap_set(DMA_PRIVATE, device->cap_mask);
  483. device->privatecnt++;
  484. err = dma_chan_get(chan);
  485. if (err) {
  486. if (err == -ENODEV) {
  487. dev_dbg(device->dev, "%s: %s module removed\n",
  488. __func__, dma_chan_name(chan));
  489. list_del_rcu(&device->global_node);
  490. } else
  491. dev_dbg(device->dev,
  492. "%s: failed to get %s: (%d)\n",
  493. __func__, dma_chan_name(chan), err);
  494. if (--device->privatecnt == 0)
  495. dma_cap_clear(DMA_PRIVATE, device->cap_mask);
  496. chan = ERR_PTR(err);
  497. }
  498. }
  499. return chan ? chan : ERR_PTR(-EPROBE_DEFER);
  500. }
  501. /**
  502. * dma_get_slave_channel - try to get specific channel exclusively
  503. * @chan: target channel
  504. */
  505. struct dma_chan *dma_get_slave_channel(struct dma_chan *chan)
  506. {
  507. int err = -EBUSY;
  508. /* lock against __dma_request_channel */
  509. mutex_lock(&dma_list_mutex);
  510. if (chan->client_count == 0) {
  511. struct dma_device *device = chan->device;
  512. dma_cap_set(DMA_PRIVATE, device->cap_mask);
  513. device->privatecnt++;
  514. err = dma_chan_get(chan);
  515. if (err) {
  516. dev_dbg(chan->device->dev,
  517. "%s: failed to get %s: (%d)\n",
  518. __func__, dma_chan_name(chan), err);
  519. chan = NULL;
  520. if (--device->privatecnt == 0)
  521. dma_cap_clear(DMA_PRIVATE, device->cap_mask);
  522. }
  523. } else
  524. chan = NULL;
  525. mutex_unlock(&dma_list_mutex);
  526. return chan;
  527. }
  528. EXPORT_SYMBOL_GPL(dma_get_slave_channel);
  529. struct dma_chan *dmadev_get_slave_channel(struct dma_device *device,
  530. dma_filter_fn fn, void *fn_param)
  531. {
  532. dma_cap_mask_t mask;
  533. struct dma_chan *chan;
  534. dma_cap_zero(mask);
  535. dma_cap_set(DMA_SLAVE, mask);
  536. /* lock against __dma_request_channel */
  537. mutex_lock(&dma_list_mutex);
  538. chan = find_candidate(device, &mask, fn, fn_param);
  539. mutex_unlock(&dma_list_mutex);
  540. return IS_ERR(chan) ? NULL : chan;
  541. }
  542. EXPORT_SYMBOL_GPL(dmadev_get_slave_channel);
  543. /**
  544. * __dma_request_channel - try to allocate an exclusive channel
  545. * @mask: capabilities that the channel must satisfy
  546. * @fn: optional callback to disposition available channels
  547. * @fn_param: opaque parameter to pass to dma_filter_fn
  548. *
  549. * Returns pointer to appropriate DMA channel on success or NULL.
  550. */
  551. struct dma_chan *__dma_request_channel(const dma_cap_mask_t *mask,
  552. dma_filter_fn fn, void *fn_param)
  553. {
  554. struct dma_device *device, *_d;
  555. struct dma_chan *chan = NULL;
  556. /* Find a channel */
  557. mutex_lock(&dma_list_mutex);
  558. list_for_each_entry_safe(device, _d, &dma_device_list, global_node) {
  559. chan = find_candidate(device, mask, fn, fn_param);
  560. if (!IS_ERR(chan))
  561. break;
  562. chan = NULL;
  563. }
  564. mutex_unlock(&dma_list_mutex);
  565. pr_debug("%s: %s (%s)\n",
  566. __func__,
  567. chan ? "success" : "fail",
  568. chan ? dma_chan_name(chan) : NULL);
  569. return chan;
  570. }
  571. EXPORT_SYMBOL_GPL(__dma_request_channel);
  572. static const struct dma_slave_map *dma_filter_match(struct dma_device *device,
  573. const char *name,
  574. struct device *dev)
  575. {
  576. int i;
  577. if (!device->filter.mapcnt)
  578. return NULL;
  579. for (i = 0; i < device->filter.mapcnt; i++) {
  580. const struct dma_slave_map *map = &device->filter.map[i];
  581. if (!strcmp(map->devname, dev_name(dev)) &&
  582. !strcmp(map->slave, name))
  583. return map;
  584. }
  585. return NULL;
  586. }
  587. /**
  588. * dma_request_chan - try to allocate an exclusive slave channel
  589. * @dev: pointer to client device structure
  590. * @name: slave channel name
  591. *
  592. * Returns pointer to appropriate DMA channel on success or an error pointer.
  593. */
  594. struct dma_chan *dma_request_chan(struct device *dev, const char *name)
  595. {
  596. struct dma_device *d, *_d;
  597. struct dma_chan *chan = NULL;
  598. /* If device-tree is present get slave info from here */
  599. if (dev->of_node)
  600. chan = of_dma_request_slave_channel(dev->of_node, name);
  601. /* If device was enumerated by ACPI get slave info from here */
  602. if (has_acpi_companion(dev) && !chan)
  603. chan = acpi_dma_request_slave_chan_by_name(dev, name);
  604. if (chan) {
  605. /* Valid channel found or requester need to be deferred */
  606. if (!IS_ERR(chan) || PTR_ERR(chan) == -EPROBE_DEFER)
  607. return chan;
  608. }
  609. /* Try to find the channel via the DMA filter map(s) */
  610. mutex_lock(&dma_list_mutex);
  611. list_for_each_entry_safe(d, _d, &dma_device_list, global_node) {
  612. dma_cap_mask_t mask;
  613. const struct dma_slave_map *map = dma_filter_match(d, name, dev);
  614. if (!map)
  615. continue;
  616. dma_cap_zero(mask);
  617. dma_cap_set(DMA_SLAVE, mask);
  618. chan = find_candidate(d, &mask, d->filter.fn, map->param);
  619. if (!IS_ERR(chan))
  620. break;
  621. }
  622. mutex_unlock(&dma_list_mutex);
  623. return chan ? chan : ERR_PTR(-EPROBE_DEFER);
  624. }
  625. EXPORT_SYMBOL_GPL(dma_request_chan);
  626. /**
  627. * dma_request_slave_channel - try to allocate an exclusive slave channel
  628. * @dev: pointer to client device structure
  629. * @name: slave channel name
  630. *
  631. * Returns pointer to appropriate DMA channel on success or NULL.
  632. */
  633. struct dma_chan *dma_request_slave_channel(struct device *dev,
  634. const char *name)
  635. {
  636. struct dma_chan *ch = dma_request_chan(dev, name);
  637. if (IS_ERR(ch))
  638. return NULL;
  639. return ch;
  640. }
  641. EXPORT_SYMBOL_GPL(dma_request_slave_channel);
  642. /**
  643. * dma_request_chan_by_mask - allocate a channel satisfying certain capabilities
  644. * @mask: capabilities that the channel must satisfy
  645. *
  646. * Returns pointer to appropriate DMA channel on success or an error pointer.
  647. */
  648. struct dma_chan *dma_request_chan_by_mask(const dma_cap_mask_t *mask)
  649. {
  650. struct dma_chan *chan;
  651. if (!mask)
  652. return ERR_PTR(-ENODEV);
  653. chan = __dma_request_channel(mask, NULL, NULL);
  654. if (!chan) {
  655. mutex_lock(&dma_list_mutex);
  656. if (list_empty(&dma_device_list))
  657. chan = ERR_PTR(-EPROBE_DEFER);
  658. else
  659. chan = ERR_PTR(-ENODEV);
  660. mutex_unlock(&dma_list_mutex);
  661. }
  662. return chan;
  663. }
  664. EXPORT_SYMBOL_GPL(dma_request_chan_by_mask);
  665. void dma_release_channel(struct dma_chan *chan)
  666. {
  667. mutex_lock(&dma_list_mutex);
  668. WARN_ONCE(chan->client_count != 1,
  669. "chan reference count %d != 1\n", chan->client_count);
  670. dma_chan_put(chan);
  671. /* drop PRIVATE cap enabled by __dma_request_channel() */
  672. if (--chan->device->privatecnt == 0)
  673. dma_cap_clear(DMA_PRIVATE, chan->device->cap_mask);
  674. mutex_unlock(&dma_list_mutex);
  675. }
  676. EXPORT_SYMBOL_GPL(dma_release_channel);
  677. /**
  678. * dmaengine_get - register interest in dma_channels
  679. */
  680. void dmaengine_get(void)
  681. {
  682. struct dma_device *device, *_d;
  683. struct dma_chan *chan;
  684. int err;
  685. mutex_lock(&dma_list_mutex);
  686. dmaengine_ref_count++;
  687. /* try to grab channels */
  688. list_for_each_entry_safe(device, _d, &dma_device_list, global_node) {
  689. if (dma_has_cap(DMA_PRIVATE, device->cap_mask))
  690. continue;
  691. list_for_each_entry(chan, &device->channels, device_node) {
  692. err = dma_chan_get(chan);
  693. if (err == -ENODEV) {
  694. /* module removed before we could use it */
  695. list_del_rcu(&device->global_node);
  696. break;
  697. } else if (err)
  698. dev_dbg(chan->device->dev,
  699. "%s: failed to get %s: (%d)\n",
  700. __func__, dma_chan_name(chan), err);
  701. }
  702. }
  703. /* if this is the first reference and there were channels
  704. * waiting we need to rebalance to get those channels
  705. * incorporated into the channel table
  706. */
  707. if (dmaengine_ref_count == 1)
  708. dma_channel_rebalance();
  709. mutex_unlock(&dma_list_mutex);
  710. }
  711. EXPORT_SYMBOL(dmaengine_get);
  712. /**
  713. * dmaengine_put - let dma drivers be removed when ref_count == 0
  714. */
  715. void dmaengine_put(void)
  716. {
  717. struct dma_device *device;
  718. struct dma_chan *chan;
  719. mutex_lock(&dma_list_mutex);
  720. dmaengine_ref_count--;
  721. BUG_ON(dmaengine_ref_count < 0);
  722. /* drop channel references */
  723. list_for_each_entry(device, &dma_device_list, global_node) {
  724. if (dma_has_cap(DMA_PRIVATE, device->cap_mask))
  725. continue;
  726. list_for_each_entry(chan, &device->channels, device_node)
  727. dma_chan_put(chan);
  728. }
  729. mutex_unlock(&dma_list_mutex);
  730. }
  731. EXPORT_SYMBOL(dmaengine_put);
  732. static bool device_has_all_tx_types(struct dma_device *device)
  733. {
  734. /* A device that satisfies this test has channels that will never cause
  735. * an async_tx channel switch event as all possible operation types can
  736. * be handled.
  737. */
  738. #ifdef CONFIG_ASYNC_TX_DMA
  739. if (!dma_has_cap(DMA_INTERRUPT, device->cap_mask))
  740. return false;
  741. #endif
  742. #if IS_ENABLED(CONFIG_ASYNC_MEMCPY)
  743. if (!dma_has_cap(DMA_MEMCPY, device->cap_mask))
  744. return false;
  745. #endif
  746. #if IS_ENABLED(CONFIG_ASYNC_XOR)
  747. if (!dma_has_cap(DMA_XOR, device->cap_mask))
  748. return false;
  749. #ifndef CONFIG_ASYNC_TX_DISABLE_XOR_VAL_DMA
  750. if (!dma_has_cap(DMA_XOR_VAL, device->cap_mask))
  751. return false;
  752. #endif
  753. #endif
  754. #if IS_ENABLED(CONFIG_ASYNC_PQ)
  755. if (!dma_has_cap(DMA_PQ, device->cap_mask))
  756. return false;
  757. #ifndef CONFIG_ASYNC_TX_DISABLE_PQ_VAL_DMA
  758. if (!dma_has_cap(DMA_PQ_VAL, device->cap_mask))
  759. return false;
  760. #endif
  761. #endif
  762. return true;
  763. }
  764. static int get_dma_id(struct dma_device *device)
  765. {
  766. int rc = ida_alloc(&dma_ida, GFP_KERNEL);
  767. if (rc < 0)
  768. return rc;
  769. device->dev_id = rc;
  770. return 0;
  771. }
  772. /**
  773. * dma_async_device_register - registers DMA devices found
  774. * @device: &dma_device
  775. */
  776. int dma_async_device_register(struct dma_device *device)
  777. {
  778. int chancnt = 0, rc;
  779. struct dma_chan* chan;
  780. atomic_t *idr_ref;
  781. if (!device)
  782. return -ENODEV;
  783. /* validate device routines */
  784. if (!device->dev) {
  785. pr_err("DMAdevice must have dev\n");
  786. return -EIO;
  787. }
  788. if (dma_has_cap(DMA_MEMCPY, device->cap_mask) && !device->device_prep_dma_memcpy) {
  789. dev_err(device->dev,
  790. "Device claims capability %s, but op is not defined\n",
  791. "DMA_MEMCPY");
  792. return -EIO;
  793. }
  794. if (dma_has_cap(DMA_XOR, device->cap_mask) && !device->device_prep_dma_xor) {
  795. dev_err(device->dev,
  796. "Device claims capability %s, but op is not defined\n",
  797. "DMA_XOR");
  798. return -EIO;
  799. }
  800. if (dma_has_cap(DMA_XOR_VAL, device->cap_mask) && !device->device_prep_dma_xor_val) {
  801. dev_err(device->dev,
  802. "Device claims capability %s, but op is not defined\n",
  803. "DMA_XOR_VAL");
  804. return -EIO;
  805. }
  806. if (dma_has_cap(DMA_PQ, device->cap_mask) && !device->device_prep_dma_pq) {
  807. dev_err(device->dev,
  808. "Device claims capability %s, but op is not defined\n",
  809. "DMA_PQ");
  810. return -EIO;
  811. }
  812. if (dma_has_cap(DMA_PQ_VAL, device->cap_mask) && !device->device_prep_dma_pq_val) {
  813. dev_err(device->dev,
  814. "Device claims capability %s, but op is not defined\n",
  815. "DMA_PQ_VAL");
  816. return -EIO;
  817. }
  818. if (dma_has_cap(DMA_MEMSET, device->cap_mask) && !device->device_prep_dma_memset) {
  819. dev_err(device->dev,
  820. "Device claims capability %s, but op is not defined\n",
  821. "DMA_MEMSET");
  822. return -EIO;
  823. }
  824. if (dma_has_cap(DMA_INTERRUPT, device->cap_mask) && !device->device_prep_dma_interrupt) {
  825. dev_err(device->dev,
  826. "Device claims capability %s, but op is not defined\n",
  827. "DMA_INTERRUPT");
  828. return -EIO;
  829. }
  830. if (dma_has_cap(DMA_CYCLIC, device->cap_mask) && !device->device_prep_dma_cyclic) {
  831. dev_err(device->dev,
  832. "Device claims capability %s, but op is not defined\n",
  833. "DMA_CYCLIC");
  834. return -EIO;
  835. }
  836. if (dma_has_cap(DMA_INTERLEAVE, device->cap_mask) && !device->device_prep_interleaved_dma) {
  837. dev_err(device->dev,
  838. "Device claims capability %s, but op is not defined\n",
  839. "DMA_INTERLEAVE");
  840. return -EIO;
  841. }
  842. if (!device->device_tx_status) {
  843. dev_err(device->dev, "Device tx_status is not defined\n");
  844. return -EIO;
  845. }
  846. if (!device->device_issue_pending) {
  847. dev_err(device->dev, "Device issue_pending is not defined\n");
  848. return -EIO;
  849. }
  850. /* note: this only matters in the
  851. * CONFIG_ASYNC_TX_ENABLE_CHANNEL_SWITCH=n case
  852. */
  853. if (device_has_all_tx_types(device))
  854. dma_cap_set(DMA_ASYNC_TX, device->cap_mask);
  855. idr_ref = kmalloc(sizeof(*idr_ref), GFP_KERNEL);
  856. if (!idr_ref)
  857. return -ENOMEM;
  858. rc = get_dma_id(device);
  859. if (rc != 0) {
  860. kfree(idr_ref);
  861. return rc;
  862. }
  863. atomic_set(idr_ref, 0);
  864. /* represent channels in sysfs. Probably want devs too */
  865. list_for_each_entry(chan, &device->channels, device_node) {
  866. rc = -ENOMEM;
  867. chan->local = alloc_percpu(typeof(*chan->local));
  868. if (chan->local == NULL)
  869. goto err_out;
  870. chan->dev = kzalloc(sizeof(*chan->dev), GFP_KERNEL);
  871. if (chan->dev == NULL) {
  872. free_percpu(chan->local);
  873. chan->local = NULL;
  874. goto err_out;
  875. }
  876. chan->chan_id = chancnt++;
  877. chan->dev->device.class = &dma_devclass;
  878. chan->dev->device.parent = device->dev;
  879. chan->dev->chan = chan;
  880. chan->dev->idr_ref = idr_ref;
  881. chan->dev->dev_id = device->dev_id;
  882. atomic_inc(idr_ref);
  883. dev_set_name(&chan->dev->device, "dma%dchan%d",
  884. device->dev_id, chan->chan_id);
  885. rc = device_register(&chan->dev->device);
  886. if (rc) {
  887. free_percpu(chan->local);
  888. chan->local = NULL;
  889. kfree(chan->dev);
  890. atomic_dec(idr_ref);
  891. goto err_out;
  892. }
  893. chan->client_count = 0;
  894. }
  895. if (!chancnt) {
  896. dev_err(device->dev, "%s: device has no channels!\n", __func__);
  897. rc = -ENODEV;
  898. goto err_out;
  899. }
  900. device->chancnt = chancnt;
  901. mutex_lock(&dma_list_mutex);
  902. /* take references on public channels */
  903. if (dmaengine_ref_count && !dma_has_cap(DMA_PRIVATE, device->cap_mask))
  904. list_for_each_entry(chan, &device->channels, device_node) {
  905. /* if clients are already waiting for channels we need
  906. * to take references on their behalf
  907. */
  908. if (dma_chan_get(chan) == -ENODEV) {
  909. /* note we can only get here for the first
  910. * channel as the remaining channels are
  911. * guaranteed to get a reference
  912. */
  913. rc = -ENODEV;
  914. mutex_unlock(&dma_list_mutex);
  915. goto err_out;
  916. }
  917. }
  918. list_add_tail_rcu(&device->global_node, &dma_device_list);
  919. if (dma_has_cap(DMA_PRIVATE, device->cap_mask))
  920. device->privatecnt++; /* Always private */
  921. dma_channel_rebalance();
  922. mutex_unlock(&dma_list_mutex);
  923. return 0;
  924. err_out:
  925. /* if we never registered a channel just release the idr */
  926. if (atomic_read(idr_ref) == 0) {
  927. ida_free(&dma_ida, device->dev_id);
  928. kfree(idr_ref);
  929. return rc;
  930. }
  931. list_for_each_entry(chan, &device->channels, device_node) {
  932. if (chan->local == NULL)
  933. continue;
  934. mutex_lock(&dma_list_mutex);
  935. chan->dev->chan = NULL;
  936. mutex_unlock(&dma_list_mutex);
  937. device_unregister(&chan->dev->device);
  938. free_percpu(chan->local);
  939. }
  940. return rc;
  941. }
  942. EXPORT_SYMBOL(dma_async_device_register);
  943. /**
  944. * dma_async_device_unregister - unregister a DMA device
  945. * @device: &dma_device
  946. *
  947. * This routine is called by dma driver exit routines, dmaengine holds module
  948. * references to prevent it being called while channels are in use.
  949. */
  950. void dma_async_device_unregister(struct dma_device *device)
  951. {
  952. struct dma_chan *chan;
  953. mutex_lock(&dma_list_mutex);
  954. list_del_rcu(&device->global_node);
  955. dma_channel_rebalance();
  956. mutex_unlock(&dma_list_mutex);
  957. list_for_each_entry(chan, &device->channels, device_node) {
  958. WARN_ONCE(chan->client_count,
  959. "%s called while %d clients hold a reference\n",
  960. __func__, chan->client_count);
  961. mutex_lock(&dma_list_mutex);
  962. chan->dev->chan = NULL;
  963. mutex_unlock(&dma_list_mutex);
  964. device_unregister(&chan->dev->device);
  965. free_percpu(chan->local);
  966. }
  967. }
  968. EXPORT_SYMBOL(dma_async_device_unregister);
  969. static void dmam_device_release(struct device *dev, void *res)
  970. {
  971. struct dma_device *device;
  972. device = *(struct dma_device **)res;
  973. dma_async_device_unregister(device);
  974. }
  975. /**
  976. * dmaenginem_async_device_register - registers DMA devices found
  977. * @device: &dma_device
  978. *
  979. * The operation is managed and will be undone on driver detach.
  980. */
  981. int dmaenginem_async_device_register(struct dma_device *device)
  982. {
  983. void *p;
  984. int ret;
  985. p = devres_alloc(dmam_device_release, sizeof(void *), GFP_KERNEL);
  986. if (!p)
  987. return -ENOMEM;
  988. ret = dma_async_device_register(device);
  989. if (!ret) {
  990. *(struct dma_device **)p = device;
  991. devres_add(device->dev, p);
  992. } else {
  993. devres_free(p);
  994. }
  995. return ret;
  996. }
  997. EXPORT_SYMBOL(dmaenginem_async_device_register);
  998. struct dmaengine_unmap_pool {
  999. struct kmem_cache *cache;
  1000. const char *name;
  1001. mempool_t *pool;
  1002. size_t size;
  1003. };
  1004. #define __UNMAP_POOL(x) { .size = x, .name = "dmaengine-unmap-" __stringify(x) }
  1005. static struct dmaengine_unmap_pool unmap_pool[] = {
  1006. __UNMAP_POOL(2),
  1007. #if IS_ENABLED(CONFIG_DMA_ENGINE_RAID)
  1008. __UNMAP_POOL(16),
  1009. __UNMAP_POOL(128),
  1010. __UNMAP_POOL(256),
  1011. #endif
  1012. };
  1013. static struct dmaengine_unmap_pool *__get_unmap_pool(int nr)
  1014. {
  1015. int order = get_count_order(nr);
  1016. switch (order) {
  1017. case 0 ... 1:
  1018. return &unmap_pool[0];
  1019. #if IS_ENABLED(CONFIG_DMA_ENGINE_RAID)
  1020. case 2 ... 4:
  1021. return &unmap_pool[1];
  1022. case 5 ... 7:
  1023. return &unmap_pool[2];
  1024. case 8:
  1025. return &unmap_pool[3];
  1026. #endif
  1027. default:
  1028. BUG();
  1029. return NULL;
  1030. }
  1031. }
  1032. static void dmaengine_unmap(struct kref *kref)
  1033. {
  1034. struct dmaengine_unmap_data *unmap = container_of(kref, typeof(*unmap), kref);
  1035. struct device *dev = unmap->dev;
  1036. int cnt, i;
  1037. cnt = unmap->to_cnt;
  1038. for (i = 0; i < cnt; i++)
  1039. dma_unmap_page(dev, unmap->addr[i], unmap->len,
  1040. DMA_TO_DEVICE);
  1041. cnt += unmap->from_cnt;
  1042. for (; i < cnt; i++)
  1043. dma_unmap_page(dev, unmap->addr[i], unmap->len,
  1044. DMA_FROM_DEVICE);
  1045. cnt += unmap->bidi_cnt;
  1046. for (; i < cnt; i++) {
  1047. if (unmap->addr[i] == 0)
  1048. continue;
  1049. dma_unmap_page(dev, unmap->addr[i], unmap->len,
  1050. DMA_BIDIRECTIONAL);
  1051. }
  1052. cnt = unmap->map_cnt;
  1053. mempool_free(unmap, __get_unmap_pool(cnt)->pool);
  1054. }
  1055. void dmaengine_unmap_put(struct dmaengine_unmap_data *unmap)
  1056. {
  1057. if (unmap)
  1058. kref_put(&unmap->kref, dmaengine_unmap);
  1059. }
  1060. EXPORT_SYMBOL_GPL(dmaengine_unmap_put);
  1061. static void dmaengine_destroy_unmap_pool(void)
  1062. {
  1063. int i;
  1064. for (i = 0; i < ARRAY_SIZE(unmap_pool); i++) {
  1065. struct dmaengine_unmap_pool *p = &unmap_pool[i];
  1066. mempool_destroy(p->pool);
  1067. p->pool = NULL;
  1068. kmem_cache_destroy(p->cache);
  1069. p->cache = NULL;
  1070. }
  1071. }
  1072. static int __init dmaengine_init_unmap_pool(void)
  1073. {
  1074. int i;
  1075. for (i = 0; i < ARRAY_SIZE(unmap_pool); i++) {
  1076. struct dmaengine_unmap_pool *p = &unmap_pool[i];
  1077. size_t size;
  1078. size = sizeof(struct dmaengine_unmap_data) +
  1079. sizeof(dma_addr_t) * p->size;
  1080. p->cache = kmem_cache_create(p->name, size, 0,
  1081. SLAB_HWCACHE_ALIGN, NULL);
  1082. if (!p->cache)
  1083. break;
  1084. p->pool = mempool_create_slab_pool(1, p->cache);
  1085. if (!p->pool)
  1086. break;
  1087. }
  1088. if (i == ARRAY_SIZE(unmap_pool))
  1089. return 0;
  1090. dmaengine_destroy_unmap_pool();
  1091. return -ENOMEM;
  1092. }
  1093. struct dmaengine_unmap_data *
  1094. dmaengine_get_unmap_data(struct device *dev, int nr, gfp_t flags)
  1095. {
  1096. struct dmaengine_unmap_data *unmap;
  1097. unmap = mempool_alloc(__get_unmap_pool(nr)->pool, flags);
  1098. if (!unmap)
  1099. return NULL;
  1100. memset(unmap, 0, sizeof(*unmap));
  1101. kref_init(&unmap->kref);
  1102. unmap->dev = dev;
  1103. unmap->map_cnt = nr;
  1104. return unmap;
  1105. }
  1106. EXPORT_SYMBOL(dmaengine_get_unmap_data);
  1107. void dma_async_tx_descriptor_init(struct dma_async_tx_descriptor *tx,
  1108. struct dma_chan *chan)
  1109. {
  1110. tx->chan = chan;
  1111. #ifdef CONFIG_ASYNC_TX_ENABLE_CHANNEL_SWITCH
  1112. spin_lock_init(&tx->lock);
  1113. #endif
  1114. }
  1115. EXPORT_SYMBOL(dma_async_tx_descriptor_init);
  1116. static inline int desc_check_and_set_metadata_mode(
  1117. struct dma_async_tx_descriptor *desc, enum dma_desc_metadata_mode mode)
  1118. {
  1119. /* Make sure that the metadata mode is not mixed */
  1120. if (!desc->desc_metadata_mode) {
  1121. if (dmaengine_is_metadata_mode_supported(desc->chan, mode))
  1122. desc->desc_metadata_mode = mode;
  1123. else
  1124. return -ENOTSUPP;
  1125. } else if (desc->desc_metadata_mode != mode) {
  1126. return -EINVAL;
  1127. }
  1128. return 0;
  1129. }
  1130. int dmaengine_desc_attach_metadata(struct dma_async_tx_descriptor *desc,
  1131. void *data, size_t len)
  1132. {
  1133. int ret;
  1134. if (!desc)
  1135. return -EINVAL;
  1136. ret = desc_check_and_set_metadata_mode(desc, DESC_METADATA_CLIENT);
  1137. if (ret)
  1138. return ret;
  1139. if (!desc->metadata_ops || !desc->metadata_ops->attach)
  1140. return -ENOTSUPP;
  1141. return desc->metadata_ops->attach(desc, data, len);
  1142. }
  1143. EXPORT_SYMBOL_GPL(dmaengine_desc_attach_metadata);
  1144. void *dmaengine_desc_get_metadata_ptr(struct dma_async_tx_descriptor *desc,
  1145. size_t *payload_len, size_t *max_len)
  1146. {
  1147. int ret;
  1148. if (!desc)
  1149. return ERR_PTR(-EINVAL);
  1150. ret = desc_check_and_set_metadata_mode(desc, DESC_METADATA_ENGINE);
  1151. if (ret)
  1152. return ERR_PTR(ret);
  1153. if (!desc->metadata_ops || !desc->metadata_ops->get_ptr)
  1154. return ERR_PTR(-ENOTSUPP);
  1155. return desc->metadata_ops->get_ptr(desc, payload_len, max_len);
  1156. }
  1157. EXPORT_SYMBOL_GPL(dmaengine_desc_get_metadata_ptr);
  1158. int dmaengine_desc_set_metadata_len(struct dma_async_tx_descriptor *desc,
  1159. size_t payload_len)
  1160. {
  1161. int ret;
  1162. if (!desc)
  1163. return -EINVAL;
  1164. ret = desc_check_and_set_metadata_mode(desc, DESC_METADATA_ENGINE);
  1165. if (ret)
  1166. return ret;
  1167. if (!desc->metadata_ops || !desc->metadata_ops->set_len)
  1168. return -ENOTSUPP;
  1169. return desc->metadata_ops->set_len(desc, payload_len);
  1170. }
  1171. EXPORT_SYMBOL_GPL(dmaengine_desc_set_metadata_len);
  1172. /* dma_wait_for_async_tx - spin wait for a transaction to complete
  1173. * @tx: in-flight transaction to wait on
  1174. */
  1175. enum dma_status
  1176. dma_wait_for_async_tx(struct dma_async_tx_descriptor *tx)
  1177. {
  1178. unsigned long dma_sync_wait_timeout = jiffies + msecs_to_jiffies(5000);
  1179. if (!tx)
  1180. return DMA_COMPLETE;
  1181. while (tx->cookie == -EBUSY) {
  1182. if (time_after_eq(jiffies, dma_sync_wait_timeout)) {
  1183. dev_err(tx->chan->device->dev,
  1184. "%s timeout waiting for descriptor submission\n",
  1185. __func__);
  1186. return DMA_ERROR;
  1187. }
  1188. cpu_relax();
  1189. }
  1190. return dma_sync_wait(tx->chan, tx->cookie);
  1191. }
  1192. EXPORT_SYMBOL_GPL(dma_wait_for_async_tx);
  1193. /* dma_run_dependencies - helper routine for dma drivers to process
  1194. * (start) dependent operations on their target channel
  1195. * @tx: transaction with dependencies
  1196. */
  1197. void dma_run_dependencies(struct dma_async_tx_descriptor *tx)
  1198. {
  1199. struct dma_async_tx_descriptor *dep = txd_next(tx);
  1200. struct dma_async_tx_descriptor *dep_next;
  1201. struct dma_chan *chan;
  1202. if (!dep)
  1203. return;
  1204. /* we'll submit tx->next now, so clear the link */
  1205. txd_clear_next(tx);
  1206. chan = dep->chan;
  1207. /* keep submitting up until a channel switch is detected
  1208. * in that case we will be called again as a result of
  1209. * processing the interrupt from async_tx_channel_switch
  1210. */
  1211. for (; dep; dep = dep_next) {
  1212. txd_lock(dep);
  1213. txd_clear_parent(dep);
  1214. dep_next = txd_next(dep);
  1215. if (dep_next && dep_next->chan == chan)
  1216. txd_clear_next(dep); /* ->next will be submitted */
  1217. else
  1218. dep_next = NULL; /* submit current dep and terminate */
  1219. txd_unlock(dep);
  1220. dep->tx_submit(dep);
  1221. }
  1222. chan->device->device_issue_pending(chan);
  1223. }
  1224. EXPORT_SYMBOL_GPL(dma_run_dependencies);
  1225. static int __init dma_bus_init(void)
  1226. {
  1227. int err = dmaengine_init_unmap_pool();
  1228. if (err)
  1229. return err;
  1230. return class_register(&dma_devclass);
  1231. }
  1232. arch_initcall(dma_bus_init);