smp.c 30 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * SMP related functions
  4. *
  5. * Copyright IBM Corp. 1999, 2012
  6. * Author(s): Denis Joseph Barrow,
  7. * Martin Schwidefsky <schwidefsky@de.ibm.com>,
  8. * Heiko Carstens <heiko.carstens@de.ibm.com>,
  9. *
  10. * based on other smp stuff by
  11. * (c) 1995 Alan Cox, CymruNET Ltd <alan@cymru.net>
  12. * (c) 1998 Ingo Molnar
  13. *
  14. * The code outside of smp.c uses logical cpu numbers, only smp.c does
  15. * the translation of logical to physical cpu ids. All new code that
  16. * operates on physical cpu numbers needs to go into smp.c.
  17. */
  18. #define KMSG_COMPONENT "cpu"
  19. #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
  20. #include <linux/workqueue.h>
  21. #include <linux/bootmem.h>
  22. #include <linux/export.h>
  23. #include <linux/init.h>
  24. #include <linux/mm.h>
  25. #include <linux/err.h>
  26. #include <linux/spinlock.h>
  27. #include <linux/kernel_stat.h>
  28. #include <linux/delay.h>
  29. #include <linux/interrupt.h>
  30. #include <linux/irqflags.h>
  31. #include <linux/cpu.h>
  32. #include <linux/slab.h>
  33. #include <linux/sched/hotplug.h>
  34. #include <linux/sched/task_stack.h>
  35. #include <linux/crash_dump.h>
  36. #include <linux/memblock.h>
  37. #include <linux/kprobes.h>
  38. #include <asm/asm-offsets.h>
  39. #include <asm/diag.h>
  40. #include <asm/switch_to.h>
  41. #include <asm/facility.h>
  42. #include <asm/ipl.h>
  43. #include <asm/setup.h>
  44. #include <asm/irq.h>
  45. #include <asm/tlbflush.h>
  46. #include <asm/vtimer.h>
  47. #include <asm/lowcore.h>
  48. #include <asm/sclp.h>
  49. #include <asm/vdso.h>
  50. #include <asm/debug.h>
  51. #include <asm/os_info.h>
  52. #include <asm/sigp.h>
  53. #include <asm/idle.h>
  54. #include <asm/nmi.h>
  55. #include <asm/topology.h>
  56. #include "entry.h"
  57. enum {
  58. ec_schedule = 0,
  59. ec_call_function_single,
  60. ec_stop_cpu,
  61. };
  62. enum {
  63. CPU_STATE_STANDBY,
  64. CPU_STATE_CONFIGURED,
  65. };
  66. static DEFINE_PER_CPU(struct cpu *, cpu_device);
  67. struct pcpu {
  68. struct lowcore *lowcore; /* lowcore page(s) for the cpu */
  69. unsigned long ec_mask; /* bit mask for ec_xxx functions */
  70. unsigned long ec_clk; /* sigp timestamp for ec_xxx */
  71. signed char state; /* physical cpu state */
  72. signed char polarization; /* physical polarization */
  73. u16 address; /* physical cpu address */
  74. };
  75. static u8 boot_core_type;
  76. static struct pcpu pcpu_devices[NR_CPUS];
  77. unsigned int smp_cpu_mt_shift;
  78. EXPORT_SYMBOL(smp_cpu_mt_shift);
  79. unsigned int smp_cpu_mtid;
  80. EXPORT_SYMBOL(smp_cpu_mtid);
  81. #ifdef CONFIG_CRASH_DUMP
  82. __vector128 __initdata boot_cpu_vector_save_area[__NUM_VXRS];
  83. #endif
  84. static unsigned int smp_max_threads __initdata = -1U;
  85. static int __init early_nosmt(char *s)
  86. {
  87. smp_max_threads = 1;
  88. return 0;
  89. }
  90. early_param("nosmt", early_nosmt);
  91. static int __init early_smt(char *s)
  92. {
  93. get_option(&s, &smp_max_threads);
  94. return 0;
  95. }
  96. early_param("smt", early_smt);
  97. /*
  98. * The smp_cpu_state_mutex must be held when changing the state or polarization
  99. * member of a pcpu data structure within the pcpu_devices arreay.
  100. */
  101. DEFINE_MUTEX(smp_cpu_state_mutex);
  102. /*
  103. * Signal processor helper functions.
  104. */
  105. static inline int __pcpu_sigp_relax(u16 addr, u8 order, unsigned long parm)
  106. {
  107. int cc;
  108. while (1) {
  109. cc = __pcpu_sigp(addr, order, parm, NULL);
  110. if (cc != SIGP_CC_BUSY)
  111. return cc;
  112. cpu_relax();
  113. }
  114. }
  115. static int pcpu_sigp_retry(struct pcpu *pcpu, u8 order, u32 parm)
  116. {
  117. int cc, retry;
  118. for (retry = 0; ; retry++) {
  119. cc = __pcpu_sigp(pcpu->address, order, parm, NULL);
  120. if (cc != SIGP_CC_BUSY)
  121. break;
  122. if (retry >= 3)
  123. udelay(10);
  124. }
  125. return cc;
  126. }
  127. static inline int pcpu_stopped(struct pcpu *pcpu)
  128. {
  129. u32 uninitialized_var(status);
  130. if (__pcpu_sigp(pcpu->address, SIGP_SENSE,
  131. 0, &status) != SIGP_CC_STATUS_STORED)
  132. return 0;
  133. return !!(status & (SIGP_STATUS_CHECK_STOP|SIGP_STATUS_STOPPED));
  134. }
  135. static inline int pcpu_running(struct pcpu *pcpu)
  136. {
  137. if (__pcpu_sigp(pcpu->address, SIGP_SENSE_RUNNING,
  138. 0, NULL) != SIGP_CC_STATUS_STORED)
  139. return 1;
  140. /* Status stored condition code is equivalent to cpu not running. */
  141. return 0;
  142. }
  143. /*
  144. * Find struct pcpu by cpu address.
  145. */
  146. static struct pcpu *pcpu_find_address(const struct cpumask *mask, u16 address)
  147. {
  148. int cpu;
  149. for_each_cpu(cpu, mask)
  150. if (pcpu_devices[cpu].address == address)
  151. return pcpu_devices + cpu;
  152. return NULL;
  153. }
  154. static void pcpu_ec_call(struct pcpu *pcpu, int ec_bit)
  155. {
  156. int order;
  157. if (test_and_set_bit(ec_bit, &pcpu->ec_mask))
  158. return;
  159. order = pcpu_running(pcpu) ? SIGP_EXTERNAL_CALL : SIGP_EMERGENCY_SIGNAL;
  160. pcpu->ec_clk = get_tod_clock_fast();
  161. pcpu_sigp_retry(pcpu, order, 0);
  162. }
  163. #define ASYNC_FRAME_OFFSET (ASYNC_SIZE - STACK_FRAME_OVERHEAD - __PT_SIZE)
  164. #define PANIC_FRAME_OFFSET (PAGE_SIZE - STACK_FRAME_OVERHEAD - __PT_SIZE)
  165. static int pcpu_alloc_lowcore(struct pcpu *pcpu, int cpu)
  166. {
  167. unsigned long async_stack, panic_stack;
  168. struct lowcore *lc;
  169. if (pcpu != &pcpu_devices[0]) {
  170. pcpu->lowcore = (struct lowcore *)
  171. __get_free_pages(GFP_KERNEL | GFP_DMA, LC_ORDER);
  172. async_stack = __get_free_pages(GFP_KERNEL, ASYNC_ORDER);
  173. panic_stack = __get_free_page(GFP_KERNEL);
  174. if (!pcpu->lowcore || !panic_stack || !async_stack)
  175. goto out;
  176. } else {
  177. async_stack = pcpu->lowcore->async_stack - ASYNC_FRAME_OFFSET;
  178. panic_stack = pcpu->lowcore->panic_stack - PANIC_FRAME_OFFSET;
  179. }
  180. lc = pcpu->lowcore;
  181. memcpy(lc, &S390_lowcore, 512);
  182. memset((char *) lc + 512, 0, sizeof(*lc) - 512);
  183. lc->async_stack = async_stack + ASYNC_FRAME_OFFSET;
  184. lc->panic_stack = panic_stack + PANIC_FRAME_OFFSET;
  185. lc->cpu_nr = cpu;
  186. lc->spinlock_lockval = arch_spin_lockval(cpu);
  187. lc->spinlock_index = 0;
  188. lc->br_r1_trampoline = 0x07f1; /* br %r1 */
  189. if (nmi_alloc_per_cpu(lc))
  190. goto out;
  191. if (vdso_alloc_per_cpu(lc))
  192. goto out_mcesa;
  193. lowcore_ptr[cpu] = lc;
  194. pcpu_sigp_retry(pcpu, SIGP_SET_PREFIX, (u32)(unsigned long) lc);
  195. return 0;
  196. out_mcesa:
  197. nmi_free_per_cpu(lc);
  198. out:
  199. if (pcpu != &pcpu_devices[0]) {
  200. free_page(panic_stack);
  201. free_pages(async_stack, ASYNC_ORDER);
  202. free_pages((unsigned long) pcpu->lowcore, LC_ORDER);
  203. }
  204. return -ENOMEM;
  205. }
  206. #ifdef CONFIG_HOTPLUG_CPU
  207. static void pcpu_free_lowcore(struct pcpu *pcpu)
  208. {
  209. pcpu_sigp_retry(pcpu, SIGP_SET_PREFIX, 0);
  210. lowcore_ptr[pcpu - pcpu_devices] = NULL;
  211. vdso_free_per_cpu(pcpu->lowcore);
  212. nmi_free_per_cpu(pcpu->lowcore);
  213. if (pcpu == &pcpu_devices[0])
  214. return;
  215. free_page(pcpu->lowcore->panic_stack-PANIC_FRAME_OFFSET);
  216. free_pages(pcpu->lowcore->async_stack-ASYNC_FRAME_OFFSET, ASYNC_ORDER);
  217. free_pages((unsigned long) pcpu->lowcore, LC_ORDER);
  218. }
  219. #endif /* CONFIG_HOTPLUG_CPU */
  220. static void pcpu_prepare_secondary(struct pcpu *pcpu, int cpu)
  221. {
  222. struct lowcore *lc = pcpu->lowcore;
  223. cpumask_set_cpu(cpu, &init_mm.context.cpu_attach_mask);
  224. cpumask_set_cpu(cpu, mm_cpumask(&init_mm));
  225. lc->cpu_nr = cpu;
  226. lc->spinlock_lockval = arch_spin_lockval(cpu);
  227. lc->spinlock_index = 0;
  228. lc->percpu_offset = __per_cpu_offset[cpu];
  229. lc->kernel_asce = S390_lowcore.kernel_asce;
  230. lc->machine_flags = S390_lowcore.machine_flags;
  231. lc->user_timer = lc->system_timer = lc->steal_timer = 0;
  232. __ctl_store(lc->cregs_save_area, 0, 15);
  233. save_access_regs((unsigned int *) lc->access_regs_save_area);
  234. memcpy(lc->stfle_fac_list, S390_lowcore.stfle_fac_list,
  235. sizeof(lc->stfle_fac_list));
  236. memcpy(lc->alt_stfle_fac_list, S390_lowcore.alt_stfle_fac_list,
  237. sizeof(lc->alt_stfle_fac_list));
  238. arch_spin_lock_setup(cpu);
  239. }
  240. static void pcpu_attach_task(struct pcpu *pcpu, struct task_struct *tsk)
  241. {
  242. struct lowcore *lc = pcpu->lowcore;
  243. lc->kernel_stack = (unsigned long) task_stack_page(tsk)
  244. + THREAD_SIZE - STACK_FRAME_OVERHEAD - sizeof(struct pt_regs);
  245. lc->current_task = (unsigned long) tsk;
  246. lc->lpp = LPP_MAGIC;
  247. lc->current_pid = tsk->pid;
  248. lc->user_timer = tsk->thread.user_timer;
  249. lc->guest_timer = tsk->thread.guest_timer;
  250. lc->system_timer = tsk->thread.system_timer;
  251. lc->hardirq_timer = tsk->thread.hardirq_timer;
  252. lc->softirq_timer = tsk->thread.softirq_timer;
  253. lc->steal_timer = 0;
  254. }
  255. static void pcpu_start_fn(struct pcpu *pcpu, void (*func)(void *), void *data)
  256. {
  257. struct lowcore *lc = pcpu->lowcore;
  258. lc->restart_stack = lc->kernel_stack;
  259. lc->restart_fn = (unsigned long) func;
  260. lc->restart_data = (unsigned long) data;
  261. lc->restart_source = -1UL;
  262. pcpu_sigp_retry(pcpu, SIGP_RESTART, 0);
  263. }
  264. /*
  265. * Call function via PSW restart on pcpu and stop the current cpu.
  266. */
  267. static void pcpu_delegate(struct pcpu *pcpu, void (*func)(void *),
  268. void *data, unsigned long stack)
  269. {
  270. struct lowcore *lc = lowcore_ptr[pcpu - pcpu_devices];
  271. unsigned long source_cpu = stap();
  272. __load_psw_mask(PSW_KERNEL_BITS);
  273. if (pcpu->address == source_cpu)
  274. func(data); /* should not return */
  275. /* Stop target cpu (if func returns this stops the current cpu). */
  276. pcpu_sigp_retry(pcpu, SIGP_STOP, 0);
  277. /* Restart func on the target cpu and stop the current cpu. */
  278. mem_assign_absolute(lc->restart_stack, stack);
  279. mem_assign_absolute(lc->restart_fn, (unsigned long) func);
  280. mem_assign_absolute(lc->restart_data, (unsigned long) data);
  281. mem_assign_absolute(lc->restart_source, source_cpu);
  282. __bpon();
  283. asm volatile(
  284. "0: sigp 0,%0,%2 # sigp restart to target cpu\n"
  285. " brc 2,0b # busy, try again\n"
  286. "1: sigp 0,%1,%3 # sigp stop to current cpu\n"
  287. " brc 2,1b # busy, try again\n"
  288. : : "d" (pcpu->address), "d" (source_cpu),
  289. "K" (SIGP_RESTART), "K" (SIGP_STOP)
  290. : "0", "1", "cc");
  291. for (;;) ;
  292. }
  293. /*
  294. * Enable additional logical cpus for multi-threading.
  295. */
  296. static int pcpu_set_smt(unsigned int mtid)
  297. {
  298. int cc;
  299. if (smp_cpu_mtid == mtid)
  300. return 0;
  301. cc = __pcpu_sigp(0, SIGP_SET_MULTI_THREADING, mtid, NULL);
  302. if (cc == 0) {
  303. smp_cpu_mtid = mtid;
  304. smp_cpu_mt_shift = 0;
  305. while (smp_cpu_mtid >= (1U << smp_cpu_mt_shift))
  306. smp_cpu_mt_shift++;
  307. pcpu_devices[0].address = stap();
  308. }
  309. return cc;
  310. }
  311. /*
  312. * Call function on an online CPU.
  313. */
  314. void smp_call_online_cpu(void (*func)(void *), void *data)
  315. {
  316. struct pcpu *pcpu;
  317. /* Use the current cpu if it is online. */
  318. pcpu = pcpu_find_address(cpu_online_mask, stap());
  319. if (!pcpu)
  320. /* Use the first online cpu. */
  321. pcpu = pcpu_devices + cpumask_first(cpu_online_mask);
  322. pcpu_delegate(pcpu, func, data, (unsigned long) restart_stack);
  323. }
  324. /*
  325. * Call function on the ipl CPU.
  326. */
  327. void smp_call_ipl_cpu(void (*func)(void *), void *data)
  328. {
  329. struct lowcore *lc = pcpu_devices->lowcore;
  330. if (pcpu_devices[0].address == stap())
  331. lc = &S390_lowcore;
  332. pcpu_delegate(&pcpu_devices[0], func, data,
  333. lc->panic_stack - PANIC_FRAME_OFFSET + PAGE_SIZE);
  334. }
  335. int smp_find_processor_id(u16 address)
  336. {
  337. int cpu;
  338. for_each_present_cpu(cpu)
  339. if (pcpu_devices[cpu].address == address)
  340. return cpu;
  341. return -1;
  342. }
  343. bool arch_vcpu_is_preempted(int cpu)
  344. {
  345. if (test_cpu_flag_of(CIF_ENABLED_WAIT, cpu))
  346. return false;
  347. if (pcpu_running(pcpu_devices + cpu))
  348. return false;
  349. return true;
  350. }
  351. EXPORT_SYMBOL(arch_vcpu_is_preempted);
  352. void smp_yield_cpu(int cpu)
  353. {
  354. if (MACHINE_HAS_DIAG9C) {
  355. diag_stat_inc_norecursion(DIAG_STAT_X09C);
  356. asm volatile("diag %0,0,0x9c"
  357. : : "d" (pcpu_devices[cpu].address));
  358. } else if (MACHINE_HAS_DIAG44) {
  359. diag_stat_inc_norecursion(DIAG_STAT_X044);
  360. asm volatile("diag 0,0,0x44");
  361. }
  362. }
  363. /*
  364. * Send cpus emergency shutdown signal. This gives the cpus the
  365. * opportunity to complete outstanding interrupts.
  366. */
  367. void notrace smp_emergency_stop(void)
  368. {
  369. cpumask_t cpumask;
  370. u64 end;
  371. int cpu;
  372. cpumask_copy(&cpumask, cpu_online_mask);
  373. cpumask_clear_cpu(smp_processor_id(), &cpumask);
  374. end = get_tod_clock() + (1000000UL << 12);
  375. for_each_cpu(cpu, &cpumask) {
  376. struct pcpu *pcpu = pcpu_devices + cpu;
  377. set_bit(ec_stop_cpu, &pcpu->ec_mask);
  378. while (__pcpu_sigp(pcpu->address, SIGP_EMERGENCY_SIGNAL,
  379. 0, NULL) == SIGP_CC_BUSY &&
  380. get_tod_clock() < end)
  381. cpu_relax();
  382. }
  383. while (get_tod_clock() < end) {
  384. for_each_cpu(cpu, &cpumask)
  385. if (pcpu_stopped(pcpu_devices + cpu))
  386. cpumask_clear_cpu(cpu, &cpumask);
  387. if (cpumask_empty(&cpumask))
  388. break;
  389. cpu_relax();
  390. }
  391. }
  392. NOKPROBE_SYMBOL(smp_emergency_stop);
  393. /*
  394. * Stop all cpus but the current one.
  395. */
  396. void smp_send_stop(void)
  397. {
  398. int cpu;
  399. /* Disable all interrupts/machine checks */
  400. __load_psw_mask(PSW_KERNEL_BITS | PSW_MASK_DAT);
  401. trace_hardirqs_off();
  402. debug_set_critical();
  403. if (oops_in_progress)
  404. smp_emergency_stop();
  405. /* stop all processors */
  406. for_each_online_cpu(cpu) {
  407. if (cpu == smp_processor_id())
  408. continue;
  409. pcpu_sigp_retry(pcpu_devices + cpu, SIGP_STOP, 0);
  410. while (!pcpu_stopped(pcpu_devices + cpu))
  411. cpu_relax();
  412. }
  413. }
  414. /*
  415. * This is the main routine where commands issued by other
  416. * cpus are handled.
  417. */
  418. static void smp_handle_ext_call(void)
  419. {
  420. unsigned long bits;
  421. /* handle bit signal external calls */
  422. bits = xchg(&pcpu_devices[smp_processor_id()].ec_mask, 0);
  423. if (test_bit(ec_stop_cpu, &bits))
  424. smp_stop_cpu();
  425. if (test_bit(ec_schedule, &bits))
  426. scheduler_ipi();
  427. if (test_bit(ec_call_function_single, &bits))
  428. generic_smp_call_function_single_interrupt();
  429. }
  430. static void do_ext_call_interrupt(struct ext_code ext_code,
  431. unsigned int param32, unsigned long param64)
  432. {
  433. inc_irq_stat(ext_code.code == 0x1202 ? IRQEXT_EXC : IRQEXT_EMS);
  434. smp_handle_ext_call();
  435. }
  436. void arch_send_call_function_ipi_mask(const struct cpumask *mask)
  437. {
  438. int cpu;
  439. for_each_cpu(cpu, mask)
  440. pcpu_ec_call(pcpu_devices + cpu, ec_call_function_single);
  441. }
  442. void arch_send_call_function_single_ipi(int cpu)
  443. {
  444. pcpu_ec_call(pcpu_devices + cpu, ec_call_function_single);
  445. }
  446. /*
  447. * this function sends a 'reschedule' IPI to another CPU.
  448. * it goes straight through and wastes no time serializing
  449. * anything. Worst case is that we lose a reschedule ...
  450. */
  451. void smp_send_reschedule(int cpu)
  452. {
  453. pcpu_ec_call(pcpu_devices + cpu, ec_schedule);
  454. }
  455. /*
  456. * parameter area for the set/clear control bit callbacks
  457. */
  458. struct ec_creg_mask_parms {
  459. unsigned long orval;
  460. unsigned long andval;
  461. int cr;
  462. };
  463. /*
  464. * callback for setting/clearing control bits
  465. */
  466. static void smp_ctl_bit_callback(void *info)
  467. {
  468. struct ec_creg_mask_parms *pp = info;
  469. unsigned long cregs[16];
  470. __ctl_store(cregs, 0, 15);
  471. cregs[pp->cr] = (cregs[pp->cr] & pp->andval) | pp->orval;
  472. __ctl_load(cregs, 0, 15);
  473. }
  474. /*
  475. * Set a bit in a control register of all cpus
  476. */
  477. void smp_ctl_set_bit(int cr, int bit)
  478. {
  479. struct ec_creg_mask_parms parms = { 1UL << bit, -1UL, cr };
  480. on_each_cpu(smp_ctl_bit_callback, &parms, 1);
  481. }
  482. EXPORT_SYMBOL(smp_ctl_set_bit);
  483. /*
  484. * Clear a bit in a control register of all cpus
  485. */
  486. void smp_ctl_clear_bit(int cr, int bit)
  487. {
  488. struct ec_creg_mask_parms parms = { 0, ~(1UL << bit), cr };
  489. on_each_cpu(smp_ctl_bit_callback, &parms, 1);
  490. }
  491. EXPORT_SYMBOL(smp_ctl_clear_bit);
  492. #ifdef CONFIG_CRASH_DUMP
  493. int smp_store_status(int cpu)
  494. {
  495. struct pcpu *pcpu = pcpu_devices + cpu;
  496. unsigned long pa;
  497. pa = __pa(&pcpu->lowcore->floating_pt_save_area);
  498. if (__pcpu_sigp_relax(pcpu->address, SIGP_STORE_STATUS_AT_ADDRESS,
  499. pa) != SIGP_CC_ORDER_CODE_ACCEPTED)
  500. return -EIO;
  501. if (!MACHINE_HAS_VX && !MACHINE_HAS_GS)
  502. return 0;
  503. pa = __pa(pcpu->lowcore->mcesad & MCESA_ORIGIN_MASK);
  504. if (MACHINE_HAS_GS)
  505. pa |= pcpu->lowcore->mcesad & MCESA_LC_MASK;
  506. if (__pcpu_sigp_relax(pcpu->address, SIGP_STORE_ADDITIONAL_STATUS,
  507. pa) != SIGP_CC_ORDER_CODE_ACCEPTED)
  508. return -EIO;
  509. return 0;
  510. }
  511. /*
  512. * Collect CPU state of the previous, crashed system.
  513. * There are four cases:
  514. * 1) standard zfcp dump
  515. * condition: OLDMEM_BASE == NULL && ipl_info.type == IPL_TYPE_FCP_DUMP
  516. * The state for all CPUs except the boot CPU needs to be collected
  517. * with sigp stop-and-store-status. The boot CPU state is located in
  518. * the absolute lowcore of the memory stored in the HSA. The zcore code
  519. * will copy the boot CPU state from the HSA.
  520. * 2) stand-alone kdump for SCSI (zfcp dump with swapped memory)
  521. * condition: OLDMEM_BASE != NULL && ipl_info.type == IPL_TYPE_FCP_DUMP
  522. * The state for all CPUs except the boot CPU needs to be collected
  523. * with sigp stop-and-store-status. The firmware or the boot-loader
  524. * stored the registers of the boot CPU in the absolute lowcore in the
  525. * memory of the old system.
  526. * 3) kdump and the old kernel did not store the CPU state,
  527. * or stand-alone kdump for DASD
  528. * condition: OLDMEM_BASE != NULL && !is_kdump_kernel()
  529. * The state for all CPUs except the boot CPU needs to be collected
  530. * with sigp stop-and-store-status. The kexec code or the boot-loader
  531. * stored the registers of the boot CPU in the memory of the old system.
  532. * 4) kdump and the old kernel stored the CPU state
  533. * condition: OLDMEM_BASE != NULL && is_kdump_kernel()
  534. * This case does not exist for s390 anymore, setup_arch explicitly
  535. * deactivates the elfcorehdr= kernel parameter
  536. */
  537. static __init void smp_save_cpu_vxrs(struct save_area *sa, u16 addr,
  538. bool is_boot_cpu, unsigned long page)
  539. {
  540. __vector128 *vxrs = (__vector128 *) page;
  541. if (is_boot_cpu)
  542. vxrs = boot_cpu_vector_save_area;
  543. else
  544. __pcpu_sigp_relax(addr, SIGP_STORE_ADDITIONAL_STATUS, page);
  545. save_area_add_vxrs(sa, vxrs);
  546. }
  547. static __init void smp_save_cpu_regs(struct save_area *sa, u16 addr,
  548. bool is_boot_cpu, unsigned long page)
  549. {
  550. void *regs = (void *) page;
  551. if (is_boot_cpu)
  552. copy_oldmem_kernel(regs, (void *) __LC_FPREGS_SAVE_AREA, 512);
  553. else
  554. __pcpu_sigp_relax(addr, SIGP_STORE_STATUS_AT_ADDRESS, page);
  555. save_area_add_regs(sa, regs);
  556. }
  557. void __init smp_save_dump_cpus(void)
  558. {
  559. int addr, boot_cpu_addr, max_cpu_addr;
  560. struct save_area *sa;
  561. unsigned long page;
  562. bool is_boot_cpu;
  563. if (!(OLDMEM_BASE || ipl_info.type == IPL_TYPE_FCP_DUMP))
  564. /* No previous system present, normal boot. */
  565. return;
  566. /* Allocate a page as dumping area for the store status sigps */
  567. page = memblock_alloc_base(PAGE_SIZE, PAGE_SIZE, 1UL << 31);
  568. /* Set multi-threading state to the previous system. */
  569. pcpu_set_smt(sclp.mtid_prev);
  570. boot_cpu_addr = stap();
  571. max_cpu_addr = SCLP_MAX_CORES << sclp.mtid_prev;
  572. for (addr = 0; addr <= max_cpu_addr; addr++) {
  573. if (__pcpu_sigp_relax(addr, SIGP_SENSE, 0) ==
  574. SIGP_CC_NOT_OPERATIONAL)
  575. continue;
  576. is_boot_cpu = (addr == boot_cpu_addr);
  577. /* Allocate save area */
  578. sa = save_area_alloc(is_boot_cpu);
  579. if (!sa)
  580. panic("could not allocate memory for save area\n");
  581. if (MACHINE_HAS_VX)
  582. /* Get the vector registers */
  583. smp_save_cpu_vxrs(sa, addr, is_boot_cpu, page);
  584. /*
  585. * For a zfcp dump OLDMEM_BASE == NULL and the registers
  586. * of the boot CPU are stored in the HSA. To retrieve
  587. * these registers an SCLP request is required which is
  588. * done by drivers/s390/char/zcore.c:init_cpu_info()
  589. */
  590. if (!is_boot_cpu || OLDMEM_BASE)
  591. /* Get the CPU registers */
  592. smp_save_cpu_regs(sa, addr, is_boot_cpu, page);
  593. }
  594. memblock_free(page, PAGE_SIZE);
  595. diag308_reset();
  596. pcpu_set_smt(0);
  597. }
  598. #endif /* CONFIG_CRASH_DUMP */
  599. void smp_cpu_set_polarization(int cpu, int val)
  600. {
  601. pcpu_devices[cpu].polarization = val;
  602. }
  603. int smp_cpu_get_polarization(int cpu)
  604. {
  605. return pcpu_devices[cpu].polarization;
  606. }
  607. static void __ref smp_get_core_info(struct sclp_core_info *info, int early)
  608. {
  609. static int use_sigp_detection;
  610. int address;
  611. if (use_sigp_detection || sclp_get_core_info(info, early)) {
  612. use_sigp_detection = 1;
  613. for (address = 0;
  614. address < (SCLP_MAX_CORES << smp_cpu_mt_shift);
  615. address += (1U << smp_cpu_mt_shift)) {
  616. if (__pcpu_sigp_relax(address, SIGP_SENSE, 0) ==
  617. SIGP_CC_NOT_OPERATIONAL)
  618. continue;
  619. info->core[info->configured].core_id =
  620. address >> smp_cpu_mt_shift;
  621. info->configured++;
  622. }
  623. info->combined = info->configured;
  624. }
  625. }
  626. static int smp_add_present_cpu(int cpu);
  627. static int __smp_rescan_cpus(struct sclp_core_info *info, int sysfs_add)
  628. {
  629. struct pcpu *pcpu;
  630. cpumask_t avail;
  631. int cpu, nr, i, j;
  632. u16 address;
  633. nr = 0;
  634. cpumask_xor(&avail, cpu_possible_mask, cpu_present_mask);
  635. cpu = cpumask_first(&avail);
  636. for (i = 0; (i < info->combined) && (cpu < nr_cpu_ids); i++) {
  637. if (sclp.has_core_type && info->core[i].type != boot_core_type)
  638. continue;
  639. address = info->core[i].core_id << smp_cpu_mt_shift;
  640. for (j = 0; j <= smp_cpu_mtid; j++) {
  641. if (pcpu_find_address(cpu_present_mask, address + j))
  642. continue;
  643. pcpu = pcpu_devices + cpu;
  644. pcpu->address = address + j;
  645. pcpu->state =
  646. (cpu >= info->configured*(smp_cpu_mtid + 1)) ?
  647. CPU_STATE_STANDBY : CPU_STATE_CONFIGURED;
  648. smp_cpu_set_polarization(cpu, POLARIZATION_UNKNOWN);
  649. set_cpu_present(cpu, true);
  650. if (sysfs_add && smp_add_present_cpu(cpu) != 0)
  651. set_cpu_present(cpu, false);
  652. else
  653. nr++;
  654. cpu = cpumask_next(cpu, &avail);
  655. if (cpu >= nr_cpu_ids)
  656. break;
  657. }
  658. }
  659. return nr;
  660. }
  661. void __init smp_detect_cpus(void)
  662. {
  663. unsigned int cpu, mtid, c_cpus, s_cpus;
  664. struct sclp_core_info *info;
  665. u16 address;
  666. /* Get CPU information */
  667. info = memblock_virt_alloc(sizeof(*info), 8);
  668. smp_get_core_info(info, 1);
  669. /* Find boot CPU type */
  670. if (sclp.has_core_type) {
  671. address = stap();
  672. for (cpu = 0; cpu < info->combined; cpu++)
  673. if (info->core[cpu].core_id == address) {
  674. /* The boot cpu dictates the cpu type. */
  675. boot_core_type = info->core[cpu].type;
  676. break;
  677. }
  678. if (cpu >= info->combined)
  679. panic("Could not find boot CPU type");
  680. }
  681. /* Set multi-threading state for the current system */
  682. mtid = boot_core_type ? sclp.mtid : sclp.mtid_cp;
  683. mtid = (mtid < smp_max_threads) ? mtid : smp_max_threads - 1;
  684. pcpu_set_smt(mtid);
  685. /* Print number of CPUs */
  686. c_cpus = s_cpus = 0;
  687. for (cpu = 0; cpu < info->combined; cpu++) {
  688. if (sclp.has_core_type &&
  689. info->core[cpu].type != boot_core_type)
  690. continue;
  691. if (cpu < info->configured)
  692. c_cpus += smp_cpu_mtid + 1;
  693. else
  694. s_cpus += smp_cpu_mtid + 1;
  695. }
  696. pr_info("%d configured CPUs, %d standby CPUs\n", c_cpus, s_cpus);
  697. /* Add CPUs present at boot */
  698. get_online_cpus();
  699. __smp_rescan_cpus(info, 0);
  700. put_online_cpus();
  701. memblock_free_early((unsigned long)info, sizeof(*info));
  702. }
  703. /*
  704. * Activate a secondary processor.
  705. */
  706. static void smp_start_secondary(void *cpuvoid)
  707. {
  708. int cpu = smp_processor_id();
  709. S390_lowcore.last_update_clock = get_tod_clock();
  710. S390_lowcore.restart_stack = (unsigned long) restart_stack;
  711. S390_lowcore.restart_fn = (unsigned long) do_restart;
  712. S390_lowcore.restart_data = 0;
  713. S390_lowcore.restart_source = -1UL;
  714. restore_access_regs(S390_lowcore.access_regs_save_area);
  715. __ctl_load(S390_lowcore.cregs_save_area, 0, 15);
  716. __load_psw_mask(PSW_KERNEL_BITS | PSW_MASK_DAT);
  717. cpu_init();
  718. preempt_disable();
  719. init_cpu_timer();
  720. vtime_init();
  721. pfault_init();
  722. notify_cpu_starting(cpu);
  723. if (topology_cpu_dedicated(cpu))
  724. set_cpu_flag(CIF_DEDICATED_CPU);
  725. else
  726. clear_cpu_flag(CIF_DEDICATED_CPU);
  727. set_cpu_online(cpu, true);
  728. inc_irq_stat(CPU_RST);
  729. local_irq_enable();
  730. cpu_startup_entry(CPUHP_AP_ONLINE_IDLE);
  731. }
  732. /* Upping and downing of CPUs */
  733. int __cpu_up(unsigned int cpu, struct task_struct *tidle)
  734. {
  735. struct pcpu *pcpu;
  736. int base, i, rc;
  737. pcpu = pcpu_devices + cpu;
  738. if (pcpu->state != CPU_STATE_CONFIGURED)
  739. return -EIO;
  740. base = smp_get_base_cpu(cpu);
  741. for (i = 0; i <= smp_cpu_mtid; i++) {
  742. if (base + i < nr_cpu_ids)
  743. if (cpu_online(base + i))
  744. break;
  745. }
  746. /*
  747. * If this is the first CPU of the core to get online
  748. * do an initial CPU reset.
  749. */
  750. if (i > smp_cpu_mtid &&
  751. pcpu_sigp_retry(pcpu_devices + base, SIGP_INITIAL_CPU_RESET, 0) !=
  752. SIGP_CC_ORDER_CODE_ACCEPTED)
  753. return -EIO;
  754. rc = pcpu_alloc_lowcore(pcpu, cpu);
  755. if (rc)
  756. return rc;
  757. pcpu_prepare_secondary(pcpu, cpu);
  758. pcpu_attach_task(pcpu, tidle);
  759. pcpu_start_fn(pcpu, smp_start_secondary, NULL);
  760. /* Wait until cpu puts itself in the online & active maps */
  761. while (!cpu_online(cpu))
  762. cpu_relax();
  763. return 0;
  764. }
  765. static unsigned int setup_possible_cpus __initdata;
  766. static int __init _setup_possible_cpus(char *s)
  767. {
  768. get_option(&s, &setup_possible_cpus);
  769. return 0;
  770. }
  771. early_param("possible_cpus", _setup_possible_cpus);
  772. #ifdef CONFIG_HOTPLUG_CPU
  773. int __cpu_disable(void)
  774. {
  775. unsigned long cregs[16];
  776. /* Handle possible pending IPIs */
  777. smp_handle_ext_call();
  778. set_cpu_online(smp_processor_id(), false);
  779. /* Disable pseudo page faults on this cpu. */
  780. pfault_fini();
  781. /* Disable interrupt sources via control register. */
  782. __ctl_store(cregs, 0, 15);
  783. cregs[0] &= ~0x0000ee70UL; /* disable all external interrupts */
  784. cregs[6] &= ~0xff000000UL; /* disable all I/O interrupts */
  785. cregs[14] &= ~0x1f000000UL; /* disable most machine checks */
  786. __ctl_load(cregs, 0, 15);
  787. clear_cpu_flag(CIF_NOHZ_DELAY);
  788. return 0;
  789. }
  790. void __cpu_die(unsigned int cpu)
  791. {
  792. struct pcpu *pcpu;
  793. /* Wait until target cpu is down */
  794. pcpu = pcpu_devices + cpu;
  795. while (!pcpu_stopped(pcpu))
  796. cpu_relax();
  797. pcpu_free_lowcore(pcpu);
  798. cpumask_clear_cpu(cpu, mm_cpumask(&init_mm));
  799. cpumask_clear_cpu(cpu, &init_mm.context.cpu_attach_mask);
  800. }
  801. void __noreturn cpu_die(void)
  802. {
  803. idle_task_exit();
  804. __bpon();
  805. pcpu_sigp_retry(pcpu_devices + smp_processor_id(), SIGP_STOP, 0);
  806. for (;;) ;
  807. }
  808. #endif /* CONFIG_HOTPLUG_CPU */
  809. void __init smp_fill_possible_mask(void)
  810. {
  811. unsigned int possible, sclp_max, cpu;
  812. sclp_max = max(sclp.mtid, sclp.mtid_cp) + 1;
  813. sclp_max = min(smp_max_threads, sclp_max);
  814. sclp_max = (sclp.max_cores * sclp_max) ?: nr_cpu_ids;
  815. possible = setup_possible_cpus ?: nr_cpu_ids;
  816. possible = min(possible, sclp_max);
  817. for (cpu = 0; cpu < possible && cpu < nr_cpu_ids; cpu++)
  818. set_cpu_possible(cpu, true);
  819. }
  820. void __init smp_prepare_cpus(unsigned int max_cpus)
  821. {
  822. /* request the 0x1201 emergency signal external interrupt */
  823. if (register_external_irq(EXT_IRQ_EMERGENCY_SIG, do_ext_call_interrupt))
  824. panic("Couldn't request external interrupt 0x1201");
  825. /* request the 0x1202 external call external interrupt */
  826. if (register_external_irq(EXT_IRQ_EXTERNAL_CALL, do_ext_call_interrupt))
  827. panic("Couldn't request external interrupt 0x1202");
  828. }
  829. void __init smp_prepare_boot_cpu(void)
  830. {
  831. struct pcpu *pcpu = pcpu_devices;
  832. WARN_ON(!cpu_present(0) || !cpu_online(0));
  833. pcpu->state = CPU_STATE_CONFIGURED;
  834. pcpu->lowcore = (struct lowcore *)(unsigned long) store_prefix();
  835. S390_lowcore.percpu_offset = __per_cpu_offset[0];
  836. smp_cpu_set_polarization(0, POLARIZATION_UNKNOWN);
  837. }
  838. void __init smp_cpus_done(unsigned int max_cpus)
  839. {
  840. }
  841. void __init smp_setup_processor_id(void)
  842. {
  843. pcpu_devices[0].address = stap();
  844. S390_lowcore.cpu_nr = 0;
  845. S390_lowcore.spinlock_lockval = arch_spin_lockval(0);
  846. S390_lowcore.spinlock_index = 0;
  847. }
  848. /*
  849. * the frequency of the profiling timer can be changed
  850. * by writing a multiplier value into /proc/profile.
  851. *
  852. * usually you want to run this on all CPUs ;)
  853. */
  854. int setup_profiling_timer(unsigned int multiplier)
  855. {
  856. return 0;
  857. }
  858. #ifdef CONFIG_HOTPLUG_CPU
  859. static ssize_t cpu_configure_show(struct device *dev,
  860. struct device_attribute *attr, char *buf)
  861. {
  862. ssize_t count;
  863. mutex_lock(&smp_cpu_state_mutex);
  864. count = sprintf(buf, "%d\n", pcpu_devices[dev->id].state);
  865. mutex_unlock(&smp_cpu_state_mutex);
  866. return count;
  867. }
  868. static ssize_t cpu_configure_store(struct device *dev,
  869. struct device_attribute *attr,
  870. const char *buf, size_t count)
  871. {
  872. struct pcpu *pcpu;
  873. int cpu, val, rc, i;
  874. char delim;
  875. if (sscanf(buf, "%d %c", &val, &delim) != 1)
  876. return -EINVAL;
  877. if (val != 0 && val != 1)
  878. return -EINVAL;
  879. get_online_cpus();
  880. mutex_lock(&smp_cpu_state_mutex);
  881. rc = -EBUSY;
  882. /* disallow configuration changes of online cpus and cpu 0 */
  883. cpu = dev->id;
  884. cpu = smp_get_base_cpu(cpu);
  885. if (cpu == 0)
  886. goto out;
  887. for (i = 0; i <= smp_cpu_mtid; i++)
  888. if (cpu_online(cpu + i))
  889. goto out;
  890. pcpu = pcpu_devices + cpu;
  891. rc = 0;
  892. switch (val) {
  893. case 0:
  894. if (pcpu->state != CPU_STATE_CONFIGURED)
  895. break;
  896. rc = sclp_core_deconfigure(pcpu->address >> smp_cpu_mt_shift);
  897. if (rc)
  898. break;
  899. for (i = 0; i <= smp_cpu_mtid; i++) {
  900. if (cpu + i >= nr_cpu_ids || !cpu_present(cpu + i))
  901. continue;
  902. pcpu[i].state = CPU_STATE_STANDBY;
  903. smp_cpu_set_polarization(cpu + i,
  904. POLARIZATION_UNKNOWN);
  905. }
  906. topology_expect_change();
  907. break;
  908. case 1:
  909. if (pcpu->state != CPU_STATE_STANDBY)
  910. break;
  911. rc = sclp_core_configure(pcpu->address >> smp_cpu_mt_shift);
  912. if (rc)
  913. break;
  914. for (i = 0; i <= smp_cpu_mtid; i++) {
  915. if (cpu + i >= nr_cpu_ids || !cpu_present(cpu + i))
  916. continue;
  917. pcpu[i].state = CPU_STATE_CONFIGURED;
  918. smp_cpu_set_polarization(cpu + i,
  919. POLARIZATION_UNKNOWN);
  920. }
  921. topology_expect_change();
  922. break;
  923. default:
  924. break;
  925. }
  926. out:
  927. mutex_unlock(&smp_cpu_state_mutex);
  928. put_online_cpus();
  929. return rc ? rc : count;
  930. }
  931. static DEVICE_ATTR(configure, 0644, cpu_configure_show, cpu_configure_store);
  932. #endif /* CONFIG_HOTPLUG_CPU */
  933. static ssize_t show_cpu_address(struct device *dev,
  934. struct device_attribute *attr, char *buf)
  935. {
  936. return sprintf(buf, "%d\n", pcpu_devices[dev->id].address);
  937. }
  938. static DEVICE_ATTR(address, 0444, show_cpu_address, NULL);
  939. static struct attribute *cpu_common_attrs[] = {
  940. #ifdef CONFIG_HOTPLUG_CPU
  941. &dev_attr_configure.attr,
  942. #endif
  943. &dev_attr_address.attr,
  944. NULL,
  945. };
  946. static struct attribute_group cpu_common_attr_group = {
  947. .attrs = cpu_common_attrs,
  948. };
  949. static struct attribute *cpu_online_attrs[] = {
  950. &dev_attr_idle_count.attr,
  951. &dev_attr_idle_time_us.attr,
  952. NULL,
  953. };
  954. static struct attribute_group cpu_online_attr_group = {
  955. .attrs = cpu_online_attrs,
  956. };
  957. static int smp_cpu_online(unsigned int cpu)
  958. {
  959. struct device *s = &per_cpu(cpu_device, cpu)->dev;
  960. return sysfs_create_group(&s->kobj, &cpu_online_attr_group);
  961. }
  962. static int smp_cpu_pre_down(unsigned int cpu)
  963. {
  964. struct device *s = &per_cpu(cpu_device, cpu)->dev;
  965. sysfs_remove_group(&s->kobj, &cpu_online_attr_group);
  966. return 0;
  967. }
  968. static int smp_add_present_cpu(int cpu)
  969. {
  970. struct device *s;
  971. struct cpu *c;
  972. int rc;
  973. c = kzalloc(sizeof(*c), GFP_KERNEL);
  974. if (!c)
  975. return -ENOMEM;
  976. per_cpu(cpu_device, cpu) = c;
  977. s = &c->dev;
  978. c->hotpluggable = 1;
  979. rc = register_cpu(c, cpu);
  980. if (rc)
  981. goto out;
  982. rc = sysfs_create_group(&s->kobj, &cpu_common_attr_group);
  983. if (rc)
  984. goto out_cpu;
  985. rc = topology_cpu_init(c);
  986. if (rc)
  987. goto out_topology;
  988. return 0;
  989. out_topology:
  990. sysfs_remove_group(&s->kobj, &cpu_common_attr_group);
  991. out_cpu:
  992. #ifdef CONFIG_HOTPLUG_CPU
  993. unregister_cpu(c);
  994. #endif
  995. out:
  996. return rc;
  997. }
  998. #ifdef CONFIG_HOTPLUG_CPU
  999. int __ref smp_rescan_cpus(void)
  1000. {
  1001. struct sclp_core_info *info;
  1002. int nr;
  1003. info = kzalloc(sizeof(*info), GFP_KERNEL);
  1004. if (!info)
  1005. return -ENOMEM;
  1006. smp_get_core_info(info, 0);
  1007. get_online_cpus();
  1008. mutex_lock(&smp_cpu_state_mutex);
  1009. nr = __smp_rescan_cpus(info, 1);
  1010. mutex_unlock(&smp_cpu_state_mutex);
  1011. put_online_cpus();
  1012. kfree(info);
  1013. if (nr)
  1014. topology_schedule_update();
  1015. return 0;
  1016. }
  1017. static ssize_t __ref rescan_store(struct device *dev,
  1018. struct device_attribute *attr,
  1019. const char *buf,
  1020. size_t count)
  1021. {
  1022. int rc;
  1023. rc = lock_device_hotplug_sysfs();
  1024. if (rc)
  1025. return rc;
  1026. rc = smp_rescan_cpus();
  1027. unlock_device_hotplug();
  1028. return rc ? rc : count;
  1029. }
  1030. static DEVICE_ATTR_WO(rescan);
  1031. #endif /* CONFIG_HOTPLUG_CPU */
  1032. static int __init s390_smp_init(void)
  1033. {
  1034. int cpu, rc = 0;
  1035. #ifdef CONFIG_HOTPLUG_CPU
  1036. rc = device_create_file(cpu_subsys.dev_root, &dev_attr_rescan);
  1037. if (rc)
  1038. return rc;
  1039. #endif
  1040. for_each_present_cpu(cpu) {
  1041. rc = smp_add_present_cpu(cpu);
  1042. if (rc)
  1043. goto out;
  1044. }
  1045. rc = cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, "s390/smp:online",
  1046. smp_cpu_online, smp_cpu_pre_down);
  1047. rc = rc <= 0 ? rc : 0;
  1048. out:
  1049. return rc;
  1050. }
  1051. subsys_initcall(s390_smp_init);