Kconfig 9.6 KB

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  1. menu "Platform support"
  2. source "arch/powerpc/platforms/powernv/Kconfig"
  3. source "arch/powerpc/platforms/pseries/Kconfig"
  4. source "arch/powerpc/platforms/chrp/Kconfig"
  5. source "arch/powerpc/platforms/512x/Kconfig"
  6. source "arch/powerpc/platforms/52xx/Kconfig"
  7. source "arch/powerpc/platforms/powermac/Kconfig"
  8. source "arch/powerpc/platforms/maple/Kconfig"
  9. source "arch/powerpc/platforms/pasemi/Kconfig"
  10. source "arch/powerpc/platforms/ps3/Kconfig"
  11. source "arch/powerpc/platforms/cell/Kconfig"
  12. source "arch/powerpc/platforms/8xx/Kconfig"
  13. source "arch/powerpc/platforms/82xx/Kconfig"
  14. source "arch/powerpc/platforms/83xx/Kconfig"
  15. source "arch/powerpc/platforms/85xx/Kconfig"
  16. source "arch/powerpc/platforms/86xx/Kconfig"
  17. source "arch/powerpc/platforms/embedded6xx/Kconfig"
  18. source "arch/powerpc/platforms/44x/Kconfig"
  19. source "arch/powerpc/platforms/40x/Kconfig"
  20. source "arch/powerpc/platforms/amigaone/Kconfig"
  21. config KVM_GUEST
  22. bool "KVM Guest support"
  23. default n
  24. select EPAPR_PARAVIRT
  25. ---help---
  26. This option enables various optimizations for running under the KVM
  27. hypervisor. Overhead for the kernel when not running inside KVM should
  28. be minimal.
  29. In case of doubt, say Y
  30. config EPAPR_PARAVIRT
  31. bool "ePAPR para-virtualization support"
  32. default n
  33. help
  34. Enables ePAPR para-virtualization support for guests.
  35. In case of doubt, say Y
  36. config PPC_NATIVE
  37. bool
  38. depends on 6xx || PPC64
  39. help
  40. Support for running natively on the hardware, i.e. without
  41. a hypervisor. This option is not user-selectable but should
  42. be selected by all platforms that need it.
  43. config PPC_OF_BOOT_TRAMPOLINE
  44. bool "Support booting from Open Firmware or yaboot"
  45. depends on 6xx || PPC64
  46. default y
  47. help
  48. Support from booting from Open Firmware or yaboot using an
  49. Open Firmware client interface. This enables the kernel to
  50. communicate with open firmware to retrieve system information
  51. such as the device tree.
  52. In case of doubt, say Y
  53. config UDBG_RTAS_CONSOLE
  54. bool "RTAS based debug console"
  55. depends on PPC_RTAS
  56. default n
  57. config PPC_SMP_MUXED_IPI
  58. bool
  59. help
  60. Select this opton if your platform supports SMP and your
  61. interrupt controller provides less than 4 interrupts to each
  62. cpu. This will enable the generic code to multiplex the 4
  63. messages on to one ipi.
  64. config PPC_UDBG_BEAT
  65. bool "BEAT based debug console"
  66. depends on PPC_CELLEB
  67. default n
  68. config IPIC
  69. bool
  70. default n
  71. config MPIC
  72. bool
  73. default n
  74. config MPIC_TIMER
  75. bool "MPIC Global Timer"
  76. depends on MPIC && FSL_SOC
  77. default n
  78. help
  79. The MPIC global timer is a hardware timer inside the
  80. Freescale PIC complying with OpenPIC standard. When the
  81. specified interval times out, the hardware timer generates
  82. an interrupt. The driver currently is only tested on fsl
  83. chip, but it can potentially support other global timers
  84. complying with the OpenPIC standard.
  85. config FSL_MPIC_TIMER_WAKEUP
  86. tristate "Freescale MPIC global timer wakeup driver"
  87. depends on FSL_SOC && MPIC_TIMER && PM
  88. default n
  89. help
  90. The driver provides a way to wake up the system by MPIC
  91. timer.
  92. e.g. "echo 5 > /sys/devices/system/mpic/timer_wakeup"
  93. config PPC_EPAPR_HV_PIC
  94. bool
  95. default n
  96. select EPAPR_PARAVIRT
  97. config MPIC_WEIRD
  98. bool
  99. default n
  100. config MPIC_MSGR
  101. bool "MPIC message register support"
  102. depends on MPIC
  103. default n
  104. help
  105. Enables support for the MPIC message registers. These
  106. registers are used for inter-processor communication.
  107. config PPC_I8259
  108. bool
  109. default n
  110. config U3_DART
  111. bool
  112. depends on PPC64
  113. default n
  114. config PPC_RTAS
  115. bool
  116. default n
  117. config RTAS_ERROR_LOGGING
  118. bool
  119. depends on PPC_RTAS
  120. default n
  121. config PPC_RTAS_DAEMON
  122. bool
  123. depends on PPC_RTAS
  124. default n
  125. config RTAS_PROC
  126. bool "Proc interface to RTAS"
  127. depends on PPC_RTAS && PROC_FS
  128. default y
  129. config RTAS_FLASH
  130. tristate "Firmware flash interface"
  131. depends on PPC64 && RTAS_PROC
  132. config MMIO_NVRAM
  133. bool
  134. default n
  135. config MPIC_U3_HT_IRQS
  136. bool
  137. default n
  138. config MPIC_BROKEN_REGREAD
  139. bool
  140. depends on MPIC
  141. help
  142. This option enables a MPIC driver workaround for some chips
  143. that have a bug that causes some interrupt source information
  144. to not read back properly. It is safe to use on other chips as
  145. well, but enabling it uses about 8KB of memory to keep copies
  146. of the register contents in software.
  147. config IBMVIO
  148. depends on PPC_PSERIES
  149. bool
  150. default y
  151. config IBMEBUS
  152. depends on PPC_PSERIES
  153. bool "Support for GX bus based adapters"
  154. help
  155. Bus device driver for GX bus based adapters.
  156. config EEH
  157. bool
  158. depends on (PPC_POWERNV || PPC_PSERIES) && PCI
  159. default y
  160. config PPC_MPC106
  161. bool
  162. default n
  163. config PPC_970_NAP
  164. bool
  165. default n
  166. config PPC_P7_NAP
  167. bool
  168. default n
  169. config PPC_INDIRECT_PIO
  170. bool
  171. select GENERIC_IOMAP
  172. config PPC_INDIRECT_MMIO
  173. bool
  174. config PPC_IO_WORKAROUNDS
  175. bool
  176. source "drivers/cpufreq/Kconfig"
  177. menu "CPUIdle driver"
  178. source "drivers/cpuidle/Kconfig"
  179. endmenu
  180. config PPC601_SYNC_FIX
  181. bool "Workarounds for PPC601 bugs"
  182. depends on 6xx && PPC_PMAC
  183. help
  184. Some versions of the PPC601 (the first PowerPC chip) have bugs which
  185. mean that extra synchronization instructions are required near
  186. certain instructions, typically those that make major changes to the
  187. CPU state. These extra instructions reduce performance slightly.
  188. If you say N here, these extra instructions will not be included,
  189. resulting in a kernel which will run faster but may not run at all
  190. on some systems with the PPC601 chip.
  191. If in doubt, say Y here.
  192. config TAU
  193. bool "On-chip CPU temperature sensor support"
  194. depends on 6xx
  195. help
  196. G3 and G4 processors have an on-chip temperature sensor called the
  197. 'Thermal Assist Unit (TAU)', which, in theory, can measure the on-die
  198. temperature within 2-4 degrees Celsius. This option shows the current
  199. on-die temperature in /proc/cpuinfo if the cpu supports it.
  200. Unfortunately, on some chip revisions, this sensor is very inaccurate
  201. and in many cases, does not work at all, so don't assume the cpu
  202. temp is actually what /proc/cpuinfo says it is.
  203. config TAU_INT
  204. bool "Interrupt driven TAU driver (DANGEROUS)"
  205. depends on TAU
  206. ---help---
  207. The TAU supports an interrupt driven mode which causes an interrupt
  208. whenever the temperature goes out of range. This is the fastest way
  209. to get notified the temp has exceeded a range. With this option off,
  210. a timer is used to re-check the temperature periodically.
  211. However, on some cpus it appears that the TAU interrupt hardware
  212. is buggy and can cause a situation which would lead unexplained hard
  213. lockups.
  214. Unless you are extending the TAU driver, or enjoy kernel/hardware
  215. debugging, leave this option off.
  216. config TAU_AVERAGE
  217. bool "Average high and low temp"
  218. depends on TAU
  219. ---help---
  220. The TAU hardware can compare the temperature to an upper and lower
  221. bound. The default behavior is to show both the upper and lower
  222. bound in /proc/cpuinfo. If the range is large, the temperature is
  223. either changing a lot, or the TAU hardware is broken (likely on some
  224. G4's). If the range is small (around 4 degrees), the temperature is
  225. relatively stable. If you say Y here, a single temperature value,
  226. halfway between the upper and lower bounds, will be reported in
  227. /proc/cpuinfo.
  228. If in doubt, say N here.
  229. config QUICC_ENGINE
  230. bool "Freescale QUICC Engine (QE) Support"
  231. depends on FSL_SOC && PPC32
  232. select PPC_LIB_RHEAP
  233. select CRC32
  234. help
  235. The QUICC Engine (QE) is a new generation of communications
  236. coprocessors on Freescale embedded CPUs (akin to CPM in older chips).
  237. Selecting this option means that you wish to build a kernel
  238. for a machine with a QE coprocessor.
  239. config QE_GPIO
  240. bool "QE GPIO support"
  241. depends on QUICC_ENGINE
  242. select ARCH_REQUIRE_GPIOLIB
  243. help
  244. Say Y here if you're going to use hardware that connects to the
  245. QE GPIOs.
  246. config CPM2
  247. bool "Enable support for the CPM2 (Communications Processor Module)"
  248. depends on (FSL_SOC_BOOKE && PPC32) || 8260
  249. select CPM
  250. select PPC_LIB_RHEAP
  251. select PPC_PCI_CHOICE
  252. select ARCH_REQUIRE_GPIOLIB
  253. help
  254. The CPM2 (Communications Processor Module) is a coprocessor on
  255. embedded CPUs made by Freescale. Selecting this option means that
  256. you wish to build a kernel for a machine with a CPM2 coprocessor
  257. on it (826x, 827x, 8560).
  258. config AXON_RAM
  259. tristate "Axon DDR2 memory device driver"
  260. depends on PPC_IBM_CELL_BLADE && BLOCK
  261. default m
  262. help
  263. It registers one block device per Axon's DDR2 memory bank found
  264. on a system. Block devices are called axonram?, their major and
  265. minor numbers are available in /proc/devices, /proc/partitions or
  266. in /sys/block/axonram?/dev.
  267. config FSL_ULI1575
  268. bool
  269. default n
  270. select GENERIC_ISA_DMA
  271. help
  272. Supports for the ULI1575 PCIe south bridge that exists on some
  273. Freescale reference boards. The boards all use the ULI in pretty
  274. much the same way.
  275. config CPM
  276. bool
  277. config OF_RTC
  278. bool
  279. help
  280. Uses information from the OF or flattened device tree to instantiate
  281. platform devices for direct mapped RTC chips like the DS1742 or DS1743.
  282. config SIMPLE_GPIO
  283. bool "Support for simple, memory-mapped GPIO controllers"
  284. depends on PPC
  285. select ARCH_REQUIRE_GPIOLIB
  286. help
  287. Say Y here to support simple, memory-mapped GPIO controllers.
  288. These are usually BCSRs used to control board's switches, LEDs,
  289. chip-selects, Ethernet/USB PHY's power and various other small
  290. on-board peripherals.
  291. config MCU_MPC8349EMITX
  292. bool "MPC8349E-mITX MCU driver"
  293. depends on I2C=y && PPC_83xx
  294. select ARCH_REQUIRE_GPIOLIB
  295. help
  296. Say Y here to enable soft power-off functionality on the Freescale
  297. boards with the MPC8349E-mITX-compatible MCU chips. This driver will
  298. also register MCU GPIOs with the generic GPIO API, so you'll able
  299. to use MCU pins as GPIOs.
  300. config XILINX_PCI
  301. bool "Xilinx PCI host bridge support"
  302. depends on PCI && XILINX_VIRTEX
  303. endmenu