bpf_jit_comp.c 32 KB

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  1. /* bpf_jit_comp.c : BPF JIT compiler
  2. *
  3. * Copyright (C) 2011-2013 Eric Dumazet (eric.dumazet@gmail.com)
  4. * Internal BPF Copyright (c) 2011-2014 PLUMgrid, http://plumgrid.com
  5. *
  6. * This program is free software; you can redistribute it and/or
  7. * modify it under the terms of the GNU General Public License
  8. * as published by the Free Software Foundation; version 2
  9. * of the License.
  10. */
  11. #include <linux/netdevice.h>
  12. #include <linux/filter.h>
  13. #include <linux/if_vlan.h>
  14. #include <asm/cacheflush.h>
  15. #include <asm/set_memory.h>
  16. #include <linux/bpf.h>
  17. /*
  18. * assembly code in arch/x86/net/bpf_jit.S
  19. */
  20. extern u8 sk_load_word[], sk_load_half[], sk_load_byte[];
  21. extern u8 sk_load_word_positive_offset[], sk_load_half_positive_offset[];
  22. extern u8 sk_load_byte_positive_offset[];
  23. extern u8 sk_load_word_negative_offset[], sk_load_half_negative_offset[];
  24. extern u8 sk_load_byte_negative_offset[];
  25. static u8 *emit_code(u8 *ptr, u32 bytes, unsigned int len)
  26. {
  27. if (len == 1)
  28. *ptr = bytes;
  29. else if (len == 2)
  30. *(u16 *)ptr = bytes;
  31. else {
  32. *(u32 *)ptr = bytes;
  33. barrier();
  34. }
  35. return ptr + len;
  36. }
  37. #define EMIT(bytes, len) \
  38. do { prog = emit_code(prog, bytes, len); cnt += len; } while (0)
  39. #define EMIT1(b1) EMIT(b1, 1)
  40. #define EMIT2(b1, b2) EMIT((b1) + ((b2) << 8), 2)
  41. #define EMIT3(b1, b2, b3) EMIT((b1) + ((b2) << 8) + ((b3) << 16), 3)
  42. #define EMIT4(b1, b2, b3, b4) EMIT((b1) + ((b2) << 8) + ((b3) << 16) + ((b4) << 24), 4)
  43. #define EMIT1_off32(b1, off) \
  44. do {EMIT1(b1); EMIT(off, 4); } while (0)
  45. #define EMIT2_off32(b1, b2, off) \
  46. do {EMIT2(b1, b2); EMIT(off, 4); } while (0)
  47. #define EMIT3_off32(b1, b2, b3, off) \
  48. do {EMIT3(b1, b2, b3); EMIT(off, 4); } while (0)
  49. #define EMIT4_off32(b1, b2, b3, b4, off) \
  50. do {EMIT4(b1, b2, b3, b4); EMIT(off, 4); } while (0)
  51. static bool is_imm8(int value)
  52. {
  53. return value <= 127 && value >= -128;
  54. }
  55. static bool is_simm32(s64 value)
  56. {
  57. return value == (s64) (s32) value;
  58. }
  59. /* mov dst, src */
  60. #define EMIT_mov(DST, SRC) \
  61. do {if (DST != SRC) \
  62. EMIT3(add_2mod(0x48, DST, SRC), 0x89, add_2reg(0xC0, DST, SRC)); \
  63. } while (0)
  64. static int bpf_size_to_x86_bytes(int bpf_size)
  65. {
  66. if (bpf_size == BPF_W)
  67. return 4;
  68. else if (bpf_size == BPF_H)
  69. return 2;
  70. else if (bpf_size == BPF_B)
  71. return 1;
  72. else if (bpf_size == BPF_DW)
  73. return 4; /* imm32 */
  74. else
  75. return 0;
  76. }
  77. /* list of x86 cond jumps opcodes (. + s8)
  78. * Add 0x10 (and an extra 0x0f) to generate far jumps (. + s32)
  79. */
  80. #define X86_JB 0x72
  81. #define X86_JAE 0x73
  82. #define X86_JE 0x74
  83. #define X86_JNE 0x75
  84. #define X86_JBE 0x76
  85. #define X86_JA 0x77
  86. #define X86_JL 0x7C
  87. #define X86_JGE 0x7D
  88. #define X86_JLE 0x7E
  89. #define X86_JG 0x7F
  90. static void bpf_flush_icache(void *start, void *end)
  91. {
  92. mm_segment_t old_fs = get_fs();
  93. set_fs(KERNEL_DS);
  94. smp_wmb();
  95. flush_icache_range((unsigned long)start, (unsigned long)end);
  96. set_fs(old_fs);
  97. }
  98. #define CHOOSE_LOAD_FUNC(K, func) \
  99. ((int)K < 0 ? ((int)K >= SKF_LL_OFF ? func##_negative_offset : func) : func##_positive_offset)
  100. /* pick a register outside of BPF range for JIT internal work */
  101. #define AUX_REG (MAX_BPF_JIT_REG + 1)
  102. /* The following table maps BPF registers to x64 registers.
  103. *
  104. * x64 register r12 is unused, since if used as base address
  105. * register in load/store instructions, it always needs an
  106. * extra byte of encoding and is callee saved.
  107. *
  108. * r9 caches skb->len - skb->data_len
  109. * r10 caches skb->data, and used for blinding (if enabled)
  110. */
  111. static const int reg2hex[] = {
  112. [BPF_REG_0] = 0, /* rax */
  113. [BPF_REG_1] = 7, /* rdi */
  114. [BPF_REG_2] = 6, /* rsi */
  115. [BPF_REG_3] = 2, /* rdx */
  116. [BPF_REG_4] = 1, /* rcx */
  117. [BPF_REG_5] = 0, /* r8 */
  118. [BPF_REG_6] = 3, /* rbx callee saved */
  119. [BPF_REG_7] = 5, /* r13 callee saved */
  120. [BPF_REG_8] = 6, /* r14 callee saved */
  121. [BPF_REG_9] = 7, /* r15 callee saved */
  122. [BPF_REG_FP] = 5, /* rbp readonly */
  123. [BPF_REG_AX] = 2, /* r10 temp register */
  124. [AUX_REG] = 3, /* r11 temp register */
  125. };
  126. /* is_ereg() == true if BPF register 'reg' maps to x64 r8..r15
  127. * which need extra byte of encoding.
  128. * rax,rcx,...,rbp have simpler encoding
  129. */
  130. static bool is_ereg(u32 reg)
  131. {
  132. return (1 << reg) & (BIT(BPF_REG_5) |
  133. BIT(AUX_REG) |
  134. BIT(BPF_REG_7) |
  135. BIT(BPF_REG_8) |
  136. BIT(BPF_REG_9) |
  137. BIT(BPF_REG_AX));
  138. }
  139. /* add modifiers if 'reg' maps to x64 registers r8..r15 */
  140. static u8 add_1mod(u8 byte, u32 reg)
  141. {
  142. if (is_ereg(reg))
  143. byte |= 1;
  144. return byte;
  145. }
  146. static u8 add_2mod(u8 byte, u32 r1, u32 r2)
  147. {
  148. if (is_ereg(r1))
  149. byte |= 1;
  150. if (is_ereg(r2))
  151. byte |= 4;
  152. return byte;
  153. }
  154. /* encode 'dst_reg' register into x64 opcode 'byte' */
  155. static u8 add_1reg(u8 byte, u32 dst_reg)
  156. {
  157. return byte + reg2hex[dst_reg];
  158. }
  159. /* encode 'dst_reg' and 'src_reg' registers into x64 opcode 'byte' */
  160. static u8 add_2reg(u8 byte, u32 dst_reg, u32 src_reg)
  161. {
  162. return byte + reg2hex[dst_reg] + (reg2hex[src_reg] << 3);
  163. }
  164. static void jit_fill_hole(void *area, unsigned int size)
  165. {
  166. /* fill whole space with int3 instructions */
  167. memset(area, 0xcc, size);
  168. }
  169. struct jit_context {
  170. int cleanup_addr; /* epilogue code offset */
  171. bool seen_ld_abs;
  172. bool seen_ax_reg;
  173. };
  174. /* maximum number of bytes emitted while JITing one eBPF insn */
  175. #define BPF_MAX_INSN_SIZE 128
  176. #define BPF_INSN_SAFETY 64
  177. #define AUX_STACK_SPACE \
  178. (32 /* space for rbx, r13, r14, r15 */ + \
  179. 8 /* space for skb_copy_bits() buffer */)
  180. #define PROLOGUE_SIZE 37
  181. /* emit x64 prologue code for BPF program and check it's size.
  182. * bpf_tail_call helper will skip it while jumping into another program
  183. */
  184. static void emit_prologue(u8 **pprog, u32 stack_depth)
  185. {
  186. u8 *prog = *pprog;
  187. int cnt = 0;
  188. EMIT1(0x55); /* push rbp */
  189. EMIT3(0x48, 0x89, 0xE5); /* mov rbp,rsp */
  190. /* sub rsp, rounded_stack_depth + AUX_STACK_SPACE */
  191. EMIT3_off32(0x48, 0x81, 0xEC,
  192. round_up(stack_depth, 8) + AUX_STACK_SPACE);
  193. /* sub rbp, AUX_STACK_SPACE */
  194. EMIT4(0x48, 0x83, 0xED, AUX_STACK_SPACE);
  195. /* all classic BPF filters use R6(rbx) save it */
  196. /* mov qword ptr [rbp+0],rbx */
  197. EMIT4(0x48, 0x89, 0x5D, 0);
  198. /* bpf_convert_filter() maps classic BPF register X to R7 and uses R8
  199. * as temporary, so all tcpdump filters need to spill/fill R7(r13) and
  200. * R8(r14). R9(r15) spill could be made conditional, but there is only
  201. * one 'bpf_error' return path out of helper functions inside bpf_jit.S
  202. * The overhead of extra spill is negligible for any filter other
  203. * than synthetic ones. Therefore not worth adding complexity.
  204. */
  205. /* mov qword ptr [rbp+8],r13 */
  206. EMIT4(0x4C, 0x89, 0x6D, 8);
  207. /* mov qword ptr [rbp+16],r14 */
  208. EMIT4(0x4C, 0x89, 0x75, 16);
  209. /* mov qword ptr [rbp+24],r15 */
  210. EMIT4(0x4C, 0x89, 0x7D, 24);
  211. /* Clear the tail call counter (tail_call_cnt): for eBPF tail calls
  212. * we need to reset the counter to 0. It's done in two instructions,
  213. * resetting rax register to 0 (xor on eax gets 0 extended), and
  214. * moving it to the counter location.
  215. */
  216. /* xor eax, eax */
  217. EMIT2(0x31, 0xc0);
  218. /* mov qword ptr [rbp+32], rax */
  219. EMIT4(0x48, 0x89, 0x45, 32);
  220. BUILD_BUG_ON(cnt != PROLOGUE_SIZE);
  221. *pprog = prog;
  222. }
  223. /* generate the following code:
  224. * ... bpf_tail_call(void *ctx, struct bpf_array *array, u64 index) ...
  225. * if (index >= array->map.max_entries)
  226. * goto out;
  227. * if (++tail_call_cnt > MAX_TAIL_CALL_CNT)
  228. * goto out;
  229. * prog = array->ptrs[index];
  230. * if (prog == NULL)
  231. * goto out;
  232. * goto *(prog->bpf_func + prologue_size);
  233. * out:
  234. */
  235. static void emit_bpf_tail_call(u8 **pprog)
  236. {
  237. u8 *prog = *pprog;
  238. int label1, label2, label3;
  239. int cnt = 0;
  240. /* rdi - pointer to ctx
  241. * rsi - pointer to bpf_array
  242. * rdx - index in bpf_array
  243. */
  244. /* if (index >= array->map.max_entries)
  245. * goto out;
  246. */
  247. EMIT2(0x89, 0xD2); /* mov edx, edx */
  248. EMIT3(0x39, 0x56, /* cmp dword ptr [rsi + 16], edx */
  249. offsetof(struct bpf_array, map.max_entries));
  250. #define OFFSET1 43 /* number of bytes to jump */
  251. EMIT2(X86_JBE, OFFSET1); /* jbe out */
  252. label1 = cnt;
  253. /* if (tail_call_cnt > MAX_TAIL_CALL_CNT)
  254. * goto out;
  255. */
  256. EMIT2_off32(0x8B, 0x85, 36); /* mov eax, dword ptr [rbp + 36] */
  257. EMIT3(0x83, 0xF8, MAX_TAIL_CALL_CNT); /* cmp eax, MAX_TAIL_CALL_CNT */
  258. #define OFFSET2 32
  259. EMIT2(X86_JA, OFFSET2); /* ja out */
  260. label2 = cnt;
  261. EMIT3(0x83, 0xC0, 0x01); /* add eax, 1 */
  262. EMIT2_off32(0x89, 0x85, 36); /* mov dword ptr [rbp + 36], eax */
  263. /* prog = array->ptrs[index]; */
  264. EMIT4_off32(0x48, 0x8B, 0x84, 0xD6, /* mov rax, [rsi + rdx * 8 + offsetof(...)] */
  265. offsetof(struct bpf_array, ptrs));
  266. /* if (prog == NULL)
  267. * goto out;
  268. */
  269. EMIT3(0x48, 0x85, 0xC0); /* test rax,rax */
  270. #define OFFSET3 10
  271. EMIT2(X86_JE, OFFSET3); /* je out */
  272. label3 = cnt;
  273. /* goto *(prog->bpf_func + prologue_size); */
  274. EMIT4(0x48, 0x8B, 0x40, /* mov rax, qword ptr [rax + 32] */
  275. offsetof(struct bpf_prog, bpf_func));
  276. EMIT4(0x48, 0x83, 0xC0, PROLOGUE_SIZE); /* add rax, prologue_size */
  277. /* now we're ready to jump into next BPF program
  278. * rdi == ctx (1st arg)
  279. * rax == prog->bpf_func + prologue_size
  280. */
  281. EMIT2(0xFF, 0xE0); /* jmp rax */
  282. /* out: */
  283. BUILD_BUG_ON(cnt - label1 != OFFSET1);
  284. BUILD_BUG_ON(cnt - label2 != OFFSET2);
  285. BUILD_BUG_ON(cnt - label3 != OFFSET3);
  286. *pprog = prog;
  287. }
  288. static void emit_load_skb_data_hlen(u8 **pprog)
  289. {
  290. u8 *prog = *pprog;
  291. int cnt = 0;
  292. /* r9d = skb->len - skb->data_len (headlen)
  293. * r10 = skb->data
  294. */
  295. /* mov %r9d, off32(%rdi) */
  296. EMIT3_off32(0x44, 0x8b, 0x8f, offsetof(struct sk_buff, len));
  297. /* sub %r9d, off32(%rdi) */
  298. EMIT3_off32(0x44, 0x2b, 0x8f, offsetof(struct sk_buff, data_len));
  299. /* mov %r10, off32(%rdi) */
  300. EMIT3_off32(0x4c, 0x8b, 0x97, offsetof(struct sk_buff, data));
  301. *pprog = prog;
  302. }
  303. static int do_jit(struct bpf_prog *bpf_prog, int *addrs, u8 *image,
  304. int oldproglen, struct jit_context *ctx)
  305. {
  306. struct bpf_insn *insn = bpf_prog->insnsi;
  307. int insn_cnt = bpf_prog->len;
  308. bool seen_ld_abs = ctx->seen_ld_abs | (oldproglen == 0);
  309. bool seen_ax_reg = ctx->seen_ax_reg | (oldproglen == 0);
  310. bool seen_exit = false;
  311. u8 temp[BPF_MAX_INSN_SIZE + BPF_INSN_SAFETY];
  312. int i, cnt = 0;
  313. int proglen = 0;
  314. u8 *prog = temp;
  315. emit_prologue(&prog, bpf_prog->aux->stack_depth);
  316. if (seen_ld_abs)
  317. emit_load_skb_data_hlen(&prog);
  318. for (i = 0; i < insn_cnt; i++, insn++) {
  319. const s32 imm32 = insn->imm;
  320. u32 dst_reg = insn->dst_reg;
  321. u32 src_reg = insn->src_reg;
  322. u8 b1 = 0, b2 = 0, b3 = 0;
  323. s64 jmp_offset;
  324. u8 jmp_cond;
  325. bool reload_skb_data;
  326. int ilen;
  327. u8 *func;
  328. if (dst_reg == BPF_REG_AX || src_reg == BPF_REG_AX)
  329. ctx->seen_ax_reg = seen_ax_reg = true;
  330. switch (insn->code) {
  331. /* ALU */
  332. case BPF_ALU | BPF_ADD | BPF_X:
  333. case BPF_ALU | BPF_SUB | BPF_X:
  334. case BPF_ALU | BPF_AND | BPF_X:
  335. case BPF_ALU | BPF_OR | BPF_X:
  336. case BPF_ALU | BPF_XOR | BPF_X:
  337. case BPF_ALU64 | BPF_ADD | BPF_X:
  338. case BPF_ALU64 | BPF_SUB | BPF_X:
  339. case BPF_ALU64 | BPF_AND | BPF_X:
  340. case BPF_ALU64 | BPF_OR | BPF_X:
  341. case BPF_ALU64 | BPF_XOR | BPF_X:
  342. switch (BPF_OP(insn->code)) {
  343. case BPF_ADD: b2 = 0x01; break;
  344. case BPF_SUB: b2 = 0x29; break;
  345. case BPF_AND: b2 = 0x21; break;
  346. case BPF_OR: b2 = 0x09; break;
  347. case BPF_XOR: b2 = 0x31; break;
  348. }
  349. if (BPF_CLASS(insn->code) == BPF_ALU64)
  350. EMIT1(add_2mod(0x48, dst_reg, src_reg));
  351. else if (is_ereg(dst_reg) || is_ereg(src_reg))
  352. EMIT1(add_2mod(0x40, dst_reg, src_reg));
  353. EMIT2(b2, add_2reg(0xC0, dst_reg, src_reg));
  354. break;
  355. /* mov dst, src */
  356. case BPF_ALU64 | BPF_MOV | BPF_X:
  357. EMIT_mov(dst_reg, src_reg);
  358. break;
  359. /* mov32 dst, src */
  360. case BPF_ALU | BPF_MOV | BPF_X:
  361. if (is_ereg(dst_reg) || is_ereg(src_reg))
  362. EMIT1(add_2mod(0x40, dst_reg, src_reg));
  363. EMIT2(0x89, add_2reg(0xC0, dst_reg, src_reg));
  364. break;
  365. /* neg dst */
  366. case BPF_ALU | BPF_NEG:
  367. case BPF_ALU64 | BPF_NEG:
  368. if (BPF_CLASS(insn->code) == BPF_ALU64)
  369. EMIT1(add_1mod(0x48, dst_reg));
  370. else if (is_ereg(dst_reg))
  371. EMIT1(add_1mod(0x40, dst_reg));
  372. EMIT2(0xF7, add_1reg(0xD8, dst_reg));
  373. break;
  374. case BPF_ALU | BPF_ADD | BPF_K:
  375. case BPF_ALU | BPF_SUB | BPF_K:
  376. case BPF_ALU | BPF_AND | BPF_K:
  377. case BPF_ALU | BPF_OR | BPF_K:
  378. case BPF_ALU | BPF_XOR | BPF_K:
  379. case BPF_ALU64 | BPF_ADD | BPF_K:
  380. case BPF_ALU64 | BPF_SUB | BPF_K:
  381. case BPF_ALU64 | BPF_AND | BPF_K:
  382. case BPF_ALU64 | BPF_OR | BPF_K:
  383. case BPF_ALU64 | BPF_XOR | BPF_K:
  384. if (BPF_CLASS(insn->code) == BPF_ALU64)
  385. EMIT1(add_1mod(0x48, dst_reg));
  386. else if (is_ereg(dst_reg))
  387. EMIT1(add_1mod(0x40, dst_reg));
  388. switch (BPF_OP(insn->code)) {
  389. case BPF_ADD: b3 = 0xC0; break;
  390. case BPF_SUB: b3 = 0xE8; break;
  391. case BPF_AND: b3 = 0xE0; break;
  392. case BPF_OR: b3 = 0xC8; break;
  393. case BPF_XOR: b3 = 0xF0; break;
  394. }
  395. if (is_imm8(imm32))
  396. EMIT3(0x83, add_1reg(b3, dst_reg), imm32);
  397. else
  398. EMIT2_off32(0x81, add_1reg(b3, dst_reg), imm32);
  399. break;
  400. case BPF_ALU64 | BPF_MOV | BPF_K:
  401. /* optimization: if imm32 is positive,
  402. * use 'mov eax, imm32' (which zero-extends imm32)
  403. * to save 2 bytes
  404. */
  405. if (imm32 < 0) {
  406. /* 'mov rax, imm32' sign extends imm32 */
  407. b1 = add_1mod(0x48, dst_reg);
  408. b2 = 0xC7;
  409. b3 = 0xC0;
  410. EMIT3_off32(b1, b2, add_1reg(b3, dst_reg), imm32);
  411. break;
  412. }
  413. case BPF_ALU | BPF_MOV | BPF_K:
  414. /* optimization: if imm32 is zero, use 'xor <dst>,<dst>'
  415. * to save 3 bytes.
  416. */
  417. if (imm32 == 0) {
  418. if (is_ereg(dst_reg))
  419. EMIT1(add_2mod(0x40, dst_reg, dst_reg));
  420. b2 = 0x31; /* xor */
  421. b3 = 0xC0;
  422. EMIT2(b2, add_2reg(b3, dst_reg, dst_reg));
  423. break;
  424. }
  425. /* mov %eax, imm32 */
  426. if (is_ereg(dst_reg))
  427. EMIT1(add_1mod(0x40, dst_reg));
  428. EMIT1_off32(add_1reg(0xB8, dst_reg), imm32);
  429. break;
  430. case BPF_LD | BPF_IMM | BPF_DW:
  431. /* optimization: if imm64 is zero, use 'xor <dst>,<dst>'
  432. * to save 7 bytes.
  433. */
  434. if (insn[0].imm == 0 && insn[1].imm == 0) {
  435. b1 = add_2mod(0x48, dst_reg, dst_reg);
  436. b2 = 0x31; /* xor */
  437. b3 = 0xC0;
  438. EMIT3(b1, b2, add_2reg(b3, dst_reg, dst_reg));
  439. insn++;
  440. i++;
  441. break;
  442. }
  443. /* movabsq %rax, imm64 */
  444. EMIT2(add_1mod(0x48, dst_reg), add_1reg(0xB8, dst_reg));
  445. EMIT(insn[0].imm, 4);
  446. EMIT(insn[1].imm, 4);
  447. insn++;
  448. i++;
  449. break;
  450. /* dst %= src, dst /= src, dst %= imm32, dst /= imm32 */
  451. case BPF_ALU | BPF_MOD | BPF_X:
  452. case BPF_ALU | BPF_DIV | BPF_X:
  453. case BPF_ALU | BPF_MOD | BPF_K:
  454. case BPF_ALU | BPF_DIV | BPF_K:
  455. case BPF_ALU64 | BPF_MOD | BPF_X:
  456. case BPF_ALU64 | BPF_DIV | BPF_X:
  457. case BPF_ALU64 | BPF_MOD | BPF_K:
  458. case BPF_ALU64 | BPF_DIV | BPF_K:
  459. EMIT1(0x50); /* push rax */
  460. EMIT1(0x52); /* push rdx */
  461. if (BPF_SRC(insn->code) == BPF_X)
  462. /* mov r11, src_reg */
  463. EMIT_mov(AUX_REG, src_reg);
  464. else
  465. /* mov r11, imm32 */
  466. EMIT3_off32(0x49, 0xC7, 0xC3, imm32);
  467. /* mov rax, dst_reg */
  468. EMIT_mov(BPF_REG_0, dst_reg);
  469. /* xor edx, edx
  470. * equivalent to 'xor rdx, rdx', but one byte less
  471. */
  472. EMIT2(0x31, 0xd2);
  473. if (BPF_SRC(insn->code) == BPF_X) {
  474. /* if (src_reg == 0) return 0 */
  475. /* cmp r11, 0 */
  476. EMIT4(0x49, 0x83, 0xFB, 0x00);
  477. /* jne .+9 (skip over pop, pop, xor and jmp) */
  478. EMIT2(X86_JNE, 1 + 1 + 2 + 5);
  479. EMIT1(0x5A); /* pop rdx */
  480. EMIT1(0x58); /* pop rax */
  481. EMIT2(0x31, 0xc0); /* xor eax, eax */
  482. /* jmp cleanup_addr
  483. * addrs[i] - 11, because there are 11 bytes
  484. * after this insn: div, mov, pop, pop, mov
  485. */
  486. jmp_offset = ctx->cleanup_addr - (addrs[i] - 11);
  487. EMIT1_off32(0xE9, jmp_offset);
  488. }
  489. if (BPF_CLASS(insn->code) == BPF_ALU64)
  490. /* div r11 */
  491. EMIT3(0x49, 0xF7, 0xF3);
  492. else
  493. /* div r11d */
  494. EMIT3(0x41, 0xF7, 0xF3);
  495. if (BPF_OP(insn->code) == BPF_MOD)
  496. /* mov r11, rdx */
  497. EMIT3(0x49, 0x89, 0xD3);
  498. else
  499. /* mov r11, rax */
  500. EMIT3(0x49, 0x89, 0xC3);
  501. EMIT1(0x5A); /* pop rdx */
  502. EMIT1(0x58); /* pop rax */
  503. /* mov dst_reg, r11 */
  504. EMIT_mov(dst_reg, AUX_REG);
  505. break;
  506. case BPF_ALU | BPF_MUL | BPF_K:
  507. case BPF_ALU | BPF_MUL | BPF_X:
  508. case BPF_ALU64 | BPF_MUL | BPF_K:
  509. case BPF_ALU64 | BPF_MUL | BPF_X:
  510. EMIT1(0x50); /* push rax */
  511. EMIT1(0x52); /* push rdx */
  512. /* mov r11, dst_reg */
  513. EMIT_mov(AUX_REG, dst_reg);
  514. if (BPF_SRC(insn->code) == BPF_X)
  515. /* mov rax, src_reg */
  516. EMIT_mov(BPF_REG_0, src_reg);
  517. else
  518. /* mov rax, imm32 */
  519. EMIT3_off32(0x48, 0xC7, 0xC0, imm32);
  520. if (BPF_CLASS(insn->code) == BPF_ALU64)
  521. EMIT1(add_1mod(0x48, AUX_REG));
  522. else if (is_ereg(AUX_REG))
  523. EMIT1(add_1mod(0x40, AUX_REG));
  524. /* mul(q) r11 */
  525. EMIT2(0xF7, add_1reg(0xE0, AUX_REG));
  526. /* mov r11, rax */
  527. EMIT_mov(AUX_REG, BPF_REG_0);
  528. EMIT1(0x5A); /* pop rdx */
  529. EMIT1(0x58); /* pop rax */
  530. /* mov dst_reg, r11 */
  531. EMIT_mov(dst_reg, AUX_REG);
  532. break;
  533. /* shifts */
  534. case BPF_ALU | BPF_LSH | BPF_K:
  535. case BPF_ALU | BPF_RSH | BPF_K:
  536. case BPF_ALU | BPF_ARSH | BPF_K:
  537. case BPF_ALU64 | BPF_LSH | BPF_K:
  538. case BPF_ALU64 | BPF_RSH | BPF_K:
  539. case BPF_ALU64 | BPF_ARSH | BPF_K:
  540. if (BPF_CLASS(insn->code) == BPF_ALU64)
  541. EMIT1(add_1mod(0x48, dst_reg));
  542. else if (is_ereg(dst_reg))
  543. EMIT1(add_1mod(0x40, dst_reg));
  544. switch (BPF_OP(insn->code)) {
  545. case BPF_LSH: b3 = 0xE0; break;
  546. case BPF_RSH: b3 = 0xE8; break;
  547. case BPF_ARSH: b3 = 0xF8; break;
  548. }
  549. EMIT3(0xC1, add_1reg(b3, dst_reg), imm32);
  550. break;
  551. case BPF_ALU | BPF_LSH | BPF_X:
  552. case BPF_ALU | BPF_RSH | BPF_X:
  553. case BPF_ALU | BPF_ARSH | BPF_X:
  554. case BPF_ALU64 | BPF_LSH | BPF_X:
  555. case BPF_ALU64 | BPF_RSH | BPF_X:
  556. case BPF_ALU64 | BPF_ARSH | BPF_X:
  557. /* check for bad case when dst_reg == rcx */
  558. if (dst_reg == BPF_REG_4) {
  559. /* mov r11, dst_reg */
  560. EMIT_mov(AUX_REG, dst_reg);
  561. dst_reg = AUX_REG;
  562. }
  563. if (src_reg != BPF_REG_4) { /* common case */
  564. EMIT1(0x51); /* push rcx */
  565. /* mov rcx, src_reg */
  566. EMIT_mov(BPF_REG_4, src_reg);
  567. }
  568. /* shl %rax, %cl | shr %rax, %cl | sar %rax, %cl */
  569. if (BPF_CLASS(insn->code) == BPF_ALU64)
  570. EMIT1(add_1mod(0x48, dst_reg));
  571. else if (is_ereg(dst_reg))
  572. EMIT1(add_1mod(0x40, dst_reg));
  573. switch (BPF_OP(insn->code)) {
  574. case BPF_LSH: b3 = 0xE0; break;
  575. case BPF_RSH: b3 = 0xE8; break;
  576. case BPF_ARSH: b3 = 0xF8; break;
  577. }
  578. EMIT2(0xD3, add_1reg(b3, dst_reg));
  579. if (src_reg != BPF_REG_4)
  580. EMIT1(0x59); /* pop rcx */
  581. if (insn->dst_reg == BPF_REG_4)
  582. /* mov dst_reg, r11 */
  583. EMIT_mov(insn->dst_reg, AUX_REG);
  584. break;
  585. case BPF_ALU | BPF_END | BPF_FROM_BE:
  586. switch (imm32) {
  587. case 16:
  588. /* emit 'ror %ax, 8' to swap lower 2 bytes */
  589. EMIT1(0x66);
  590. if (is_ereg(dst_reg))
  591. EMIT1(0x41);
  592. EMIT3(0xC1, add_1reg(0xC8, dst_reg), 8);
  593. /* emit 'movzwl eax, ax' */
  594. if (is_ereg(dst_reg))
  595. EMIT3(0x45, 0x0F, 0xB7);
  596. else
  597. EMIT2(0x0F, 0xB7);
  598. EMIT1(add_2reg(0xC0, dst_reg, dst_reg));
  599. break;
  600. case 32:
  601. /* emit 'bswap eax' to swap lower 4 bytes */
  602. if (is_ereg(dst_reg))
  603. EMIT2(0x41, 0x0F);
  604. else
  605. EMIT1(0x0F);
  606. EMIT1(add_1reg(0xC8, dst_reg));
  607. break;
  608. case 64:
  609. /* emit 'bswap rax' to swap 8 bytes */
  610. EMIT3(add_1mod(0x48, dst_reg), 0x0F,
  611. add_1reg(0xC8, dst_reg));
  612. break;
  613. }
  614. break;
  615. case BPF_ALU | BPF_END | BPF_FROM_LE:
  616. switch (imm32) {
  617. case 16:
  618. /* emit 'movzwl eax, ax' to zero extend 16-bit
  619. * into 64 bit
  620. */
  621. if (is_ereg(dst_reg))
  622. EMIT3(0x45, 0x0F, 0xB7);
  623. else
  624. EMIT2(0x0F, 0xB7);
  625. EMIT1(add_2reg(0xC0, dst_reg, dst_reg));
  626. break;
  627. case 32:
  628. /* emit 'mov eax, eax' to clear upper 32-bits */
  629. if (is_ereg(dst_reg))
  630. EMIT1(0x45);
  631. EMIT2(0x89, add_2reg(0xC0, dst_reg, dst_reg));
  632. break;
  633. case 64:
  634. /* nop */
  635. break;
  636. }
  637. break;
  638. /* ST: *(u8*)(dst_reg + off) = imm */
  639. case BPF_ST | BPF_MEM | BPF_B:
  640. if (is_ereg(dst_reg))
  641. EMIT2(0x41, 0xC6);
  642. else
  643. EMIT1(0xC6);
  644. goto st;
  645. case BPF_ST | BPF_MEM | BPF_H:
  646. if (is_ereg(dst_reg))
  647. EMIT3(0x66, 0x41, 0xC7);
  648. else
  649. EMIT2(0x66, 0xC7);
  650. goto st;
  651. case BPF_ST | BPF_MEM | BPF_W:
  652. if (is_ereg(dst_reg))
  653. EMIT2(0x41, 0xC7);
  654. else
  655. EMIT1(0xC7);
  656. goto st;
  657. case BPF_ST | BPF_MEM | BPF_DW:
  658. EMIT2(add_1mod(0x48, dst_reg), 0xC7);
  659. st: if (is_imm8(insn->off))
  660. EMIT2(add_1reg(0x40, dst_reg), insn->off);
  661. else
  662. EMIT1_off32(add_1reg(0x80, dst_reg), insn->off);
  663. EMIT(imm32, bpf_size_to_x86_bytes(BPF_SIZE(insn->code)));
  664. break;
  665. /* STX: *(u8*)(dst_reg + off) = src_reg */
  666. case BPF_STX | BPF_MEM | BPF_B:
  667. /* emit 'mov byte ptr [rax + off], al' */
  668. if (is_ereg(dst_reg) || is_ereg(src_reg) ||
  669. /* have to add extra byte for x86 SIL, DIL regs */
  670. src_reg == BPF_REG_1 || src_reg == BPF_REG_2)
  671. EMIT2(add_2mod(0x40, dst_reg, src_reg), 0x88);
  672. else
  673. EMIT1(0x88);
  674. goto stx;
  675. case BPF_STX | BPF_MEM | BPF_H:
  676. if (is_ereg(dst_reg) || is_ereg(src_reg))
  677. EMIT3(0x66, add_2mod(0x40, dst_reg, src_reg), 0x89);
  678. else
  679. EMIT2(0x66, 0x89);
  680. goto stx;
  681. case BPF_STX | BPF_MEM | BPF_W:
  682. if (is_ereg(dst_reg) || is_ereg(src_reg))
  683. EMIT2(add_2mod(0x40, dst_reg, src_reg), 0x89);
  684. else
  685. EMIT1(0x89);
  686. goto stx;
  687. case BPF_STX | BPF_MEM | BPF_DW:
  688. EMIT2(add_2mod(0x48, dst_reg, src_reg), 0x89);
  689. stx: if (is_imm8(insn->off))
  690. EMIT2(add_2reg(0x40, dst_reg, src_reg), insn->off);
  691. else
  692. EMIT1_off32(add_2reg(0x80, dst_reg, src_reg),
  693. insn->off);
  694. break;
  695. /* LDX: dst_reg = *(u8*)(src_reg + off) */
  696. case BPF_LDX | BPF_MEM | BPF_B:
  697. /* emit 'movzx rax, byte ptr [rax + off]' */
  698. EMIT3(add_2mod(0x48, src_reg, dst_reg), 0x0F, 0xB6);
  699. goto ldx;
  700. case BPF_LDX | BPF_MEM | BPF_H:
  701. /* emit 'movzx rax, word ptr [rax + off]' */
  702. EMIT3(add_2mod(0x48, src_reg, dst_reg), 0x0F, 0xB7);
  703. goto ldx;
  704. case BPF_LDX | BPF_MEM | BPF_W:
  705. /* emit 'mov eax, dword ptr [rax+0x14]' */
  706. if (is_ereg(dst_reg) || is_ereg(src_reg))
  707. EMIT2(add_2mod(0x40, src_reg, dst_reg), 0x8B);
  708. else
  709. EMIT1(0x8B);
  710. goto ldx;
  711. case BPF_LDX | BPF_MEM | BPF_DW:
  712. /* emit 'mov rax, qword ptr [rax+0x14]' */
  713. EMIT2(add_2mod(0x48, src_reg, dst_reg), 0x8B);
  714. ldx: /* if insn->off == 0 we can save one extra byte, but
  715. * special case of x86 r13 which always needs an offset
  716. * is not worth the hassle
  717. */
  718. if (is_imm8(insn->off))
  719. EMIT2(add_2reg(0x40, src_reg, dst_reg), insn->off);
  720. else
  721. EMIT1_off32(add_2reg(0x80, src_reg, dst_reg),
  722. insn->off);
  723. break;
  724. /* STX XADD: lock *(u32*)(dst_reg + off) += src_reg */
  725. case BPF_STX | BPF_XADD | BPF_W:
  726. /* emit 'lock add dword ptr [rax + off], eax' */
  727. if (is_ereg(dst_reg) || is_ereg(src_reg))
  728. EMIT3(0xF0, add_2mod(0x40, dst_reg, src_reg), 0x01);
  729. else
  730. EMIT2(0xF0, 0x01);
  731. goto xadd;
  732. case BPF_STX | BPF_XADD | BPF_DW:
  733. EMIT3(0xF0, add_2mod(0x48, dst_reg, src_reg), 0x01);
  734. xadd: if (is_imm8(insn->off))
  735. EMIT2(add_2reg(0x40, dst_reg, src_reg), insn->off);
  736. else
  737. EMIT1_off32(add_2reg(0x80, dst_reg, src_reg),
  738. insn->off);
  739. break;
  740. /* call */
  741. case BPF_JMP | BPF_CALL:
  742. func = (u8 *) __bpf_call_base + imm32;
  743. jmp_offset = func - (image + addrs[i]);
  744. if (seen_ld_abs) {
  745. reload_skb_data = bpf_helper_changes_pkt_data(func);
  746. if (reload_skb_data) {
  747. EMIT1(0x57); /* push %rdi */
  748. jmp_offset += 22; /* pop, mov, sub, mov */
  749. } else {
  750. EMIT2(0x41, 0x52); /* push %r10 */
  751. EMIT2(0x41, 0x51); /* push %r9 */
  752. /* need to adjust jmp offset, since
  753. * pop %r9, pop %r10 take 4 bytes after call insn
  754. */
  755. jmp_offset += 4;
  756. }
  757. }
  758. if (!imm32 || !is_simm32(jmp_offset)) {
  759. pr_err("unsupported bpf func %d addr %p image %p\n",
  760. imm32, func, image);
  761. return -EINVAL;
  762. }
  763. EMIT1_off32(0xE8, jmp_offset);
  764. if (seen_ld_abs) {
  765. if (reload_skb_data) {
  766. EMIT1(0x5F); /* pop %rdi */
  767. emit_load_skb_data_hlen(&prog);
  768. } else {
  769. EMIT2(0x41, 0x59); /* pop %r9 */
  770. EMIT2(0x41, 0x5A); /* pop %r10 */
  771. }
  772. }
  773. break;
  774. case BPF_JMP | BPF_TAIL_CALL:
  775. emit_bpf_tail_call(&prog);
  776. break;
  777. /* cond jump */
  778. case BPF_JMP | BPF_JEQ | BPF_X:
  779. case BPF_JMP | BPF_JNE | BPF_X:
  780. case BPF_JMP | BPF_JGT | BPF_X:
  781. case BPF_JMP | BPF_JLT | BPF_X:
  782. case BPF_JMP | BPF_JGE | BPF_X:
  783. case BPF_JMP | BPF_JLE | BPF_X:
  784. case BPF_JMP | BPF_JSGT | BPF_X:
  785. case BPF_JMP | BPF_JSLT | BPF_X:
  786. case BPF_JMP | BPF_JSGE | BPF_X:
  787. case BPF_JMP | BPF_JSLE | BPF_X:
  788. /* cmp dst_reg, src_reg */
  789. EMIT3(add_2mod(0x48, dst_reg, src_reg), 0x39,
  790. add_2reg(0xC0, dst_reg, src_reg));
  791. goto emit_cond_jmp;
  792. case BPF_JMP | BPF_JSET | BPF_X:
  793. /* test dst_reg, src_reg */
  794. EMIT3(add_2mod(0x48, dst_reg, src_reg), 0x85,
  795. add_2reg(0xC0, dst_reg, src_reg));
  796. goto emit_cond_jmp;
  797. case BPF_JMP | BPF_JSET | BPF_K:
  798. /* test dst_reg, imm32 */
  799. EMIT1(add_1mod(0x48, dst_reg));
  800. EMIT2_off32(0xF7, add_1reg(0xC0, dst_reg), imm32);
  801. goto emit_cond_jmp;
  802. case BPF_JMP | BPF_JEQ | BPF_K:
  803. case BPF_JMP | BPF_JNE | BPF_K:
  804. case BPF_JMP | BPF_JGT | BPF_K:
  805. case BPF_JMP | BPF_JLT | BPF_K:
  806. case BPF_JMP | BPF_JGE | BPF_K:
  807. case BPF_JMP | BPF_JLE | BPF_K:
  808. case BPF_JMP | BPF_JSGT | BPF_K:
  809. case BPF_JMP | BPF_JSLT | BPF_K:
  810. case BPF_JMP | BPF_JSGE | BPF_K:
  811. case BPF_JMP | BPF_JSLE | BPF_K:
  812. /* cmp dst_reg, imm8/32 */
  813. EMIT1(add_1mod(0x48, dst_reg));
  814. if (is_imm8(imm32))
  815. EMIT3(0x83, add_1reg(0xF8, dst_reg), imm32);
  816. else
  817. EMIT2_off32(0x81, add_1reg(0xF8, dst_reg), imm32);
  818. emit_cond_jmp: /* convert BPF opcode to x86 */
  819. switch (BPF_OP(insn->code)) {
  820. case BPF_JEQ:
  821. jmp_cond = X86_JE;
  822. break;
  823. case BPF_JSET:
  824. case BPF_JNE:
  825. jmp_cond = X86_JNE;
  826. break;
  827. case BPF_JGT:
  828. /* GT is unsigned '>', JA in x86 */
  829. jmp_cond = X86_JA;
  830. break;
  831. case BPF_JLT:
  832. /* LT is unsigned '<', JB in x86 */
  833. jmp_cond = X86_JB;
  834. break;
  835. case BPF_JGE:
  836. /* GE is unsigned '>=', JAE in x86 */
  837. jmp_cond = X86_JAE;
  838. break;
  839. case BPF_JLE:
  840. /* LE is unsigned '<=', JBE in x86 */
  841. jmp_cond = X86_JBE;
  842. break;
  843. case BPF_JSGT:
  844. /* signed '>', GT in x86 */
  845. jmp_cond = X86_JG;
  846. break;
  847. case BPF_JSLT:
  848. /* signed '<', LT in x86 */
  849. jmp_cond = X86_JL;
  850. break;
  851. case BPF_JSGE:
  852. /* signed '>=', GE in x86 */
  853. jmp_cond = X86_JGE;
  854. break;
  855. case BPF_JSLE:
  856. /* signed '<=', LE in x86 */
  857. jmp_cond = X86_JLE;
  858. break;
  859. default: /* to silence gcc warning */
  860. return -EFAULT;
  861. }
  862. jmp_offset = addrs[i + insn->off] - addrs[i];
  863. if (is_imm8(jmp_offset)) {
  864. EMIT2(jmp_cond, jmp_offset);
  865. } else if (is_simm32(jmp_offset)) {
  866. EMIT2_off32(0x0F, jmp_cond + 0x10, jmp_offset);
  867. } else {
  868. pr_err("cond_jmp gen bug %llx\n", jmp_offset);
  869. return -EFAULT;
  870. }
  871. break;
  872. case BPF_JMP | BPF_JA:
  873. jmp_offset = addrs[i + insn->off] - addrs[i];
  874. if (!jmp_offset)
  875. /* optimize out nop jumps */
  876. break;
  877. emit_jmp:
  878. if (is_imm8(jmp_offset)) {
  879. EMIT2(0xEB, jmp_offset);
  880. } else if (is_simm32(jmp_offset)) {
  881. EMIT1_off32(0xE9, jmp_offset);
  882. } else {
  883. pr_err("jmp gen bug %llx\n", jmp_offset);
  884. return -EFAULT;
  885. }
  886. break;
  887. case BPF_LD | BPF_IND | BPF_W:
  888. func = sk_load_word;
  889. goto common_load;
  890. case BPF_LD | BPF_ABS | BPF_W:
  891. func = CHOOSE_LOAD_FUNC(imm32, sk_load_word);
  892. common_load:
  893. ctx->seen_ld_abs = seen_ld_abs = true;
  894. jmp_offset = func - (image + addrs[i]);
  895. if (!func || !is_simm32(jmp_offset)) {
  896. pr_err("unsupported bpf func %d addr %p image %p\n",
  897. imm32, func, image);
  898. return -EINVAL;
  899. }
  900. if (BPF_MODE(insn->code) == BPF_ABS) {
  901. /* mov %esi, imm32 */
  902. EMIT1_off32(0xBE, imm32);
  903. } else {
  904. /* mov %rsi, src_reg */
  905. EMIT_mov(BPF_REG_2, src_reg);
  906. if (imm32) {
  907. if (is_imm8(imm32))
  908. /* add %esi, imm8 */
  909. EMIT3(0x83, 0xC6, imm32);
  910. else
  911. /* add %esi, imm32 */
  912. EMIT2_off32(0x81, 0xC6, imm32);
  913. }
  914. }
  915. /* skb pointer is in R6 (%rbx), it will be copied into
  916. * %rdi if skb_copy_bits() call is necessary.
  917. * sk_load_* helpers also use %r10 and %r9d.
  918. * See bpf_jit.S
  919. */
  920. if (seen_ax_reg)
  921. /* r10 = skb->data, mov %r10, off32(%rbx) */
  922. EMIT3_off32(0x4c, 0x8b, 0x93,
  923. offsetof(struct sk_buff, data));
  924. EMIT1_off32(0xE8, jmp_offset); /* call */
  925. break;
  926. case BPF_LD | BPF_IND | BPF_H:
  927. func = sk_load_half;
  928. goto common_load;
  929. case BPF_LD | BPF_ABS | BPF_H:
  930. func = CHOOSE_LOAD_FUNC(imm32, sk_load_half);
  931. goto common_load;
  932. case BPF_LD | BPF_IND | BPF_B:
  933. func = sk_load_byte;
  934. goto common_load;
  935. case BPF_LD | BPF_ABS | BPF_B:
  936. func = CHOOSE_LOAD_FUNC(imm32, sk_load_byte);
  937. goto common_load;
  938. case BPF_JMP | BPF_EXIT:
  939. if (seen_exit) {
  940. jmp_offset = ctx->cleanup_addr - addrs[i];
  941. goto emit_jmp;
  942. }
  943. seen_exit = true;
  944. /* update cleanup_addr */
  945. ctx->cleanup_addr = proglen;
  946. /* mov rbx, qword ptr [rbp+0] */
  947. EMIT4(0x48, 0x8B, 0x5D, 0);
  948. /* mov r13, qword ptr [rbp+8] */
  949. EMIT4(0x4C, 0x8B, 0x6D, 8);
  950. /* mov r14, qword ptr [rbp+16] */
  951. EMIT4(0x4C, 0x8B, 0x75, 16);
  952. /* mov r15, qword ptr [rbp+24] */
  953. EMIT4(0x4C, 0x8B, 0x7D, 24);
  954. /* add rbp, AUX_STACK_SPACE */
  955. EMIT4(0x48, 0x83, 0xC5, AUX_STACK_SPACE);
  956. EMIT1(0xC9); /* leave */
  957. EMIT1(0xC3); /* ret */
  958. break;
  959. default:
  960. /* By design x64 JIT should support all BPF instructions
  961. * This error will be seen if new instruction was added
  962. * to interpreter, but not to JIT
  963. * or if there is junk in bpf_prog
  964. */
  965. pr_err("bpf_jit: unknown opcode %02x\n", insn->code);
  966. return -EINVAL;
  967. }
  968. ilen = prog - temp;
  969. if (ilen > BPF_MAX_INSN_SIZE) {
  970. pr_err("bpf_jit: fatal insn size error\n");
  971. return -EFAULT;
  972. }
  973. if (image) {
  974. if (unlikely(proglen + ilen > oldproglen)) {
  975. pr_err("bpf_jit: fatal error\n");
  976. return -EFAULT;
  977. }
  978. memcpy(image + proglen, temp, ilen);
  979. }
  980. proglen += ilen;
  981. addrs[i] = proglen;
  982. prog = temp;
  983. }
  984. return proglen;
  985. }
  986. struct x64_jit_data {
  987. struct bpf_binary_header *header;
  988. int *addrs;
  989. u8 *image;
  990. int proglen;
  991. struct jit_context ctx;
  992. };
  993. struct bpf_prog *bpf_int_jit_compile(struct bpf_prog *prog)
  994. {
  995. struct bpf_binary_header *header = NULL;
  996. struct bpf_prog *tmp, *orig_prog = prog;
  997. struct x64_jit_data *jit_data;
  998. int proglen, oldproglen = 0;
  999. struct jit_context ctx = {};
  1000. bool tmp_blinded = false;
  1001. bool extra_pass = false;
  1002. u8 *image = NULL;
  1003. int *addrs;
  1004. int pass;
  1005. int i;
  1006. if (!prog->jit_requested)
  1007. return orig_prog;
  1008. tmp = bpf_jit_blind_constants(prog);
  1009. /* If blinding was requested and we failed during blinding,
  1010. * we must fall back to the interpreter.
  1011. */
  1012. if (IS_ERR(tmp))
  1013. return orig_prog;
  1014. if (tmp != prog) {
  1015. tmp_blinded = true;
  1016. prog = tmp;
  1017. }
  1018. jit_data = prog->aux->jit_data;
  1019. if (!jit_data) {
  1020. jit_data = kzalloc(sizeof(*jit_data), GFP_KERNEL);
  1021. if (!jit_data) {
  1022. prog = orig_prog;
  1023. goto out;
  1024. }
  1025. prog->aux->jit_data = jit_data;
  1026. }
  1027. addrs = jit_data->addrs;
  1028. if (addrs) {
  1029. ctx = jit_data->ctx;
  1030. oldproglen = jit_data->proglen;
  1031. image = jit_data->image;
  1032. header = jit_data->header;
  1033. extra_pass = true;
  1034. goto skip_init_addrs;
  1035. }
  1036. addrs = kmalloc(prog->len * sizeof(*addrs), GFP_KERNEL);
  1037. if (!addrs) {
  1038. prog = orig_prog;
  1039. goto out_addrs;
  1040. }
  1041. /* Before first pass, make a rough estimation of addrs[]
  1042. * each bpf instruction is translated to less than 64 bytes
  1043. */
  1044. for (proglen = 0, i = 0; i < prog->len; i++) {
  1045. proglen += 64;
  1046. addrs[i] = proglen;
  1047. }
  1048. ctx.cleanup_addr = proglen;
  1049. skip_init_addrs:
  1050. /* JITed image shrinks with every pass and the loop iterates
  1051. * until the image stops shrinking. Very large bpf programs
  1052. * may converge on the last pass. In such case do one more
  1053. * pass to emit the final image
  1054. */
  1055. for (pass = 0; pass < 10 || image; pass++) {
  1056. proglen = do_jit(prog, addrs, image, oldproglen, &ctx);
  1057. if (proglen <= 0) {
  1058. image = NULL;
  1059. if (header)
  1060. bpf_jit_binary_free(header);
  1061. prog = orig_prog;
  1062. goto out_addrs;
  1063. }
  1064. if (image) {
  1065. if (proglen != oldproglen) {
  1066. pr_err("bpf_jit: proglen=%d != oldproglen=%d\n",
  1067. proglen, oldproglen);
  1068. prog = orig_prog;
  1069. goto out_addrs;
  1070. }
  1071. break;
  1072. }
  1073. if (proglen == oldproglen) {
  1074. header = bpf_jit_binary_alloc(proglen, &image,
  1075. 1, jit_fill_hole);
  1076. if (!header) {
  1077. prog = orig_prog;
  1078. goto out_addrs;
  1079. }
  1080. }
  1081. oldproglen = proglen;
  1082. }
  1083. if (bpf_jit_enable > 1)
  1084. bpf_jit_dump(prog->len, proglen, pass + 1, image);
  1085. if (image) {
  1086. bpf_flush_icache(header, image + proglen);
  1087. if (!prog->is_func || extra_pass) {
  1088. bpf_jit_binary_lock_ro(header);
  1089. } else {
  1090. jit_data->addrs = addrs;
  1091. jit_data->ctx = ctx;
  1092. jit_data->proglen = proglen;
  1093. jit_data->image = image;
  1094. jit_data->header = header;
  1095. }
  1096. prog->bpf_func = (void *)image;
  1097. prog->jited = 1;
  1098. prog->jited_len = proglen;
  1099. } else {
  1100. prog = orig_prog;
  1101. }
  1102. if (!prog->is_func || extra_pass) {
  1103. out_addrs:
  1104. kfree(addrs);
  1105. kfree(jit_data);
  1106. prog->aux->jit_data = NULL;
  1107. }
  1108. out:
  1109. if (tmp_blinded)
  1110. bpf_jit_prog_release_other(prog, prog == orig_prog ?
  1111. tmp : orig_prog);
  1112. return prog;
  1113. }