clk-gate2.c 3.0 KB

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  1. /*
  2. * Copyright (C) 2010-2011 Canonical Ltd <jeremy.kerr@canonical.com>
  3. * Copyright (C) 2011-2012 Mike Turquette, Linaro Ltd <mturquette@linaro.org>
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License version 2 as
  7. * published by the Free Software Foundation.
  8. *
  9. * Gated clock implementation
  10. */
  11. #include <linux/clk-provider.h>
  12. #include <linux/module.h>
  13. #include <linux/slab.h>
  14. #include <linux/io.h>
  15. #include <linux/err.h>
  16. #include <linux/string.h>
  17. #include "clk.h"
  18. /**
  19. * DOC: basic gatable clock which can gate and ungate it's ouput
  20. *
  21. * Traits of this clock:
  22. * prepare - clk_(un)prepare only ensures parent is (un)prepared
  23. * enable - clk_enable and clk_disable are functional & control gating
  24. * rate - inherits rate from parent. No clk_set_rate support
  25. * parent - fixed parent. No clk_set_parent support
  26. */
  27. struct clk_gate2 {
  28. struct clk_hw hw;
  29. void __iomem *reg;
  30. u8 bit_idx;
  31. u8 flags;
  32. spinlock_t *lock;
  33. unsigned int *share_count;
  34. };
  35. #define to_clk_gate2(_hw) container_of(_hw, struct clk_gate2, hw)
  36. static int clk_gate2_enable(struct clk_hw *hw)
  37. {
  38. struct clk_gate2 *gate = to_clk_gate2(hw);
  39. u32 reg;
  40. unsigned long flags = 0;
  41. spin_lock_irqsave(gate->lock, flags);
  42. if (gate->share_count && (*gate->share_count)++ > 0)
  43. goto out;
  44. reg = readl(gate->reg);
  45. reg |= 3 << gate->bit_idx;
  46. writel(reg, gate->reg);
  47. out:
  48. spin_unlock_irqrestore(gate->lock, flags);
  49. return 0;
  50. }
  51. static void clk_gate2_disable(struct clk_hw *hw)
  52. {
  53. struct clk_gate2 *gate = to_clk_gate2(hw);
  54. u32 reg;
  55. unsigned long flags = 0;
  56. spin_lock_irqsave(gate->lock, flags);
  57. if (gate->share_count && --(*gate->share_count) > 0)
  58. goto out;
  59. reg = readl(gate->reg);
  60. reg &= ~(3 << gate->bit_idx);
  61. writel(reg, gate->reg);
  62. out:
  63. spin_unlock_irqrestore(gate->lock, flags);
  64. }
  65. static int clk_gate2_is_enabled(struct clk_hw *hw)
  66. {
  67. u32 reg;
  68. struct clk_gate2 *gate = to_clk_gate2(hw);
  69. reg = readl(gate->reg);
  70. if (((reg >> gate->bit_idx) & 1) == 1)
  71. return 1;
  72. return 0;
  73. }
  74. static struct clk_ops clk_gate2_ops = {
  75. .enable = clk_gate2_enable,
  76. .disable = clk_gate2_disable,
  77. .is_enabled = clk_gate2_is_enabled,
  78. };
  79. struct clk *clk_register_gate2(struct device *dev, const char *name,
  80. const char *parent_name, unsigned long flags,
  81. void __iomem *reg, u8 bit_idx,
  82. u8 clk_gate2_flags, spinlock_t *lock,
  83. unsigned int *share_count)
  84. {
  85. struct clk_gate2 *gate;
  86. struct clk *clk;
  87. struct clk_init_data init;
  88. gate = kzalloc(sizeof(struct clk_gate2), GFP_KERNEL);
  89. if (!gate)
  90. return ERR_PTR(-ENOMEM);
  91. /* struct clk_gate2 assignments */
  92. gate->reg = reg;
  93. gate->bit_idx = bit_idx;
  94. gate->flags = clk_gate2_flags;
  95. gate->lock = lock;
  96. gate->share_count = share_count;
  97. init.name = name;
  98. init.ops = &clk_gate2_ops;
  99. init.flags = flags;
  100. init.parent_names = parent_name ? &parent_name : NULL;
  101. init.num_parents = parent_name ? 1 : 0;
  102. gate->hw.init = &init;
  103. clk = clk_register(dev, &gate->hw);
  104. if (IS_ERR(clk))
  105. kfree(gate);
  106. return clk;
  107. }