max3421-hcd.c 49 KB

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  1. /*
  2. * MAX3421 Host Controller driver for USB.
  3. *
  4. * Author: David Mosberger-Tang <davidm@egauge.net>
  5. *
  6. * (C) Copyright 2014 David Mosberger-Tang <davidm@egauge.net>
  7. *
  8. * MAX3421 is a chip implementing a USB 2.0 Full-/Low-Speed host
  9. * controller on a SPI bus.
  10. *
  11. * Based on:
  12. * o MAX3421E datasheet
  13. * http://datasheets.maximintegrated.com/en/ds/MAX3421E.pdf
  14. * o MAX3421E Programming Guide
  15. * http://www.hdl.co.jp/ftpdata/utl-001/AN3785.pdf
  16. * o gadget/dummy_hcd.c
  17. * For USB HCD implementation.
  18. * o Arduino MAX3421 driver
  19. * https://github.com/felis/USB_Host_Shield_2.0/blob/master/Usb.cpp
  20. *
  21. * This file is licenced under the GPL v2.
  22. *
  23. * Important note on worst-case (full-speed) packet size constraints
  24. * (See USB 2.0 Section 5.6.3 and following):
  25. *
  26. * - control: 64 bytes
  27. * - isochronous: 1023 bytes
  28. * - interrupt: 64 bytes
  29. * - bulk: 64 bytes
  30. *
  31. * Since the MAX3421 FIFO size is 64 bytes, we do not have to work about
  32. * multi-FIFO writes/reads for a single USB packet *except* for isochronous
  33. * transfers. We don't support isochronous transfers at this time, so we
  34. * just assume that a USB packet always fits into a single FIFO buffer.
  35. *
  36. * NOTE: The June 2006 version of "MAX3421E Programming Guide"
  37. * (AN3785) has conflicting info for the RCVDAVIRQ bit:
  38. *
  39. * The description of RCVDAVIRQ says "The CPU *must* clear
  40. * this IRQ bit (by writing a 1 to it) before reading the
  41. * RCVFIFO data.
  42. *
  43. * However, the earlier section on "Programming BULK-IN
  44. * Transfers" says * that:
  45. *
  46. * After the CPU retrieves the data, it clears the
  47. * RCVDAVIRQ bit.
  48. *
  49. * The December 2006 version has been corrected and it consistently
  50. * states the second behavior is the correct one.
  51. *
  52. * Synchronous SPI transactions sleep so we can't perform any such
  53. * transactions while holding a spin-lock (and/or while interrupts are
  54. * masked). To achieve this, all SPI transactions are issued from a
  55. * single thread (max3421_spi_thread).
  56. */
  57. #include <linux/module.h>
  58. #include <linux/spi/spi.h>
  59. #include <linux/usb.h>
  60. #include <linux/usb/hcd.h>
  61. #include <linux/platform_data/max3421-hcd.h>
  62. #define DRIVER_DESC "MAX3421 USB Host-Controller Driver"
  63. #define DRIVER_VERSION "1.0"
  64. /* 11-bit counter that wraps around (USB 2.0 Section 8.3.3): */
  65. #define USB_MAX_FRAME_NUMBER 0x7ff
  66. #define USB_MAX_RETRIES 3 /* # of retries before error is reported */
  67. /*
  68. * Max. # of times we're willing to retransmit a request immediately in
  69. * resposne to a NAK. Afterwards, we fall back on trying once a frame.
  70. */
  71. #define NAK_MAX_FAST_RETRANSMITS 2
  72. #define POWER_BUDGET 500 /* in mA; use 8 for low-power port testing */
  73. /* Port-change mask: */
  74. #define PORT_C_MASK ((USB_PORT_STAT_C_CONNECTION | \
  75. USB_PORT_STAT_C_ENABLE | \
  76. USB_PORT_STAT_C_SUSPEND | \
  77. USB_PORT_STAT_C_OVERCURRENT | \
  78. USB_PORT_STAT_C_RESET) << 16)
  79. enum max3421_rh_state {
  80. MAX3421_RH_RESET,
  81. MAX3421_RH_SUSPENDED,
  82. MAX3421_RH_RUNNING
  83. };
  84. enum pkt_state {
  85. PKT_STATE_SETUP, /* waiting to send setup packet to ctrl pipe */
  86. PKT_STATE_TRANSFER, /* waiting to xfer transfer_buffer */
  87. PKT_STATE_TERMINATE /* waiting to terminate control transfer */
  88. };
  89. enum scheduling_pass {
  90. SCHED_PASS_PERIODIC,
  91. SCHED_PASS_NON_PERIODIC,
  92. SCHED_PASS_DONE
  93. };
  94. struct max3421_hcd {
  95. spinlock_t lock;
  96. struct task_struct *spi_thread;
  97. struct max3421_hcd *next;
  98. enum max3421_rh_state rh_state;
  99. /* lower 16 bits contain port status, upper 16 bits the change mask: */
  100. u32 port_status;
  101. unsigned active:1;
  102. struct list_head ep_list; /* list of EP's with work */
  103. /*
  104. * The following are owned by spi_thread (may be accessed by
  105. * SPI-thread without acquiring the HCD lock:
  106. */
  107. u8 rev; /* chip revision */
  108. u16 frame_number;
  109. /*
  110. * URB we're currently processing. Must not be reset to NULL
  111. * unless MAX3421E chip is idle:
  112. */
  113. struct urb *curr_urb;
  114. enum scheduling_pass sched_pass;
  115. struct usb_device *loaded_dev; /* dev that's loaded into the chip */
  116. int loaded_epnum; /* epnum whose toggles are loaded */
  117. int urb_done; /* > 0 -> no errors, < 0: errno */
  118. size_t curr_len;
  119. u8 hien;
  120. u8 mode;
  121. u8 iopins[2];
  122. unsigned int do_enable_irq:1;
  123. unsigned int do_reset_hcd:1;
  124. unsigned int do_reset_port:1;
  125. unsigned int do_check_unlink:1;
  126. unsigned int do_iopin_update:1;
  127. #ifdef DEBUG
  128. unsigned long err_stat[16];
  129. #endif
  130. };
  131. struct max3421_ep {
  132. struct usb_host_endpoint *ep;
  133. struct list_head ep_list;
  134. u32 naks;
  135. u16 last_active; /* frame # this ep was last active */
  136. enum pkt_state pkt_state;
  137. u8 retries;
  138. u8 retransmit; /* packet needs retransmission */
  139. };
  140. static struct max3421_hcd *max3421_hcd_list;
  141. #define MAX3421_FIFO_SIZE 64
  142. #define MAX3421_SPI_DIR_RD 0 /* read register from MAX3421 */
  143. #define MAX3421_SPI_DIR_WR 1 /* write register to MAX3421 */
  144. /* SPI commands: */
  145. #define MAX3421_SPI_DIR_SHIFT 1
  146. #define MAX3421_SPI_REG_SHIFT 3
  147. #define MAX3421_REG_RCVFIFO 1
  148. #define MAX3421_REG_SNDFIFO 2
  149. #define MAX3421_REG_SUDFIFO 4
  150. #define MAX3421_REG_RCVBC 6
  151. #define MAX3421_REG_SNDBC 7
  152. #define MAX3421_REG_USBIRQ 13
  153. #define MAX3421_REG_USBIEN 14
  154. #define MAX3421_REG_USBCTL 15
  155. #define MAX3421_REG_CPUCTL 16
  156. #define MAX3421_REG_PINCTL 17
  157. #define MAX3421_REG_REVISION 18
  158. #define MAX3421_REG_IOPINS1 20
  159. #define MAX3421_REG_IOPINS2 21
  160. #define MAX3421_REG_GPINIRQ 22
  161. #define MAX3421_REG_GPINIEN 23
  162. #define MAX3421_REG_GPINPOL 24
  163. #define MAX3421_REG_HIRQ 25
  164. #define MAX3421_REG_HIEN 26
  165. #define MAX3421_REG_MODE 27
  166. #define MAX3421_REG_PERADDR 28
  167. #define MAX3421_REG_HCTL 29
  168. #define MAX3421_REG_HXFR 30
  169. #define MAX3421_REG_HRSL 31
  170. enum {
  171. MAX3421_USBIRQ_OSCOKIRQ_BIT = 0,
  172. MAX3421_USBIRQ_NOVBUSIRQ_BIT = 5,
  173. MAX3421_USBIRQ_VBUSIRQ_BIT
  174. };
  175. enum {
  176. MAX3421_CPUCTL_IE_BIT = 0,
  177. MAX3421_CPUCTL_PULSEWID0_BIT = 6,
  178. MAX3421_CPUCTL_PULSEWID1_BIT
  179. };
  180. enum {
  181. MAX3421_USBCTL_PWRDOWN_BIT = 4,
  182. MAX3421_USBCTL_CHIPRES_BIT
  183. };
  184. enum {
  185. MAX3421_PINCTL_GPXA_BIT = 0,
  186. MAX3421_PINCTL_GPXB_BIT,
  187. MAX3421_PINCTL_POSINT_BIT,
  188. MAX3421_PINCTL_INTLEVEL_BIT,
  189. MAX3421_PINCTL_FDUPSPI_BIT,
  190. MAX3421_PINCTL_EP0INAK_BIT,
  191. MAX3421_PINCTL_EP2INAK_BIT,
  192. MAX3421_PINCTL_EP3INAK_BIT,
  193. };
  194. enum {
  195. MAX3421_HI_BUSEVENT_BIT = 0, /* bus-reset/-resume */
  196. MAX3421_HI_RWU_BIT, /* remote wakeup */
  197. MAX3421_HI_RCVDAV_BIT, /* receive FIFO data available */
  198. MAX3421_HI_SNDBAV_BIT, /* send buffer available */
  199. MAX3421_HI_SUSDN_BIT, /* suspend operation done */
  200. MAX3421_HI_CONDET_BIT, /* peripheral connect/disconnect */
  201. MAX3421_HI_FRAME_BIT, /* frame generator */
  202. MAX3421_HI_HXFRDN_BIT, /* host transfer done */
  203. };
  204. enum {
  205. MAX3421_HCTL_BUSRST_BIT = 0,
  206. MAX3421_HCTL_FRMRST_BIT,
  207. MAX3421_HCTL_SAMPLEBUS_BIT,
  208. MAX3421_HCTL_SIGRSM_BIT,
  209. MAX3421_HCTL_RCVTOG0_BIT,
  210. MAX3421_HCTL_RCVTOG1_BIT,
  211. MAX3421_HCTL_SNDTOG0_BIT,
  212. MAX3421_HCTL_SNDTOG1_BIT
  213. };
  214. enum {
  215. MAX3421_MODE_HOST_BIT = 0,
  216. MAX3421_MODE_LOWSPEED_BIT,
  217. MAX3421_MODE_HUBPRE_BIT,
  218. MAX3421_MODE_SOFKAENAB_BIT,
  219. MAX3421_MODE_SEPIRQ_BIT,
  220. MAX3421_MODE_DELAYISO_BIT,
  221. MAX3421_MODE_DMPULLDN_BIT,
  222. MAX3421_MODE_DPPULLDN_BIT
  223. };
  224. enum {
  225. MAX3421_HRSL_OK = 0,
  226. MAX3421_HRSL_BUSY,
  227. MAX3421_HRSL_BADREQ,
  228. MAX3421_HRSL_UNDEF,
  229. MAX3421_HRSL_NAK,
  230. MAX3421_HRSL_STALL,
  231. MAX3421_HRSL_TOGERR,
  232. MAX3421_HRSL_WRONGPID,
  233. MAX3421_HRSL_BADBC,
  234. MAX3421_HRSL_PIDERR,
  235. MAX3421_HRSL_PKTERR,
  236. MAX3421_HRSL_CRCERR,
  237. MAX3421_HRSL_KERR,
  238. MAX3421_HRSL_JERR,
  239. MAX3421_HRSL_TIMEOUT,
  240. MAX3421_HRSL_BABBLE,
  241. MAX3421_HRSL_RESULT_MASK = 0xf,
  242. MAX3421_HRSL_RCVTOGRD_BIT = 4,
  243. MAX3421_HRSL_SNDTOGRD_BIT,
  244. MAX3421_HRSL_KSTATUS_BIT,
  245. MAX3421_HRSL_JSTATUS_BIT
  246. };
  247. /* Return same error-codes as ohci.h:cc_to_error: */
  248. static const int hrsl_to_error[] = {
  249. [MAX3421_HRSL_OK] = 0,
  250. [MAX3421_HRSL_BUSY] = -EINVAL,
  251. [MAX3421_HRSL_BADREQ] = -EINVAL,
  252. [MAX3421_HRSL_UNDEF] = -EINVAL,
  253. [MAX3421_HRSL_NAK] = -EAGAIN,
  254. [MAX3421_HRSL_STALL] = -EPIPE,
  255. [MAX3421_HRSL_TOGERR] = -EILSEQ,
  256. [MAX3421_HRSL_WRONGPID] = -EPROTO,
  257. [MAX3421_HRSL_BADBC] = -EREMOTEIO,
  258. [MAX3421_HRSL_PIDERR] = -EPROTO,
  259. [MAX3421_HRSL_PKTERR] = -EPROTO,
  260. [MAX3421_HRSL_CRCERR] = -EILSEQ,
  261. [MAX3421_HRSL_KERR] = -EIO,
  262. [MAX3421_HRSL_JERR] = -EIO,
  263. [MAX3421_HRSL_TIMEOUT] = -ETIME,
  264. [MAX3421_HRSL_BABBLE] = -EOVERFLOW
  265. };
  266. /*
  267. * See http://www.beyondlogic.org/usbnutshell/usb4.shtml#Control for a
  268. * reasonable overview of how control transfers use the the IN/OUT
  269. * tokens.
  270. */
  271. #define MAX3421_HXFR_BULK_IN(ep) (0x00 | (ep)) /* bulk or interrupt */
  272. #define MAX3421_HXFR_SETUP 0x10
  273. #define MAX3421_HXFR_BULK_OUT(ep) (0x20 | (ep)) /* bulk or interrupt */
  274. #define MAX3421_HXFR_ISO_IN(ep) (0x40 | (ep))
  275. #define MAX3421_HXFR_ISO_OUT(ep) (0x60 | (ep))
  276. #define MAX3421_HXFR_HS_IN 0x80 /* handshake in */
  277. #define MAX3421_HXFR_HS_OUT 0xa0 /* handshake out */
  278. #define field(val, bit) ((val) << (bit))
  279. static inline s16
  280. frame_diff(u16 left, u16 right)
  281. {
  282. return ((unsigned) (left - right)) % (USB_MAX_FRAME_NUMBER + 1);
  283. }
  284. static inline struct max3421_hcd *
  285. hcd_to_max3421(struct usb_hcd *hcd)
  286. {
  287. return (struct max3421_hcd *) hcd->hcd_priv;
  288. }
  289. static inline struct usb_hcd *
  290. max3421_to_hcd(struct max3421_hcd *max3421_hcd)
  291. {
  292. return container_of((void *) max3421_hcd, struct usb_hcd, hcd_priv);
  293. }
  294. static u8
  295. spi_rd8(struct usb_hcd *hcd, unsigned int reg)
  296. {
  297. struct spi_device *spi = to_spi_device(hcd->self.controller);
  298. struct spi_transfer transfer;
  299. u8 tx_data[1];
  300. /*
  301. * RX data must be in its own cache-line so it stays flushed
  302. * from the cache until the transfer is complete. Otherwise,
  303. * we get stale data from the cache.
  304. */
  305. u8 rx_data[SMP_CACHE_BYTES] ____cacheline_aligned;
  306. struct spi_message msg;
  307. memset(&transfer, 0, sizeof(transfer));
  308. spi_message_init(&msg);
  309. tx_data[0] = (field(reg, MAX3421_SPI_REG_SHIFT) |
  310. field(MAX3421_SPI_DIR_RD, MAX3421_SPI_DIR_SHIFT));
  311. transfer.tx_buf = tx_data;
  312. transfer.rx_buf = rx_data;
  313. transfer.len = 2;
  314. spi_message_add_tail(&transfer, &msg);
  315. spi_sync(spi, &msg);
  316. return rx_data[1];
  317. }
  318. static void
  319. spi_wr8(struct usb_hcd *hcd, unsigned int reg, u8 val)
  320. {
  321. struct spi_device *spi = to_spi_device(hcd->self.controller);
  322. struct spi_transfer transfer;
  323. struct spi_message msg;
  324. u8 tx_data[2];
  325. memset(&transfer, 0, sizeof(transfer));
  326. spi_message_init(&msg);
  327. tx_data[0] = (field(reg, MAX3421_SPI_REG_SHIFT) |
  328. field(MAX3421_SPI_DIR_WR, MAX3421_SPI_DIR_SHIFT));
  329. tx_data[1] = val;
  330. transfer.tx_buf = tx_data;
  331. transfer.len = 2;
  332. spi_message_add_tail(&transfer, &msg);
  333. spi_sync(spi, &msg);
  334. }
  335. static void
  336. spi_rd_buf(struct usb_hcd *hcd, unsigned int reg, void *buf, size_t len)
  337. {
  338. struct spi_device *spi = to_spi_device(hcd->self.controller);
  339. struct spi_transfer transfer[2];
  340. struct spi_message msg;
  341. u8 cmd;
  342. memset(transfer, 0, sizeof(transfer));
  343. spi_message_init(&msg);
  344. cmd = (field(reg, MAX3421_SPI_REG_SHIFT) |
  345. field(MAX3421_SPI_DIR_RD, MAX3421_SPI_DIR_SHIFT));
  346. transfer[0].tx_buf = &cmd;
  347. transfer[0].len = 1;
  348. transfer[1].rx_buf = buf;
  349. transfer[1].len = len;
  350. spi_message_add_tail(&transfer[0], &msg);
  351. spi_message_add_tail(&transfer[1], &msg);
  352. spi_sync(spi, &msg);
  353. }
  354. static void
  355. spi_wr_buf(struct usb_hcd *hcd, unsigned int reg, void *buf, size_t len)
  356. {
  357. struct spi_device *spi = to_spi_device(hcd->self.controller);
  358. struct spi_transfer transfer[2];
  359. struct spi_message msg;
  360. u8 cmd;
  361. memset(transfer, 0, sizeof(transfer));
  362. spi_message_init(&msg);
  363. cmd = (field(reg, MAX3421_SPI_REG_SHIFT) |
  364. field(MAX3421_SPI_DIR_WR, MAX3421_SPI_DIR_SHIFT));
  365. transfer[0].tx_buf = &cmd;
  366. transfer[0].len = 1;
  367. transfer[1].tx_buf = buf;
  368. transfer[1].len = len;
  369. spi_message_add_tail(&transfer[0], &msg);
  370. spi_message_add_tail(&transfer[1], &msg);
  371. spi_sync(spi, &msg);
  372. }
  373. /*
  374. * Figure out the correct setting for the LOWSPEED and HUBPRE mode
  375. * bits. The HUBPRE bit needs to be set when MAX3421E operates at
  376. * full speed, but it's talking to a low-speed device (i.e., through a
  377. * hub). Setting that bit ensures that every low-speed packet is
  378. * preceded by a full-speed PRE PID. Possible configurations:
  379. *
  380. * Hub speed: Device speed: => LOWSPEED bit: HUBPRE bit:
  381. * FULL FULL => 0 0
  382. * FULL LOW => 1 1
  383. * LOW LOW => 1 0
  384. * LOW FULL => 1 0
  385. */
  386. static void
  387. max3421_set_speed(struct usb_hcd *hcd, struct usb_device *dev)
  388. {
  389. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  390. u8 mode_lowspeed, mode_hubpre, mode = max3421_hcd->mode;
  391. mode_lowspeed = BIT(MAX3421_MODE_LOWSPEED_BIT);
  392. mode_hubpre = BIT(MAX3421_MODE_HUBPRE_BIT);
  393. if (max3421_hcd->port_status & USB_PORT_STAT_LOW_SPEED) {
  394. mode |= mode_lowspeed;
  395. mode &= ~mode_hubpre;
  396. } else if (dev->speed == USB_SPEED_LOW) {
  397. mode |= mode_lowspeed | mode_hubpre;
  398. } else {
  399. mode &= ~(mode_lowspeed | mode_hubpre);
  400. }
  401. if (mode != max3421_hcd->mode) {
  402. max3421_hcd->mode = mode;
  403. spi_wr8(hcd, MAX3421_REG_MODE, max3421_hcd->mode);
  404. }
  405. }
  406. /*
  407. * Caller must NOT hold HCD spinlock.
  408. */
  409. static void
  410. max3421_set_address(struct usb_hcd *hcd, struct usb_device *dev, int epnum,
  411. int force_toggles)
  412. {
  413. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  414. int old_epnum, same_ep, rcvtog, sndtog;
  415. struct usb_device *old_dev;
  416. u8 hctl;
  417. old_dev = max3421_hcd->loaded_dev;
  418. old_epnum = max3421_hcd->loaded_epnum;
  419. same_ep = (dev == old_dev && epnum == old_epnum);
  420. if (same_ep && !force_toggles)
  421. return;
  422. if (old_dev && !same_ep) {
  423. /* save the old end-points toggles: */
  424. u8 hrsl = spi_rd8(hcd, MAX3421_REG_HRSL);
  425. rcvtog = (hrsl >> MAX3421_HRSL_RCVTOGRD_BIT) & 1;
  426. sndtog = (hrsl >> MAX3421_HRSL_SNDTOGRD_BIT) & 1;
  427. /* no locking: HCD (i.e., we) own toggles, don't we? */
  428. usb_settoggle(old_dev, old_epnum, 0, rcvtog);
  429. usb_settoggle(old_dev, old_epnum, 1, sndtog);
  430. }
  431. /* setup new endpoint's toggle bits: */
  432. rcvtog = usb_gettoggle(dev, epnum, 0);
  433. sndtog = usb_gettoggle(dev, epnum, 1);
  434. hctl = (BIT(rcvtog + MAX3421_HCTL_RCVTOG0_BIT) |
  435. BIT(sndtog + MAX3421_HCTL_SNDTOG0_BIT));
  436. max3421_hcd->loaded_epnum = epnum;
  437. spi_wr8(hcd, MAX3421_REG_HCTL, hctl);
  438. /*
  439. * Note: devnum for one and the same device can change during
  440. * address-assignment so it's best to just always load the
  441. * address whenever the end-point changed/was forced.
  442. */
  443. max3421_hcd->loaded_dev = dev;
  444. spi_wr8(hcd, MAX3421_REG_PERADDR, dev->devnum);
  445. }
  446. static int
  447. max3421_ctrl_setup(struct usb_hcd *hcd, struct urb *urb)
  448. {
  449. spi_wr_buf(hcd, MAX3421_REG_SUDFIFO, urb->setup_packet, 8);
  450. return MAX3421_HXFR_SETUP;
  451. }
  452. static int
  453. max3421_transfer_in(struct usb_hcd *hcd, struct urb *urb)
  454. {
  455. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  456. int epnum = usb_pipeendpoint(urb->pipe);
  457. max3421_hcd->curr_len = 0;
  458. max3421_hcd->hien |= BIT(MAX3421_HI_RCVDAV_BIT);
  459. return MAX3421_HXFR_BULK_IN(epnum);
  460. }
  461. static int
  462. max3421_transfer_out(struct usb_hcd *hcd, struct urb *urb, int fast_retransmit)
  463. {
  464. struct spi_device *spi = to_spi_device(hcd->self.controller);
  465. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  466. int epnum = usb_pipeendpoint(urb->pipe);
  467. u32 max_packet;
  468. void *src;
  469. src = urb->transfer_buffer + urb->actual_length;
  470. if (fast_retransmit) {
  471. if (max3421_hcd->rev == 0x12) {
  472. /* work around rev 0x12 bug: */
  473. spi_wr8(hcd, MAX3421_REG_SNDBC, 0);
  474. spi_wr8(hcd, MAX3421_REG_SNDFIFO, ((u8 *) src)[0]);
  475. spi_wr8(hcd, MAX3421_REG_SNDBC, max3421_hcd->curr_len);
  476. }
  477. return MAX3421_HXFR_BULK_OUT(epnum);
  478. }
  479. max_packet = usb_maxpacket(urb->dev, urb->pipe, 1);
  480. if (max_packet > MAX3421_FIFO_SIZE) {
  481. /*
  482. * We do not support isochronous transfers at this
  483. * time.
  484. */
  485. dev_err(&spi->dev,
  486. "%s: packet-size of %u too big (limit is %u bytes)",
  487. __func__, max_packet, MAX3421_FIFO_SIZE);
  488. max3421_hcd->urb_done = -EMSGSIZE;
  489. return -EMSGSIZE;
  490. }
  491. max3421_hcd->curr_len = min((urb->transfer_buffer_length -
  492. urb->actual_length), max_packet);
  493. spi_wr_buf(hcd, MAX3421_REG_SNDFIFO, src, max3421_hcd->curr_len);
  494. spi_wr8(hcd, MAX3421_REG_SNDBC, max3421_hcd->curr_len);
  495. return MAX3421_HXFR_BULK_OUT(epnum);
  496. }
  497. /*
  498. * Issue the next host-transfer command.
  499. * Caller must NOT hold HCD spinlock.
  500. */
  501. static void
  502. max3421_next_transfer(struct usb_hcd *hcd, int fast_retransmit)
  503. {
  504. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  505. struct urb *urb = max3421_hcd->curr_urb;
  506. struct max3421_ep *max3421_ep;
  507. int cmd = -EINVAL;
  508. if (!urb)
  509. return; /* nothing to do */
  510. max3421_ep = urb->ep->hcpriv;
  511. switch (max3421_ep->pkt_state) {
  512. case PKT_STATE_SETUP:
  513. cmd = max3421_ctrl_setup(hcd, urb);
  514. break;
  515. case PKT_STATE_TRANSFER:
  516. if (usb_urb_dir_in(urb))
  517. cmd = max3421_transfer_in(hcd, urb);
  518. else
  519. cmd = max3421_transfer_out(hcd, urb, fast_retransmit);
  520. break;
  521. case PKT_STATE_TERMINATE:
  522. /*
  523. * IN transfers are terminated with HS_OUT token,
  524. * OUT transfers with HS_IN:
  525. */
  526. if (usb_urb_dir_in(urb))
  527. cmd = MAX3421_HXFR_HS_OUT;
  528. else
  529. cmd = MAX3421_HXFR_HS_IN;
  530. break;
  531. }
  532. if (cmd < 0)
  533. return;
  534. /* issue the command and wait for host-xfer-done interrupt: */
  535. spi_wr8(hcd, MAX3421_REG_HXFR, cmd);
  536. max3421_hcd->hien |= BIT(MAX3421_HI_HXFRDN_BIT);
  537. }
  538. /*
  539. * Find the next URB to process and start its execution.
  540. *
  541. * At this time, we do not anticipate ever connecting a USB hub to the
  542. * MAX3421 chip, so at most USB device can be connected and we can use
  543. * a simplistic scheduler: at the start of a frame, schedule all
  544. * periodic transfers. Once that is done, use the remainder of the
  545. * frame to process non-periodic (bulk & control) transfers.
  546. *
  547. * Preconditions:
  548. * o Caller must NOT hold HCD spinlock.
  549. * o max3421_hcd->curr_urb MUST BE NULL.
  550. * o MAX3421E chip must be idle.
  551. */
  552. static int
  553. max3421_select_and_start_urb(struct usb_hcd *hcd)
  554. {
  555. struct spi_device *spi = to_spi_device(hcd->self.controller);
  556. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  557. struct urb *urb, *curr_urb = NULL;
  558. struct max3421_ep *max3421_ep;
  559. int epnum, force_toggles = 0;
  560. struct usb_host_endpoint *ep;
  561. struct list_head *pos;
  562. unsigned long flags;
  563. spin_lock_irqsave(&max3421_hcd->lock, flags);
  564. for (;
  565. max3421_hcd->sched_pass < SCHED_PASS_DONE;
  566. ++max3421_hcd->sched_pass)
  567. list_for_each(pos, &max3421_hcd->ep_list) {
  568. urb = NULL;
  569. max3421_ep = container_of(pos, struct max3421_ep,
  570. ep_list);
  571. ep = max3421_ep->ep;
  572. switch (usb_endpoint_type(&ep->desc)) {
  573. case USB_ENDPOINT_XFER_ISOC:
  574. case USB_ENDPOINT_XFER_INT:
  575. if (max3421_hcd->sched_pass !=
  576. SCHED_PASS_PERIODIC)
  577. continue;
  578. break;
  579. case USB_ENDPOINT_XFER_CONTROL:
  580. case USB_ENDPOINT_XFER_BULK:
  581. if (max3421_hcd->sched_pass !=
  582. SCHED_PASS_NON_PERIODIC)
  583. continue;
  584. break;
  585. }
  586. if (list_empty(&ep->urb_list))
  587. continue; /* nothing to do */
  588. urb = list_first_entry(&ep->urb_list, struct urb,
  589. urb_list);
  590. if (urb->unlinked) {
  591. dev_dbg(&spi->dev, "%s: URB %p unlinked=%d",
  592. __func__, urb, urb->unlinked);
  593. max3421_hcd->curr_urb = urb;
  594. max3421_hcd->urb_done = 1;
  595. spin_unlock_irqrestore(&max3421_hcd->lock,
  596. flags);
  597. return 1;
  598. }
  599. switch (usb_endpoint_type(&ep->desc)) {
  600. case USB_ENDPOINT_XFER_CONTROL:
  601. /*
  602. * Allow one control transaction per
  603. * frame per endpoint:
  604. */
  605. if (frame_diff(max3421_ep->last_active,
  606. max3421_hcd->frame_number) == 0)
  607. continue;
  608. break;
  609. case USB_ENDPOINT_XFER_BULK:
  610. if (max3421_ep->retransmit
  611. && (frame_diff(max3421_ep->last_active,
  612. max3421_hcd->frame_number)
  613. == 0))
  614. /*
  615. * We already tried this EP
  616. * during this frame and got a
  617. * NAK or error; wait for next frame
  618. */
  619. continue;
  620. break;
  621. case USB_ENDPOINT_XFER_ISOC:
  622. case USB_ENDPOINT_XFER_INT:
  623. if (frame_diff(max3421_hcd->frame_number,
  624. max3421_ep->last_active)
  625. < urb->interval)
  626. /*
  627. * We already processed this
  628. * end-point in the current
  629. * frame
  630. */
  631. continue;
  632. break;
  633. }
  634. /* move current ep to tail: */
  635. list_move_tail(pos, &max3421_hcd->ep_list);
  636. curr_urb = urb;
  637. goto done;
  638. }
  639. done:
  640. if (!curr_urb) {
  641. spin_unlock_irqrestore(&max3421_hcd->lock, flags);
  642. return 0;
  643. }
  644. urb = max3421_hcd->curr_urb = curr_urb;
  645. epnum = usb_endpoint_num(&urb->ep->desc);
  646. if (max3421_ep->retransmit)
  647. /* restart (part of) a USB transaction: */
  648. max3421_ep->retransmit = 0;
  649. else {
  650. /* start USB transaction: */
  651. if (usb_endpoint_xfer_control(&ep->desc)) {
  652. /*
  653. * See USB 2.0 spec section 8.6.1
  654. * Initialization via SETUP Token:
  655. */
  656. usb_settoggle(urb->dev, epnum, 0, 1);
  657. usb_settoggle(urb->dev, epnum, 1, 1);
  658. max3421_ep->pkt_state = PKT_STATE_SETUP;
  659. force_toggles = 1;
  660. } else
  661. max3421_ep->pkt_state = PKT_STATE_TRANSFER;
  662. }
  663. spin_unlock_irqrestore(&max3421_hcd->lock, flags);
  664. max3421_ep->last_active = max3421_hcd->frame_number;
  665. max3421_set_address(hcd, urb->dev, epnum, force_toggles);
  666. max3421_set_speed(hcd, urb->dev);
  667. max3421_next_transfer(hcd, 0);
  668. return 1;
  669. }
  670. /*
  671. * Check all endpoints for URBs that got unlinked.
  672. *
  673. * Caller must NOT hold HCD spinlock.
  674. */
  675. static int
  676. max3421_check_unlink(struct usb_hcd *hcd)
  677. {
  678. struct spi_device *spi = to_spi_device(hcd->self.controller);
  679. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  680. struct list_head *pos, *upos, *next_upos;
  681. struct max3421_ep *max3421_ep;
  682. struct usb_host_endpoint *ep;
  683. struct urb *urb;
  684. unsigned long flags;
  685. int retval = 0;
  686. spin_lock_irqsave(&max3421_hcd->lock, flags);
  687. list_for_each(pos, &max3421_hcd->ep_list) {
  688. max3421_ep = container_of(pos, struct max3421_ep, ep_list);
  689. ep = max3421_ep->ep;
  690. list_for_each_safe(upos, next_upos, &ep->urb_list) {
  691. urb = container_of(upos, struct urb, urb_list);
  692. if (urb->unlinked) {
  693. retval = 1;
  694. dev_dbg(&spi->dev, "%s: URB %p unlinked=%d",
  695. __func__, urb, urb->unlinked);
  696. usb_hcd_unlink_urb_from_ep(hcd, urb);
  697. spin_unlock_irqrestore(&max3421_hcd->lock,
  698. flags);
  699. usb_hcd_giveback_urb(hcd, urb, 0);
  700. spin_lock_irqsave(&max3421_hcd->lock, flags);
  701. }
  702. }
  703. }
  704. spin_unlock_irqrestore(&max3421_hcd->lock, flags);
  705. return retval;
  706. }
  707. /*
  708. * Caller must NOT hold HCD spinlock.
  709. */
  710. static void
  711. max3421_slow_retransmit(struct usb_hcd *hcd)
  712. {
  713. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  714. struct urb *urb = max3421_hcd->curr_urb;
  715. struct max3421_ep *max3421_ep;
  716. max3421_ep = urb->ep->hcpriv;
  717. max3421_ep->retransmit = 1;
  718. max3421_hcd->curr_urb = NULL;
  719. }
  720. /*
  721. * Caller must NOT hold HCD spinlock.
  722. */
  723. static void
  724. max3421_recv_data_available(struct usb_hcd *hcd)
  725. {
  726. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  727. struct urb *urb = max3421_hcd->curr_urb;
  728. size_t remaining, transfer_size;
  729. u8 rcvbc;
  730. rcvbc = spi_rd8(hcd, MAX3421_REG_RCVBC);
  731. if (rcvbc > MAX3421_FIFO_SIZE)
  732. rcvbc = MAX3421_FIFO_SIZE;
  733. if (urb->actual_length >= urb->transfer_buffer_length)
  734. remaining = 0;
  735. else
  736. remaining = urb->transfer_buffer_length - urb->actual_length;
  737. transfer_size = rcvbc;
  738. if (transfer_size > remaining)
  739. transfer_size = remaining;
  740. if (transfer_size > 0) {
  741. void *dst = urb->transfer_buffer + urb->actual_length;
  742. spi_rd_buf(hcd, MAX3421_REG_RCVFIFO, dst, transfer_size);
  743. urb->actual_length += transfer_size;
  744. max3421_hcd->curr_len = transfer_size;
  745. }
  746. /* ack the RCVDAV irq now that the FIFO has been read: */
  747. spi_wr8(hcd, MAX3421_REG_HIRQ, BIT(MAX3421_HI_RCVDAV_BIT));
  748. }
  749. static void
  750. max3421_handle_error(struct usb_hcd *hcd, u8 hrsl)
  751. {
  752. struct spi_device *spi = to_spi_device(hcd->self.controller);
  753. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  754. u8 result_code = hrsl & MAX3421_HRSL_RESULT_MASK;
  755. struct urb *urb = max3421_hcd->curr_urb;
  756. struct max3421_ep *max3421_ep = urb->ep->hcpriv;
  757. int switch_sndfifo;
  758. /*
  759. * If an OUT command results in any response other than OK
  760. * (i.e., error or NAK), we have to perform a dummy-write to
  761. * SNDBC so the FIFO gets switched back to us. Otherwise, we
  762. * get out of sync with the SNDFIFO double buffer.
  763. */
  764. switch_sndfifo = (max3421_ep->pkt_state == PKT_STATE_TRANSFER &&
  765. usb_urb_dir_out(urb));
  766. switch (result_code) {
  767. case MAX3421_HRSL_OK:
  768. return; /* this shouldn't happen */
  769. case MAX3421_HRSL_WRONGPID: /* received wrong PID */
  770. case MAX3421_HRSL_BUSY: /* SIE busy */
  771. case MAX3421_HRSL_BADREQ: /* bad val in HXFR */
  772. case MAX3421_HRSL_UNDEF: /* reserved */
  773. case MAX3421_HRSL_KERR: /* K-state instead of response */
  774. case MAX3421_HRSL_JERR: /* J-state instead of response */
  775. /*
  776. * packet experienced an error that we cannot recover
  777. * from; report error
  778. */
  779. max3421_hcd->urb_done = hrsl_to_error[result_code];
  780. dev_dbg(&spi->dev, "%s: unexpected error HRSL=0x%02x",
  781. __func__, hrsl);
  782. break;
  783. case MAX3421_HRSL_TOGERR:
  784. if (usb_urb_dir_in(urb))
  785. ; /* don't do anything (device will switch toggle) */
  786. else {
  787. /* flip the send toggle bit: */
  788. int sndtog = (hrsl >> MAX3421_HRSL_SNDTOGRD_BIT) & 1;
  789. sndtog ^= 1;
  790. spi_wr8(hcd, MAX3421_REG_HCTL,
  791. BIT(sndtog + MAX3421_HCTL_SNDTOG0_BIT));
  792. }
  793. /* FALL THROUGH */
  794. case MAX3421_HRSL_BADBC: /* bad byte count */
  795. case MAX3421_HRSL_PIDERR: /* received PID is corrupted */
  796. case MAX3421_HRSL_PKTERR: /* packet error (stuff, EOP) */
  797. case MAX3421_HRSL_CRCERR: /* CRC error */
  798. case MAX3421_HRSL_BABBLE: /* device talked too long */
  799. case MAX3421_HRSL_TIMEOUT:
  800. if (max3421_ep->retries++ < USB_MAX_RETRIES)
  801. /* retry the packet again in the next frame */
  802. max3421_slow_retransmit(hcd);
  803. else {
  804. /* Based on ohci.h cc_to_err[]: */
  805. max3421_hcd->urb_done = hrsl_to_error[result_code];
  806. dev_dbg(&spi->dev, "%s: unexpected error HRSL=0x%02x",
  807. __func__, hrsl);
  808. }
  809. break;
  810. case MAX3421_HRSL_STALL:
  811. dev_dbg(&spi->dev, "%s: unexpected error HRSL=0x%02x",
  812. __func__, hrsl);
  813. max3421_hcd->urb_done = hrsl_to_error[result_code];
  814. break;
  815. case MAX3421_HRSL_NAK:
  816. /*
  817. * Device wasn't ready for data or has no data
  818. * available: retry the packet again.
  819. */
  820. if (max3421_ep->naks++ < NAK_MAX_FAST_RETRANSMITS) {
  821. max3421_next_transfer(hcd, 1);
  822. switch_sndfifo = 0;
  823. } else
  824. max3421_slow_retransmit(hcd);
  825. break;
  826. }
  827. if (switch_sndfifo)
  828. spi_wr8(hcd, MAX3421_REG_SNDBC, 0);
  829. }
  830. /*
  831. * Caller must NOT hold HCD spinlock.
  832. */
  833. static int
  834. max3421_transfer_in_done(struct usb_hcd *hcd, struct urb *urb)
  835. {
  836. struct spi_device *spi = to_spi_device(hcd->self.controller);
  837. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  838. u32 max_packet;
  839. if (urb->actual_length >= urb->transfer_buffer_length)
  840. return 1; /* read is complete, so we're done */
  841. /*
  842. * USB 2.0 Section 5.3.2 Pipes: packets must be full size
  843. * except for last one.
  844. */
  845. max_packet = usb_maxpacket(urb->dev, urb->pipe, 0);
  846. if (max_packet > MAX3421_FIFO_SIZE) {
  847. /*
  848. * We do not support isochronous transfers at this
  849. * time...
  850. */
  851. dev_err(&spi->dev,
  852. "%s: packet-size of %u too big (limit is %u bytes)",
  853. __func__, max_packet, MAX3421_FIFO_SIZE);
  854. return -EINVAL;
  855. }
  856. if (max3421_hcd->curr_len < max_packet) {
  857. if (urb->transfer_flags & URB_SHORT_NOT_OK) {
  858. /*
  859. * remaining > 0 and received an
  860. * unexpected partial packet ->
  861. * error
  862. */
  863. return -EREMOTEIO;
  864. } else
  865. /* short read, but it's OK */
  866. return 1;
  867. }
  868. return 0; /* not done */
  869. }
  870. /*
  871. * Caller must NOT hold HCD spinlock.
  872. */
  873. static int
  874. max3421_transfer_out_done(struct usb_hcd *hcd, struct urb *urb)
  875. {
  876. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  877. urb->actual_length += max3421_hcd->curr_len;
  878. if (urb->actual_length < urb->transfer_buffer_length)
  879. return 0;
  880. if (urb->transfer_flags & URB_ZERO_PACKET) {
  881. /*
  882. * Some hardware needs a zero-size packet at the end
  883. * of a bulk-out transfer if the last transfer was a
  884. * full-sized packet (i.e., such hardware use <
  885. * max_packet as an indicator that the end of the
  886. * packet has been reached).
  887. */
  888. u32 max_packet = usb_maxpacket(urb->dev, urb->pipe, 1);
  889. if (max3421_hcd->curr_len == max_packet)
  890. return 0;
  891. }
  892. return 1;
  893. }
  894. /*
  895. * Caller must NOT hold HCD spinlock.
  896. */
  897. static void
  898. max3421_host_transfer_done(struct usb_hcd *hcd)
  899. {
  900. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  901. struct urb *urb = max3421_hcd->curr_urb;
  902. struct max3421_ep *max3421_ep;
  903. u8 result_code, hrsl;
  904. int urb_done = 0;
  905. max3421_hcd->hien &= ~(BIT(MAX3421_HI_HXFRDN_BIT) |
  906. BIT(MAX3421_HI_RCVDAV_BIT));
  907. hrsl = spi_rd8(hcd, MAX3421_REG_HRSL);
  908. result_code = hrsl & MAX3421_HRSL_RESULT_MASK;
  909. #ifdef DEBUG
  910. ++max3421_hcd->err_stat[result_code];
  911. #endif
  912. max3421_ep = urb->ep->hcpriv;
  913. if (unlikely(result_code != MAX3421_HRSL_OK)) {
  914. max3421_handle_error(hcd, hrsl);
  915. return;
  916. }
  917. max3421_ep->naks = 0;
  918. max3421_ep->retries = 0;
  919. switch (max3421_ep->pkt_state) {
  920. case PKT_STATE_SETUP:
  921. if (urb->transfer_buffer_length > 0)
  922. max3421_ep->pkt_state = PKT_STATE_TRANSFER;
  923. else
  924. max3421_ep->pkt_state = PKT_STATE_TERMINATE;
  925. break;
  926. case PKT_STATE_TRANSFER:
  927. if (usb_urb_dir_in(urb))
  928. urb_done = max3421_transfer_in_done(hcd, urb);
  929. else
  930. urb_done = max3421_transfer_out_done(hcd, urb);
  931. if (urb_done > 0 && usb_pipetype(urb->pipe) == PIPE_CONTROL) {
  932. /*
  933. * We aren't really done - we still need to
  934. * terminate the control transfer:
  935. */
  936. max3421_hcd->urb_done = urb_done = 0;
  937. max3421_ep->pkt_state = PKT_STATE_TERMINATE;
  938. }
  939. break;
  940. case PKT_STATE_TERMINATE:
  941. urb_done = 1;
  942. break;
  943. }
  944. if (urb_done)
  945. max3421_hcd->urb_done = urb_done;
  946. else
  947. max3421_next_transfer(hcd, 0);
  948. }
  949. /*
  950. * Caller must NOT hold HCD spinlock.
  951. */
  952. static void
  953. max3421_detect_conn(struct usb_hcd *hcd)
  954. {
  955. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  956. unsigned int jk, have_conn = 0;
  957. u32 old_port_status, chg;
  958. unsigned long flags;
  959. u8 hrsl, mode;
  960. hrsl = spi_rd8(hcd, MAX3421_REG_HRSL);
  961. jk = ((((hrsl >> MAX3421_HRSL_JSTATUS_BIT) & 1) << 0) |
  962. (((hrsl >> MAX3421_HRSL_KSTATUS_BIT) & 1) << 1));
  963. mode = max3421_hcd->mode;
  964. switch (jk) {
  965. case 0x0: /* SE0: disconnect */
  966. /*
  967. * Turn off SOFKAENAB bit to avoid getting interrupt
  968. * every milli-second:
  969. */
  970. mode &= ~BIT(MAX3421_MODE_SOFKAENAB_BIT);
  971. break;
  972. case 0x1: /* J=0,K=1: low-speed (in full-speed or vice versa) */
  973. case 0x2: /* J=1,K=0: full-speed (in full-speed or vice versa) */
  974. if (jk == 0x2)
  975. /* need to switch to the other speed: */
  976. mode ^= BIT(MAX3421_MODE_LOWSPEED_BIT);
  977. /* turn on SOFKAENAB bit: */
  978. mode |= BIT(MAX3421_MODE_SOFKAENAB_BIT);
  979. have_conn = 1;
  980. break;
  981. case 0x3: /* illegal */
  982. break;
  983. }
  984. max3421_hcd->mode = mode;
  985. spi_wr8(hcd, MAX3421_REG_MODE, max3421_hcd->mode);
  986. spin_lock_irqsave(&max3421_hcd->lock, flags);
  987. old_port_status = max3421_hcd->port_status;
  988. if (have_conn)
  989. max3421_hcd->port_status |= USB_PORT_STAT_CONNECTION;
  990. else
  991. max3421_hcd->port_status &= ~USB_PORT_STAT_CONNECTION;
  992. if (mode & BIT(MAX3421_MODE_LOWSPEED_BIT))
  993. max3421_hcd->port_status |= USB_PORT_STAT_LOW_SPEED;
  994. else
  995. max3421_hcd->port_status &= ~USB_PORT_STAT_LOW_SPEED;
  996. chg = (old_port_status ^ max3421_hcd->port_status);
  997. max3421_hcd->port_status |= chg << 16;
  998. spin_unlock_irqrestore(&max3421_hcd->lock, flags);
  999. }
  1000. static irqreturn_t
  1001. max3421_irq_handler(int irq, void *dev_id)
  1002. {
  1003. struct usb_hcd *hcd = dev_id;
  1004. struct spi_device *spi = to_spi_device(hcd->self.controller);
  1005. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  1006. if (max3421_hcd->spi_thread &&
  1007. max3421_hcd->spi_thread->state != TASK_RUNNING)
  1008. wake_up_process(max3421_hcd->spi_thread);
  1009. if (!max3421_hcd->do_enable_irq) {
  1010. max3421_hcd->do_enable_irq = 1;
  1011. disable_irq_nosync(spi->irq);
  1012. }
  1013. return IRQ_HANDLED;
  1014. }
  1015. #ifdef DEBUG
  1016. static void
  1017. dump_eps(struct usb_hcd *hcd)
  1018. {
  1019. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  1020. struct max3421_ep *max3421_ep;
  1021. struct usb_host_endpoint *ep;
  1022. struct list_head *pos, *upos;
  1023. char ubuf[512], *dp, *end;
  1024. unsigned long flags;
  1025. struct urb *urb;
  1026. int epnum, ret;
  1027. spin_lock_irqsave(&max3421_hcd->lock, flags);
  1028. list_for_each(pos, &max3421_hcd->ep_list) {
  1029. max3421_ep = container_of(pos, struct max3421_ep, ep_list);
  1030. ep = max3421_ep->ep;
  1031. dp = ubuf;
  1032. end = dp + sizeof(ubuf);
  1033. *dp = '\0';
  1034. list_for_each(upos, &ep->urb_list) {
  1035. urb = container_of(upos, struct urb, urb_list);
  1036. ret = snprintf(dp, end - dp, " %p(%d.%s %d/%d)", urb,
  1037. usb_pipetype(urb->pipe),
  1038. usb_urb_dir_in(urb) ? "IN" : "OUT",
  1039. urb->actual_length,
  1040. urb->transfer_buffer_length);
  1041. if (ret < 0 || ret >= end - dp)
  1042. break; /* error or buffer full */
  1043. dp += ret;
  1044. }
  1045. epnum = usb_endpoint_num(&ep->desc);
  1046. pr_info("EP%0u %u lst %04u rtr %u nak %6u rxmt %u: %s\n",
  1047. epnum, max3421_ep->pkt_state, max3421_ep->last_active,
  1048. max3421_ep->retries, max3421_ep->naks,
  1049. max3421_ep->retransmit, ubuf);
  1050. }
  1051. spin_unlock_irqrestore(&max3421_hcd->lock, flags);
  1052. }
  1053. #endif /* DEBUG */
  1054. /* Return zero if no work was performed, 1 otherwise. */
  1055. static int
  1056. max3421_handle_irqs(struct usb_hcd *hcd)
  1057. {
  1058. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  1059. u32 chg, old_port_status;
  1060. unsigned long flags;
  1061. u8 hirq;
  1062. /*
  1063. * Read and ack pending interrupts (CPU must never
  1064. * clear SNDBAV directly and RCVDAV must be cleared by
  1065. * max3421_recv_data_available()!):
  1066. */
  1067. hirq = spi_rd8(hcd, MAX3421_REG_HIRQ);
  1068. hirq &= max3421_hcd->hien;
  1069. if (!hirq)
  1070. return 0;
  1071. spi_wr8(hcd, MAX3421_REG_HIRQ,
  1072. hirq & ~(BIT(MAX3421_HI_SNDBAV_BIT) |
  1073. BIT(MAX3421_HI_RCVDAV_BIT)));
  1074. if (hirq & BIT(MAX3421_HI_FRAME_BIT)) {
  1075. max3421_hcd->frame_number = ((max3421_hcd->frame_number + 1)
  1076. & USB_MAX_FRAME_NUMBER);
  1077. max3421_hcd->sched_pass = SCHED_PASS_PERIODIC;
  1078. }
  1079. if (hirq & BIT(MAX3421_HI_RCVDAV_BIT))
  1080. max3421_recv_data_available(hcd);
  1081. if (hirq & BIT(MAX3421_HI_HXFRDN_BIT))
  1082. max3421_host_transfer_done(hcd);
  1083. if (hirq & BIT(MAX3421_HI_CONDET_BIT))
  1084. max3421_detect_conn(hcd);
  1085. /*
  1086. * Now process interrupts that may affect HCD state
  1087. * other than the end-points:
  1088. */
  1089. spin_lock_irqsave(&max3421_hcd->lock, flags);
  1090. old_port_status = max3421_hcd->port_status;
  1091. if (hirq & BIT(MAX3421_HI_BUSEVENT_BIT)) {
  1092. if (max3421_hcd->port_status & USB_PORT_STAT_RESET) {
  1093. /* BUSEVENT due to completion of Bus Reset */
  1094. max3421_hcd->port_status &= ~USB_PORT_STAT_RESET;
  1095. max3421_hcd->port_status |= USB_PORT_STAT_ENABLE;
  1096. } else {
  1097. /* BUSEVENT due to completion of Bus Resume */
  1098. pr_info("%s: BUSEVENT Bus Resume Done\n", __func__);
  1099. }
  1100. }
  1101. if (hirq & BIT(MAX3421_HI_RWU_BIT))
  1102. pr_info("%s: RWU\n", __func__);
  1103. if (hirq & BIT(MAX3421_HI_SUSDN_BIT))
  1104. pr_info("%s: SUSDN\n", __func__);
  1105. chg = (old_port_status ^ max3421_hcd->port_status);
  1106. max3421_hcd->port_status |= chg << 16;
  1107. spin_unlock_irqrestore(&max3421_hcd->lock, flags);
  1108. #ifdef DEBUG
  1109. {
  1110. static unsigned long last_time;
  1111. char sbuf[16 * 16], *dp, *end;
  1112. int i;
  1113. if (jiffies - last_time > 5*HZ) {
  1114. dp = sbuf;
  1115. end = sbuf + sizeof(sbuf);
  1116. *dp = '\0';
  1117. for (i = 0; i < 16; ++i) {
  1118. int ret = snprintf(dp, end - dp, " %lu",
  1119. max3421_hcd->err_stat[i]);
  1120. if (ret < 0 || ret >= end - dp)
  1121. break; /* error or buffer full */
  1122. dp += ret;
  1123. }
  1124. pr_info("%s: hrsl_stats %s\n", __func__, sbuf);
  1125. memset(max3421_hcd->err_stat, 0,
  1126. sizeof(max3421_hcd->err_stat));
  1127. last_time = jiffies;
  1128. dump_eps(hcd);
  1129. }
  1130. }
  1131. #endif
  1132. return 1;
  1133. }
  1134. static int
  1135. max3421_reset_hcd(struct usb_hcd *hcd)
  1136. {
  1137. struct spi_device *spi = to_spi_device(hcd->self.controller);
  1138. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  1139. int timeout;
  1140. /* perform a chip reset and wait for OSCIRQ signal to appear: */
  1141. spi_wr8(hcd, MAX3421_REG_USBCTL, BIT(MAX3421_USBCTL_CHIPRES_BIT));
  1142. /* clear reset: */
  1143. spi_wr8(hcd, MAX3421_REG_USBCTL, 0);
  1144. timeout = 1000;
  1145. while (1) {
  1146. if (spi_rd8(hcd, MAX3421_REG_USBIRQ)
  1147. & BIT(MAX3421_USBIRQ_OSCOKIRQ_BIT))
  1148. break;
  1149. if (--timeout < 0) {
  1150. dev_err(&spi->dev,
  1151. "timed out waiting for oscillator OK signal");
  1152. return 1;
  1153. }
  1154. cond_resched();
  1155. }
  1156. /*
  1157. * Turn on host mode, automatic generation of SOF packets, and
  1158. * enable pull-down registers on DM/DP:
  1159. */
  1160. max3421_hcd->mode = (BIT(MAX3421_MODE_HOST_BIT) |
  1161. BIT(MAX3421_MODE_SOFKAENAB_BIT) |
  1162. BIT(MAX3421_MODE_DMPULLDN_BIT) |
  1163. BIT(MAX3421_MODE_DPPULLDN_BIT));
  1164. spi_wr8(hcd, MAX3421_REG_MODE, max3421_hcd->mode);
  1165. /* reset frame-number: */
  1166. max3421_hcd->frame_number = USB_MAX_FRAME_NUMBER;
  1167. spi_wr8(hcd, MAX3421_REG_HCTL, BIT(MAX3421_HCTL_FRMRST_BIT));
  1168. /* sample the state of the D+ and D- lines */
  1169. spi_wr8(hcd, MAX3421_REG_HCTL, BIT(MAX3421_HCTL_SAMPLEBUS_BIT));
  1170. max3421_detect_conn(hcd);
  1171. /* enable frame, connection-detected, and bus-event interrupts: */
  1172. max3421_hcd->hien = (BIT(MAX3421_HI_FRAME_BIT) |
  1173. BIT(MAX3421_HI_CONDET_BIT) |
  1174. BIT(MAX3421_HI_BUSEVENT_BIT));
  1175. spi_wr8(hcd, MAX3421_REG_HIEN, max3421_hcd->hien);
  1176. /* enable interrupts: */
  1177. spi_wr8(hcd, MAX3421_REG_CPUCTL, BIT(MAX3421_CPUCTL_IE_BIT));
  1178. return 1;
  1179. }
  1180. static int
  1181. max3421_urb_done(struct usb_hcd *hcd)
  1182. {
  1183. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  1184. unsigned long flags;
  1185. struct urb *urb;
  1186. int status;
  1187. status = max3421_hcd->urb_done;
  1188. max3421_hcd->urb_done = 0;
  1189. if (status > 0)
  1190. status = 0;
  1191. urb = max3421_hcd->curr_urb;
  1192. if (urb) {
  1193. max3421_hcd->curr_urb = NULL;
  1194. spin_lock_irqsave(&max3421_hcd->lock, flags);
  1195. usb_hcd_unlink_urb_from_ep(hcd, urb);
  1196. spin_unlock_irqrestore(&max3421_hcd->lock, flags);
  1197. /* must be called without the HCD spinlock: */
  1198. usb_hcd_giveback_urb(hcd, urb, status);
  1199. }
  1200. return 1;
  1201. }
  1202. static int
  1203. max3421_spi_thread(void *dev_id)
  1204. {
  1205. struct usb_hcd *hcd = dev_id;
  1206. struct spi_device *spi = to_spi_device(hcd->self.controller);
  1207. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  1208. int i, i_worked = 1;
  1209. /* set full-duplex SPI mode, low-active interrupt pin: */
  1210. spi_wr8(hcd, MAX3421_REG_PINCTL,
  1211. (BIT(MAX3421_PINCTL_FDUPSPI_BIT) | /* full-duplex */
  1212. BIT(MAX3421_PINCTL_INTLEVEL_BIT))); /* low-active irq */
  1213. while (!kthread_should_stop()) {
  1214. max3421_hcd->rev = spi_rd8(hcd, MAX3421_REG_REVISION);
  1215. if (max3421_hcd->rev == 0x12 || max3421_hcd->rev == 0x13)
  1216. break;
  1217. dev_err(&spi->dev, "bad rev 0x%02x", max3421_hcd->rev);
  1218. msleep(10000);
  1219. }
  1220. dev_info(&spi->dev, "rev 0x%x, SPI clk %dHz, bpw %u, irq %d\n",
  1221. max3421_hcd->rev, spi->max_speed_hz, spi->bits_per_word,
  1222. spi->irq);
  1223. while (!kthread_should_stop()) {
  1224. if (!i_worked) {
  1225. /*
  1226. * We'll be waiting for wakeups from the hard
  1227. * interrupt handler, so now is a good time to
  1228. * sync our hien with the chip:
  1229. */
  1230. spi_wr8(hcd, MAX3421_REG_HIEN, max3421_hcd->hien);
  1231. set_current_state(TASK_INTERRUPTIBLE);
  1232. if (max3421_hcd->do_enable_irq) {
  1233. max3421_hcd->do_enable_irq = 0;
  1234. enable_irq(spi->irq);
  1235. }
  1236. schedule();
  1237. __set_current_state(TASK_RUNNING);
  1238. }
  1239. i_worked = 0;
  1240. if (max3421_hcd->urb_done)
  1241. i_worked |= max3421_urb_done(hcd);
  1242. else if (max3421_handle_irqs(hcd))
  1243. i_worked = 1;
  1244. else if (!max3421_hcd->curr_urb)
  1245. i_worked |= max3421_select_and_start_urb(hcd);
  1246. if (max3421_hcd->do_reset_hcd) {
  1247. /* reset the HCD: */
  1248. max3421_hcd->do_reset_hcd = 0;
  1249. i_worked |= max3421_reset_hcd(hcd);
  1250. }
  1251. if (max3421_hcd->do_reset_port) {
  1252. /* perform a USB bus reset: */
  1253. max3421_hcd->do_reset_port = 0;
  1254. spi_wr8(hcd, MAX3421_REG_HCTL,
  1255. BIT(MAX3421_HCTL_BUSRST_BIT));
  1256. i_worked = 1;
  1257. }
  1258. if (max3421_hcd->do_check_unlink) {
  1259. max3421_hcd->do_check_unlink = 0;
  1260. i_worked |= max3421_check_unlink(hcd);
  1261. }
  1262. if (max3421_hcd->do_iopin_update) {
  1263. /*
  1264. * IOPINS1/IOPINS2 do not auto-increment, so we can't
  1265. * use spi_wr_buf().
  1266. */
  1267. for (i = 0; i < ARRAY_SIZE(max3421_hcd->iopins); ++i) {
  1268. u8 val = spi_rd8(hcd, MAX3421_REG_IOPINS1);
  1269. val = ((val & 0xf0) |
  1270. (max3421_hcd->iopins[i] & 0x0f));
  1271. spi_wr8(hcd, MAX3421_REG_IOPINS1 + i, val);
  1272. max3421_hcd->iopins[i] = val;
  1273. }
  1274. max3421_hcd->do_iopin_update = 0;
  1275. i_worked = 1;
  1276. }
  1277. }
  1278. set_current_state(TASK_RUNNING);
  1279. dev_info(&spi->dev, "SPI thread exiting");
  1280. return 0;
  1281. }
  1282. static int
  1283. max3421_reset_port(struct usb_hcd *hcd)
  1284. {
  1285. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  1286. max3421_hcd->port_status &= ~(USB_PORT_STAT_ENABLE |
  1287. USB_PORT_STAT_LOW_SPEED);
  1288. max3421_hcd->do_reset_port = 1;
  1289. wake_up_process(max3421_hcd->spi_thread);
  1290. return 0;
  1291. }
  1292. static int
  1293. max3421_reset(struct usb_hcd *hcd)
  1294. {
  1295. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  1296. hcd->self.sg_tablesize = 0;
  1297. hcd->speed = HCD_USB2;
  1298. hcd->self.root_hub->speed = USB_SPEED_FULL;
  1299. max3421_hcd->do_reset_hcd = 1;
  1300. wake_up_process(max3421_hcd->spi_thread);
  1301. return 0;
  1302. }
  1303. static int
  1304. max3421_start(struct usb_hcd *hcd)
  1305. {
  1306. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  1307. spin_lock_init(&max3421_hcd->lock);
  1308. max3421_hcd->rh_state = MAX3421_RH_RUNNING;
  1309. INIT_LIST_HEAD(&max3421_hcd->ep_list);
  1310. hcd->power_budget = POWER_BUDGET;
  1311. hcd->state = HC_STATE_RUNNING;
  1312. hcd->uses_new_polling = 1;
  1313. return 0;
  1314. }
  1315. static void
  1316. max3421_stop(struct usb_hcd *hcd)
  1317. {
  1318. }
  1319. static int
  1320. max3421_urb_enqueue(struct usb_hcd *hcd, struct urb *urb, gfp_t mem_flags)
  1321. {
  1322. struct spi_device *spi = to_spi_device(hcd->self.controller);
  1323. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  1324. struct max3421_ep *max3421_ep;
  1325. unsigned long flags;
  1326. int retval;
  1327. switch (usb_pipetype(urb->pipe)) {
  1328. case PIPE_INTERRUPT:
  1329. case PIPE_ISOCHRONOUS:
  1330. if (urb->interval < 0) {
  1331. dev_err(&spi->dev,
  1332. "%s: interval=%d for intr-/iso-pipe; expected > 0\n",
  1333. __func__, urb->interval);
  1334. return -EINVAL;
  1335. }
  1336. default:
  1337. break;
  1338. }
  1339. spin_lock_irqsave(&max3421_hcd->lock, flags);
  1340. max3421_ep = urb->ep->hcpriv;
  1341. if (!max3421_ep) {
  1342. /* gets freed in max3421_endpoint_disable: */
  1343. max3421_ep = kzalloc(sizeof(struct max3421_ep), mem_flags);
  1344. if (!max3421_ep)
  1345. return -ENOMEM;
  1346. max3421_ep->ep = urb->ep;
  1347. max3421_ep->last_active = max3421_hcd->frame_number;
  1348. urb->ep->hcpriv = max3421_ep;
  1349. list_add_tail(&max3421_ep->ep_list, &max3421_hcd->ep_list);
  1350. }
  1351. retval = usb_hcd_link_urb_to_ep(hcd, urb);
  1352. if (retval == 0) {
  1353. /* Since we added to the queue, restart scheduling: */
  1354. max3421_hcd->sched_pass = SCHED_PASS_PERIODIC;
  1355. wake_up_process(max3421_hcd->spi_thread);
  1356. }
  1357. spin_unlock_irqrestore(&max3421_hcd->lock, flags);
  1358. return retval;
  1359. }
  1360. static int
  1361. max3421_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
  1362. {
  1363. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  1364. unsigned long flags;
  1365. int retval;
  1366. spin_lock_irqsave(&max3421_hcd->lock, flags);
  1367. /*
  1368. * This will set urb->unlinked which in turn causes the entry
  1369. * to be dropped at the next opportunity.
  1370. */
  1371. retval = usb_hcd_check_unlink_urb(hcd, urb, status);
  1372. if (retval == 0) {
  1373. max3421_hcd->do_check_unlink = 1;
  1374. wake_up_process(max3421_hcd->spi_thread);
  1375. }
  1376. spin_unlock_irqrestore(&max3421_hcd->lock, flags);
  1377. return retval;
  1378. }
  1379. static void
  1380. max3421_endpoint_disable(struct usb_hcd *hcd, struct usb_host_endpoint *ep)
  1381. {
  1382. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  1383. unsigned long flags;
  1384. spin_lock_irqsave(&max3421_hcd->lock, flags);
  1385. if (ep->hcpriv) {
  1386. struct max3421_ep *max3421_ep = ep->hcpriv;
  1387. /* remove myself from the ep_list: */
  1388. if (!list_empty(&max3421_ep->ep_list))
  1389. list_del(&max3421_ep->ep_list);
  1390. kfree(max3421_ep);
  1391. ep->hcpriv = NULL;
  1392. }
  1393. spin_unlock_irqrestore(&max3421_hcd->lock, flags);
  1394. }
  1395. static int
  1396. max3421_get_frame_number(struct usb_hcd *hcd)
  1397. {
  1398. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  1399. return max3421_hcd->frame_number;
  1400. }
  1401. /*
  1402. * Should return a non-zero value when any port is undergoing a resume
  1403. * transition while the root hub is suspended.
  1404. */
  1405. static int
  1406. max3421_hub_status_data(struct usb_hcd *hcd, char *buf)
  1407. {
  1408. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  1409. unsigned long flags;
  1410. int retval = 0;
  1411. spin_lock_irqsave(&max3421_hcd->lock, flags);
  1412. if (!HCD_HW_ACCESSIBLE(hcd))
  1413. goto done;
  1414. *buf = 0;
  1415. if ((max3421_hcd->port_status & PORT_C_MASK) != 0) {
  1416. *buf = (1 << 1); /* a hub over-current condition exists */
  1417. dev_dbg(hcd->self.controller,
  1418. "port status 0x%08x has changes\n",
  1419. max3421_hcd->port_status);
  1420. retval = 1;
  1421. if (max3421_hcd->rh_state == MAX3421_RH_SUSPENDED)
  1422. usb_hcd_resume_root_hub(hcd);
  1423. }
  1424. done:
  1425. spin_unlock_irqrestore(&max3421_hcd->lock, flags);
  1426. return retval;
  1427. }
  1428. static inline void
  1429. hub_descriptor(struct usb_hub_descriptor *desc)
  1430. {
  1431. memset(desc, 0, sizeof(*desc));
  1432. /*
  1433. * See Table 11-13: Hub Descriptor in USB 2.0 spec.
  1434. */
  1435. desc->bDescriptorType = 0x29; /* hub descriptor */
  1436. desc->bDescLength = 9;
  1437. desc->wHubCharacteristics = cpu_to_le16(0x0001);
  1438. desc->bNbrPorts = 1;
  1439. }
  1440. /*
  1441. * Set the MAX3421E general-purpose output with number PIN_NUMBER to
  1442. * VALUE (0 or 1). PIN_NUMBER may be in the range from 1-8. For
  1443. * any other value, this function acts as a no-op.
  1444. */
  1445. static void
  1446. max3421_gpout_set_value(struct usb_hcd *hcd, u8 pin_number, u8 value)
  1447. {
  1448. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  1449. u8 mask, idx;
  1450. --pin_number;
  1451. if (pin_number > 7)
  1452. return;
  1453. mask = 1u << pin_number;
  1454. idx = pin_number / 4;
  1455. if (value)
  1456. max3421_hcd->iopins[idx] |= mask;
  1457. else
  1458. max3421_hcd->iopins[idx] &= ~mask;
  1459. max3421_hcd->do_iopin_update = 1;
  1460. wake_up_process(max3421_hcd->spi_thread);
  1461. }
  1462. static int
  1463. max3421_hub_control(struct usb_hcd *hcd, u16 type_req, u16 value, u16 index,
  1464. char *buf, u16 length)
  1465. {
  1466. struct spi_device *spi = to_spi_device(hcd->self.controller);
  1467. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  1468. struct max3421_hcd_platform_data *pdata;
  1469. unsigned long flags;
  1470. int retval = 0;
  1471. spin_lock_irqsave(&max3421_hcd->lock, flags);
  1472. pdata = spi->dev.platform_data;
  1473. switch (type_req) {
  1474. case ClearHubFeature:
  1475. break;
  1476. case ClearPortFeature:
  1477. switch (value) {
  1478. case USB_PORT_FEAT_SUSPEND:
  1479. break;
  1480. case USB_PORT_FEAT_POWER:
  1481. dev_dbg(hcd->self.controller, "power-off\n");
  1482. max3421_gpout_set_value(hcd, pdata->vbus_gpout, 0);
  1483. /* FALLS THROUGH */
  1484. default:
  1485. max3421_hcd->port_status &= ~(1 << value);
  1486. }
  1487. break;
  1488. case GetHubDescriptor:
  1489. hub_descriptor((struct usb_hub_descriptor *) buf);
  1490. break;
  1491. case DeviceRequest | USB_REQ_GET_DESCRIPTOR:
  1492. case GetPortErrorCount:
  1493. case SetHubDepth:
  1494. /* USB3 only */
  1495. goto error;
  1496. case GetHubStatus:
  1497. *(__le32 *) buf = cpu_to_le32(0);
  1498. break;
  1499. case GetPortStatus:
  1500. if (index != 1) {
  1501. retval = -EPIPE;
  1502. goto error;
  1503. }
  1504. ((__le16 *) buf)[0] = cpu_to_le16(max3421_hcd->port_status);
  1505. ((__le16 *) buf)[1] =
  1506. cpu_to_le16(max3421_hcd->port_status >> 16);
  1507. break;
  1508. case SetHubFeature:
  1509. retval = -EPIPE;
  1510. break;
  1511. case SetPortFeature:
  1512. switch (value) {
  1513. case USB_PORT_FEAT_LINK_STATE:
  1514. case USB_PORT_FEAT_U1_TIMEOUT:
  1515. case USB_PORT_FEAT_U2_TIMEOUT:
  1516. case USB_PORT_FEAT_BH_PORT_RESET:
  1517. goto error;
  1518. case USB_PORT_FEAT_SUSPEND:
  1519. if (max3421_hcd->active)
  1520. max3421_hcd->port_status |=
  1521. USB_PORT_STAT_SUSPEND;
  1522. break;
  1523. case USB_PORT_FEAT_POWER:
  1524. dev_dbg(hcd->self.controller, "power-on\n");
  1525. max3421_hcd->port_status |= USB_PORT_STAT_POWER;
  1526. max3421_gpout_set_value(hcd, pdata->vbus_gpout, 1);
  1527. break;
  1528. case USB_PORT_FEAT_RESET:
  1529. max3421_reset_port(hcd);
  1530. /* FALLS THROUGH */
  1531. default:
  1532. if ((max3421_hcd->port_status & USB_PORT_STAT_POWER)
  1533. != 0)
  1534. max3421_hcd->port_status |= (1 << value);
  1535. }
  1536. break;
  1537. default:
  1538. dev_dbg(hcd->self.controller,
  1539. "hub control req%04x v%04x i%04x l%d\n",
  1540. type_req, value, index, length);
  1541. error: /* "protocol stall" on error */
  1542. retval = -EPIPE;
  1543. }
  1544. spin_unlock_irqrestore(&max3421_hcd->lock, flags);
  1545. return retval;
  1546. }
  1547. static int
  1548. max3421_bus_suspend(struct usb_hcd *hcd)
  1549. {
  1550. return -1;
  1551. }
  1552. static int
  1553. max3421_bus_resume(struct usb_hcd *hcd)
  1554. {
  1555. return -1;
  1556. }
  1557. /*
  1558. * The SPI driver already takes care of DMA-mapping/unmapping, so no
  1559. * reason to do it twice.
  1560. */
  1561. static int
  1562. max3421_map_urb_for_dma(struct usb_hcd *hcd, struct urb *urb, gfp_t mem_flags)
  1563. {
  1564. return 0;
  1565. }
  1566. static void
  1567. max3421_unmap_urb_for_dma(struct usb_hcd *hcd, struct urb *urb)
  1568. {
  1569. }
  1570. static struct hc_driver max3421_hcd_desc = {
  1571. .description = "max3421",
  1572. .product_desc = DRIVER_DESC,
  1573. .hcd_priv_size = sizeof(struct max3421_hcd),
  1574. .flags = HCD_USB11,
  1575. .reset = max3421_reset,
  1576. .start = max3421_start,
  1577. .stop = max3421_stop,
  1578. .get_frame_number = max3421_get_frame_number,
  1579. .urb_enqueue = max3421_urb_enqueue,
  1580. .urb_dequeue = max3421_urb_dequeue,
  1581. .map_urb_for_dma = max3421_map_urb_for_dma,
  1582. .unmap_urb_for_dma = max3421_unmap_urb_for_dma,
  1583. .endpoint_disable = max3421_endpoint_disable,
  1584. .hub_status_data = max3421_hub_status_data,
  1585. .hub_control = max3421_hub_control,
  1586. .bus_suspend = max3421_bus_suspend,
  1587. .bus_resume = max3421_bus_resume,
  1588. };
  1589. static int
  1590. max3421_probe(struct spi_device *spi)
  1591. {
  1592. struct max3421_hcd *max3421_hcd;
  1593. struct usb_hcd *hcd;
  1594. int retval;
  1595. if (spi_setup(spi) < 0) {
  1596. dev_err(&spi->dev, "Unable to setup SPI bus");
  1597. return -EFAULT;
  1598. }
  1599. hcd = usb_create_hcd(&max3421_hcd_desc, &spi->dev,
  1600. dev_name(&spi->dev));
  1601. if (!hcd) {
  1602. dev_err(&spi->dev, "failed to create HCD structure\n");
  1603. return -ENOMEM;
  1604. }
  1605. set_bit(HCD_FLAG_POLL_RH, &hcd->flags);
  1606. max3421_hcd = hcd_to_max3421(hcd);
  1607. max3421_hcd->next = max3421_hcd_list;
  1608. max3421_hcd_list = max3421_hcd;
  1609. INIT_LIST_HEAD(&max3421_hcd->ep_list);
  1610. max3421_hcd->spi_thread = kthread_run(max3421_spi_thread, hcd,
  1611. "max3421_spi_thread");
  1612. if (max3421_hcd->spi_thread == ERR_PTR(-ENOMEM)) {
  1613. dev_err(&spi->dev,
  1614. "failed to create SPI thread (out of memory)\n");
  1615. return -ENOMEM;
  1616. }
  1617. retval = usb_add_hcd(hcd, 0, 0);
  1618. if (retval) {
  1619. dev_err(&spi->dev, "failed to add HCD\n");
  1620. usb_put_hcd(hcd);
  1621. return retval;
  1622. }
  1623. retval = request_irq(spi->irq, max3421_irq_handler,
  1624. IRQF_TRIGGER_LOW, "max3421", hcd);
  1625. if (retval < 0) {
  1626. usb_put_hcd(hcd);
  1627. dev_err(&spi->dev, "failed to request irq %d\n", spi->irq);
  1628. return retval;
  1629. }
  1630. return 0;
  1631. }
  1632. static int
  1633. max3421_remove(struct spi_device *spi)
  1634. {
  1635. struct max3421_hcd *max3421_hcd = NULL, **prev;
  1636. struct usb_hcd *hcd = NULL;
  1637. unsigned long flags;
  1638. for (prev = &max3421_hcd_list; *prev; prev = &(*prev)->next) {
  1639. max3421_hcd = *prev;
  1640. hcd = max3421_to_hcd(max3421_hcd);
  1641. if (hcd->self.controller == &spi->dev)
  1642. break;
  1643. }
  1644. if (!max3421_hcd) {
  1645. dev_err(&spi->dev, "no MAX3421 HCD found for SPI device %p\n",
  1646. spi);
  1647. return -ENODEV;
  1648. }
  1649. usb_remove_hcd(hcd);
  1650. spin_lock_irqsave(&max3421_hcd->lock, flags);
  1651. kthread_stop(max3421_hcd->spi_thread);
  1652. *prev = max3421_hcd->next;
  1653. spin_unlock_irqrestore(&max3421_hcd->lock, flags);
  1654. free_irq(spi->irq, hcd);
  1655. usb_put_hcd(hcd);
  1656. return 0;
  1657. }
  1658. static struct spi_driver max3421_driver = {
  1659. .probe = max3421_probe,
  1660. .remove = max3421_remove,
  1661. .driver = {
  1662. .name = "max3421-hcd",
  1663. .owner = THIS_MODULE,
  1664. },
  1665. };
  1666. static int __init
  1667. max3421_mod_init(void)
  1668. {
  1669. return spi_register_driver(&max3421_driver);
  1670. }
  1671. static void __exit
  1672. max3421_mod_exit(void)
  1673. {
  1674. spi_unregister_driver(&max3421_driver);
  1675. }
  1676. module_init(max3421_mod_init);
  1677. module_exit(max3421_mod_exit);
  1678. MODULE_DESCRIPTION(DRIVER_DESC);
  1679. MODULE_AUTHOR("David Mosberger <davidm@egauge.net>");
  1680. MODULE_LICENSE("GPL");