vmwgfx_execbuf.c 72 KB

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  1. /**************************************************************************
  2. *
  3. * Copyright © 2009 VMware, Inc., Palo Alto, CA., USA
  4. * All Rights Reserved.
  5. *
  6. * Permission is hereby granted, free of charge, to any person obtaining a
  7. * copy of this software and associated documentation files (the
  8. * "Software"), to deal in the Software without restriction, including
  9. * without limitation the rights to use, copy, modify, merge, publish,
  10. * distribute, sub license, and/or sell copies of the Software, and to
  11. * permit persons to whom the Software is furnished to do so, subject to
  12. * the following conditions:
  13. *
  14. * The above copyright notice and this permission notice (including the
  15. * next paragraph) shall be included in all copies or substantial portions
  16. * of the Software.
  17. *
  18. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  19. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  20. * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  21. * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
  22. * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  23. * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  24. * USE OR OTHER DEALINGS IN THE SOFTWARE.
  25. *
  26. **************************************************************************/
  27. #include "vmwgfx_drv.h"
  28. #include "vmwgfx_reg.h"
  29. #include <drm/ttm/ttm_bo_api.h>
  30. #include <drm/ttm/ttm_placement.h>
  31. #define VMW_RES_HT_ORDER 12
  32. /**
  33. * struct vmw_resource_relocation - Relocation info for resources
  34. *
  35. * @head: List head for the software context's relocation list.
  36. * @res: Non-ref-counted pointer to the resource.
  37. * @offset: Offset of 4 byte entries into the command buffer where the
  38. * id that needs fixup is located.
  39. */
  40. struct vmw_resource_relocation {
  41. struct list_head head;
  42. const struct vmw_resource *res;
  43. unsigned long offset;
  44. };
  45. /**
  46. * struct vmw_resource_val_node - Validation info for resources
  47. *
  48. * @head: List head for the software context's resource list.
  49. * @hash: Hash entry for quick resouce to val_node lookup.
  50. * @res: Ref-counted pointer to the resource.
  51. * @switch_backup: Boolean whether to switch backup buffer on unreserve.
  52. * @new_backup: Refcounted pointer to the new backup buffer.
  53. * @staged_bindings: If @res is a context, tracks bindings set up during
  54. * the command batch. Otherwise NULL.
  55. * @new_backup_offset: New backup buffer offset if @new_backup is non-NUll.
  56. * @first_usage: Set to true the first time the resource is referenced in
  57. * the command stream.
  58. * @no_buffer_needed: Resources do not need to allocate buffer backup on
  59. * reservation. The command stream will provide one.
  60. */
  61. struct vmw_resource_val_node {
  62. struct list_head head;
  63. struct drm_hash_item hash;
  64. struct vmw_resource *res;
  65. struct vmw_dma_buffer *new_backup;
  66. struct vmw_ctx_binding_state *staged_bindings;
  67. unsigned long new_backup_offset;
  68. bool first_usage;
  69. bool no_buffer_needed;
  70. };
  71. /**
  72. * struct vmw_cmd_entry - Describe a command for the verifier
  73. *
  74. * @user_allow: Whether allowed from the execbuf ioctl.
  75. * @gb_disable: Whether disabled if guest-backed objects are available.
  76. * @gb_enable: Whether enabled iff guest-backed objects are available.
  77. */
  78. struct vmw_cmd_entry {
  79. int (*func) (struct vmw_private *, struct vmw_sw_context *,
  80. SVGA3dCmdHeader *);
  81. bool user_allow;
  82. bool gb_disable;
  83. bool gb_enable;
  84. };
  85. #define VMW_CMD_DEF(_cmd, _func, _user_allow, _gb_disable, _gb_enable) \
  86. [(_cmd) - SVGA_3D_CMD_BASE] = {(_func), (_user_allow),\
  87. (_gb_disable), (_gb_enable)}
  88. /**
  89. * vmw_resource_unreserve - unreserve resources previously reserved for
  90. * command submission.
  91. *
  92. * @list_head: list of resources to unreserve.
  93. * @backoff: Whether command submission failed.
  94. */
  95. static void vmw_resource_list_unreserve(struct list_head *list,
  96. bool backoff)
  97. {
  98. struct vmw_resource_val_node *val;
  99. list_for_each_entry(val, list, head) {
  100. struct vmw_resource *res = val->res;
  101. struct vmw_dma_buffer *new_backup =
  102. backoff ? NULL : val->new_backup;
  103. /*
  104. * Transfer staged context bindings to the
  105. * persistent context binding tracker.
  106. */
  107. if (unlikely(val->staged_bindings)) {
  108. vmw_context_binding_state_transfer
  109. (val->res, val->staged_bindings);
  110. kfree(val->staged_bindings);
  111. val->staged_bindings = NULL;
  112. }
  113. vmw_resource_unreserve(res, new_backup,
  114. val->new_backup_offset);
  115. vmw_dmabuf_unreference(&val->new_backup);
  116. }
  117. }
  118. /**
  119. * vmw_resource_val_add - Add a resource to the software context's
  120. * resource list if it's not already on it.
  121. *
  122. * @sw_context: Pointer to the software context.
  123. * @res: Pointer to the resource.
  124. * @p_node On successful return points to a valid pointer to a
  125. * struct vmw_resource_val_node, if non-NULL on entry.
  126. */
  127. static int vmw_resource_val_add(struct vmw_sw_context *sw_context,
  128. struct vmw_resource *res,
  129. struct vmw_resource_val_node **p_node)
  130. {
  131. struct vmw_resource_val_node *node;
  132. struct drm_hash_item *hash;
  133. int ret;
  134. if (likely(drm_ht_find_item(&sw_context->res_ht, (unsigned long) res,
  135. &hash) == 0)) {
  136. node = container_of(hash, struct vmw_resource_val_node, hash);
  137. node->first_usage = false;
  138. if (unlikely(p_node != NULL))
  139. *p_node = node;
  140. return 0;
  141. }
  142. node = kzalloc(sizeof(*node), GFP_KERNEL);
  143. if (unlikely(node == NULL)) {
  144. DRM_ERROR("Failed to allocate a resource validation "
  145. "entry.\n");
  146. return -ENOMEM;
  147. }
  148. node->hash.key = (unsigned long) res;
  149. ret = drm_ht_insert_item(&sw_context->res_ht, &node->hash);
  150. if (unlikely(ret != 0)) {
  151. DRM_ERROR("Failed to initialize a resource validation "
  152. "entry.\n");
  153. kfree(node);
  154. return ret;
  155. }
  156. list_add_tail(&node->head, &sw_context->resource_list);
  157. node->res = vmw_resource_reference(res);
  158. node->first_usage = true;
  159. if (unlikely(p_node != NULL))
  160. *p_node = node;
  161. return 0;
  162. }
  163. /**
  164. * vmw_resource_relocation_add - Add a relocation to the relocation list
  165. *
  166. * @list: Pointer to head of relocation list.
  167. * @res: The resource.
  168. * @offset: Offset into the command buffer currently being parsed where the
  169. * id that needs fixup is located. Granularity is 4 bytes.
  170. */
  171. static int vmw_resource_relocation_add(struct list_head *list,
  172. const struct vmw_resource *res,
  173. unsigned long offset)
  174. {
  175. struct vmw_resource_relocation *rel;
  176. rel = kmalloc(sizeof(*rel), GFP_KERNEL);
  177. if (unlikely(rel == NULL)) {
  178. DRM_ERROR("Failed to allocate a resource relocation.\n");
  179. return -ENOMEM;
  180. }
  181. rel->res = res;
  182. rel->offset = offset;
  183. list_add_tail(&rel->head, list);
  184. return 0;
  185. }
  186. /**
  187. * vmw_resource_relocations_free - Free all relocations on a list
  188. *
  189. * @list: Pointer to the head of the relocation list.
  190. */
  191. static void vmw_resource_relocations_free(struct list_head *list)
  192. {
  193. struct vmw_resource_relocation *rel, *n;
  194. list_for_each_entry_safe(rel, n, list, head) {
  195. list_del(&rel->head);
  196. kfree(rel);
  197. }
  198. }
  199. /**
  200. * vmw_resource_relocations_apply - Apply all relocations on a list
  201. *
  202. * @cb: Pointer to the start of the command buffer bein patch. This need
  203. * not be the same buffer as the one being parsed when the relocation
  204. * list was built, but the contents must be the same modulo the
  205. * resource ids.
  206. * @list: Pointer to the head of the relocation list.
  207. */
  208. static void vmw_resource_relocations_apply(uint32_t *cb,
  209. struct list_head *list)
  210. {
  211. struct vmw_resource_relocation *rel;
  212. list_for_each_entry(rel, list, head)
  213. cb[rel->offset] = rel->res->id;
  214. }
  215. static int vmw_cmd_invalid(struct vmw_private *dev_priv,
  216. struct vmw_sw_context *sw_context,
  217. SVGA3dCmdHeader *header)
  218. {
  219. return capable(CAP_SYS_ADMIN) ? : -EINVAL;
  220. }
  221. static int vmw_cmd_ok(struct vmw_private *dev_priv,
  222. struct vmw_sw_context *sw_context,
  223. SVGA3dCmdHeader *header)
  224. {
  225. return 0;
  226. }
  227. /**
  228. * vmw_bo_to_validate_list - add a bo to a validate list
  229. *
  230. * @sw_context: The software context used for this command submission batch.
  231. * @bo: The buffer object to add.
  232. * @validate_as_mob: Validate this buffer as a MOB.
  233. * @p_val_node: If non-NULL Will be updated with the validate node number
  234. * on return.
  235. *
  236. * Returns -EINVAL if the limit of number of buffer objects per command
  237. * submission is reached.
  238. */
  239. static int vmw_bo_to_validate_list(struct vmw_sw_context *sw_context,
  240. struct ttm_buffer_object *bo,
  241. bool validate_as_mob,
  242. uint32_t *p_val_node)
  243. {
  244. uint32_t val_node;
  245. struct vmw_validate_buffer *vval_buf;
  246. struct ttm_validate_buffer *val_buf;
  247. struct drm_hash_item *hash;
  248. int ret;
  249. if (likely(drm_ht_find_item(&sw_context->res_ht, (unsigned long) bo,
  250. &hash) == 0)) {
  251. vval_buf = container_of(hash, struct vmw_validate_buffer,
  252. hash);
  253. if (unlikely(vval_buf->validate_as_mob != validate_as_mob)) {
  254. DRM_ERROR("Inconsistent buffer usage.\n");
  255. return -EINVAL;
  256. }
  257. val_buf = &vval_buf->base;
  258. val_node = vval_buf - sw_context->val_bufs;
  259. } else {
  260. val_node = sw_context->cur_val_buf;
  261. if (unlikely(val_node >= VMWGFX_MAX_VALIDATIONS)) {
  262. DRM_ERROR("Max number of DMA buffers per submission "
  263. "exceeded.\n");
  264. return -EINVAL;
  265. }
  266. vval_buf = &sw_context->val_bufs[val_node];
  267. vval_buf->hash.key = (unsigned long) bo;
  268. ret = drm_ht_insert_item(&sw_context->res_ht, &vval_buf->hash);
  269. if (unlikely(ret != 0)) {
  270. DRM_ERROR("Failed to initialize a buffer validation "
  271. "entry.\n");
  272. return ret;
  273. }
  274. ++sw_context->cur_val_buf;
  275. val_buf = &vval_buf->base;
  276. val_buf->bo = ttm_bo_reference(bo);
  277. val_buf->reserved = false;
  278. list_add_tail(&val_buf->head, &sw_context->validate_nodes);
  279. vval_buf->validate_as_mob = validate_as_mob;
  280. }
  281. sw_context->fence_flags |= DRM_VMW_FENCE_FLAG_EXEC;
  282. if (p_val_node)
  283. *p_val_node = val_node;
  284. return 0;
  285. }
  286. /**
  287. * vmw_resources_reserve - Reserve all resources on the sw_context's
  288. * resource list.
  289. *
  290. * @sw_context: Pointer to the software context.
  291. *
  292. * Note that since vmware's command submission currently is protected by
  293. * the cmdbuf mutex, no fancy deadlock avoidance is required for resources,
  294. * since only a single thread at once will attempt this.
  295. */
  296. static int vmw_resources_reserve(struct vmw_sw_context *sw_context)
  297. {
  298. struct vmw_resource_val_node *val;
  299. int ret;
  300. list_for_each_entry(val, &sw_context->resource_list, head) {
  301. struct vmw_resource *res = val->res;
  302. ret = vmw_resource_reserve(res, val->no_buffer_needed);
  303. if (unlikely(ret != 0))
  304. return ret;
  305. if (res->backup) {
  306. struct ttm_buffer_object *bo = &res->backup->base;
  307. ret = vmw_bo_to_validate_list
  308. (sw_context, bo,
  309. vmw_resource_needs_backup(res), NULL);
  310. if (unlikely(ret != 0))
  311. return ret;
  312. }
  313. }
  314. return 0;
  315. }
  316. /**
  317. * vmw_resources_validate - Validate all resources on the sw_context's
  318. * resource list.
  319. *
  320. * @sw_context: Pointer to the software context.
  321. *
  322. * Before this function is called, all resource backup buffers must have
  323. * been validated.
  324. */
  325. static int vmw_resources_validate(struct vmw_sw_context *sw_context)
  326. {
  327. struct vmw_resource_val_node *val;
  328. int ret;
  329. list_for_each_entry(val, &sw_context->resource_list, head) {
  330. struct vmw_resource *res = val->res;
  331. ret = vmw_resource_validate(res);
  332. if (unlikely(ret != 0)) {
  333. if (ret != -ERESTARTSYS)
  334. DRM_ERROR("Failed to validate resource.\n");
  335. return ret;
  336. }
  337. }
  338. return 0;
  339. }
  340. /**
  341. * vmw_cmd_res_check - Check that a resource is present and if so, put it
  342. * on the resource validate list unless it's already there.
  343. *
  344. * @dev_priv: Pointer to a device private structure.
  345. * @sw_context: Pointer to the software context.
  346. * @res_type: Resource type.
  347. * @converter: User-space visisble type specific information.
  348. * @id: Pointer to the location in the command buffer currently being
  349. * parsed from where the user-space resource id handle is located.
  350. */
  351. static int vmw_cmd_res_check(struct vmw_private *dev_priv,
  352. struct vmw_sw_context *sw_context,
  353. enum vmw_res_type res_type,
  354. const struct vmw_user_resource_conv *converter,
  355. uint32_t *id,
  356. struct vmw_resource_val_node **p_val)
  357. {
  358. struct vmw_res_cache_entry *rcache =
  359. &sw_context->res_cache[res_type];
  360. struct vmw_resource *res;
  361. struct vmw_resource_val_node *node;
  362. int ret;
  363. if (*id == SVGA3D_INVALID_ID) {
  364. if (p_val)
  365. *p_val = NULL;
  366. if (res_type == vmw_res_context) {
  367. DRM_ERROR("Illegal context invalid id.\n");
  368. return -EINVAL;
  369. }
  370. return 0;
  371. }
  372. /*
  373. * Fastpath in case of repeated commands referencing the same
  374. * resource
  375. */
  376. if (likely(rcache->valid && *id == rcache->handle)) {
  377. const struct vmw_resource *res = rcache->res;
  378. rcache->node->first_usage = false;
  379. if (p_val)
  380. *p_val = rcache->node;
  381. return vmw_resource_relocation_add
  382. (&sw_context->res_relocations, res,
  383. id - sw_context->buf_start);
  384. }
  385. ret = vmw_user_resource_lookup_handle(dev_priv,
  386. sw_context->tfile,
  387. *id,
  388. converter,
  389. &res);
  390. if (unlikely(ret != 0)) {
  391. DRM_ERROR("Could not find or use resource 0x%08x.\n",
  392. (unsigned) *id);
  393. dump_stack();
  394. return ret;
  395. }
  396. rcache->valid = true;
  397. rcache->res = res;
  398. rcache->handle = *id;
  399. ret = vmw_resource_relocation_add(&sw_context->res_relocations,
  400. res,
  401. id - sw_context->buf_start);
  402. if (unlikely(ret != 0))
  403. goto out_no_reloc;
  404. ret = vmw_resource_val_add(sw_context, res, &node);
  405. if (unlikely(ret != 0))
  406. goto out_no_reloc;
  407. rcache->node = node;
  408. if (p_val)
  409. *p_val = node;
  410. if (node->first_usage && res_type == vmw_res_context) {
  411. node->staged_bindings =
  412. kzalloc(sizeof(*node->staged_bindings), GFP_KERNEL);
  413. if (node->staged_bindings == NULL) {
  414. DRM_ERROR("Failed to allocate context binding "
  415. "information.\n");
  416. goto out_no_reloc;
  417. }
  418. INIT_LIST_HEAD(&node->staged_bindings->list);
  419. }
  420. vmw_resource_unreference(&res);
  421. return 0;
  422. out_no_reloc:
  423. BUG_ON(sw_context->error_resource != NULL);
  424. sw_context->error_resource = res;
  425. return ret;
  426. }
  427. /**
  428. * vmw_cmd_cid_check - Check a command header for valid context information.
  429. *
  430. * @dev_priv: Pointer to a device private structure.
  431. * @sw_context: Pointer to the software context.
  432. * @header: A command header with an embedded user-space context handle.
  433. *
  434. * Convenience function: Call vmw_cmd_res_check with the user-space context
  435. * handle embedded in @header.
  436. */
  437. static int vmw_cmd_cid_check(struct vmw_private *dev_priv,
  438. struct vmw_sw_context *sw_context,
  439. SVGA3dCmdHeader *header)
  440. {
  441. struct vmw_cid_cmd {
  442. SVGA3dCmdHeader header;
  443. __le32 cid;
  444. } *cmd;
  445. cmd = container_of(header, struct vmw_cid_cmd, header);
  446. return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_context,
  447. user_context_converter, &cmd->cid, NULL);
  448. }
  449. static int vmw_cmd_set_render_target_check(struct vmw_private *dev_priv,
  450. struct vmw_sw_context *sw_context,
  451. SVGA3dCmdHeader *header)
  452. {
  453. struct vmw_sid_cmd {
  454. SVGA3dCmdHeader header;
  455. SVGA3dCmdSetRenderTarget body;
  456. } *cmd;
  457. struct vmw_resource_val_node *ctx_node;
  458. struct vmw_resource_val_node *res_node;
  459. int ret;
  460. cmd = container_of(header, struct vmw_sid_cmd, header);
  461. ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_context,
  462. user_context_converter, &cmd->body.cid,
  463. &ctx_node);
  464. if (unlikely(ret != 0))
  465. return ret;
  466. ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  467. user_surface_converter,
  468. &cmd->body.target.sid, &res_node);
  469. if (unlikely(ret != 0))
  470. return ret;
  471. if (dev_priv->has_mob) {
  472. struct vmw_ctx_bindinfo bi;
  473. bi.ctx = ctx_node->res;
  474. bi.res = res_node ? res_node->res : NULL;
  475. bi.bt = vmw_ctx_binding_rt;
  476. bi.i1.rt_type = cmd->body.type;
  477. return vmw_context_binding_add(ctx_node->staged_bindings, &bi);
  478. }
  479. return 0;
  480. }
  481. static int vmw_cmd_surface_copy_check(struct vmw_private *dev_priv,
  482. struct vmw_sw_context *sw_context,
  483. SVGA3dCmdHeader *header)
  484. {
  485. struct vmw_sid_cmd {
  486. SVGA3dCmdHeader header;
  487. SVGA3dCmdSurfaceCopy body;
  488. } *cmd;
  489. int ret;
  490. cmd = container_of(header, struct vmw_sid_cmd, header);
  491. ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  492. user_surface_converter,
  493. &cmd->body.src.sid, NULL);
  494. if (unlikely(ret != 0))
  495. return ret;
  496. return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  497. user_surface_converter,
  498. &cmd->body.dest.sid, NULL);
  499. }
  500. static int vmw_cmd_stretch_blt_check(struct vmw_private *dev_priv,
  501. struct vmw_sw_context *sw_context,
  502. SVGA3dCmdHeader *header)
  503. {
  504. struct vmw_sid_cmd {
  505. SVGA3dCmdHeader header;
  506. SVGA3dCmdSurfaceStretchBlt body;
  507. } *cmd;
  508. int ret;
  509. cmd = container_of(header, struct vmw_sid_cmd, header);
  510. ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  511. user_surface_converter,
  512. &cmd->body.src.sid, NULL);
  513. if (unlikely(ret != 0))
  514. return ret;
  515. return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  516. user_surface_converter,
  517. &cmd->body.dest.sid, NULL);
  518. }
  519. static int vmw_cmd_blt_surf_screen_check(struct vmw_private *dev_priv,
  520. struct vmw_sw_context *sw_context,
  521. SVGA3dCmdHeader *header)
  522. {
  523. struct vmw_sid_cmd {
  524. SVGA3dCmdHeader header;
  525. SVGA3dCmdBlitSurfaceToScreen body;
  526. } *cmd;
  527. cmd = container_of(header, struct vmw_sid_cmd, header);
  528. return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  529. user_surface_converter,
  530. &cmd->body.srcImage.sid, NULL);
  531. }
  532. static int vmw_cmd_present_check(struct vmw_private *dev_priv,
  533. struct vmw_sw_context *sw_context,
  534. SVGA3dCmdHeader *header)
  535. {
  536. struct vmw_sid_cmd {
  537. SVGA3dCmdHeader header;
  538. SVGA3dCmdPresent body;
  539. } *cmd;
  540. cmd = container_of(header, struct vmw_sid_cmd, header);
  541. return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  542. user_surface_converter, &cmd->body.sid,
  543. NULL);
  544. }
  545. /**
  546. * vmw_query_bo_switch_prepare - Prepare to switch pinned buffer for queries.
  547. *
  548. * @dev_priv: The device private structure.
  549. * @new_query_bo: The new buffer holding query results.
  550. * @sw_context: The software context used for this command submission.
  551. *
  552. * This function checks whether @new_query_bo is suitable for holding
  553. * query results, and if another buffer currently is pinned for query
  554. * results. If so, the function prepares the state of @sw_context for
  555. * switching pinned buffers after successful submission of the current
  556. * command batch.
  557. */
  558. static int vmw_query_bo_switch_prepare(struct vmw_private *dev_priv,
  559. struct ttm_buffer_object *new_query_bo,
  560. struct vmw_sw_context *sw_context)
  561. {
  562. struct vmw_res_cache_entry *ctx_entry =
  563. &sw_context->res_cache[vmw_res_context];
  564. int ret;
  565. BUG_ON(!ctx_entry->valid);
  566. sw_context->last_query_ctx = ctx_entry->res;
  567. if (unlikely(new_query_bo != sw_context->cur_query_bo)) {
  568. if (unlikely(new_query_bo->num_pages > 4)) {
  569. DRM_ERROR("Query buffer too large.\n");
  570. return -EINVAL;
  571. }
  572. if (unlikely(sw_context->cur_query_bo != NULL)) {
  573. sw_context->needs_post_query_barrier = true;
  574. ret = vmw_bo_to_validate_list(sw_context,
  575. sw_context->cur_query_bo,
  576. dev_priv->has_mob, NULL);
  577. if (unlikely(ret != 0))
  578. return ret;
  579. }
  580. sw_context->cur_query_bo = new_query_bo;
  581. ret = vmw_bo_to_validate_list(sw_context,
  582. dev_priv->dummy_query_bo,
  583. dev_priv->has_mob, NULL);
  584. if (unlikely(ret != 0))
  585. return ret;
  586. }
  587. return 0;
  588. }
  589. /**
  590. * vmw_query_bo_switch_commit - Finalize switching pinned query buffer
  591. *
  592. * @dev_priv: The device private structure.
  593. * @sw_context: The software context used for this command submission batch.
  594. *
  595. * This function will check if we're switching query buffers, and will then,
  596. * issue a dummy occlusion query wait used as a query barrier. When the fence
  597. * object following that query wait has signaled, we are sure that all
  598. * preceding queries have finished, and the old query buffer can be unpinned.
  599. * However, since both the new query buffer and the old one are fenced with
  600. * that fence, we can do an asynchronus unpin now, and be sure that the
  601. * old query buffer won't be moved until the fence has signaled.
  602. *
  603. * As mentioned above, both the new - and old query buffers need to be fenced
  604. * using a sequence emitted *after* calling this function.
  605. */
  606. static void vmw_query_bo_switch_commit(struct vmw_private *dev_priv,
  607. struct vmw_sw_context *sw_context)
  608. {
  609. /*
  610. * The validate list should still hold references to all
  611. * contexts here.
  612. */
  613. if (sw_context->needs_post_query_barrier) {
  614. struct vmw_res_cache_entry *ctx_entry =
  615. &sw_context->res_cache[vmw_res_context];
  616. struct vmw_resource *ctx;
  617. int ret;
  618. BUG_ON(!ctx_entry->valid);
  619. ctx = ctx_entry->res;
  620. ret = vmw_fifo_emit_dummy_query(dev_priv, ctx->id);
  621. if (unlikely(ret != 0))
  622. DRM_ERROR("Out of fifo space for dummy query.\n");
  623. }
  624. if (dev_priv->pinned_bo != sw_context->cur_query_bo) {
  625. if (dev_priv->pinned_bo) {
  626. vmw_bo_pin(dev_priv->pinned_bo, false);
  627. ttm_bo_unref(&dev_priv->pinned_bo);
  628. }
  629. if (!sw_context->needs_post_query_barrier) {
  630. vmw_bo_pin(sw_context->cur_query_bo, true);
  631. /*
  632. * We pin also the dummy_query_bo buffer so that we
  633. * don't need to validate it when emitting
  634. * dummy queries in context destroy paths.
  635. */
  636. vmw_bo_pin(dev_priv->dummy_query_bo, true);
  637. dev_priv->dummy_query_bo_pinned = true;
  638. BUG_ON(sw_context->last_query_ctx == NULL);
  639. dev_priv->query_cid = sw_context->last_query_ctx->id;
  640. dev_priv->query_cid_valid = true;
  641. dev_priv->pinned_bo =
  642. ttm_bo_reference(sw_context->cur_query_bo);
  643. }
  644. }
  645. }
  646. /**
  647. * vmw_translate_mob_pointer - Prepare to translate a user-space buffer
  648. * handle to a MOB id.
  649. *
  650. * @dev_priv: Pointer to a device private structure.
  651. * @sw_context: The software context used for this command batch validation.
  652. * @id: Pointer to the user-space handle to be translated.
  653. * @vmw_bo_p: Points to a location that, on successful return will carry
  654. * a reference-counted pointer to the DMA buffer identified by the
  655. * user-space handle in @id.
  656. *
  657. * This function saves information needed to translate a user-space buffer
  658. * handle to a MOB id. The translation does not take place immediately, but
  659. * during a call to vmw_apply_relocations(). This function builds a relocation
  660. * list and a list of buffers to validate. The former needs to be freed using
  661. * either vmw_apply_relocations() or vmw_free_relocations(). The latter
  662. * needs to be freed using vmw_clear_validations.
  663. */
  664. static int vmw_translate_mob_ptr(struct vmw_private *dev_priv,
  665. struct vmw_sw_context *sw_context,
  666. SVGAMobId *id,
  667. struct vmw_dma_buffer **vmw_bo_p)
  668. {
  669. struct vmw_dma_buffer *vmw_bo = NULL;
  670. struct ttm_buffer_object *bo;
  671. uint32_t handle = *id;
  672. struct vmw_relocation *reloc;
  673. int ret;
  674. ret = vmw_user_dmabuf_lookup(sw_context->tfile, handle, &vmw_bo);
  675. if (unlikely(ret != 0)) {
  676. DRM_ERROR("Could not find or use MOB buffer.\n");
  677. return -EINVAL;
  678. }
  679. bo = &vmw_bo->base;
  680. if (unlikely(sw_context->cur_reloc >= VMWGFX_MAX_RELOCATIONS)) {
  681. DRM_ERROR("Max number relocations per submission"
  682. " exceeded\n");
  683. ret = -EINVAL;
  684. goto out_no_reloc;
  685. }
  686. reloc = &sw_context->relocs[sw_context->cur_reloc++];
  687. reloc->mob_loc = id;
  688. reloc->location = NULL;
  689. ret = vmw_bo_to_validate_list(sw_context, bo, true, &reloc->index);
  690. if (unlikely(ret != 0))
  691. goto out_no_reloc;
  692. *vmw_bo_p = vmw_bo;
  693. return 0;
  694. out_no_reloc:
  695. vmw_dmabuf_unreference(&vmw_bo);
  696. vmw_bo_p = NULL;
  697. return ret;
  698. }
  699. /**
  700. * vmw_translate_guest_pointer - Prepare to translate a user-space buffer
  701. * handle to a valid SVGAGuestPtr
  702. *
  703. * @dev_priv: Pointer to a device private structure.
  704. * @sw_context: The software context used for this command batch validation.
  705. * @ptr: Pointer to the user-space handle to be translated.
  706. * @vmw_bo_p: Points to a location that, on successful return will carry
  707. * a reference-counted pointer to the DMA buffer identified by the
  708. * user-space handle in @id.
  709. *
  710. * This function saves information needed to translate a user-space buffer
  711. * handle to a valid SVGAGuestPtr. The translation does not take place
  712. * immediately, but during a call to vmw_apply_relocations().
  713. * This function builds a relocation list and a list of buffers to validate.
  714. * The former needs to be freed using either vmw_apply_relocations() or
  715. * vmw_free_relocations(). The latter needs to be freed using
  716. * vmw_clear_validations.
  717. */
  718. static int vmw_translate_guest_ptr(struct vmw_private *dev_priv,
  719. struct vmw_sw_context *sw_context,
  720. SVGAGuestPtr *ptr,
  721. struct vmw_dma_buffer **vmw_bo_p)
  722. {
  723. struct vmw_dma_buffer *vmw_bo = NULL;
  724. struct ttm_buffer_object *bo;
  725. uint32_t handle = ptr->gmrId;
  726. struct vmw_relocation *reloc;
  727. int ret;
  728. ret = vmw_user_dmabuf_lookup(sw_context->tfile, handle, &vmw_bo);
  729. if (unlikely(ret != 0)) {
  730. DRM_ERROR("Could not find or use GMR region.\n");
  731. return -EINVAL;
  732. }
  733. bo = &vmw_bo->base;
  734. if (unlikely(sw_context->cur_reloc >= VMWGFX_MAX_RELOCATIONS)) {
  735. DRM_ERROR("Max number relocations per submission"
  736. " exceeded\n");
  737. ret = -EINVAL;
  738. goto out_no_reloc;
  739. }
  740. reloc = &sw_context->relocs[sw_context->cur_reloc++];
  741. reloc->location = ptr;
  742. ret = vmw_bo_to_validate_list(sw_context, bo, false, &reloc->index);
  743. if (unlikely(ret != 0))
  744. goto out_no_reloc;
  745. *vmw_bo_p = vmw_bo;
  746. return 0;
  747. out_no_reloc:
  748. vmw_dmabuf_unreference(&vmw_bo);
  749. vmw_bo_p = NULL;
  750. return ret;
  751. }
  752. /**
  753. * vmw_cmd_begin_gb_query - validate a SVGA_3D_CMD_BEGIN_GB_QUERY command.
  754. *
  755. * @dev_priv: Pointer to a device private struct.
  756. * @sw_context: The software context used for this command submission.
  757. * @header: Pointer to the command header in the command stream.
  758. */
  759. static int vmw_cmd_begin_gb_query(struct vmw_private *dev_priv,
  760. struct vmw_sw_context *sw_context,
  761. SVGA3dCmdHeader *header)
  762. {
  763. struct vmw_begin_gb_query_cmd {
  764. SVGA3dCmdHeader header;
  765. SVGA3dCmdBeginGBQuery q;
  766. } *cmd;
  767. cmd = container_of(header, struct vmw_begin_gb_query_cmd,
  768. header);
  769. return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_context,
  770. user_context_converter, &cmd->q.cid,
  771. NULL);
  772. }
  773. /**
  774. * vmw_cmd_begin_query - validate a SVGA_3D_CMD_BEGIN_QUERY command.
  775. *
  776. * @dev_priv: Pointer to a device private struct.
  777. * @sw_context: The software context used for this command submission.
  778. * @header: Pointer to the command header in the command stream.
  779. */
  780. static int vmw_cmd_begin_query(struct vmw_private *dev_priv,
  781. struct vmw_sw_context *sw_context,
  782. SVGA3dCmdHeader *header)
  783. {
  784. struct vmw_begin_query_cmd {
  785. SVGA3dCmdHeader header;
  786. SVGA3dCmdBeginQuery q;
  787. } *cmd;
  788. cmd = container_of(header, struct vmw_begin_query_cmd,
  789. header);
  790. if (unlikely(dev_priv->has_mob)) {
  791. struct {
  792. SVGA3dCmdHeader header;
  793. SVGA3dCmdBeginGBQuery q;
  794. } gb_cmd;
  795. BUG_ON(sizeof(gb_cmd) != sizeof(*cmd));
  796. gb_cmd.header.id = SVGA_3D_CMD_BEGIN_GB_QUERY;
  797. gb_cmd.header.size = cmd->header.size;
  798. gb_cmd.q.cid = cmd->q.cid;
  799. gb_cmd.q.type = cmd->q.type;
  800. memcpy(cmd, &gb_cmd, sizeof(*cmd));
  801. return vmw_cmd_begin_gb_query(dev_priv, sw_context, header);
  802. }
  803. return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_context,
  804. user_context_converter, &cmd->q.cid,
  805. NULL);
  806. }
  807. /**
  808. * vmw_cmd_end_gb_query - validate a SVGA_3D_CMD_END_GB_QUERY command.
  809. *
  810. * @dev_priv: Pointer to a device private struct.
  811. * @sw_context: The software context used for this command submission.
  812. * @header: Pointer to the command header in the command stream.
  813. */
  814. static int vmw_cmd_end_gb_query(struct vmw_private *dev_priv,
  815. struct vmw_sw_context *sw_context,
  816. SVGA3dCmdHeader *header)
  817. {
  818. struct vmw_dma_buffer *vmw_bo;
  819. struct vmw_query_cmd {
  820. SVGA3dCmdHeader header;
  821. SVGA3dCmdEndGBQuery q;
  822. } *cmd;
  823. int ret;
  824. cmd = container_of(header, struct vmw_query_cmd, header);
  825. ret = vmw_cmd_cid_check(dev_priv, sw_context, header);
  826. if (unlikely(ret != 0))
  827. return ret;
  828. ret = vmw_translate_mob_ptr(dev_priv, sw_context,
  829. &cmd->q.mobid,
  830. &vmw_bo);
  831. if (unlikely(ret != 0))
  832. return ret;
  833. ret = vmw_query_bo_switch_prepare(dev_priv, &vmw_bo->base, sw_context);
  834. vmw_dmabuf_unreference(&vmw_bo);
  835. return ret;
  836. }
  837. /**
  838. * vmw_cmd_end_query - validate a SVGA_3D_CMD_END_QUERY command.
  839. *
  840. * @dev_priv: Pointer to a device private struct.
  841. * @sw_context: The software context used for this command submission.
  842. * @header: Pointer to the command header in the command stream.
  843. */
  844. static int vmw_cmd_end_query(struct vmw_private *dev_priv,
  845. struct vmw_sw_context *sw_context,
  846. SVGA3dCmdHeader *header)
  847. {
  848. struct vmw_dma_buffer *vmw_bo;
  849. struct vmw_query_cmd {
  850. SVGA3dCmdHeader header;
  851. SVGA3dCmdEndQuery q;
  852. } *cmd;
  853. int ret;
  854. cmd = container_of(header, struct vmw_query_cmd, header);
  855. if (dev_priv->has_mob) {
  856. struct {
  857. SVGA3dCmdHeader header;
  858. SVGA3dCmdEndGBQuery q;
  859. } gb_cmd;
  860. BUG_ON(sizeof(gb_cmd) != sizeof(*cmd));
  861. gb_cmd.header.id = SVGA_3D_CMD_END_GB_QUERY;
  862. gb_cmd.header.size = cmd->header.size;
  863. gb_cmd.q.cid = cmd->q.cid;
  864. gb_cmd.q.type = cmd->q.type;
  865. gb_cmd.q.mobid = cmd->q.guestResult.gmrId;
  866. gb_cmd.q.offset = cmd->q.guestResult.offset;
  867. memcpy(cmd, &gb_cmd, sizeof(*cmd));
  868. return vmw_cmd_end_gb_query(dev_priv, sw_context, header);
  869. }
  870. ret = vmw_cmd_cid_check(dev_priv, sw_context, header);
  871. if (unlikely(ret != 0))
  872. return ret;
  873. ret = vmw_translate_guest_ptr(dev_priv, sw_context,
  874. &cmd->q.guestResult,
  875. &vmw_bo);
  876. if (unlikely(ret != 0))
  877. return ret;
  878. ret = vmw_query_bo_switch_prepare(dev_priv, &vmw_bo->base, sw_context);
  879. vmw_dmabuf_unreference(&vmw_bo);
  880. return ret;
  881. }
  882. /**
  883. * vmw_cmd_wait_gb_query - validate a SVGA_3D_CMD_WAIT_GB_QUERY command.
  884. *
  885. * @dev_priv: Pointer to a device private struct.
  886. * @sw_context: The software context used for this command submission.
  887. * @header: Pointer to the command header in the command stream.
  888. */
  889. static int vmw_cmd_wait_gb_query(struct vmw_private *dev_priv,
  890. struct vmw_sw_context *sw_context,
  891. SVGA3dCmdHeader *header)
  892. {
  893. struct vmw_dma_buffer *vmw_bo;
  894. struct vmw_query_cmd {
  895. SVGA3dCmdHeader header;
  896. SVGA3dCmdWaitForGBQuery q;
  897. } *cmd;
  898. int ret;
  899. cmd = container_of(header, struct vmw_query_cmd, header);
  900. ret = vmw_cmd_cid_check(dev_priv, sw_context, header);
  901. if (unlikely(ret != 0))
  902. return ret;
  903. ret = vmw_translate_mob_ptr(dev_priv, sw_context,
  904. &cmd->q.mobid,
  905. &vmw_bo);
  906. if (unlikely(ret != 0))
  907. return ret;
  908. vmw_dmabuf_unreference(&vmw_bo);
  909. return 0;
  910. }
  911. /**
  912. * vmw_cmd_wait_query - validate a SVGA_3D_CMD_WAIT_QUERY command.
  913. *
  914. * @dev_priv: Pointer to a device private struct.
  915. * @sw_context: The software context used for this command submission.
  916. * @header: Pointer to the command header in the command stream.
  917. */
  918. static int vmw_cmd_wait_query(struct vmw_private *dev_priv,
  919. struct vmw_sw_context *sw_context,
  920. SVGA3dCmdHeader *header)
  921. {
  922. struct vmw_dma_buffer *vmw_bo;
  923. struct vmw_query_cmd {
  924. SVGA3dCmdHeader header;
  925. SVGA3dCmdWaitForQuery q;
  926. } *cmd;
  927. int ret;
  928. cmd = container_of(header, struct vmw_query_cmd, header);
  929. if (dev_priv->has_mob) {
  930. struct {
  931. SVGA3dCmdHeader header;
  932. SVGA3dCmdWaitForGBQuery q;
  933. } gb_cmd;
  934. BUG_ON(sizeof(gb_cmd) != sizeof(*cmd));
  935. gb_cmd.header.id = SVGA_3D_CMD_WAIT_FOR_GB_QUERY;
  936. gb_cmd.header.size = cmd->header.size;
  937. gb_cmd.q.cid = cmd->q.cid;
  938. gb_cmd.q.type = cmd->q.type;
  939. gb_cmd.q.mobid = cmd->q.guestResult.gmrId;
  940. gb_cmd.q.offset = cmd->q.guestResult.offset;
  941. memcpy(cmd, &gb_cmd, sizeof(*cmd));
  942. return vmw_cmd_wait_gb_query(dev_priv, sw_context, header);
  943. }
  944. ret = vmw_cmd_cid_check(dev_priv, sw_context, header);
  945. if (unlikely(ret != 0))
  946. return ret;
  947. ret = vmw_translate_guest_ptr(dev_priv, sw_context,
  948. &cmd->q.guestResult,
  949. &vmw_bo);
  950. if (unlikely(ret != 0))
  951. return ret;
  952. vmw_dmabuf_unreference(&vmw_bo);
  953. return 0;
  954. }
  955. static int vmw_cmd_dma(struct vmw_private *dev_priv,
  956. struct vmw_sw_context *sw_context,
  957. SVGA3dCmdHeader *header)
  958. {
  959. struct vmw_dma_buffer *vmw_bo = NULL;
  960. struct vmw_surface *srf = NULL;
  961. struct vmw_dma_cmd {
  962. SVGA3dCmdHeader header;
  963. SVGA3dCmdSurfaceDMA dma;
  964. } *cmd;
  965. int ret;
  966. cmd = container_of(header, struct vmw_dma_cmd, header);
  967. ret = vmw_translate_guest_ptr(dev_priv, sw_context,
  968. &cmd->dma.guest.ptr,
  969. &vmw_bo);
  970. if (unlikely(ret != 0))
  971. return ret;
  972. ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  973. user_surface_converter, &cmd->dma.host.sid,
  974. NULL);
  975. if (unlikely(ret != 0)) {
  976. if (unlikely(ret != -ERESTARTSYS))
  977. DRM_ERROR("could not find surface for DMA.\n");
  978. goto out_no_surface;
  979. }
  980. srf = vmw_res_to_srf(sw_context->res_cache[vmw_res_surface].res);
  981. vmw_kms_cursor_snoop(srf, sw_context->tfile, &vmw_bo->base, header);
  982. out_no_surface:
  983. vmw_dmabuf_unreference(&vmw_bo);
  984. return ret;
  985. }
  986. static int vmw_cmd_draw(struct vmw_private *dev_priv,
  987. struct vmw_sw_context *sw_context,
  988. SVGA3dCmdHeader *header)
  989. {
  990. struct vmw_draw_cmd {
  991. SVGA3dCmdHeader header;
  992. SVGA3dCmdDrawPrimitives body;
  993. } *cmd;
  994. SVGA3dVertexDecl *decl = (SVGA3dVertexDecl *)(
  995. (unsigned long)header + sizeof(*cmd));
  996. SVGA3dPrimitiveRange *range;
  997. uint32_t i;
  998. uint32_t maxnum;
  999. int ret;
  1000. ret = vmw_cmd_cid_check(dev_priv, sw_context, header);
  1001. if (unlikely(ret != 0))
  1002. return ret;
  1003. cmd = container_of(header, struct vmw_draw_cmd, header);
  1004. maxnum = (header->size - sizeof(cmd->body)) / sizeof(*decl);
  1005. if (unlikely(cmd->body.numVertexDecls > maxnum)) {
  1006. DRM_ERROR("Illegal number of vertex declarations.\n");
  1007. return -EINVAL;
  1008. }
  1009. for (i = 0; i < cmd->body.numVertexDecls; ++i, ++decl) {
  1010. ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  1011. user_surface_converter,
  1012. &decl->array.surfaceId, NULL);
  1013. if (unlikely(ret != 0))
  1014. return ret;
  1015. }
  1016. maxnum = (header->size - sizeof(cmd->body) -
  1017. cmd->body.numVertexDecls * sizeof(*decl)) / sizeof(*range);
  1018. if (unlikely(cmd->body.numRanges > maxnum)) {
  1019. DRM_ERROR("Illegal number of index ranges.\n");
  1020. return -EINVAL;
  1021. }
  1022. range = (SVGA3dPrimitiveRange *) decl;
  1023. for (i = 0; i < cmd->body.numRanges; ++i, ++range) {
  1024. ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  1025. user_surface_converter,
  1026. &range->indexArray.surfaceId, NULL);
  1027. if (unlikely(ret != 0))
  1028. return ret;
  1029. }
  1030. return 0;
  1031. }
  1032. static int vmw_cmd_tex_state(struct vmw_private *dev_priv,
  1033. struct vmw_sw_context *sw_context,
  1034. SVGA3dCmdHeader *header)
  1035. {
  1036. struct vmw_tex_state_cmd {
  1037. SVGA3dCmdHeader header;
  1038. SVGA3dCmdSetTextureState state;
  1039. } *cmd;
  1040. SVGA3dTextureState *last_state = (SVGA3dTextureState *)
  1041. ((unsigned long) header + header->size + sizeof(header));
  1042. SVGA3dTextureState *cur_state = (SVGA3dTextureState *)
  1043. ((unsigned long) header + sizeof(struct vmw_tex_state_cmd));
  1044. struct vmw_resource_val_node *ctx_node;
  1045. struct vmw_resource_val_node *res_node;
  1046. int ret;
  1047. cmd = container_of(header, struct vmw_tex_state_cmd,
  1048. header);
  1049. ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_context,
  1050. user_context_converter, &cmd->state.cid,
  1051. &ctx_node);
  1052. if (unlikely(ret != 0))
  1053. return ret;
  1054. for (; cur_state < last_state; ++cur_state) {
  1055. if (likely(cur_state->name != SVGA3D_TS_BIND_TEXTURE))
  1056. continue;
  1057. ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  1058. user_surface_converter,
  1059. &cur_state->value, &res_node);
  1060. if (unlikely(ret != 0))
  1061. return ret;
  1062. if (dev_priv->has_mob) {
  1063. struct vmw_ctx_bindinfo bi;
  1064. bi.ctx = ctx_node->res;
  1065. bi.res = res_node ? res_node->res : NULL;
  1066. bi.bt = vmw_ctx_binding_tex;
  1067. bi.i1.texture_stage = cur_state->stage;
  1068. vmw_context_binding_add(ctx_node->staged_bindings,
  1069. &bi);
  1070. }
  1071. }
  1072. return 0;
  1073. }
  1074. static int vmw_cmd_check_define_gmrfb(struct vmw_private *dev_priv,
  1075. struct vmw_sw_context *sw_context,
  1076. void *buf)
  1077. {
  1078. struct vmw_dma_buffer *vmw_bo;
  1079. int ret;
  1080. struct {
  1081. uint32_t header;
  1082. SVGAFifoCmdDefineGMRFB body;
  1083. } *cmd = buf;
  1084. ret = vmw_translate_guest_ptr(dev_priv, sw_context,
  1085. &cmd->body.ptr,
  1086. &vmw_bo);
  1087. if (unlikely(ret != 0))
  1088. return ret;
  1089. vmw_dmabuf_unreference(&vmw_bo);
  1090. return ret;
  1091. }
  1092. /**
  1093. * vmw_cmd_switch_backup - Utility function to handle backup buffer switching
  1094. *
  1095. * @dev_priv: Pointer to a device private struct.
  1096. * @sw_context: The software context being used for this batch.
  1097. * @res_type: The resource type.
  1098. * @converter: Information about user-space binding for this resource type.
  1099. * @res_id: Pointer to the user-space resource handle in the command stream.
  1100. * @buf_id: Pointer to the user-space backup buffer handle in the command
  1101. * stream.
  1102. * @backup_offset: Offset of backup into MOB.
  1103. *
  1104. * This function prepares for registering a switch of backup buffers
  1105. * in the resource metadata just prior to unreserving.
  1106. */
  1107. static int vmw_cmd_switch_backup(struct vmw_private *dev_priv,
  1108. struct vmw_sw_context *sw_context,
  1109. enum vmw_res_type res_type,
  1110. const struct vmw_user_resource_conv
  1111. *converter,
  1112. uint32_t *res_id,
  1113. uint32_t *buf_id,
  1114. unsigned long backup_offset)
  1115. {
  1116. int ret;
  1117. struct vmw_dma_buffer *dma_buf;
  1118. struct vmw_resource_val_node *val_node;
  1119. ret = vmw_cmd_res_check(dev_priv, sw_context, res_type,
  1120. converter, res_id, &val_node);
  1121. if (unlikely(ret != 0))
  1122. return ret;
  1123. ret = vmw_translate_mob_ptr(dev_priv, sw_context, buf_id, &dma_buf);
  1124. if (unlikely(ret != 0))
  1125. return ret;
  1126. if (val_node->first_usage)
  1127. val_node->no_buffer_needed = true;
  1128. vmw_dmabuf_unreference(&val_node->new_backup);
  1129. val_node->new_backup = dma_buf;
  1130. val_node->new_backup_offset = backup_offset;
  1131. return 0;
  1132. }
  1133. /**
  1134. * vmw_cmd_bind_gb_surface - Validate an SVGA_3D_CMD_BIND_GB_SURFACE
  1135. * command
  1136. *
  1137. * @dev_priv: Pointer to a device private struct.
  1138. * @sw_context: The software context being used for this batch.
  1139. * @header: Pointer to the command header in the command stream.
  1140. */
  1141. static int vmw_cmd_bind_gb_surface(struct vmw_private *dev_priv,
  1142. struct vmw_sw_context *sw_context,
  1143. SVGA3dCmdHeader *header)
  1144. {
  1145. struct vmw_bind_gb_surface_cmd {
  1146. SVGA3dCmdHeader header;
  1147. SVGA3dCmdBindGBSurface body;
  1148. } *cmd;
  1149. cmd = container_of(header, struct vmw_bind_gb_surface_cmd, header);
  1150. return vmw_cmd_switch_backup(dev_priv, sw_context, vmw_res_surface,
  1151. user_surface_converter,
  1152. &cmd->body.sid, &cmd->body.mobid,
  1153. 0);
  1154. }
  1155. /**
  1156. * vmw_cmd_update_gb_image - Validate an SVGA_3D_CMD_UPDATE_GB_IMAGE
  1157. * command
  1158. *
  1159. * @dev_priv: Pointer to a device private struct.
  1160. * @sw_context: The software context being used for this batch.
  1161. * @header: Pointer to the command header in the command stream.
  1162. */
  1163. static int vmw_cmd_update_gb_image(struct vmw_private *dev_priv,
  1164. struct vmw_sw_context *sw_context,
  1165. SVGA3dCmdHeader *header)
  1166. {
  1167. struct vmw_gb_surface_cmd {
  1168. SVGA3dCmdHeader header;
  1169. SVGA3dCmdUpdateGBImage body;
  1170. } *cmd;
  1171. cmd = container_of(header, struct vmw_gb_surface_cmd, header);
  1172. return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  1173. user_surface_converter,
  1174. &cmd->body.image.sid, NULL);
  1175. }
  1176. /**
  1177. * vmw_cmd_update_gb_surface - Validate an SVGA_3D_CMD_UPDATE_GB_SURFACE
  1178. * command
  1179. *
  1180. * @dev_priv: Pointer to a device private struct.
  1181. * @sw_context: The software context being used for this batch.
  1182. * @header: Pointer to the command header in the command stream.
  1183. */
  1184. static int vmw_cmd_update_gb_surface(struct vmw_private *dev_priv,
  1185. struct vmw_sw_context *sw_context,
  1186. SVGA3dCmdHeader *header)
  1187. {
  1188. struct vmw_gb_surface_cmd {
  1189. SVGA3dCmdHeader header;
  1190. SVGA3dCmdUpdateGBSurface body;
  1191. } *cmd;
  1192. cmd = container_of(header, struct vmw_gb_surface_cmd, header);
  1193. return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  1194. user_surface_converter,
  1195. &cmd->body.sid, NULL);
  1196. }
  1197. /**
  1198. * vmw_cmd_readback_gb_image - Validate an SVGA_3D_CMD_READBACK_GB_IMAGE
  1199. * command
  1200. *
  1201. * @dev_priv: Pointer to a device private struct.
  1202. * @sw_context: The software context being used for this batch.
  1203. * @header: Pointer to the command header in the command stream.
  1204. */
  1205. static int vmw_cmd_readback_gb_image(struct vmw_private *dev_priv,
  1206. struct vmw_sw_context *sw_context,
  1207. SVGA3dCmdHeader *header)
  1208. {
  1209. struct vmw_gb_surface_cmd {
  1210. SVGA3dCmdHeader header;
  1211. SVGA3dCmdReadbackGBImage body;
  1212. } *cmd;
  1213. cmd = container_of(header, struct vmw_gb_surface_cmd, header);
  1214. return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  1215. user_surface_converter,
  1216. &cmd->body.image.sid, NULL);
  1217. }
  1218. /**
  1219. * vmw_cmd_readback_gb_surface - Validate an SVGA_3D_CMD_READBACK_GB_SURFACE
  1220. * command
  1221. *
  1222. * @dev_priv: Pointer to a device private struct.
  1223. * @sw_context: The software context being used for this batch.
  1224. * @header: Pointer to the command header in the command stream.
  1225. */
  1226. static int vmw_cmd_readback_gb_surface(struct vmw_private *dev_priv,
  1227. struct vmw_sw_context *sw_context,
  1228. SVGA3dCmdHeader *header)
  1229. {
  1230. struct vmw_gb_surface_cmd {
  1231. SVGA3dCmdHeader header;
  1232. SVGA3dCmdReadbackGBSurface body;
  1233. } *cmd;
  1234. cmd = container_of(header, struct vmw_gb_surface_cmd, header);
  1235. return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  1236. user_surface_converter,
  1237. &cmd->body.sid, NULL);
  1238. }
  1239. /**
  1240. * vmw_cmd_invalidate_gb_image - Validate an SVGA_3D_CMD_INVALIDATE_GB_IMAGE
  1241. * command
  1242. *
  1243. * @dev_priv: Pointer to a device private struct.
  1244. * @sw_context: The software context being used for this batch.
  1245. * @header: Pointer to the command header in the command stream.
  1246. */
  1247. static int vmw_cmd_invalidate_gb_image(struct vmw_private *dev_priv,
  1248. struct vmw_sw_context *sw_context,
  1249. SVGA3dCmdHeader *header)
  1250. {
  1251. struct vmw_gb_surface_cmd {
  1252. SVGA3dCmdHeader header;
  1253. SVGA3dCmdInvalidateGBImage body;
  1254. } *cmd;
  1255. cmd = container_of(header, struct vmw_gb_surface_cmd, header);
  1256. return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  1257. user_surface_converter,
  1258. &cmd->body.image.sid, NULL);
  1259. }
  1260. /**
  1261. * vmw_cmd_invalidate_gb_surface - Validate an
  1262. * SVGA_3D_CMD_INVALIDATE_GB_SURFACE command
  1263. *
  1264. * @dev_priv: Pointer to a device private struct.
  1265. * @sw_context: The software context being used for this batch.
  1266. * @header: Pointer to the command header in the command stream.
  1267. */
  1268. static int vmw_cmd_invalidate_gb_surface(struct vmw_private *dev_priv,
  1269. struct vmw_sw_context *sw_context,
  1270. SVGA3dCmdHeader *header)
  1271. {
  1272. struct vmw_gb_surface_cmd {
  1273. SVGA3dCmdHeader header;
  1274. SVGA3dCmdInvalidateGBSurface body;
  1275. } *cmd;
  1276. cmd = container_of(header, struct vmw_gb_surface_cmd, header);
  1277. return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  1278. user_surface_converter,
  1279. &cmd->body.sid, NULL);
  1280. }
  1281. /**
  1282. * vmw_cmd_set_shader - Validate an SVGA_3D_CMD_SET_SHADER
  1283. * command
  1284. *
  1285. * @dev_priv: Pointer to a device private struct.
  1286. * @sw_context: The software context being used for this batch.
  1287. * @header: Pointer to the command header in the command stream.
  1288. */
  1289. static int vmw_cmd_set_shader(struct vmw_private *dev_priv,
  1290. struct vmw_sw_context *sw_context,
  1291. SVGA3dCmdHeader *header)
  1292. {
  1293. struct vmw_set_shader_cmd {
  1294. SVGA3dCmdHeader header;
  1295. SVGA3dCmdSetShader body;
  1296. } *cmd;
  1297. struct vmw_resource_val_node *ctx_node;
  1298. int ret;
  1299. cmd = container_of(header, struct vmw_set_shader_cmd,
  1300. header);
  1301. ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_context,
  1302. user_context_converter, &cmd->body.cid,
  1303. &ctx_node);
  1304. if (unlikely(ret != 0))
  1305. return ret;
  1306. if (dev_priv->has_mob) {
  1307. struct vmw_ctx_bindinfo bi;
  1308. struct vmw_resource_val_node *res_node;
  1309. ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_shader,
  1310. user_shader_converter,
  1311. &cmd->body.shid, &res_node);
  1312. if (unlikely(ret != 0))
  1313. return ret;
  1314. bi.ctx = ctx_node->res;
  1315. bi.res = res_node ? res_node->res : NULL;
  1316. bi.bt = vmw_ctx_binding_shader;
  1317. bi.i1.shader_type = cmd->body.type;
  1318. return vmw_context_binding_add(ctx_node->staged_bindings, &bi);
  1319. }
  1320. return 0;
  1321. }
  1322. /**
  1323. * vmw_cmd_bind_gb_shader - Validate an SVGA_3D_CMD_BIND_GB_SHADER
  1324. * command
  1325. *
  1326. * @dev_priv: Pointer to a device private struct.
  1327. * @sw_context: The software context being used for this batch.
  1328. * @header: Pointer to the command header in the command stream.
  1329. */
  1330. static int vmw_cmd_bind_gb_shader(struct vmw_private *dev_priv,
  1331. struct vmw_sw_context *sw_context,
  1332. SVGA3dCmdHeader *header)
  1333. {
  1334. struct vmw_bind_gb_shader_cmd {
  1335. SVGA3dCmdHeader header;
  1336. SVGA3dCmdBindGBShader body;
  1337. } *cmd;
  1338. cmd = container_of(header, struct vmw_bind_gb_shader_cmd,
  1339. header);
  1340. return vmw_cmd_switch_backup(dev_priv, sw_context, vmw_res_shader,
  1341. user_shader_converter,
  1342. &cmd->body.shid, &cmd->body.mobid,
  1343. cmd->body.offsetInBytes);
  1344. }
  1345. static int vmw_cmd_check_not_3d(struct vmw_private *dev_priv,
  1346. struct vmw_sw_context *sw_context,
  1347. void *buf, uint32_t *size)
  1348. {
  1349. uint32_t size_remaining = *size;
  1350. uint32_t cmd_id;
  1351. cmd_id = le32_to_cpu(((uint32_t *)buf)[0]);
  1352. switch (cmd_id) {
  1353. case SVGA_CMD_UPDATE:
  1354. *size = sizeof(uint32_t) + sizeof(SVGAFifoCmdUpdate);
  1355. break;
  1356. case SVGA_CMD_DEFINE_GMRFB:
  1357. *size = sizeof(uint32_t) + sizeof(SVGAFifoCmdDefineGMRFB);
  1358. break;
  1359. case SVGA_CMD_BLIT_GMRFB_TO_SCREEN:
  1360. *size = sizeof(uint32_t) + sizeof(SVGAFifoCmdBlitGMRFBToScreen);
  1361. break;
  1362. case SVGA_CMD_BLIT_SCREEN_TO_GMRFB:
  1363. *size = sizeof(uint32_t) + sizeof(SVGAFifoCmdBlitGMRFBToScreen);
  1364. break;
  1365. default:
  1366. DRM_ERROR("Unsupported SVGA command: %u.\n", cmd_id);
  1367. return -EINVAL;
  1368. }
  1369. if (*size > size_remaining) {
  1370. DRM_ERROR("Invalid SVGA command (size mismatch):"
  1371. " %u.\n", cmd_id);
  1372. return -EINVAL;
  1373. }
  1374. if (unlikely(!sw_context->kernel)) {
  1375. DRM_ERROR("Kernel only SVGA command: %u.\n", cmd_id);
  1376. return -EPERM;
  1377. }
  1378. if (cmd_id == SVGA_CMD_DEFINE_GMRFB)
  1379. return vmw_cmd_check_define_gmrfb(dev_priv, sw_context, buf);
  1380. return 0;
  1381. }
  1382. static const struct vmw_cmd_entry const vmw_cmd_entries[SVGA_3D_CMD_MAX] = {
  1383. VMW_CMD_DEF(SVGA_3D_CMD_SURFACE_DEFINE, &vmw_cmd_invalid,
  1384. false, false, false),
  1385. VMW_CMD_DEF(SVGA_3D_CMD_SURFACE_DESTROY, &vmw_cmd_invalid,
  1386. false, false, false),
  1387. VMW_CMD_DEF(SVGA_3D_CMD_SURFACE_COPY, &vmw_cmd_surface_copy_check,
  1388. true, false, false),
  1389. VMW_CMD_DEF(SVGA_3D_CMD_SURFACE_STRETCHBLT, &vmw_cmd_stretch_blt_check,
  1390. true, false, false),
  1391. VMW_CMD_DEF(SVGA_3D_CMD_SURFACE_DMA, &vmw_cmd_dma,
  1392. true, false, false),
  1393. VMW_CMD_DEF(SVGA_3D_CMD_CONTEXT_DEFINE, &vmw_cmd_invalid,
  1394. false, false, false),
  1395. VMW_CMD_DEF(SVGA_3D_CMD_CONTEXT_DESTROY, &vmw_cmd_invalid,
  1396. false, false, false),
  1397. VMW_CMD_DEF(SVGA_3D_CMD_SETTRANSFORM, &vmw_cmd_cid_check,
  1398. true, false, false),
  1399. VMW_CMD_DEF(SVGA_3D_CMD_SETZRANGE, &vmw_cmd_cid_check,
  1400. true, false, false),
  1401. VMW_CMD_DEF(SVGA_3D_CMD_SETRENDERSTATE, &vmw_cmd_cid_check,
  1402. true, false, false),
  1403. VMW_CMD_DEF(SVGA_3D_CMD_SETRENDERTARGET,
  1404. &vmw_cmd_set_render_target_check, true, false, false),
  1405. VMW_CMD_DEF(SVGA_3D_CMD_SETTEXTURESTATE, &vmw_cmd_tex_state,
  1406. true, false, false),
  1407. VMW_CMD_DEF(SVGA_3D_CMD_SETMATERIAL, &vmw_cmd_cid_check,
  1408. true, false, false),
  1409. VMW_CMD_DEF(SVGA_3D_CMD_SETLIGHTDATA, &vmw_cmd_cid_check,
  1410. true, false, false),
  1411. VMW_CMD_DEF(SVGA_3D_CMD_SETLIGHTENABLED, &vmw_cmd_cid_check,
  1412. true, false, false),
  1413. VMW_CMD_DEF(SVGA_3D_CMD_SETVIEWPORT, &vmw_cmd_cid_check,
  1414. true, false, false),
  1415. VMW_CMD_DEF(SVGA_3D_CMD_SETCLIPPLANE, &vmw_cmd_cid_check,
  1416. true, false, false),
  1417. VMW_CMD_DEF(SVGA_3D_CMD_CLEAR, &vmw_cmd_cid_check,
  1418. true, false, false),
  1419. VMW_CMD_DEF(SVGA_3D_CMD_PRESENT, &vmw_cmd_present_check,
  1420. false, false, false),
  1421. VMW_CMD_DEF(SVGA_3D_CMD_SHADER_DEFINE, &vmw_cmd_cid_check,
  1422. true, true, false),
  1423. VMW_CMD_DEF(SVGA_3D_CMD_SHADER_DESTROY, &vmw_cmd_cid_check,
  1424. true, true, false),
  1425. VMW_CMD_DEF(SVGA_3D_CMD_SET_SHADER, &vmw_cmd_set_shader,
  1426. true, false, false),
  1427. VMW_CMD_DEF(SVGA_3D_CMD_SET_SHADER_CONST, &vmw_cmd_cid_check,
  1428. true, true, false),
  1429. VMW_CMD_DEF(SVGA_3D_CMD_DRAW_PRIMITIVES, &vmw_cmd_draw,
  1430. true, false, false),
  1431. VMW_CMD_DEF(SVGA_3D_CMD_SETSCISSORRECT, &vmw_cmd_cid_check,
  1432. true, false, false),
  1433. VMW_CMD_DEF(SVGA_3D_CMD_BEGIN_QUERY, &vmw_cmd_begin_query,
  1434. true, false, false),
  1435. VMW_CMD_DEF(SVGA_3D_CMD_END_QUERY, &vmw_cmd_end_query,
  1436. true, false, false),
  1437. VMW_CMD_DEF(SVGA_3D_CMD_WAIT_FOR_QUERY, &vmw_cmd_wait_query,
  1438. true, false, false),
  1439. VMW_CMD_DEF(SVGA_3D_CMD_PRESENT_READBACK, &vmw_cmd_ok,
  1440. true, false, false),
  1441. VMW_CMD_DEF(SVGA_3D_CMD_BLIT_SURFACE_TO_SCREEN,
  1442. &vmw_cmd_blt_surf_screen_check, false, false, false),
  1443. VMW_CMD_DEF(SVGA_3D_CMD_SURFACE_DEFINE_V2, &vmw_cmd_invalid,
  1444. false, false, false),
  1445. VMW_CMD_DEF(SVGA_3D_CMD_GENERATE_MIPMAPS, &vmw_cmd_invalid,
  1446. false, false, false),
  1447. VMW_CMD_DEF(SVGA_3D_CMD_ACTIVATE_SURFACE, &vmw_cmd_invalid,
  1448. false, false, false),
  1449. VMW_CMD_DEF(SVGA_3D_CMD_DEACTIVATE_SURFACE, &vmw_cmd_invalid,
  1450. false, false, false),
  1451. VMW_CMD_DEF(SVGA_3D_CMD_SCREEN_DMA, &vmw_cmd_invalid,
  1452. false, false, false),
  1453. VMW_CMD_DEF(SVGA_3D_CMD_SET_UNITY_SURFACE_COOKIE, &vmw_cmd_invalid,
  1454. false, false, false),
  1455. VMW_CMD_DEF(SVGA_3D_CMD_OPEN_CONTEXT_SURFACE, &vmw_cmd_invalid,
  1456. false, false, false),
  1457. VMW_CMD_DEF(SVGA_3D_CMD_LOGICOPS_BITBLT, &vmw_cmd_invalid,
  1458. false, false, false),
  1459. VMW_CMD_DEF(SVGA_3D_CMD_LOGICOPS_TRANSBLT, &vmw_cmd_invalid,
  1460. false, false, false),
  1461. VMW_CMD_DEF(SVGA_3D_CMD_LOGICOPS_STRETCHBLT, &vmw_cmd_invalid,
  1462. false, false, false),
  1463. VMW_CMD_DEF(SVGA_3D_CMD_LOGICOPS_COLORFILL, &vmw_cmd_invalid,
  1464. false, false, false),
  1465. VMW_CMD_DEF(SVGA_3D_CMD_LOGICOPS_ALPHABLEND, &vmw_cmd_invalid,
  1466. false, false, false),
  1467. VMW_CMD_DEF(SVGA_3D_CMD_LOGICOPS_CLEARTYPEBLEND, &vmw_cmd_invalid,
  1468. false, false, false),
  1469. VMW_CMD_DEF(SVGA_3D_CMD_SET_OTABLE_BASE, &vmw_cmd_invalid,
  1470. false, false, true),
  1471. VMW_CMD_DEF(SVGA_3D_CMD_READBACK_OTABLE, &vmw_cmd_invalid,
  1472. false, false, true),
  1473. VMW_CMD_DEF(SVGA_3D_CMD_DEFINE_GB_MOB, &vmw_cmd_invalid,
  1474. false, false, true),
  1475. VMW_CMD_DEF(SVGA_3D_CMD_DESTROY_GB_MOB, &vmw_cmd_invalid,
  1476. false, false, true),
  1477. VMW_CMD_DEF(SVGA_3D_CMD_REDEFINE_GB_MOB, &vmw_cmd_invalid,
  1478. false, false, true),
  1479. VMW_CMD_DEF(SVGA_3D_CMD_UPDATE_GB_MOB_MAPPING, &vmw_cmd_invalid,
  1480. false, false, true),
  1481. VMW_CMD_DEF(SVGA_3D_CMD_DEFINE_GB_SURFACE, &vmw_cmd_invalid,
  1482. false, false, true),
  1483. VMW_CMD_DEF(SVGA_3D_CMD_DESTROY_GB_SURFACE, &vmw_cmd_invalid,
  1484. false, false, true),
  1485. VMW_CMD_DEF(SVGA_3D_CMD_BIND_GB_SURFACE, &vmw_cmd_bind_gb_surface,
  1486. true, false, true),
  1487. VMW_CMD_DEF(SVGA_3D_CMD_COND_BIND_GB_SURFACE, &vmw_cmd_invalid,
  1488. false, false, true),
  1489. VMW_CMD_DEF(SVGA_3D_CMD_UPDATE_GB_IMAGE, &vmw_cmd_update_gb_image,
  1490. true, false, true),
  1491. VMW_CMD_DEF(SVGA_3D_CMD_UPDATE_GB_SURFACE,
  1492. &vmw_cmd_update_gb_surface, true, false, true),
  1493. VMW_CMD_DEF(SVGA_3D_CMD_READBACK_GB_IMAGE,
  1494. &vmw_cmd_readback_gb_image, true, false, true),
  1495. VMW_CMD_DEF(SVGA_3D_CMD_READBACK_GB_SURFACE,
  1496. &vmw_cmd_readback_gb_surface, true, false, true),
  1497. VMW_CMD_DEF(SVGA_3D_CMD_INVALIDATE_GB_IMAGE,
  1498. &vmw_cmd_invalidate_gb_image, true, false, true),
  1499. VMW_CMD_DEF(SVGA_3D_CMD_INVALIDATE_GB_SURFACE,
  1500. &vmw_cmd_invalidate_gb_surface, true, false, true),
  1501. VMW_CMD_DEF(SVGA_3D_CMD_DEFINE_GB_CONTEXT, &vmw_cmd_invalid,
  1502. false, false, true),
  1503. VMW_CMD_DEF(SVGA_3D_CMD_DESTROY_GB_CONTEXT, &vmw_cmd_invalid,
  1504. false, false, true),
  1505. VMW_CMD_DEF(SVGA_3D_CMD_BIND_GB_CONTEXT, &vmw_cmd_invalid,
  1506. false, false, true),
  1507. VMW_CMD_DEF(SVGA_3D_CMD_READBACK_GB_CONTEXT, &vmw_cmd_invalid,
  1508. false, false, true),
  1509. VMW_CMD_DEF(SVGA_3D_CMD_INVALIDATE_GB_CONTEXT, &vmw_cmd_invalid,
  1510. false, false, true),
  1511. VMW_CMD_DEF(SVGA_3D_CMD_DEFINE_GB_SHADER, &vmw_cmd_invalid,
  1512. false, false, true),
  1513. VMW_CMD_DEF(SVGA_3D_CMD_BIND_GB_SHADER, &vmw_cmd_bind_gb_shader,
  1514. true, false, true),
  1515. VMW_CMD_DEF(SVGA_3D_CMD_DESTROY_GB_SHADER, &vmw_cmd_invalid,
  1516. false, false, true),
  1517. VMW_CMD_DEF(SVGA_3D_CMD_SET_OTABLE_BASE64, &vmw_cmd_invalid,
  1518. false, false, false),
  1519. VMW_CMD_DEF(SVGA_3D_CMD_BEGIN_GB_QUERY, &vmw_cmd_begin_gb_query,
  1520. true, false, true),
  1521. VMW_CMD_DEF(SVGA_3D_CMD_END_GB_QUERY, &vmw_cmd_end_gb_query,
  1522. true, false, true),
  1523. VMW_CMD_DEF(SVGA_3D_CMD_WAIT_FOR_GB_QUERY, &vmw_cmd_wait_gb_query,
  1524. true, false, true),
  1525. VMW_CMD_DEF(SVGA_3D_CMD_NOP, &vmw_cmd_ok,
  1526. true, false, true),
  1527. VMW_CMD_DEF(SVGA_3D_CMD_ENABLE_GART, &vmw_cmd_invalid,
  1528. false, false, true),
  1529. VMW_CMD_DEF(SVGA_3D_CMD_DISABLE_GART, &vmw_cmd_invalid,
  1530. false, false, true),
  1531. VMW_CMD_DEF(SVGA_3D_CMD_MAP_MOB_INTO_GART, &vmw_cmd_invalid,
  1532. false, false, true),
  1533. VMW_CMD_DEF(SVGA_3D_CMD_UNMAP_GART_RANGE, &vmw_cmd_invalid,
  1534. false, false, true),
  1535. VMW_CMD_DEF(SVGA_3D_CMD_DEFINE_GB_SCREENTARGET, &vmw_cmd_invalid,
  1536. false, false, true),
  1537. VMW_CMD_DEF(SVGA_3D_CMD_DESTROY_GB_SCREENTARGET, &vmw_cmd_invalid,
  1538. false, false, true),
  1539. VMW_CMD_DEF(SVGA_3D_CMD_BIND_GB_SCREENTARGET, &vmw_cmd_invalid,
  1540. false, false, true),
  1541. VMW_CMD_DEF(SVGA_3D_CMD_UPDATE_GB_SCREENTARGET, &vmw_cmd_invalid,
  1542. false, false, true),
  1543. VMW_CMD_DEF(SVGA_3D_CMD_READBACK_GB_IMAGE_PARTIAL, &vmw_cmd_invalid,
  1544. false, false, true),
  1545. VMW_CMD_DEF(SVGA_3D_CMD_INVALIDATE_GB_IMAGE_PARTIAL, &vmw_cmd_invalid,
  1546. false, false, true),
  1547. VMW_CMD_DEF(SVGA_3D_CMD_SET_GB_SHADERCONSTS_INLINE, &vmw_cmd_cid_check,
  1548. true, false, true)
  1549. };
  1550. static int vmw_cmd_check(struct vmw_private *dev_priv,
  1551. struct vmw_sw_context *sw_context,
  1552. void *buf, uint32_t *size)
  1553. {
  1554. uint32_t cmd_id;
  1555. uint32_t size_remaining = *size;
  1556. SVGA3dCmdHeader *header = (SVGA3dCmdHeader *) buf;
  1557. int ret;
  1558. const struct vmw_cmd_entry *entry;
  1559. bool gb = dev_priv->capabilities & SVGA_CAP_GBOBJECTS;
  1560. cmd_id = le32_to_cpu(((uint32_t *)buf)[0]);
  1561. /* Handle any none 3D commands */
  1562. if (unlikely(cmd_id < SVGA_CMD_MAX))
  1563. return vmw_cmd_check_not_3d(dev_priv, sw_context, buf, size);
  1564. cmd_id = le32_to_cpu(header->id);
  1565. *size = le32_to_cpu(header->size) + sizeof(SVGA3dCmdHeader);
  1566. cmd_id -= SVGA_3D_CMD_BASE;
  1567. if (unlikely(*size > size_remaining))
  1568. goto out_invalid;
  1569. if (unlikely(cmd_id >= SVGA_3D_CMD_MAX - SVGA_3D_CMD_BASE))
  1570. goto out_invalid;
  1571. entry = &vmw_cmd_entries[cmd_id];
  1572. if (unlikely(!entry->user_allow && !sw_context->kernel))
  1573. goto out_privileged;
  1574. if (unlikely(entry->gb_disable && gb))
  1575. goto out_old;
  1576. if (unlikely(entry->gb_enable && !gb))
  1577. goto out_new;
  1578. ret = entry->func(dev_priv, sw_context, header);
  1579. if (unlikely(ret != 0))
  1580. goto out_invalid;
  1581. return 0;
  1582. out_invalid:
  1583. DRM_ERROR("Invalid SVGA3D command: %d\n",
  1584. cmd_id + SVGA_3D_CMD_BASE);
  1585. return -EINVAL;
  1586. out_privileged:
  1587. DRM_ERROR("Privileged SVGA3D command: %d\n",
  1588. cmd_id + SVGA_3D_CMD_BASE);
  1589. return -EPERM;
  1590. out_old:
  1591. DRM_ERROR("Deprecated (disallowed) SVGA3D command: %d\n",
  1592. cmd_id + SVGA_3D_CMD_BASE);
  1593. return -EINVAL;
  1594. out_new:
  1595. DRM_ERROR("SVGA3D command: %d not supported by virtual hardware.\n",
  1596. cmd_id + SVGA_3D_CMD_BASE);
  1597. return -EINVAL;
  1598. }
  1599. static int vmw_cmd_check_all(struct vmw_private *dev_priv,
  1600. struct vmw_sw_context *sw_context,
  1601. void *buf,
  1602. uint32_t size)
  1603. {
  1604. int32_t cur_size = size;
  1605. int ret;
  1606. sw_context->buf_start = buf;
  1607. while (cur_size > 0) {
  1608. size = cur_size;
  1609. ret = vmw_cmd_check(dev_priv, sw_context, buf, &size);
  1610. if (unlikely(ret != 0))
  1611. return ret;
  1612. buf = (void *)((unsigned long) buf + size);
  1613. cur_size -= size;
  1614. }
  1615. if (unlikely(cur_size != 0)) {
  1616. DRM_ERROR("Command verifier out of sync.\n");
  1617. return -EINVAL;
  1618. }
  1619. return 0;
  1620. }
  1621. static void vmw_free_relocations(struct vmw_sw_context *sw_context)
  1622. {
  1623. sw_context->cur_reloc = 0;
  1624. }
  1625. static void vmw_apply_relocations(struct vmw_sw_context *sw_context)
  1626. {
  1627. uint32_t i;
  1628. struct vmw_relocation *reloc;
  1629. struct ttm_validate_buffer *validate;
  1630. struct ttm_buffer_object *bo;
  1631. for (i = 0; i < sw_context->cur_reloc; ++i) {
  1632. reloc = &sw_context->relocs[i];
  1633. validate = &sw_context->val_bufs[reloc->index].base;
  1634. bo = validate->bo;
  1635. switch (bo->mem.mem_type) {
  1636. case TTM_PL_VRAM:
  1637. reloc->location->offset += bo->offset;
  1638. reloc->location->gmrId = SVGA_GMR_FRAMEBUFFER;
  1639. break;
  1640. case VMW_PL_GMR:
  1641. reloc->location->gmrId = bo->mem.start;
  1642. break;
  1643. case VMW_PL_MOB:
  1644. *reloc->mob_loc = bo->mem.start;
  1645. break;
  1646. default:
  1647. BUG();
  1648. }
  1649. }
  1650. vmw_free_relocations(sw_context);
  1651. }
  1652. /**
  1653. * vmw_resource_list_unrefererence - Free up a resource list and unreference
  1654. * all resources referenced by it.
  1655. *
  1656. * @list: The resource list.
  1657. */
  1658. static void vmw_resource_list_unreference(struct list_head *list)
  1659. {
  1660. struct vmw_resource_val_node *val, *val_next;
  1661. /*
  1662. * Drop references to resources held during command submission.
  1663. */
  1664. list_for_each_entry_safe(val, val_next, list, head) {
  1665. list_del_init(&val->head);
  1666. vmw_resource_unreference(&val->res);
  1667. if (unlikely(val->staged_bindings))
  1668. kfree(val->staged_bindings);
  1669. kfree(val);
  1670. }
  1671. }
  1672. static void vmw_clear_validations(struct vmw_sw_context *sw_context)
  1673. {
  1674. struct vmw_validate_buffer *entry, *next;
  1675. struct vmw_resource_val_node *val;
  1676. /*
  1677. * Drop references to DMA buffers held during command submission.
  1678. */
  1679. list_for_each_entry_safe(entry, next, &sw_context->validate_nodes,
  1680. base.head) {
  1681. list_del(&entry->base.head);
  1682. ttm_bo_unref(&entry->base.bo);
  1683. (void) drm_ht_remove_item(&sw_context->res_ht, &entry->hash);
  1684. sw_context->cur_val_buf--;
  1685. }
  1686. BUG_ON(sw_context->cur_val_buf != 0);
  1687. list_for_each_entry(val, &sw_context->resource_list, head)
  1688. (void) drm_ht_remove_item(&sw_context->res_ht, &val->hash);
  1689. }
  1690. static int vmw_validate_single_buffer(struct vmw_private *dev_priv,
  1691. struct ttm_buffer_object *bo,
  1692. bool validate_as_mob)
  1693. {
  1694. int ret;
  1695. /*
  1696. * Don't validate pinned buffers.
  1697. */
  1698. if (bo == dev_priv->pinned_bo ||
  1699. (bo == dev_priv->dummy_query_bo &&
  1700. dev_priv->dummy_query_bo_pinned))
  1701. return 0;
  1702. if (validate_as_mob)
  1703. return ttm_bo_validate(bo, &vmw_mob_placement, true, false);
  1704. /**
  1705. * Put BO in VRAM if there is space, otherwise as a GMR.
  1706. * If there is no space in VRAM and GMR ids are all used up,
  1707. * start evicting GMRs to make room. If the DMA buffer can't be
  1708. * used as a GMR, this will return -ENOMEM.
  1709. */
  1710. ret = ttm_bo_validate(bo, &vmw_vram_gmr_placement, true, false);
  1711. if (likely(ret == 0 || ret == -ERESTARTSYS))
  1712. return ret;
  1713. /**
  1714. * If that failed, try VRAM again, this time evicting
  1715. * previous contents.
  1716. */
  1717. DRM_INFO("Falling through to VRAM.\n");
  1718. ret = ttm_bo_validate(bo, &vmw_vram_placement, true, false);
  1719. return ret;
  1720. }
  1721. static int vmw_validate_buffers(struct vmw_private *dev_priv,
  1722. struct vmw_sw_context *sw_context)
  1723. {
  1724. struct vmw_validate_buffer *entry;
  1725. int ret;
  1726. list_for_each_entry(entry, &sw_context->validate_nodes, base.head) {
  1727. ret = vmw_validate_single_buffer(dev_priv, entry->base.bo,
  1728. entry->validate_as_mob);
  1729. if (unlikely(ret != 0))
  1730. return ret;
  1731. }
  1732. return 0;
  1733. }
  1734. static int vmw_resize_cmd_bounce(struct vmw_sw_context *sw_context,
  1735. uint32_t size)
  1736. {
  1737. if (likely(sw_context->cmd_bounce_size >= size))
  1738. return 0;
  1739. if (sw_context->cmd_bounce_size == 0)
  1740. sw_context->cmd_bounce_size = VMWGFX_CMD_BOUNCE_INIT_SIZE;
  1741. while (sw_context->cmd_bounce_size < size) {
  1742. sw_context->cmd_bounce_size =
  1743. PAGE_ALIGN(sw_context->cmd_bounce_size +
  1744. (sw_context->cmd_bounce_size >> 1));
  1745. }
  1746. if (sw_context->cmd_bounce != NULL)
  1747. vfree(sw_context->cmd_bounce);
  1748. sw_context->cmd_bounce = vmalloc(sw_context->cmd_bounce_size);
  1749. if (sw_context->cmd_bounce == NULL) {
  1750. DRM_ERROR("Failed to allocate command bounce buffer.\n");
  1751. sw_context->cmd_bounce_size = 0;
  1752. return -ENOMEM;
  1753. }
  1754. return 0;
  1755. }
  1756. /**
  1757. * vmw_execbuf_fence_commands - create and submit a command stream fence
  1758. *
  1759. * Creates a fence object and submits a command stream marker.
  1760. * If this fails for some reason, We sync the fifo and return NULL.
  1761. * It is then safe to fence buffers with a NULL pointer.
  1762. *
  1763. * If @p_handle is not NULL @file_priv must also not be NULL. Creates
  1764. * a userspace handle if @p_handle is not NULL, otherwise not.
  1765. */
  1766. int vmw_execbuf_fence_commands(struct drm_file *file_priv,
  1767. struct vmw_private *dev_priv,
  1768. struct vmw_fence_obj **p_fence,
  1769. uint32_t *p_handle)
  1770. {
  1771. uint32_t sequence;
  1772. int ret;
  1773. bool synced = false;
  1774. /* p_handle implies file_priv. */
  1775. BUG_ON(p_handle != NULL && file_priv == NULL);
  1776. ret = vmw_fifo_send_fence(dev_priv, &sequence);
  1777. if (unlikely(ret != 0)) {
  1778. DRM_ERROR("Fence submission error. Syncing.\n");
  1779. synced = true;
  1780. }
  1781. if (p_handle != NULL)
  1782. ret = vmw_user_fence_create(file_priv, dev_priv->fman,
  1783. sequence,
  1784. DRM_VMW_FENCE_FLAG_EXEC,
  1785. p_fence, p_handle);
  1786. else
  1787. ret = vmw_fence_create(dev_priv->fman, sequence,
  1788. DRM_VMW_FENCE_FLAG_EXEC,
  1789. p_fence);
  1790. if (unlikely(ret != 0 && !synced)) {
  1791. (void) vmw_fallback_wait(dev_priv, false, false,
  1792. sequence, false,
  1793. VMW_FENCE_WAIT_TIMEOUT);
  1794. *p_fence = NULL;
  1795. }
  1796. return 0;
  1797. }
  1798. /**
  1799. * vmw_execbuf_copy_fence_user - copy fence object information to
  1800. * user-space.
  1801. *
  1802. * @dev_priv: Pointer to a vmw_private struct.
  1803. * @vmw_fp: Pointer to the struct vmw_fpriv representing the calling file.
  1804. * @ret: Return value from fence object creation.
  1805. * @user_fence_rep: User space address of a struct drm_vmw_fence_rep to
  1806. * which the information should be copied.
  1807. * @fence: Pointer to the fenc object.
  1808. * @fence_handle: User-space fence handle.
  1809. *
  1810. * This function copies fence information to user-space. If copying fails,
  1811. * The user-space struct drm_vmw_fence_rep::error member is hopefully
  1812. * left untouched, and if it's preloaded with an -EFAULT by user-space,
  1813. * the error will hopefully be detected.
  1814. * Also if copying fails, user-space will be unable to signal the fence
  1815. * object so we wait for it immediately, and then unreference the
  1816. * user-space reference.
  1817. */
  1818. void
  1819. vmw_execbuf_copy_fence_user(struct vmw_private *dev_priv,
  1820. struct vmw_fpriv *vmw_fp,
  1821. int ret,
  1822. struct drm_vmw_fence_rep __user *user_fence_rep,
  1823. struct vmw_fence_obj *fence,
  1824. uint32_t fence_handle)
  1825. {
  1826. struct drm_vmw_fence_rep fence_rep;
  1827. if (user_fence_rep == NULL)
  1828. return;
  1829. memset(&fence_rep, 0, sizeof(fence_rep));
  1830. fence_rep.error = ret;
  1831. if (ret == 0) {
  1832. BUG_ON(fence == NULL);
  1833. fence_rep.handle = fence_handle;
  1834. fence_rep.seqno = fence->seqno;
  1835. vmw_update_seqno(dev_priv, &dev_priv->fifo);
  1836. fence_rep.passed_seqno = dev_priv->last_read_seqno;
  1837. }
  1838. /*
  1839. * copy_to_user errors will be detected by user space not
  1840. * seeing fence_rep::error filled in. Typically
  1841. * user-space would have pre-set that member to -EFAULT.
  1842. */
  1843. ret = copy_to_user(user_fence_rep, &fence_rep,
  1844. sizeof(fence_rep));
  1845. /*
  1846. * User-space lost the fence object. We need to sync
  1847. * and unreference the handle.
  1848. */
  1849. if (unlikely(ret != 0) && (fence_rep.error == 0)) {
  1850. ttm_ref_object_base_unref(vmw_fp->tfile,
  1851. fence_handle, TTM_REF_USAGE);
  1852. DRM_ERROR("Fence copy error. Syncing.\n");
  1853. (void) vmw_fence_obj_wait(fence, fence->signal_mask,
  1854. false, false,
  1855. VMW_FENCE_WAIT_TIMEOUT);
  1856. }
  1857. }
  1858. int vmw_execbuf_process(struct drm_file *file_priv,
  1859. struct vmw_private *dev_priv,
  1860. void __user *user_commands,
  1861. void *kernel_commands,
  1862. uint32_t command_size,
  1863. uint64_t throttle_us,
  1864. struct drm_vmw_fence_rep __user *user_fence_rep,
  1865. struct vmw_fence_obj **out_fence)
  1866. {
  1867. struct vmw_sw_context *sw_context = &dev_priv->ctx;
  1868. struct vmw_fence_obj *fence = NULL;
  1869. struct vmw_resource *error_resource;
  1870. struct list_head resource_list;
  1871. struct ww_acquire_ctx ticket;
  1872. uint32_t handle;
  1873. void *cmd;
  1874. int ret;
  1875. ret = mutex_lock_interruptible(&dev_priv->cmdbuf_mutex);
  1876. if (unlikely(ret != 0))
  1877. return -ERESTARTSYS;
  1878. if (kernel_commands == NULL) {
  1879. sw_context->kernel = false;
  1880. ret = vmw_resize_cmd_bounce(sw_context, command_size);
  1881. if (unlikely(ret != 0))
  1882. goto out_unlock;
  1883. ret = copy_from_user(sw_context->cmd_bounce,
  1884. user_commands, command_size);
  1885. if (unlikely(ret != 0)) {
  1886. ret = -EFAULT;
  1887. DRM_ERROR("Failed copying commands.\n");
  1888. goto out_unlock;
  1889. }
  1890. kernel_commands = sw_context->cmd_bounce;
  1891. } else
  1892. sw_context->kernel = true;
  1893. sw_context->tfile = vmw_fpriv(file_priv)->tfile;
  1894. sw_context->cur_reloc = 0;
  1895. sw_context->cur_val_buf = 0;
  1896. sw_context->fence_flags = 0;
  1897. INIT_LIST_HEAD(&sw_context->resource_list);
  1898. sw_context->cur_query_bo = dev_priv->pinned_bo;
  1899. sw_context->last_query_ctx = NULL;
  1900. sw_context->needs_post_query_barrier = false;
  1901. memset(sw_context->res_cache, 0, sizeof(sw_context->res_cache));
  1902. INIT_LIST_HEAD(&sw_context->validate_nodes);
  1903. INIT_LIST_HEAD(&sw_context->res_relocations);
  1904. if (!sw_context->res_ht_initialized) {
  1905. ret = drm_ht_create(&sw_context->res_ht, VMW_RES_HT_ORDER);
  1906. if (unlikely(ret != 0))
  1907. goto out_unlock;
  1908. sw_context->res_ht_initialized = true;
  1909. }
  1910. INIT_LIST_HEAD(&resource_list);
  1911. ret = vmw_cmd_check_all(dev_priv, sw_context, kernel_commands,
  1912. command_size);
  1913. if (unlikely(ret != 0))
  1914. goto out_err;
  1915. ret = vmw_resources_reserve(sw_context);
  1916. if (unlikely(ret != 0))
  1917. goto out_err;
  1918. ret = ttm_eu_reserve_buffers(&ticket, &sw_context->validate_nodes);
  1919. if (unlikely(ret != 0))
  1920. goto out_err;
  1921. ret = vmw_validate_buffers(dev_priv, sw_context);
  1922. if (unlikely(ret != 0))
  1923. goto out_err;
  1924. ret = vmw_resources_validate(sw_context);
  1925. if (unlikely(ret != 0))
  1926. goto out_err;
  1927. if (throttle_us) {
  1928. ret = vmw_wait_lag(dev_priv, &dev_priv->fifo.marker_queue,
  1929. throttle_us);
  1930. if (unlikely(ret != 0))
  1931. goto out_err;
  1932. }
  1933. ret = mutex_lock_interruptible(&dev_priv->binding_mutex);
  1934. if (unlikely(ret != 0)) {
  1935. ret = -ERESTARTSYS;
  1936. goto out_err;
  1937. }
  1938. cmd = vmw_fifo_reserve(dev_priv, command_size);
  1939. if (unlikely(cmd == NULL)) {
  1940. DRM_ERROR("Failed reserving fifo space for commands.\n");
  1941. ret = -ENOMEM;
  1942. goto out_unlock_binding;
  1943. }
  1944. vmw_apply_relocations(sw_context);
  1945. memcpy(cmd, kernel_commands, command_size);
  1946. vmw_resource_relocations_apply(cmd, &sw_context->res_relocations);
  1947. vmw_resource_relocations_free(&sw_context->res_relocations);
  1948. vmw_fifo_commit(dev_priv, command_size);
  1949. vmw_query_bo_switch_commit(dev_priv, sw_context);
  1950. ret = vmw_execbuf_fence_commands(file_priv, dev_priv,
  1951. &fence,
  1952. (user_fence_rep) ? &handle : NULL);
  1953. /*
  1954. * This error is harmless, because if fence submission fails,
  1955. * vmw_fifo_send_fence will sync. The error will be propagated to
  1956. * user-space in @fence_rep
  1957. */
  1958. if (ret != 0)
  1959. DRM_ERROR("Fence submission error. Syncing.\n");
  1960. vmw_resource_list_unreserve(&sw_context->resource_list, false);
  1961. mutex_unlock(&dev_priv->binding_mutex);
  1962. ttm_eu_fence_buffer_objects(&ticket, &sw_context->validate_nodes,
  1963. (void *) fence);
  1964. if (unlikely(dev_priv->pinned_bo != NULL &&
  1965. !dev_priv->query_cid_valid))
  1966. __vmw_execbuf_release_pinned_bo(dev_priv, fence);
  1967. vmw_clear_validations(sw_context);
  1968. vmw_execbuf_copy_fence_user(dev_priv, vmw_fpriv(file_priv), ret,
  1969. user_fence_rep, fence, handle);
  1970. /* Don't unreference when handing fence out */
  1971. if (unlikely(out_fence != NULL)) {
  1972. *out_fence = fence;
  1973. fence = NULL;
  1974. } else if (likely(fence != NULL)) {
  1975. vmw_fence_obj_unreference(&fence);
  1976. }
  1977. list_splice_init(&sw_context->resource_list, &resource_list);
  1978. mutex_unlock(&dev_priv->cmdbuf_mutex);
  1979. /*
  1980. * Unreference resources outside of the cmdbuf_mutex to
  1981. * avoid deadlocks in resource destruction paths.
  1982. */
  1983. vmw_resource_list_unreference(&resource_list);
  1984. return 0;
  1985. out_unlock_binding:
  1986. mutex_unlock(&dev_priv->binding_mutex);
  1987. out_err:
  1988. vmw_resource_relocations_free(&sw_context->res_relocations);
  1989. vmw_free_relocations(sw_context);
  1990. ttm_eu_backoff_reservation(&ticket, &sw_context->validate_nodes);
  1991. vmw_resource_list_unreserve(&sw_context->resource_list, true);
  1992. vmw_clear_validations(sw_context);
  1993. if (unlikely(dev_priv->pinned_bo != NULL &&
  1994. !dev_priv->query_cid_valid))
  1995. __vmw_execbuf_release_pinned_bo(dev_priv, NULL);
  1996. out_unlock:
  1997. list_splice_init(&sw_context->resource_list, &resource_list);
  1998. error_resource = sw_context->error_resource;
  1999. sw_context->error_resource = NULL;
  2000. mutex_unlock(&dev_priv->cmdbuf_mutex);
  2001. /*
  2002. * Unreference resources outside of the cmdbuf_mutex to
  2003. * avoid deadlocks in resource destruction paths.
  2004. */
  2005. vmw_resource_list_unreference(&resource_list);
  2006. if (unlikely(error_resource != NULL))
  2007. vmw_resource_unreference(&error_resource);
  2008. return ret;
  2009. }
  2010. /**
  2011. * vmw_execbuf_unpin_panic - Idle the fifo and unpin the query buffer.
  2012. *
  2013. * @dev_priv: The device private structure.
  2014. *
  2015. * This function is called to idle the fifo and unpin the query buffer
  2016. * if the normal way to do this hits an error, which should typically be
  2017. * extremely rare.
  2018. */
  2019. static void vmw_execbuf_unpin_panic(struct vmw_private *dev_priv)
  2020. {
  2021. DRM_ERROR("Can't unpin query buffer. Trying to recover.\n");
  2022. (void) vmw_fallback_wait(dev_priv, false, true, 0, false, 10*HZ);
  2023. vmw_bo_pin(dev_priv->pinned_bo, false);
  2024. vmw_bo_pin(dev_priv->dummy_query_bo, false);
  2025. dev_priv->dummy_query_bo_pinned = false;
  2026. }
  2027. /**
  2028. * __vmw_execbuf_release_pinned_bo - Flush queries and unpin the pinned
  2029. * query bo.
  2030. *
  2031. * @dev_priv: The device private structure.
  2032. * @fence: If non-NULL should point to a struct vmw_fence_obj issued
  2033. * _after_ a query barrier that flushes all queries touching the current
  2034. * buffer pointed to by @dev_priv->pinned_bo
  2035. *
  2036. * This function should be used to unpin the pinned query bo, or
  2037. * as a query barrier when we need to make sure that all queries have
  2038. * finished before the next fifo command. (For example on hardware
  2039. * context destructions where the hardware may otherwise leak unfinished
  2040. * queries).
  2041. *
  2042. * This function does not return any failure codes, but make attempts
  2043. * to do safe unpinning in case of errors.
  2044. *
  2045. * The function will synchronize on the previous query barrier, and will
  2046. * thus not finish until that barrier has executed.
  2047. *
  2048. * the @dev_priv->cmdbuf_mutex needs to be held by the current thread
  2049. * before calling this function.
  2050. */
  2051. void __vmw_execbuf_release_pinned_bo(struct vmw_private *dev_priv,
  2052. struct vmw_fence_obj *fence)
  2053. {
  2054. int ret = 0;
  2055. struct list_head validate_list;
  2056. struct ttm_validate_buffer pinned_val, query_val;
  2057. struct vmw_fence_obj *lfence = NULL;
  2058. struct ww_acquire_ctx ticket;
  2059. if (dev_priv->pinned_bo == NULL)
  2060. goto out_unlock;
  2061. INIT_LIST_HEAD(&validate_list);
  2062. pinned_val.bo = ttm_bo_reference(dev_priv->pinned_bo);
  2063. list_add_tail(&pinned_val.head, &validate_list);
  2064. query_val.bo = ttm_bo_reference(dev_priv->dummy_query_bo);
  2065. list_add_tail(&query_val.head, &validate_list);
  2066. do {
  2067. ret = ttm_eu_reserve_buffers(&ticket, &validate_list);
  2068. } while (ret == -ERESTARTSYS);
  2069. if (unlikely(ret != 0)) {
  2070. vmw_execbuf_unpin_panic(dev_priv);
  2071. goto out_no_reserve;
  2072. }
  2073. if (dev_priv->query_cid_valid) {
  2074. BUG_ON(fence != NULL);
  2075. ret = vmw_fifo_emit_dummy_query(dev_priv, dev_priv->query_cid);
  2076. if (unlikely(ret != 0)) {
  2077. vmw_execbuf_unpin_panic(dev_priv);
  2078. goto out_no_emit;
  2079. }
  2080. dev_priv->query_cid_valid = false;
  2081. }
  2082. vmw_bo_pin(dev_priv->pinned_bo, false);
  2083. vmw_bo_pin(dev_priv->dummy_query_bo, false);
  2084. dev_priv->dummy_query_bo_pinned = false;
  2085. if (fence == NULL) {
  2086. (void) vmw_execbuf_fence_commands(NULL, dev_priv, &lfence,
  2087. NULL);
  2088. fence = lfence;
  2089. }
  2090. ttm_eu_fence_buffer_objects(&ticket, &validate_list, (void *) fence);
  2091. if (lfence != NULL)
  2092. vmw_fence_obj_unreference(&lfence);
  2093. ttm_bo_unref(&query_val.bo);
  2094. ttm_bo_unref(&pinned_val.bo);
  2095. ttm_bo_unref(&dev_priv->pinned_bo);
  2096. out_unlock:
  2097. return;
  2098. out_no_emit:
  2099. ttm_eu_backoff_reservation(&ticket, &validate_list);
  2100. out_no_reserve:
  2101. ttm_bo_unref(&query_val.bo);
  2102. ttm_bo_unref(&pinned_val.bo);
  2103. ttm_bo_unref(&dev_priv->pinned_bo);
  2104. }
  2105. /**
  2106. * vmw_execbuf_release_pinned_bo - Flush queries and unpin the pinned
  2107. * query bo.
  2108. *
  2109. * @dev_priv: The device private structure.
  2110. *
  2111. * This function should be used to unpin the pinned query bo, or
  2112. * as a query barrier when we need to make sure that all queries have
  2113. * finished before the next fifo command. (For example on hardware
  2114. * context destructions where the hardware may otherwise leak unfinished
  2115. * queries).
  2116. *
  2117. * This function does not return any failure codes, but make attempts
  2118. * to do safe unpinning in case of errors.
  2119. *
  2120. * The function will synchronize on the previous query barrier, and will
  2121. * thus not finish until that barrier has executed.
  2122. */
  2123. void vmw_execbuf_release_pinned_bo(struct vmw_private *dev_priv)
  2124. {
  2125. mutex_lock(&dev_priv->cmdbuf_mutex);
  2126. if (dev_priv->query_cid_valid)
  2127. __vmw_execbuf_release_pinned_bo(dev_priv, NULL);
  2128. mutex_unlock(&dev_priv->cmdbuf_mutex);
  2129. }
  2130. int vmw_execbuf_ioctl(struct drm_device *dev, void *data,
  2131. struct drm_file *file_priv)
  2132. {
  2133. struct vmw_private *dev_priv = vmw_priv(dev);
  2134. struct drm_vmw_execbuf_arg *arg = (struct drm_vmw_execbuf_arg *)data;
  2135. struct vmw_master *vmaster = vmw_master(file_priv->master);
  2136. int ret;
  2137. /*
  2138. * This will allow us to extend the ioctl argument while
  2139. * maintaining backwards compatibility:
  2140. * We take different code paths depending on the value of
  2141. * arg->version.
  2142. */
  2143. if (unlikely(arg->version != DRM_VMW_EXECBUF_VERSION)) {
  2144. DRM_ERROR("Incorrect execbuf version.\n");
  2145. DRM_ERROR("You're running outdated experimental "
  2146. "vmwgfx user-space drivers.");
  2147. return -EINVAL;
  2148. }
  2149. ret = ttm_read_lock(&vmaster->lock, true);
  2150. if (unlikely(ret != 0))
  2151. return ret;
  2152. ret = vmw_execbuf_process(file_priv, dev_priv,
  2153. (void __user *)(unsigned long)arg->commands,
  2154. NULL, arg->command_size, arg->throttle_us,
  2155. (void __user *)(unsigned long)arg->fence_rep,
  2156. NULL);
  2157. if (unlikely(ret != 0))
  2158. goto out_unlock;
  2159. vmw_kms_cursor_post_execbuf(dev_priv);
  2160. out_unlock:
  2161. ttm_read_unlock(&vmaster->lock);
  2162. return ret;
  2163. }