ops.c 51 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195119611971198119912001201120212031204120512061207120812091210121112121213121412151216121712181219122012211222122312241225122612271228122912301231123212331234123512361237123812391240124112421243124412451246124712481249125012511252125312541255125612571258125912601261126212631264126512661267126812691270127112721273127412751276127712781279128012811282128312841285128612871288128912901291129212931294129512961297129812991300130113021303130413051306130713081309131013111312131313141315131613171318131913201321132213231324132513261327132813291330133113321333133413351336133713381339134013411342134313441345134613471348134913501351135213531354135513561357135813591360136113621363136413651366136713681369137013711372137313741375137613771378137913801381138213831384138513861387138813891390139113921393139413951396139713981399140014011402140314041405140614071408140914101411141214131414141514161417141814191420142114221423142414251426142714281429143014311432143314341435143614371438143914401441144214431444144514461447144814491450145114521453145414551456145714581459146014611462146314641465146614671468146914701471147214731474147514761477147814791480148114821483148414851486148714881489149014911492149314941495149614971498149915001501150215031504150515061507150815091510151115121513151415151516151715181519152015211522152315241525152615271528152915301531153215331534153515361537153815391540154115421543154415451546154715481549155015511552155315541555155615571558155915601561156215631564156515661567156815691570157115721573157415751576157715781579158015811582158315841585158615871588158915901591159215931594159515961597159815991600160116021603160416051606160716081609161016111612161316141615161616171618161916201621162216231624162516261627162816291630163116321633163416351636163716381639164016411642164316441645164616471648164916501651165216531654165516561657165816591660166116621663166416651666166716681669167016711672167316741675167616771678167916801681168216831684168516861687168816891690169116921693169416951696169716981699170017011702170317041705170617071708170917101711171217131714171517161717171817191720172117221723172417251726172717281729173017311732173317341735173617371738173917401741174217431744174517461747
  1. /******************************************************************************
  2. *
  3. * This file is provided under a dual BSD/GPLv2 license. When using or
  4. * redistributing this file, you may do so under either license.
  5. *
  6. * GPL LICENSE SUMMARY
  7. *
  8. * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
  9. * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
  10. * Copyright(c) 2016 - 2017 Intel Deutschland GmbH
  11. *
  12. * This program is free software; you can redistribute it and/or modify
  13. * it under the terms of version 2 of the GNU General Public License as
  14. * published by the Free Software Foundation.
  15. *
  16. * This program is distributed in the hope that it will be useful, but
  17. * WITHOUT ANY WARRANTY; without even the implied warranty of
  18. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  19. * General Public License for more details.
  20. *
  21. * You should have received a copy of the GNU General Public License
  22. * along with this program; if not, write to the Free Software
  23. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
  24. * USA
  25. *
  26. * The full GNU General Public License is included in this distribution
  27. * in the file called COPYING.
  28. *
  29. * Contact Information:
  30. * Intel Linux Wireless <linuxwifi@intel.com>
  31. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  32. *
  33. * BSD LICENSE
  34. *
  35. * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
  36. * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
  37. * Copyright(c) 2016 - 2017 Intel Deutschland GmbH
  38. * All rights reserved.
  39. *
  40. * Redistribution and use in source and binary forms, with or without
  41. * modification, are permitted provided that the following conditions
  42. * are met:
  43. *
  44. * * Redistributions of source code must retain the above copyright
  45. * notice, this list of conditions and the following disclaimer.
  46. * * Redistributions in binary form must reproduce the above copyright
  47. * notice, this list of conditions and the following disclaimer in
  48. * the documentation and/or other materials provided with the
  49. * distribution.
  50. * * Neither the name Intel Corporation nor the names of its
  51. * contributors may be used to endorse or promote products derived
  52. * from this software without specific prior written permission.
  53. *
  54. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  55. * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  56. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  57. * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  58. * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  59. * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  60. * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  61. * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  62. * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  63. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  64. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  65. *
  66. *****************************************************************************/
  67. #include <linux/module.h>
  68. #include <linux/vmalloc.h>
  69. #include <net/mac80211.h>
  70. #include "iwl-notif-wait.h"
  71. #include "iwl-trans.h"
  72. #include "iwl-op-mode.h"
  73. #include "iwl-fw.h"
  74. #include "iwl-debug.h"
  75. #include "iwl-drv.h"
  76. #include "iwl-modparams.h"
  77. #include "mvm.h"
  78. #include "iwl-phy-db.h"
  79. #include "iwl-eeprom-parse.h"
  80. #include "iwl-csr.h"
  81. #include "iwl-io.h"
  82. #include "iwl-prph.h"
  83. #include "rs.h"
  84. #include "fw-api-scan.h"
  85. #include "time-event.h"
  86. #include "fw-dbg.h"
  87. #include "fw-api.h"
  88. #include "fw-api-scan.h"
  89. #define DRV_DESCRIPTION "The new Intel(R) wireless AGN driver for Linux"
  90. MODULE_DESCRIPTION(DRV_DESCRIPTION);
  91. MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
  92. MODULE_LICENSE("GPL");
  93. static const struct iwl_op_mode_ops iwl_mvm_ops;
  94. static const struct iwl_op_mode_ops iwl_mvm_ops_mq;
  95. struct iwl_mvm_mod_params iwlmvm_mod_params = {
  96. .power_scheme = IWL_POWER_SCHEME_BPS,
  97. .tfd_q_hang_detect = true
  98. /* rest of fields are 0 by default */
  99. };
  100. module_param_named(init_dbg, iwlmvm_mod_params.init_dbg, bool, S_IRUGO);
  101. MODULE_PARM_DESC(init_dbg,
  102. "set to true to debug an ASSERT in INIT fw (default: false");
  103. module_param_named(power_scheme, iwlmvm_mod_params.power_scheme, int, S_IRUGO);
  104. MODULE_PARM_DESC(power_scheme,
  105. "power management scheme: 1-active, 2-balanced, 3-low power, default: 2");
  106. module_param_named(tfd_q_hang_detect, iwlmvm_mod_params.tfd_q_hang_detect,
  107. bool, S_IRUGO);
  108. MODULE_PARM_DESC(tfd_q_hang_detect,
  109. "TFD queues hang detection (default: true");
  110. /*
  111. * module init and exit functions
  112. */
  113. static int __init iwl_mvm_init(void)
  114. {
  115. int ret;
  116. ret = iwl_mvm_rate_control_register();
  117. if (ret) {
  118. pr_err("Unable to register rate control algorithm: %d\n", ret);
  119. return ret;
  120. }
  121. ret = iwl_opmode_register("iwlmvm", &iwl_mvm_ops);
  122. if (ret) {
  123. pr_err("Unable to register MVM op_mode: %d\n", ret);
  124. iwl_mvm_rate_control_unregister();
  125. }
  126. return ret;
  127. }
  128. module_init(iwl_mvm_init);
  129. static void __exit iwl_mvm_exit(void)
  130. {
  131. iwl_opmode_deregister("iwlmvm");
  132. iwl_mvm_rate_control_unregister();
  133. }
  134. module_exit(iwl_mvm_exit);
  135. static void iwl_mvm_nic_config(struct iwl_op_mode *op_mode)
  136. {
  137. struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode);
  138. u8 radio_cfg_type, radio_cfg_step, radio_cfg_dash;
  139. u32 reg_val = 0;
  140. u32 phy_config = iwl_mvm_get_phy_config(mvm);
  141. radio_cfg_type = (phy_config & FW_PHY_CFG_RADIO_TYPE) >>
  142. FW_PHY_CFG_RADIO_TYPE_POS;
  143. radio_cfg_step = (phy_config & FW_PHY_CFG_RADIO_STEP) >>
  144. FW_PHY_CFG_RADIO_STEP_POS;
  145. radio_cfg_dash = (phy_config & FW_PHY_CFG_RADIO_DASH) >>
  146. FW_PHY_CFG_RADIO_DASH_POS;
  147. /* SKU control */
  148. reg_val |= CSR_HW_REV_STEP(mvm->trans->hw_rev) <<
  149. CSR_HW_IF_CONFIG_REG_POS_MAC_STEP;
  150. reg_val |= CSR_HW_REV_DASH(mvm->trans->hw_rev) <<
  151. CSR_HW_IF_CONFIG_REG_POS_MAC_DASH;
  152. /* radio configuration */
  153. reg_val |= radio_cfg_type << CSR_HW_IF_CONFIG_REG_POS_PHY_TYPE;
  154. reg_val |= radio_cfg_step << CSR_HW_IF_CONFIG_REG_POS_PHY_STEP;
  155. reg_val |= radio_cfg_dash << CSR_HW_IF_CONFIG_REG_POS_PHY_DASH;
  156. WARN_ON((radio_cfg_type << CSR_HW_IF_CONFIG_REG_POS_PHY_TYPE) &
  157. ~CSR_HW_IF_CONFIG_REG_MSK_PHY_TYPE);
  158. /*
  159. * TODO: Bits 7-8 of CSR in 8000 HW family and higher set the ADC
  160. * sampling, and shouldn't be set to any non-zero value.
  161. * The same is supposed to be true of the other HW, but unsetting
  162. * them (such as the 7260) causes automatic tests to fail on seemingly
  163. * unrelated errors. Need to further investigate this, but for now
  164. * we'll separate cases.
  165. */
  166. if (mvm->trans->cfg->device_family < IWL_DEVICE_FAMILY_8000)
  167. reg_val |= CSR_HW_IF_CONFIG_REG_BIT_RADIO_SI;
  168. iwl_trans_set_bits_mask(mvm->trans, CSR_HW_IF_CONFIG_REG,
  169. CSR_HW_IF_CONFIG_REG_MSK_MAC_DASH |
  170. CSR_HW_IF_CONFIG_REG_MSK_MAC_STEP |
  171. CSR_HW_IF_CONFIG_REG_MSK_PHY_TYPE |
  172. CSR_HW_IF_CONFIG_REG_MSK_PHY_STEP |
  173. CSR_HW_IF_CONFIG_REG_MSK_PHY_DASH |
  174. CSR_HW_IF_CONFIG_REG_BIT_RADIO_SI |
  175. CSR_HW_IF_CONFIG_REG_BIT_MAC_SI,
  176. reg_val);
  177. IWL_DEBUG_INFO(mvm, "Radio type=0x%x-0x%x-0x%x\n", radio_cfg_type,
  178. radio_cfg_step, radio_cfg_dash);
  179. /*
  180. * W/A : NIC is stuck in a reset state after Early PCIe power off
  181. * (PCIe power is lost before PERST# is asserted), causing ME FW
  182. * to lose ownership and not being able to obtain it back.
  183. */
  184. if (!mvm->trans->cfg->apmg_not_supported)
  185. iwl_set_bits_mask_prph(mvm->trans, APMG_PS_CTRL_REG,
  186. APMG_PS_CTRL_EARLY_PWR_OFF_RESET_DIS,
  187. ~APMG_PS_CTRL_EARLY_PWR_OFF_RESET_DIS);
  188. }
  189. /**
  190. * enum iwl_rx_handler_context context for Rx handler
  191. * @RX_HANDLER_SYNC : this means that it will be called in the Rx path
  192. * which can't acquire mvm->mutex.
  193. * @RX_HANDLER_ASYNC_LOCKED : If the handler needs to hold mvm->mutex
  194. * (and only in this case!), it should be set as ASYNC. In that case,
  195. * it will be called from a worker with mvm->mutex held.
  196. * @RX_HANDLER_ASYNC_UNLOCKED : in case the handler needs to lock the
  197. * mutex itself, it will be called from a worker without mvm->mutex held.
  198. */
  199. enum iwl_rx_handler_context {
  200. RX_HANDLER_SYNC,
  201. RX_HANDLER_ASYNC_LOCKED,
  202. RX_HANDLER_ASYNC_UNLOCKED,
  203. };
  204. /**
  205. * struct iwl_rx_handlers handler for FW notification
  206. * @cmd_id: command id
  207. * @context: see &iwl_rx_handler_context
  208. * @fn: the function is called when notification is received
  209. */
  210. struct iwl_rx_handlers {
  211. u16 cmd_id;
  212. enum iwl_rx_handler_context context;
  213. void (*fn)(struct iwl_mvm *mvm, struct iwl_rx_cmd_buffer *rxb);
  214. };
  215. #define RX_HANDLER(_cmd_id, _fn, _context) \
  216. { .cmd_id = _cmd_id, .fn = _fn, .context = _context }
  217. #define RX_HANDLER_GRP(_grp, _cmd, _fn, _context) \
  218. { .cmd_id = WIDE_ID(_grp, _cmd), .fn = _fn, .context = _context }
  219. /*
  220. * Handlers for fw notifications
  221. * Convention: RX_HANDLER(CMD_NAME, iwl_mvm_rx_CMD_NAME
  222. * This list should be in order of frequency for performance purposes.
  223. *
  224. * The handler can be one from three contexts, see &iwl_rx_handler_context
  225. */
  226. static const struct iwl_rx_handlers iwl_mvm_rx_handlers[] = {
  227. RX_HANDLER(TX_CMD, iwl_mvm_rx_tx_cmd, RX_HANDLER_SYNC),
  228. RX_HANDLER(BA_NOTIF, iwl_mvm_rx_ba_notif, RX_HANDLER_SYNC),
  229. RX_HANDLER(BT_PROFILE_NOTIFICATION, iwl_mvm_rx_bt_coex_notif,
  230. RX_HANDLER_ASYNC_LOCKED),
  231. RX_HANDLER(BEACON_NOTIFICATION, iwl_mvm_rx_beacon_notif,
  232. RX_HANDLER_ASYNC_LOCKED),
  233. RX_HANDLER(STATISTICS_NOTIFICATION, iwl_mvm_rx_statistics,
  234. RX_HANDLER_ASYNC_LOCKED),
  235. RX_HANDLER(ANTENNA_COUPLING_NOTIFICATION,
  236. iwl_mvm_rx_ant_coupling_notif, RX_HANDLER_ASYNC_LOCKED),
  237. RX_HANDLER(BA_WINDOW_STATUS_NOTIFICATION_ID,
  238. iwl_mvm_window_status_notif, RX_HANDLER_SYNC),
  239. RX_HANDLER(TIME_EVENT_NOTIFICATION, iwl_mvm_rx_time_event_notif,
  240. RX_HANDLER_SYNC),
  241. RX_HANDLER(MCC_CHUB_UPDATE_CMD, iwl_mvm_rx_chub_update_mcc,
  242. RX_HANDLER_ASYNC_LOCKED),
  243. RX_HANDLER(EOSP_NOTIFICATION, iwl_mvm_rx_eosp_notif, RX_HANDLER_SYNC),
  244. RX_HANDLER(SCAN_ITERATION_COMPLETE,
  245. iwl_mvm_rx_lmac_scan_iter_complete_notif, RX_HANDLER_SYNC),
  246. RX_HANDLER(SCAN_OFFLOAD_COMPLETE,
  247. iwl_mvm_rx_lmac_scan_complete_notif,
  248. RX_HANDLER_ASYNC_LOCKED),
  249. RX_HANDLER(MATCH_FOUND_NOTIFICATION, iwl_mvm_rx_scan_match_found,
  250. RX_HANDLER_SYNC),
  251. RX_HANDLER(SCAN_COMPLETE_UMAC, iwl_mvm_rx_umac_scan_complete_notif,
  252. RX_HANDLER_ASYNC_LOCKED),
  253. RX_HANDLER(SCAN_ITERATION_COMPLETE_UMAC,
  254. iwl_mvm_rx_umac_scan_iter_complete_notif, RX_HANDLER_SYNC),
  255. RX_HANDLER(CARD_STATE_NOTIFICATION, iwl_mvm_rx_card_state_notif,
  256. RX_HANDLER_SYNC),
  257. RX_HANDLER(MISSED_BEACONS_NOTIFICATION, iwl_mvm_rx_missed_beacons_notif,
  258. RX_HANDLER_SYNC),
  259. RX_HANDLER(REPLY_ERROR, iwl_mvm_rx_fw_error, RX_HANDLER_SYNC),
  260. RX_HANDLER(PSM_UAPSD_AP_MISBEHAVING_NOTIFICATION,
  261. iwl_mvm_power_uapsd_misbehaving_ap_notif, RX_HANDLER_SYNC),
  262. RX_HANDLER(DTS_MEASUREMENT_NOTIFICATION, iwl_mvm_temp_notif,
  263. RX_HANDLER_ASYNC_LOCKED),
  264. RX_HANDLER_GRP(PHY_OPS_GROUP, DTS_MEASUREMENT_NOTIF_WIDE,
  265. iwl_mvm_temp_notif, RX_HANDLER_ASYNC_UNLOCKED),
  266. RX_HANDLER_GRP(PHY_OPS_GROUP, CT_KILL_NOTIFICATION,
  267. iwl_mvm_ct_kill_notif, RX_HANDLER_SYNC),
  268. RX_HANDLER(TDLS_CHANNEL_SWITCH_NOTIFICATION, iwl_mvm_rx_tdls_notif,
  269. RX_HANDLER_ASYNC_LOCKED),
  270. RX_HANDLER(MFUART_LOAD_NOTIFICATION, iwl_mvm_rx_mfuart_notif,
  271. RX_HANDLER_SYNC),
  272. RX_HANDLER(TOF_NOTIFICATION, iwl_mvm_tof_resp_handler,
  273. RX_HANDLER_ASYNC_LOCKED),
  274. RX_HANDLER_GRP(DEBUG_GROUP, MFU_ASSERT_DUMP_NTF,
  275. iwl_mvm_mfu_assert_dump_notif, RX_HANDLER_SYNC),
  276. RX_HANDLER_GRP(PROT_OFFLOAD_GROUP, STORED_BEACON_NTF,
  277. iwl_mvm_rx_stored_beacon_notif, RX_HANDLER_SYNC),
  278. RX_HANDLER_GRP(DATA_PATH_GROUP, MU_GROUP_MGMT_NOTIF,
  279. iwl_mvm_mu_mimo_grp_notif, RX_HANDLER_SYNC),
  280. RX_HANDLER_GRP(DATA_PATH_GROUP, STA_PM_NOTIF,
  281. iwl_mvm_sta_pm_notif, RX_HANDLER_SYNC),
  282. };
  283. #undef RX_HANDLER
  284. #undef RX_HANDLER_GRP
  285. /* Please keep this array *SORTED* by hex value.
  286. * Access is done through binary search
  287. */
  288. static const struct iwl_hcmd_names iwl_mvm_legacy_names[] = {
  289. HCMD_NAME(MVM_ALIVE),
  290. HCMD_NAME(REPLY_ERROR),
  291. HCMD_NAME(ECHO_CMD),
  292. HCMD_NAME(INIT_COMPLETE_NOTIF),
  293. HCMD_NAME(PHY_CONTEXT_CMD),
  294. HCMD_NAME(DBG_CFG),
  295. HCMD_NAME(ANTENNA_COUPLING_NOTIFICATION),
  296. HCMD_NAME(SCAN_CFG_CMD),
  297. HCMD_NAME(SCAN_REQ_UMAC),
  298. HCMD_NAME(SCAN_ABORT_UMAC),
  299. HCMD_NAME(SCAN_COMPLETE_UMAC),
  300. HCMD_NAME(TOF_CMD),
  301. HCMD_NAME(TOF_NOTIFICATION),
  302. HCMD_NAME(BA_WINDOW_STATUS_NOTIFICATION_ID),
  303. HCMD_NAME(ADD_STA_KEY),
  304. HCMD_NAME(ADD_STA),
  305. HCMD_NAME(REMOVE_STA),
  306. HCMD_NAME(FW_GET_ITEM_CMD),
  307. HCMD_NAME(TX_CMD),
  308. HCMD_NAME(SCD_QUEUE_CFG),
  309. HCMD_NAME(TXPATH_FLUSH),
  310. HCMD_NAME(MGMT_MCAST_KEY),
  311. HCMD_NAME(WEP_KEY),
  312. HCMD_NAME(SHARED_MEM_CFG),
  313. HCMD_NAME(TDLS_CHANNEL_SWITCH_CMD),
  314. HCMD_NAME(MAC_CONTEXT_CMD),
  315. HCMD_NAME(TIME_EVENT_CMD),
  316. HCMD_NAME(TIME_EVENT_NOTIFICATION),
  317. HCMD_NAME(BINDING_CONTEXT_CMD),
  318. HCMD_NAME(TIME_QUOTA_CMD),
  319. HCMD_NAME(NON_QOS_TX_COUNTER_CMD),
  320. HCMD_NAME(LQ_CMD),
  321. HCMD_NAME(FW_PAGING_BLOCK_CMD),
  322. HCMD_NAME(SCAN_OFFLOAD_REQUEST_CMD),
  323. HCMD_NAME(SCAN_OFFLOAD_ABORT_CMD),
  324. HCMD_NAME(HOT_SPOT_CMD),
  325. HCMD_NAME(SCAN_OFFLOAD_PROFILES_QUERY_CMD),
  326. HCMD_NAME(SCAN_OFFLOAD_HOTSPOTS_CONFIG_CMD),
  327. HCMD_NAME(SCAN_OFFLOAD_HOTSPOTS_QUERY_CMD),
  328. HCMD_NAME(BT_COEX_UPDATE_SW_BOOST),
  329. HCMD_NAME(BT_COEX_UPDATE_CORUN_LUT),
  330. HCMD_NAME(BT_COEX_UPDATE_REDUCED_TXP),
  331. HCMD_NAME(BT_COEX_CI),
  332. HCMD_NAME(PHY_CONFIGURATION_CMD),
  333. HCMD_NAME(CALIB_RES_NOTIF_PHY_DB),
  334. HCMD_NAME(PHY_DB_CMD),
  335. HCMD_NAME(SCAN_OFFLOAD_COMPLETE),
  336. HCMD_NAME(SCAN_OFFLOAD_UPDATE_PROFILES_CMD),
  337. HCMD_NAME(SCAN_OFFLOAD_CONFIG_CMD),
  338. HCMD_NAME(POWER_TABLE_CMD),
  339. HCMD_NAME(PSM_UAPSD_AP_MISBEHAVING_NOTIFICATION),
  340. HCMD_NAME(REPLY_THERMAL_MNG_BACKOFF),
  341. HCMD_NAME(DC2DC_CONFIG_CMD),
  342. HCMD_NAME(NVM_ACCESS_CMD),
  343. HCMD_NAME(SET_CALIB_DEFAULT_CMD),
  344. HCMD_NAME(BEACON_NOTIFICATION),
  345. HCMD_NAME(BEACON_TEMPLATE_CMD),
  346. HCMD_NAME(TX_ANT_CONFIGURATION_CMD),
  347. HCMD_NAME(BT_CONFIG),
  348. HCMD_NAME(STATISTICS_CMD),
  349. HCMD_NAME(STATISTICS_NOTIFICATION),
  350. HCMD_NAME(EOSP_NOTIFICATION),
  351. HCMD_NAME(REDUCE_TX_POWER_CMD),
  352. HCMD_NAME(CARD_STATE_CMD),
  353. HCMD_NAME(CARD_STATE_NOTIFICATION),
  354. HCMD_NAME(MISSED_BEACONS_NOTIFICATION),
  355. HCMD_NAME(TDLS_CONFIG_CMD),
  356. HCMD_NAME(MAC_PM_POWER_TABLE),
  357. HCMD_NAME(TDLS_CHANNEL_SWITCH_NOTIFICATION),
  358. HCMD_NAME(MFUART_LOAD_NOTIFICATION),
  359. HCMD_NAME(RSS_CONFIG_CMD),
  360. HCMD_NAME(SCAN_ITERATION_COMPLETE_UMAC),
  361. HCMD_NAME(REPLY_RX_PHY_CMD),
  362. HCMD_NAME(REPLY_RX_MPDU_CMD),
  363. HCMD_NAME(BA_NOTIF),
  364. HCMD_NAME(MCC_UPDATE_CMD),
  365. HCMD_NAME(MCC_CHUB_UPDATE_CMD),
  366. HCMD_NAME(MARKER_CMD),
  367. HCMD_NAME(BT_COEX_PRIO_TABLE),
  368. HCMD_NAME(BT_COEX_PROT_ENV),
  369. HCMD_NAME(BT_PROFILE_NOTIFICATION),
  370. HCMD_NAME(BCAST_FILTER_CMD),
  371. HCMD_NAME(MCAST_FILTER_CMD),
  372. HCMD_NAME(REPLY_SF_CFG_CMD),
  373. HCMD_NAME(REPLY_BEACON_FILTERING_CMD),
  374. HCMD_NAME(D3_CONFIG_CMD),
  375. HCMD_NAME(PROT_OFFLOAD_CONFIG_CMD),
  376. HCMD_NAME(OFFLOADS_QUERY_CMD),
  377. HCMD_NAME(REMOTE_WAKE_CONFIG_CMD),
  378. HCMD_NAME(MATCH_FOUND_NOTIFICATION),
  379. HCMD_NAME(CMD_DTS_MEASUREMENT_TRIGGER),
  380. HCMD_NAME(DTS_MEASUREMENT_NOTIFICATION),
  381. HCMD_NAME(WOWLAN_PATTERNS),
  382. HCMD_NAME(WOWLAN_CONFIGURATION),
  383. HCMD_NAME(WOWLAN_TSC_RSC_PARAM),
  384. HCMD_NAME(WOWLAN_TKIP_PARAM),
  385. HCMD_NAME(WOWLAN_KEK_KCK_MATERIAL),
  386. HCMD_NAME(WOWLAN_GET_STATUSES),
  387. HCMD_NAME(WOWLAN_TX_POWER_PER_DB),
  388. HCMD_NAME(SCAN_ITERATION_COMPLETE),
  389. HCMD_NAME(D0I3_END_CMD),
  390. HCMD_NAME(LTR_CONFIG),
  391. HCMD_NAME(REPLY_DEBUG_CMD),
  392. };
  393. /* Please keep this array *SORTED* by hex value.
  394. * Access is done through binary search
  395. */
  396. static const struct iwl_hcmd_names iwl_mvm_system_names[] = {
  397. HCMD_NAME(SHARED_MEM_CFG_CMD),
  398. HCMD_NAME(INIT_EXTENDED_CFG_CMD),
  399. };
  400. /* Please keep this array *SORTED* by hex value.
  401. * Access is done through binary search
  402. */
  403. static const struct iwl_hcmd_names iwl_mvm_mac_conf_names[] = {
  404. HCMD_NAME(LINK_QUALITY_MEASUREMENT_CMD),
  405. HCMD_NAME(LINK_QUALITY_MEASUREMENT_COMPLETE_NOTIF),
  406. HCMD_NAME(CHANNEL_SWITCH_NOA_NOTIF),
  407. };
  408. /* Please keep this array *SORTED* by hex value.
  409. * Access is done through binary search
  410. */
  411. static const struct iwl_hcmd_names iwl_mvm_phy_names[] = {
  412. HCMD_NAME(CMD_DTS_MEASUREMENT_TRIGGER_WIDE),
  413. HCMD_NAME(CTDP_CONFIG_CMD),
  414. HCMD_NAME(TEMP_REPORTING_THRESHOLDS_CMD),
  415. HCMD_NAME(GEO_TX_POWER_LIMIT),
  416. HCMD_NAME(CT_KILL_NOTIFICATION),
  417. HCMD_NAME(DTS_MEASUREMENT_NOTIF_WIDE),
  418. };
  419. /* Please keep this array *SORTED* by hex value.
  420. * Access is done through binary search
  421. */
  422. static const struct iwl_hcmd_names iwl_mvm_data_path_names[] = {
  423. HCMD_NAME(DQA_ENABLE_CMD),
  424. HCMD_NAME(UPDATE_MU_GROUPS_CMD),
  425. HCMD_NAME(TRIGGER_RX_QUEUES_NOTIF_CMD),
  426. HCMD_NAME(STA_PM_NOTIF),
  427. HCMD_NAME(MU_GROUP_MGMT_NOTIF),
  428. HCMD_NAME(RX_QUEUES_NOTIFICATION),
  429. };
  430. /* Please keep this array *SORTED* by hex value.
  431. * Access is done through binary search
  432. */
  433. static const struct iwl_hcmd_names iwl_mvm_debug_names[] = {
  434. HCMD_NAME(MFU_ASSERT_DUMP_NTF),
  435. };
  436. /* Please keep this array *SORTED* by hex value.
  437. * Access is done through binary search
  438. */
  439. static const struct iwl_hcmd_names iwl_mvm_prot_offload_names[] = {
  440. HCMD_NAME(STORED_BEACON_NTF),
  441. };
  442. /* Please keep this array *SORTED* by hex value.
  443. * Access is done through binary search
  444. */
  445. static const struct iwl_hcmd_names iwl_mvm_regulatory_and_nvm_names[] = {
  446. HCMD_NAME(NVM_ACCESS_COMPLETE),
  447. HCMD_NAME(NVM_GET_INFO),
  448. };
  449. static const struct iwl_hcmd_arr iwl_mvm_groups[] = {
  450. [LEGACY_GROUP] = HCMD_ARR(iwl_mvm_legacy_names),
  451. [LONG_GROUP] = HCMD_ARR(iwl_mvm_legacy_names),
  452. [SYSTEM_GROUP] = HCMD_ARR(iwl_mvm_system_names),
  453. [MAC_CONF_GROUP] = HCMD_ARR(iwl_mvm_mac_conf_names),
  454. [PHY_OPS_GROUP] = HCMD_ARR(iwl_mvm_phy_names),
  455. [DATA_PATH_GROUP] = HCMD_ARR(iwl_mvm_data_path_names),
  456. [PROT_OFFLOAD_GROUP] = HCMD_ARR(iwl_mvm_prot_offload_names),
  457. [REGULATORY_AND_NVM_GROUP] =
  458. HCMD_ARR(iwl_mvm_regulatory_and_nvm_names),
  459. };
  460. /* this forward declaration can avoid to export the function */
  461. static void iwl_mvm_async_handlers_wk(struct work_struct *wk);
  462. static void iwl_mvm_d0i3_exit_work(struct work_struct *wk);
  463. static u32 calc_min_backoff(struct iwl_trans *trans, const struct iwl_cfg *cfg)
  464. {
  465. const struct iwl_pwr_tx_backoff *pwr_tx_backoff = cfg->pwr_tx_backoffs;
  466. if (!pwr_tx_backoff)
  467. return 0;
  468. while (pwr_tx_backoff->pwr) {
  469. if (trans->dflt_pwr_limit >= pwr_tx_backoff->pwr)
  470. return pwr_tx_backoff->backoff;
  471. pwr_tx_backoff++;
  472. }
  473. return 0;
  474. }
  475. static void iwl_mvm_fw_error_dump_wk(struct work_struct *work);
  476. static void iwl_mvm_tx_unblock_dwork(struct work_struct *work)
  477. {
  478. struct iwl_mvm *mvm =
  479. container_of(work, struct iwl_mvm, cs_tx_unblock_dwork.work);
  480. struct ieee80211_vif *tx_blocked_vif;
  481. struct iwl_mvm_vif *mvmvif;
  482. mutex_lock(&mvm->mutex);
  483. tx_blocked_vif =
  484. rcu_dereference_protected(mvm->csa_tx_blocked_vif,
  485. lockdep_is_held(&mvm->mutex));
  486. if (!tx_blocked_vif)
  487. goto unlock;
  488. mvmvif = iwl_mvm_vif_from_mac80211(tx_blocked_vif);
  489. iwl_mvm_modify_all_sta_disable_tx(mvm, mvmvif, false);
  490. RCU_INIT_POINTER(mvm->csa_tx_blocked_vif, NULL);
  491. unlock:
  492. mutex_unlock(&mvm->mutex);
  493. }
  494. static struct iwl_op_mode *
  495. iwl_op_mode_mvm_start(struct iwl_trans *trans, const struct iwl_cfg *cfg,
  496. const struct iwl_fw *fw, struct dentry *dbgfs_dir)
  497. {
  498. struct ieee80211_hw *hw;
  499. struct iwl_op_mode *op_mode;
  500. struct iwl_mvm *mvm;
  501. struct iwl_trans_config trans_cfg = {};
  502. static const u8 no_reclaim_cmds[] = {
  503. TX_CMD,
  504. };
  505. int err, scan_size;
  506. u32 min_backoff;
  507. /*
  508. * We use IWL_MVM_STATION_COUNT to check the validity of the station
  509. * index all over the driver - check that its value corresponds to the
  510. * array size.
  511. */
  512. BUILD_BUG_ON(ARRAY_SIZE(mvm->fw_id_to_mac_id) != IWL_MVM_STATION_COUNT);
  513. /********************************
  514. * 1. Allocating and configuring HW data
  515. ********************************/
  516. hw = ieee80211_alloc_hw(sizeof(struct iwl_op_mode) +
  517. sizeof(struct iwl_mvm),
  518. &iwl_mvm_hw_ops);
  519. if (!hw)
  520. return NULL;
  521. if (cfg->max_rx_agg_size)
  522. hw->max_rx_aggregation_subframes = cfg->max_rx_agg_size;
  523. if (cfg->max_tx_agg_size)
  524. hw->max_tx_aggregation_subframes = cfg->max_tx_agg_size;
  525. op_mode = hw->priv;
  526. mvm = IWL_OP_MODE_GET_MVM(op_mode);
  527. mvm->dev = trans->dev;
  528. mvm->trans = trans;
  529. mvm->cfg = cfg;
  530. mvm->fw = fw;
  531. mvm->hw = hw;
  532. mvm->init_status = 0;
  533. if (iwl_mvm_has_new_rx_api(mvm)) {
  534. op_mode->ops = &iwl_mvm_ops_mq;
  535. trans->rx_mpdu_cmd_hdr_size = sizeof(struct iwl_rx_mpdu_desc);
  536. } else {
  537. op_mode->ops = &iwl_mvm_ops;
  538. trans->rx_mpdu_cmd_hdr_size =
  539. sizeof(struct iwl_rx_mpdu_res_start);
  540. if (WARN_ON(trans->num_rx_queues > 1))
  541. goto out_free;
  542. }
  543. mvm->restart_fw = iwlwifi_mod_params.restart_fw ? -1 : 0;
  544. if (!iwl_mvm_is_dqa_supported(mvm)) {
  545. mvm->last_agg_queue = mvm->cfg->base_params->num_of_queues - 1;
  546. if (mvm->cfg->base_params->num_of_queues == 16) {
  547. mvm->aux_queue = 11;
  548. mvm->first_agg_queue = 12;
  549. } else {
  550. mvm->aux_queue = 15;
  551. mvm->first_agg_queue = 16;
  552. }
  553. } else {
  554. mvm->aux_queue = IWL_MVM_DQA_AUX_QUEUE;
  555. mvm->probe_queue = IWL_MVM_DQA_AP_PROBE_RESP_QUEUE;
  556. mvm->p2p_dev_queue = IWL_MVM_DQA_P2P_DEVICE_QUEUE;
  557. mvm->first_agg_queue = IWL_MVM_DQA_MIN_DATA_QUEUE;
  558. mvm->last_agg_queue = IWL_MVM_DQA_MAX_DATA_QUEUE;
  559. }
  560. mvm->sf_state = SF_UNINIT;
  561. if (iwl_mvm_has_new_tx_api(mvm))
  562. mvm->cur_ucode = IWL_UCODE_REGULAR;
  563. else
  564. mvm->cur_ucode = IWL_UCODE_INIT;
  565. mvm->drop_bcn_ap_mode = true;
  566. mutex_init(&mvm->mutex);
  567. mutex_init(&mvm->d0i3_suspend_mutex);
  568. spin_lock_init(&mvm->async_handlers_lock);
  569. INIT_LIST_HEAD(&mvm->time_event_list);
  570. INIT_LIST_HEAD(&mvm->aux_roc_te_list);
  571. INIT_LIST_HEAD(&mvm->async_handlers_list);
  572. spin_lock_init(&mvm->time_event_lock);
  573. spin_lock_init(&mvm->queue_info_lock);
  574. INIT_WORK(&mvm->async_handlers_wk, iwl_mvm_async_handlers_wk);
  575. INIT_WORK(&mvm->roc_done_wk, iwl_mvm_roc_done_wk);
  576. INIT_WORK(&mvm->sta_drained_wk, iwl_mvm_sta_drained_wk);
  577. INIT_WORK(&mvm->d0i3_exit_work, iwl_mvm_d0i3_exit_work);
  578. INIT_DELAYED_WORK(&mvm->fw_dump_wk, iwl_mvm_fw_error_dump_wk);
  579. INIT_DELAYED_WORK(&mvm->tdls_cs.dwork, iwl_mvm_tdls_ch_switch_work);
  580. INIT_DELAYED_WORK(&mvm->scan_timeout_dwork, iwl_mvm_scan_timeout_wk);
  581. INIT_WORK(&mvm->add_stream_wk, iwl_mvm_add_new_dqa_stream_wk);
  582. spin_lock_init(&mvm->d0i3_tx_lock);
  583. spin_lock_init(&mvm->refs_lock);
  584. skb_queue_head_init(&mvm->d0i3_tx);
  585. init_waitqueue_head(&mvm->d0i3_exit_waitq);
  586. init_waitqueue_head(&mvm->rx_sync_waitq);
  587. atomic_set(&mvm->queue_sync_counter, 0);
  588. SET_IEEE80211_DEV(mvm->hw, mvm->trans->dev);
  589. INIT_DELAYED_WORK(&mvm->cs_tx_unblock_dwork, iwl_mvm_tx_unblock_dwork);
  590. /*
  591. * Populate the state variables that the transport layer needs
  592. * to know about.
  593. */
  594. trans_cfg.op_mode = op_mode;
  595. trans_cfg.no_reclaim_cmds = no_reclaim_cmds;
  596. trans_cfg.n_no_reclaim_cmds = ARRAY_SIZE(no_reclaim_cmds);
  597. switch (iwlwifi_mod_params.amsdu_size) {
  598. case IWL_AMSDU_DEF:
  599. case IWL_AMSDU_4K:
  600. trans_cfg.rx_buf_size = IWL_AMSDU_4K;
  601. break;
  602. case IWL_AMSDU_8K:
  603. trans_cfg.rx_buf_size = IWL_AMSDU_8K;
  604. break;
  605. case IWL_AMSDU_12K:
  606. trans_cfg.rx_buf_size = IWL_AMSDU_12K;
  607. break;
  608. default:
  609. pr_err("%s: Unsupported amsdu_size: %d\n", KBUILD_MODNAME,
  610. iwlwifi_mod_params.amsdu_size);
  611. trans_cfg.rx_buf_size = IWL_AMSDU_4K;
  612. }
  613. /* the hardware splits the A-MSDU */
  614. if (mvm->cfg->mq_rx_supported)
  615. trans_cfg.rx_buf_size = IWL_AMSDU_4K;
  616. trans->wide_cmd_header = true;
  617. trans_cfg.bc_table_dword = true;
  618. trans_cfg.command_groups = iwl_mvm_groups;
  619. trans_cfg.command_groups_size = ARRAY_SIZE(iwl_mvm_groups);
  620. if (iwl_mvm_is_dqa_supported(mvm))
  621. trans_cfg.cmd_queue = IWL_MVM_DQA_CMD_QUEUE;
  622. else
  623. trans_cfg.cmd_queue = IWL_MVM_CMD_QUEUE;
  624. trans_cfg.cmd_fifo = IWL_MVM_TX_FIFO_CMD;
  625. trans_cfg.scd_set_active = true;
  626. trans_cfg.cb_data_offs = offsetof(struct ieee80211_tx_info,
  627. driver_data[2]);
  628. trans_cfg.sdio_adma_addr = fw->sdio_adma_addr;
  629. trans_cfg.sw_csum_tx = IWL_MVM_SW_TX_CSUM_OFFLOAD;
  630. /* Set a short watchdog for the command queue */
  631. trans_cfg.cmd_q_wdg_timeout =
  632. iwl_mvm_get_wd_timeout(mvm, NULL, false, true);
  633. snprintf(mvm->hw->wiphy->fw_version,
  634. sizeof(mvm->hw->wiphy->fw_version),
  635. "%s", fw->fw_version);
  636. /* Configure transport layer */
  637. iwl_trans_configure(mvm->trans, &trans_cfg);
  638. trans->rx_mpdu_cmd = REPLY_RX_MPDU_CMD;
  639. trans->dbg_dest_tlv = mvm->fw->dbg_dest_tlv;
  640. trans->dbg_dest_reg_num = mvm->fw->dbg_dest_reg_num;
  641. memcpy(trans->dbg_conf_tlv, mvm->fw->dbg_conf_tlv,
  642. sizeof(trans->dbg_conf_tlv));
  643. trans->dbg_trigger_tlv = mvm->fw->dbg_trigger_tlv;
  644. /* set up notification wait support */
  645. iwl_notification_wait_init(&mvm->notif_wait);
  646. /* Init phy db */
  647. mvm->phy_db = iwl_phy_db_init(trans);
  648. if (!mvm->phy_db) {
  649. IWL_ERR(mvm, "Cannot init phy_db\n");
  650. goto out_free;
  651. }
  652. IWL_INFO(mvm, "Detected %s, REV=0x%X\n",
  653. mvm->cfg->name, mvm->trans->hw_rev);
  654. if (iwlwifi_mod_params.nvm_file)
  655. mvm->nvm_file_name = iwlwifi_mod_params.nvm_file;
  656. else
  657. IWL_DEBUG_EEPROM(mvm->trans->dev,
  658. "working without external nvm file\n");
  659. err = iwl_trans_start_hw(mvm->trans);
  660. if (err)
  661. goto out_free;
  662. mutex_lock(&mvm->mutex);
  663. iwl_mvm_ref(mvm, IWL_MVM_REF_INIT_UCODE);
  664. err = iwl_run_init_mvm_ucode(mvm, true);
  665. if (!err || !iwlmvm_mod_params.init_dbg)
  666. iwl_mvm_stop_device(mvm);
  667. iwl_mvm_unref(mvm, IWL_MVM_REF_INIT_UCODE);
  668. mutex_unlock(&mvm->mutex);
  669. /* returns 0 if successful, 1 if success but in rfkill */
  670. if (err < 0) {
  671. IWL_ERR(mvm, "Failed to run INIT ucode: %d\n", err);
  672. goto out_free;
  673. }
  674. scan_size = iwl_mvm_scan_size(mvm);
  675. mvm->scan_cmd = kmalloc(scan_size, GFP_KERNEL);
  676. if (!mvm->scan_cmd)
  677. goto out_free;
  678. /* Set EBS as successful as long as not stated otherwise by the FW. */
  679. mvm->last_ebs_successful = true;
  680. err = iwl_mvm_mac_setup_register(mvm);
  681. if (err)
  682. goto out_free;
  683. mvm->hw_registered = true;
  684. min_backoff = calc_min_backoff(trans, cfg);
  685. iwl_mvm_thermal_initialize(mvm, min_backoff);
  686. err = iwl_mvm_dbgfs_register(mvm, dbgfs_dir);
  687. if (err)
  688. goto out_unregister;
  689. memset(&mvm->rx_stats, 0, sizeof(struct mvm_statistics_rx));
  690. /* The transport always starts with a taken reference, we can
  691. * release it now if d0i3 is supported */
  692. if (iwl_mvm_is_d0i3_supported(mvm))
  693. iwl_trans_unref(mvm->trans);
  694. iwl_mvm_tof_init(mvm);
  695. return op_mode;
  696. out_unregister:
  697. if (iwlmvm_mod_params.init_dbg)
  698. return op_mode;
  699. ieee80211_unregister_hw(mvm->hw);
  700. mvm->hw_registered = false;
  701. iwl_mvm_leds_exit(mvm);
  702. iwl_mvm_thermal_exit(mvm);
  703. out_free:
  704. flush_delayed_work(&mvm->fw_dump_wk);
  705. if (iwlmvm_mod_params.init_dbg)
  706. return op_mode;
  707. iwl_phy_db_free(mvm->phy_db);
  708. kfree(mvm->scan_cmd);
  709. iwl_trans_op_mode_leave(trans);
  710. ieee80211_free_hw(mvm->hw);
  711. return NULL;
  712. }
  713. static void iwl_op_mode_mvm_stop(struct iwl_op_mode *op_mode)
  714. {
  715. struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode);
  716. int i;
  717. /* If d0i3 is supported, we have released the reference that
  718. * the transport started with, so we should take it back now
  719. * that we are leaving.
  720. */
  721. if (iwl_mvm_is_d0i3_supported(mvm))
  722. iwl_trans_ref(mvm->trans);
  723. iwl_mvm_leds_exit(mvm);
  724. iwl_mvm_thermal_exit(mvm);
  725. if (mvm->init_status & IWL_MVM_INIT_STATUS_REG_HW_INIT_COMPLETE) {
  726. ieee80211_unregister_hw(mvm->hw);
  727. mvm->init_status &= ~IWL_MVM_INIT_STATUS_REG_HW_INIT_COMPLETE;
  728. }
  729. kfree(mvm->scan_cmd);
  730. kfree(mvm->mcast_filter_cmd);
  731. mvm->mcast_filter_cmd = NULL;
  732. #if defined(CONFIG_PM_SLEEP) && defined(CONFIG_IWLWIFI_DEBUGFS)
  733. kfree(mvm->d3_resume_sram);
  734. #endif
  735. iwl_trans_op_mode_leave(mvm->trans);
  736. iwl_phy_db_free(mvm->phy_db);
  737. mvm->phy_db = NULL;
  738. kfree(mvm->nvm_data);
  739. for (i = 0; i < NVM_MAX_NUM_SECTIONS; i++)
  740. kfree(mvm->nvm_sections[i].data);
  741. iwl_mvm_tof_clean(mvm);
  742. mutex_destroy(&mvm->mutex);
  743. mutex_destroy(&mvm->d0i3_suspend_mutex);
  744. ieee80211_free_hw(mvm->hw);
  745. }
  746. struct iwl_async_handler_entry {
  747. struct list_head list;
  748. struct iwl_rx_cmd_buffer rxb;
  749. enum iwl_rx_handler_context context;
  750. void (*fn)(struct iwl_mvm *mvm, struct iwl_rx_cmd_buffer *rxb);
  751. };
  752. void iwl_mvm_async_handlers_purge(struct iwl_mvm *mvm)
  753. {
  754. struct iwl_async_handler_entry *entry, *tmp;
  755. spin_lock_bh(&mvm->async_handlers_lock);
  756. list_for_each_entry_safe(entry, tmp, &mvm->async_handlers_list, list) {
  757. iwl_free_rxb(&entry->rxb);
  758. list_del(&entry->list);
  759. kfree(entry);
  760. }
  761. spin_unlock_bh(&mvm->async_handlers_lock);
  762. }
  763. static void iwl_mvm_async_handlers_wk(struct work_struct *wk)
  764. {
  765. struct iwl_mvm *mvm =
  766. container_of(wk, struct iwl_mvm, async_handlers_wk);
  767. struct iwl_async_handler_entry *entry, *tmp;
  768. LIST_HEAD(local_list);
  769. /* Ensure that we are not in stop flow (check iwl_mvm_mac_stop) */
  770. /*
  771. * Sync with Rx path with a lock. Remove all the entries from this list,
  772. * add them to a local one (lock free), and then handle them.
  773. */
  774. spin_lock_bh(&mvm->async_handlers_lock);
  775. list_splice_init(&mvm->async_handlers_list, &local_list);
  776. spin_unlock_bh(&mvm->async_handlers_lock);
  777. list_for_each_entry_safe(entry, tmp, &local_list, list) {
  778. if (entry->context == RX_HANDLER_ASYNC_LOCKED)
  779. mutex_lock(&mvm->mutex);
  780. entry->fn(mvm, &entry->rxb);
  781. iwl_free_rxb(&entry->rxb);
  782. list_del(&entry->list);
  783. if (entry->context == RX_HANDLER_ASYNC_LOCKED)
  784. mutex_unlock(&mvm->mutex);
  785. kfree(entry);
  786. }
  787. }
  788. static inline void iwl_mvm_rx_check_trigger(struct iwl_mvm *mvm,
  789. struct iwl_rx_packet *pkt)
  790. {
  791. struct iwl_fw_dbg_trigger_tlv *trig;
  792. struct iwl_fw_dbg_trigger_cmd *cmds_trig;
  793. int i;
  794. if (!iwl_fw_dbg_trigger_enabled(mvm->fw, FW_DBG_TRIGGER_FW_NOTIF))
  795. return;
  796. trig = iwl_fw_dbg_get_trigger(mvm->fw, FW_DBG_TRIGGER_FW_NOTIF);
  797. cmds_trig = (void *)trig->data;
  798. if (!iwl_fw_dbg_trigger_check_stop(mvm, NULL, trig))
  799. return;
  800. for (i = 0; i < ARRAY_SIZE(cmds_trig->cmds); i++) {
  801. /* don't collect on CMD 0 */
  802. if (!cmds_trig->cmds[i].cmd_id)
  803. break;
  804. if (cmds_trig->cmds[i].cmd_id != pkt->hdr.cmd ||
  805. cmds_trig->cmds[i].group_id != pkt->hdr.group_id)
  806. continue;
  807. iwl_mvm_fw_dbg_collect_trig(mvm, trig,
  808. "CMD 0x%02x.%02x received",
  809. pkt->hdr.group_id, pkt->hdr.cmd);
  810. break;
  811. }
  812. }
  813. static void iwl_mvm_rx_common(struct iwl_mvm *mvm,
  814. struct iwl_rx_cmd_buffer *rxb,
  815. struct iwl_rx_packet *pkt)
  816. {
  817. int i;
  818. iwl_mvm_rx_check_trigger(mvm, pkt);
  819. /*
  820. * Do the notification wait before RX handlers so
  821. * even if the RX handler consumes the RXB we have
  822. * access to it in the notification wait entry.
  823. */
  824. iwl_notification_wait_notify(&mvm->notif_wait, pkt);
  825. for (i = 0; i < ARRAY_SIZE(iwl_mvm_rx_handlers); i++) {
  826. const struct iwl_rx_handlers *rx_h = &iwl_mvm_rx_handlers[i];
  827. struct iwl_async_handler_entry *entry;
  828. if (rx_h->cmd_id != WIDE_ID(pkt->hdr.group_id, pkt->hdr.cmd))
  829. continue;
  830. if (rx_h->context == RX_HANDLER_SYNC) {
  831. rx_h->fn(mvm, rxb);
  832. return;
  833. }
  834. entry = kzalloc(sizeof(*entry), GFP_ATOMIC);
  835. /* we can't do much... */
  836. if (!entry)
  837. return;
  838. entry->rxb._page = rxb_steal_page(rxb);
  839. entry->rxb._offset = rxb->_offset;
  840. entry->rxb._rx_page_order = rxb->_rx_page_order;
  841. entry->fn = rx_h->fn;
  842. entry->context = rx_h->context;
  843. spin_lock(&mvm->async_handlers_lock);
  844. list_add_tail(&entry->list, &mvm->async_handlers_list);
  845. spin_unlock(&mvm->async_handlers_lock);
  846. schedule_work(&mvm->async_handlers_wk);
  847. break;
  848. }
  849. }
  850. static void iwl_mvm_rx(struct iwl_op_mode *op_mode,
  851. struct napi_struct *napi,
  852. struct iwl_rx_cmd_buffer *rxb)
  853. {
  854. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  855. struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode);
  856. u16 cmd = WIDE_ID(pkt->hdr.group_id, pkt->hdr.cmd);
  857. if (likely(cmd == WIDE_ID(LEGACY_GROUP, REPLY_RX_MPDU_CMD)))
  858. iwl_mvm_rx_rx_mpdu(mvm, napi, rxb);
  859. else if (cmd == WIDE_ID(LEGACY_GROUP, REPLY_RX_PHY_CMD))
  860. iwl_mvm_rx_rx_phy_cmd(mvm, rxb);
  861. else
  862. iwl_mvm_rx_common(mvm, rxb, pkt);
  863. }
  864. static void iwl_mvm_rx_mq(struct iwl_op_mode *op_mode,
  865. struct napi_struct *napi,
  866. struct iwl_rx_cmd_buffer *rxb)
  867. {
  868. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  869. struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode);
  870. u16 cmd = WIDE_ID(pkt->hdr.group_id, pkt->hdr.cmd);
  871. if (likely(cmd == WIDE_ID(LEGACY_GROUP, REPLY_RX_MPDU_CMD)))
  872. iwl_mvm_rx_mpdu_mq(mvm, napi, rxb, 0);
  873. else if (unlikely(cmd == WIDE_ID(DATA_PATH_GROUP,
  874. RX_QUEUES_NOTIFICATION)))
  875. iwl_mvm_rx_queue_notif(mvm, rxb, 0);
  876. else if (cmd == WIDE_ID(LEGACY_GROUP, FRAME_RELEASE))
  877. iwl_mvm_rx_frame_release(mvm, napi, rxb, 0);
  878. else
  879. iwl_mvm_rx_common(mvm, rxb, pkt);
  880. }
  881. void iwl_mvm_stop_mac_queues(struct iwl_mvm *mvm, unsigned long mq)
  882. {
  883. int q;
  884. if (WARN_ON_ONCE(!mq))
  885. return;
  886. for_each_set_bit(q, &mq, IEEE80211_MAX_QUEUES) {
  887. if (atomic_inc_return(&mvm->mac80211_queue_stop_count[q]) > 1) {
  888. IWL_DEBUG_TX_QUEUES(mvm,
  889. "mac80211 %d already stopped\n", q);
  890. continue;
  891. }
  892. ieee80211_stop_queue(mvm->hw, q);
  893. }
  894. }
  895. static void iwl_mvm_async_cb(struct iwl_op_mode *op_mode,
  896. const struct iwl_device_cmd *cmd)
  897. {
  898. struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode);
  899. /*
  900. * For now, we only set the CMD_WANT_ASYNC_CALLBACK for ADD_STA
  901. * commands that need to block the Tx queues.
  902. */
  903. iwl_trans_block_txq_ptrs(mvm->trans, false);
  904. }
  905. static void iwl_mvm_stop_sw_queue(struct iwl_op_mode *op_mode, int hw_queue)
  906. {
  907. struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode);
  908. unsigned long mq;
  909. spin_lock_bh(&mvm->queue_info_lock);
  910. mq = mvm->hw_queue_to_mac80211[hw_queue];
  911. spin_unlock_bh(&mvm->queue_info_lock);
  912. iwl_mvm_stop_mac_queues(mvm, mq);
  913. }
  914. void iwl_mvm_start_mac_queues(struct iwl_mvm *mvm, unsigned long mq)
  915. {
  916. int q;
  917. if (WARN_ON_ONCE(!mq))
  918. return;
  919. for_each_set_bit(q, &mq, IEEE80211_MAX_QUEUES) {
  920. if (atomic_dec_return(&mvm->mac80211_queue_stop_count[q]) > 0) {
  921. IWL_DEBUG_TX_QUEUES(mvm,
  922. "mac80211 %d still stopped\n", q);
  923. continue;
  924. }
  925. ieee80211_wake_queue(mvm->hw, q);
  926. }
  927. }
  928. static void iwl_mvm_wake_sw_queue(struct iwl_op_mode *op_mode, int hw_queue)
  929. {
  930. struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode);
  931. unsigned long mq;
  932. spin_lock_bh(&mvm->queue_info_lock);
  933. mq = mvm->hw_queue_to_mac80211[hw_queue];
  934. spin_unlock_bh(&mvm->queue_info_lock);
  935. iwl_mvm_start_mac_queues(mvm, mq);
  936. }
  937. static void iwl_mvm_set_rfkill_state(struct iwl_mvm *mvm)
  938. {
  939. bool state = iwl_mvm_is_radio_killed(mvm);
  940. if (state)
  941. wake_up(&mvm->rx_sync_waitq);
  942. wiphy_rfkill_set_hw_state(mvm->hw->wiphy, state);
  943. }
  944. void iwl_mvm_set_hw_ctkill_state(struct iwl_mvm *mvm, bool state)
  945. {
  946. if (state)
  947. set_bit(IWL_MVM_STATUS_HW_CTKILL, &mvm->status);
  948. else
  949. clear_bit(IWL_MVM_STATUS_HW_CTKILL, &mvm->status);
  950. iwl_mvm_set_rfkill_state(mvm);
  951. }
  952. static bool iwl_mvm_set_hw_rfkill_state(struct iwl_op_mode *op_mode, bool state)
  953. {
  954. struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode);
  955. bool calibrating = ACCESS_ONCE(mvm->calibrating);
  956. if (state)
  957. set_bit(IWL_MVM_STATUS_HW_RFKILL, &mvm->status);
  958. else
  959. clear_bit(IWL_MVM_STATUS_HW_RFKILL, &mvm->status);
  960. iwl_mvm_set_rfkill_state(mvm);
  961. /* iwl_run_init_mvm_ucode is waiting for results, abort it */
  962. if (calibrating)
  963. iwl_abort_notification_waits(&mvm->notif_wait);
  964. /*
  965. * Stop the device if we run OPERATIONAL firmware or if we are in the
  966. * middle of the calibrations.
  967. */
  968. return state && (mvm->cur_ucode != IWL_UCODE_INIT || calibrating);
  969. }
  970. static void iwl_mvm_free_skb(struct iwl_op_mode *op_mode, struct sk_buff *skb)
  971. {
  972. struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode);
  973. struct ieee80211_tx_info *info;
  974. info = IEEE80211_SKB_CB(skb);
  975. iwl_trans_free_tx_cmd(mvm->trans, info->driver_data[1]);
  976. ieee80211_free_txskb(mvm->hw, skb);
  977. }
  978. struct iwl_mvm_reprobe {
  979. struct device *dev;
  980. struct work_struct work;
  981. };
  982. static void iwl_mvm_reprobe_wk(struct work_struct *wk)
  983. {
  984. struct iwl_mvm_reprobe *reprobe;
  985. reprobe = container_of(wk, struct iwl_mvm_reprobe, work);
  986. if (device_reprobe(reprobe->dev))
  987. dev_err(reprobe->dev, "reprobe failed!\n");
  988. kfree(reprobe);
  989. module_put(THIS_MODULE);
  990. }
  991. static void iwl_mvm_fw_error_dump_wk(struct work_struct *work)
  992. {
  993. struct iwl_mvm *mvm =
  994. container_of(work, struct iwl_mvm, fw_dump_wk.work);
  995. if (iwl_mvm_ref_sync(mvm, IWL_MVM_REF_FW_DBG_COLLECT))
  996. return;
  997. mutex_lock(&mvm->mutex);
  998. if (mvm->cfg->device_family == IWL_DEVICE_FAMILY_7000) {
  999. /* stop recording */
  1000. iwl_set_bits_prph(mvm->trans, MON_BUFF_SAMPLE_CTL, 0x100);
  1001. iwl_mvm_fw_error_dump(mvm);
  1002. /* start recording again if the firmware is not crashed */
  1003. if (!test_bit(STATUS_FW_ERROR, &mvm->trans->status) &&
  1004. mvm->fw->dbg_dest_tlv) {
  1005. iwl_clear_bits_prph(mvm->trans,
  1006. MON_BUFF_SAMPLE_CTL, 0x100);
  1007. iwl_clear_bits_prph(mvm->trans,
  1008. MON_BUFF_SAMPLE_CTL, 0x1);
  1009. iwl_set_bits_prph(mvm->trans, MON_BUFF_SAMPLE_CTL, 0x1);
  1010. }
  1011. } else {
  1012. u32 in_sample = iwl_read_prph(mvm->trans, DBGC_IN_SAMPLE);
  1013. u32 out_ctrl = iwl_read_prph(mvm->trans, DBGC_OUT_CTRL);
  1014. /* stop recording */
  1015. iwl_write_prph(mvm->trans, DBGC_IN_SAMPLE, 0);
  1016. udelay(100);
  1017. iwl_write_prph(mvm->trans, DBGC_OUT_CTRL, 0);
  1018. /* wait before we collect the data till the DBGC stop */
  1019. udelay(500);
  1020. iwl_mvm_fw_error_dump(mvm);
  1021. /* start recording again if the firmware is not crashed */
  1022. if (!test_bit(STATUS_FW_ERROR, &mvm->trans->status) &&
  1023. mvm->fw->dbg_dest_tlv) {
  1024. iwl_write_prph(mvm->trans, DBGC_IN_SAMPLE, in_sample);
  1025. iwl_write_prph(mvm->trans, DBGC_OUT_CTRL, out_ctrl);
  1026. }
  1027. }
  1028. mutex_unlock(&mvm->mutex);
  1029. iwl_mvm_unref(mvm, IWL_MVM_REF_FW_DBG_COLLECT);
  1030. }
  1031. void iwl_mvm_nic_restart(struct iwl_mvm *mvm, bool fw_error)
  1032. {
  1033. iwl_abort_notification_waits(&mvm->notif_wait);
  1034. /*
  1035. * This is a bit racy, but worst case we tell mac80211 about
  1036. * a stopped/aborted scan when that was already done which
  1037. * is not a problem. It is necessary to abort any os scan
  1038. * here because mac80211 requires having the scan cleared
  1039. * before restarting.
  1040. * We'll reset the scan_status to NONE in restart cleanup in
  1041. * the next start() call from mac80211. If restart isn't called
  1042. * (no fw restart) scan status will stay busy.
  1043. */
  1044. iwl_mvm_report_scan_aborted(mvm);
  1045. /*
  1046. * If we're restarting already, don't cycle restarts.
  1047. * If INIT fw asserted, it will likely fail again.
  1048. * If WoWLAN fw asserted, don't restart either, mac80211
  1049. * can't recover this since we're already half suspended.
  1050. */
  1051. if (!mvm->restart_fw && fw_error) {
  1052. iwl_mvm_fw_dbg_collect_desc(mvm, &iwl_mvm_dump_desc_assert,
  1053. NULL);
  1054. } else if (test_and_set_bit(IWL_MVM_STATUS_IN_HW_RESTART,
  1055. &mvm->status)) {
  1056. struct iwl_mvm_reprobe *reprobe;
  1057. IWL_ERR(mvm,
  1058. "Firmware error during reconfiguration - reprobe!\n");
  1059. /*
  1060. * get a module reference to avoid doing this while unloading
  1061. * anyway and to avoid scheduling a work with code that's
  1062. * being removed.
  1063. */
  1064. if (!try_module_get(THIS_MODULE)) {
  1065. IWL_ERR(mvm, "Module is being unloaded - abort\n");
  1066. return;
  1067. }
  1068. reprobe = kzalloc(sizeof(*reprobe), GFP_ATOMIC);
  1069. if (!reprobe) {
  1070. module_put(THIS_MODULE);
  1071. return;
  1072. }
  1073. reprobe->dev = mvm->trans->dev;
  1074. INIT_WORK(&reprobe->work, iwl_mvm_reprobe_wk);
  1075. schedule_work(&reprobe->work);
  1076. } else if (mvm->cur_ucode == IWL_UCODE_REGULAR &&
  1077. mvm->hw_registered) {
  1078. /* don't let the transport/FW power down */
  1079. iwl_mvm_ref(mvm, IWL_MVM_REF_UCODE_DOWN);
  1080. if (fw_error && mvm->restart_fw > 0)
  1081. mvm->restart_fw--;
  1082. ieee80211_restart_hw(mvm->hw);
  1083. }
  1084. }
  1085. static void iwl_mvm_nic_error(struct iwl_op_mode *op_mode)
  1086. {
  1087. struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode);
  1088. iwl_mvm_dump_nic_error_log(mvm);
  1089. iwl_mvm_nic_restart(mvm, true);
  1090. }
  1091. static void iwl_mvm_cmd_queue_full(struct iwl_op_mode *op_mode)
  1092. {
  1093. struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode);
  1094. WARN_ON(1);
  1095. iwl_mvm_nic_restart(mvm, true);
  1096. }
  1097. struct iwl_d0i3_iter_data {
  1098. struct iwl_mvm *mvm;
  1099. struct ieee80211_vif *connected_vif;
  1100. u8 ap_sta_id;
  1101. u8 vif_count;
  1102. u8 offloading_tid;
  1103. bool disable_offloading;
  1104. };
  1105. static bool iwl_mvm_disallow_offloading(struct iwl_mvm *mvm,
  1106. struct ieee80211_vif *vif,
  1107. struct iwl_d0i3_iter_data *iter_data)
  1108. {
  1109. struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(vif);
  1110. struct iwl_mvm_sta *mvmsta;
  1111. u32 available_tids = 0;
  1112. u8 tid;
  1113. if (WARN_ON(vif->type != NL80211_IFTYPE_STATION ||
  1114. mvmvif->ap_sta_id == IWL_MVM_INVALID_STA))
  1115. return false;
  1116. mvmsta = iwl_mvm_sta_from_staid_rcu(mvm, mvmvif->ap_sta_id);
  1117. if (!mvmsta)
  1118. return false;
  1119. spin_lock_bh(&mvmsta->lock);
  1120. for (tid = 0; tid < IWL_MAX_TID_COUNT; tid++) {
  1121. struct iwl_mvm_tid_data *tid_data = &mvmsta->tid_data[tid];
  1122. /*
  1123. * in case of pending tx packets, don't use this tid
  1124. * for offloading in order to prevent reuse of the same
  1125. * qos seq counters.
  1126. */
  1127. if (iwl_mvm_tid_queued(mvm, tid_data))
  1128. continue;
  1129. if (tid_data->state != IWL_AGG_OFF)
  1130. continue;
  1131. available_tids |= BIT(tid);
  1132. }
  1133. spin_unlock_bh(&mvmsta->lock);
  1134. /*
  1135. * disallow protocol offloading if we have no available tid
  1136. * (with no pending frames and no active aggregation,
  1137. * as we don't handle "holes" properly - the scheduler needs the
  1138. * frame's seq number and TFD index to match)
  1139. */
  1140. if (!available_tids)
  1141. return true;
  1142. /* for simplicity, just use the first available tid */
  1143. iter_data->offloading_tid = ffs(available_tids) - 1;
  1144. return false;
  1145. }
  1146. static void iwl_mvm_enter_d0i3_iterator(void *_data, u8 *mac,
  1147. struct ieee80211_vif *vif)
  1148. {
  1149. struct iwl_d0i3_iter_data *data = _data;
  1150. struct iwl_mvm *mvm = data->mvm;
  1151. struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(vif);
  1152. u32 flags = CMD_ASYNC | CMD_HIGH_PRIO | CMD_SEND_IN_IDLE;
  1153. IWL_DEBUG_RPM(mvm, "entering D0i3 - vif %pM\n", vif->addr);
  1154. if (vif->type != NL80211_IFTYPE_STATION ||
  1155. !vif->bss_conf.assoc)
  1156. return;
  1157. /*
  1158. * in case of pending tx packets or active aggregations,
  1159. * avoid offloading features in order to prevent reuse of
  1160. * the same qos seq counters.
  1161. */
  1162. if (iwl_mvm_disallow_offloading(mvm, vif, data))
  1163. data->disable_offloading = true;
  1164. iwl_mvm_update_d0i3_power_mode(mvm, vif, true, flags);
  1165. iwl_mvm_send_proto_offload(mvm, vif, data->disable_offloading,
  1166. false, flags);
  1167. /*
  1168. * on init/association, mvm already configures POWER_TABLE_CMD
  1169. * and REPLY_MCAST_FILTER_CMD, so currently don't
  1170. * reconfigure them (we might want to use different
  1171. * params later on, though).
  1172. */
  1173. data->ap_sta_id = mvmvif->ap_sta_id;
  1174. data->vif_count++;
  1175. /*
  1176. * no new commands can be sent at this stage, so it's safe
  1177. * to save the vif pointer during d0i3 entrance.
  1178. */
  1179. data->connected_vif = vif;
  1180. }
  1181. static void iwl_mvm_set_wowlan_data(struct iwl_mvm *mvm,
  1182. struct iwl_wowlan_config_cmd *cmd,
  1183. struct iwl_d0i3_iter_data *iter_data)
  1184. {
  1185. struct ieee80211_sta *ap_sta;
  1186. struct iwl_mvm_sta *mvm_ap_sta;
  1187. if (iter_data->ap_sta_id == IWL_MVM_INVALID_STA)
  1188. return;
  1189. rcu_read_lock();
  1190. ap_sta = rcu_dereference(mvm->fw_id_to_mac_id[iter_data->ap_sta_id]);
  1191. if (IS_ERR_OR_NULL(ap_sta))
  1192. goto out;
  1193. mvm_ap_sta = iwl_mvm_sta_from_mac80211(ap_sta);
  1194. cmd->is_11n_connection = ap_sta->ht_cap.ht_supported;
  1195. cmd->offloading_tid = iter_data->offloading_tid;
  1196. cmd->flags = ENABLE_L3_FILTERING | ENABLE_NBNS_FILTERING |
  1197. ENABLE_DHCP_FILTERING | ENABLE_STORE_BEACON;
  1198. /*
  1199. * The d0i3 uCode takes care of the nonqos counters,
  1200. * so configure only the qos seq ones.
  1201. */
  1202. iwl_mvm_set_wowlan_qos_seq(mvm_ap_sta, cmd);
  1203. out:
  1204. rcu_read_unlock();
  1205. }
  1206. int iwl_mvm_enter_d0i3(struct iwl_op_mode *op_mode)
  1207. {
  1208. struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode);
  1209. u32 flags = CMD_ASYNC | CMD_HIGH_PRIO | CMD_SEND_IN_IDLE;
  1210. int ret;
  1211. struct iwl_d0i3_iter_data d0i3_iter_data = {
  1212. .mvm = mvm,
  1213. };
  1214. struct iwl_wowlan_config_cmd wowlan_config_cmd = {
  1215. .wakeup_filter = cpu_to_le32(IWL_WOWLAN_WAKEUP_RX_FRAME |
  1216. IWL_WOWLAN_WAKEUP_BEACON_MISS |
  1217. IWL_WOWLAN_WAKEUP_LINK_CHANGE),
  1218. };
  1219. struct iwl_d3_manager_config d3_cfg_cmd = {
  1220. .min_sleep_time = cpu_to_le32(1000),
  1221. .wakeup_flags = cpu_to_le32(IWL_WAKEUP_D3_CONFIG_FW_ERROR),
  1222. };
  1223. IWL_DEBUG_RPM(mvm, "MVM entering D0i3\n");
  1224. if (WARN_ON_ONCE(mvm->cur_ucode != IWL_UCODE_REGULAR))
  1225. return -EINVAL;
  1226. set_bit(IWL_MVM_STATUS_IN_D0I3, &mvm->status);
  1227. /*
  1228. * iwl_mvm_ref_sync takes a reference before checking the flag.
  1229. * so by checking there is no held reference we prevent a state
  1230. * in which iwl_mvm_ref_sync continues successfully while we
  1231. * configure the firmware to enter d0i3
  1232. */
  1233. if (iwl_mvm_ref_taken(mvm)) {
  1234. IWL_DEBUG_RPM(mvm->trans, "abort d0i3 due to taken ref\n");
  1235. clear_bit(IWL_MVM_STATUS_IN_D0I3, &mvm->status);
  1236. wake_up(&mvm->d0i3_exit_waitq);
  1237. return 1;
  1238. }
  1239. ieee80211_iterate_active_interfaces_atomic(mvm->hw,
  1240. IEEE80211_IFACE_ITER_NORMAL,
  1241. iwl_mvm_enter_d0i3_iterator,
  1242. &d0i3_iter_data);
  1243. if (d0i3_iter_data.vif_count == 1) {
  1244. mvm->d0i3_ap_sta_id = d0i3_iter_data.ap_sta_id;
  1245. mvm->d0i3_offloading = !d0i3_iter_data.disable_offloading;
  1246. } else {
  1247. WARN_ON_ONCE(d0i3_iter_data.vif_count > 1);
  1248. mvm->d0i3_ap_sta_id = IWL_MVM_INVALID_STA;
  1249. mvm->d0i3_offloading = false;
  1250. }
  1251. /* make sure we have no running tx while configuring the seqno */
  1252. synchronize_net();
  1253. /* Flush the hw queues, in case something got queued during entry */
  1254. /* TODO new tx api */
  1255. if (iwl_mvm_has_new_tx_api(mvm)) {
  1256. WARN_ONCE(1, "d0i3: Need to implement flush TX queue\n");
  1257. } else {
  1258. ret = iwl_mvm_flush_tx_path(mvm, iwl_mvm_flushable_queues(mvm),
  1259. flags);
  1260. if (ret)
  1261. return ret;
  1262. }
  1263. /* configure wowlan configuration only if needed */
  1264. if (mvm->d0i3_ap_sta_id != IWL_MVM_INVALID_STA) {
  1265. /* wake on beacons only if beacon storing isn't supported */
  1266. if (!fw_has_capa(&mvm->fw->ucode_capa,
  1267. IWL_UCODE_TLV_CAPA_BEACON_STORING))
  1268. wowlan_config_cmd.wakeup_filter |=
  1269. cpu_to_le32(IWL_WOWLAN_WAKEUP_BCN_FILTERING);
  1270. iwl_mvm_wowlan_config_key_params(mvm,
  1271. d0i3_iter_data.connected_vif,
  1272. true, flags);
  1273. iwl_mvm_set_wowlan_data(mvm, &wowlan_config_cmd,
  1274. &d0i3_iter_data);
  1275. ret = iwl_mvm_send_cmd_pdu(mvm, WOWLAN_CONFIGURATION, flags,
  1276. sizeof(wowlan_config_cmd),
  1277. &wowlan_config_cmd);
  1278. if (ret)
  1279. return ret;
  1280. }
  1281. return iwl_mvm_send_cmd_pdu(mvm, D3_CONFIG_CMD,
  1282. flags | CMD_MAKE_TRANS_IDLE,
  1283. sizeof(d3_cfg_cmd), &d3_cfg_cmd);
  1284. }
  1285. static void iwl_mvm_exit_d0i3_iterator(void *_data, u8 *mac,
  1286. struct ieee80211_vif *vif)
  1287. {
  1288. struct iwl_mvm *mvm = _data;
  1289. u32 flags = CMD_ASYNC | CMD_HIGH_PRIO;
  1290. IWL_DEBUG_RPM(mvm, "exiting D0i3 - vif %pM\n", vif->addr);
  1291. if (vif->type != NL80211_IFTYPE_STATION ||
  1292. !vif->bss_conf.assoc)
  1293. return;
  1294. iwl_mvm_update_d0i3_power_mode(mvm, vif, false, flags);
  1295. }
  1296. struct iwl_mvm_d0i3_exit_work_iter_data {
  1297. struct iwl_mvm *mvm;
  1298. struct iwl_wowlan_status *status;
  1299. u32 wakeup_reasons;
  1300. };
  1301. static void iwl_mvm_d0i3_exit_work_iter(void *_data, u8 *mac,
  1302. struct ieee80211_vif *vif)
  1303. {
  1304. struct iwl_mvm_d0i3_exit_work_iter_data *data = _data;
  1305. struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(vif);
  1306. u32 reasons = data->wakeup_reasons;
  1307. /* consider only the relevant station interface */
  1308. if (vif->type != NL80211_IFTYPE_STATION || !vif->bss_conf.assoc ||
  1309. data->mvm->d0i3_ap_sta_id != mvmvif->ap_sta_id)
  1310. return;
  1311. if (reasons & IWL_WOWLAN_WAKEUP_BY_DISCONNECTION_ON_DEAUTH)
  1312. iwl_mvm_connection_loss(data->mvm, vif, "D0i3");
  1313. else if (reasons & IWL_WOWLAN_WAKEUP_BY_DISCONNECTION_ON_MISSED_BEACON)
  1314. ieee80211_beacon_loss(vif);
  1315. else
  1316. iwl_mvm_d0i3_update_keys(data->mvm, vif, data->status);
  1317. }
  1318. void iwl_mvm_d0i3_enable_tx(struct iwl_mvm *mvm, __le16 *qos_seq)
  1319. {
  1320. struct ieee80211_sta *sta = NULL;
  1321. struct iwl_mvm_sta *mvm_ap_sta;
  1322. int i;
  1323. bool wake_queues = false;
  1324. lockdep_assert_held(&mvm->mutex);
  1325. spin_lock_bh(&mvm->d0i3_tx_lock);
  1326. if (mvm->d0i3_ap_sta_id == IWL_MVM_INVALID_STA)
  1327. goto out;
  1328. IWL_DEBUG_RPM(mvm, "re-enqueue packets\n");
  1329. /* get the sta in order to update seq numbers and re-enqueue skbs */
  1330. sta = rcu_dereference_protected(
  1331. mvm->fw_id_to_mac_id[mvm->d0i3_ap_sta_id],
  1332. lockdep_is_held(&mvm->mutex));
  1333. if (IS_ERR_OR_NULL(sta)) {
  1334. sta = NULL;
  1335. goto out;
  1336. }
  1337. if (mvm->d0i3_offloading && qos_seq) {
  1338. /* update qos seq numbers if offloading was enabled */
  1339. mvm_ap_sta = iwl_mvm_sta_from_mac80211(sta);
  1340. for (i = 0; i < IWL_MAX_TID_COUNT; i++) {
  1341. u16 seq = le16_to_cpu(qos_seq[i]);
  1342. /* firmware stores last-used one, we store next one */
  1343. seq += 0x10;
  1344. mvm_ap_sta->tid_data[i].seq_number = seq;
  1345. }
  1346. }
  1347. out:
  1348. /* re-enqueue (or drop) all packets */
  1349. while (!skb_queue_empty(&mvm->d0i3_tx)) {
  1350. struct sk_buff *skb = __skb_dequeue(&mvm->d0i3_tx);
  1351. if (!sta || iwl_mvm_tx_skb(mvm, skb, sta))
  1352. ieee80211_free_txskb(mvm->hw, skb);
  1353. /* if the skb_queue is not empty, we need to wake queues */
  1354. wake_queues = true;
  1355. }
  1356. clear_bit(IWL_MVM_STATUS_IN_D0I3, &mvm->status);
  1357. wake_up(&mvm->d0i3_exit_waitq);
  1358. mvm->d0i3_ap_sta_id = IWL_MVM_INVALID_STA;
  1359. if (wake_queues)
  1360. ieee80211_wake_queues(mvm->hw);
  1361. spin_unlock_bh(&mvm->d0i3_tx_lock);
  1362. }
  1363. static void iwl_mvm_d0i3_exit_work(struct work_struct *wk)
  1364. {
  1365. struct iwl_mvm *mvm = container_of(wk, struct iwl_mvm, d0i3_exit_work);
  1366. struct iwl_host_cmd get_status_cmd = {
  1367. .id = WOWLAN_GET_STATUSES,
  1368. .flags = CMD_HIGH_PRIO | CMD_WANT_SKB,
  1369. };
  1370. struct iwl_mvm_d0i3_exit_work_iter_data iter_data = {
  1371. .mvm = mvm,
  1372. };
  1373. struct iwl_wowlan_status *status;
  1374. int ret;
  1375. u32 wakeup_reasons = 0;
  1376. __le16 *qos_seq = NULL;
  1377. mutex_lock(&mvm->mutex);
  1378. ret = iwl_mvm_send_cmd(mvm, &get_status_cmd);
  1379. if (ret)
  1380. goto out;
  1381. status = (void *)get_status_cmd.resp_pkt->data;
  1382. wakeup_reasons = le32_to_cpu(status->wakeup_reasons);
  1383. qos_seq = status->qos_seq_ctr;
  1384. IWL_DEBUG_RPM(mvm, "wakeup reasons: 0x%x\n", wakeup_reasons);
  1385. iter_data.wakeup_reasons = wakeup_reasons;
  1386. iter_data.status = status;
  1387. ieee80211_iterate_active_interfaces(mvm->hw,
  1388. IEEE80211_IFACE_ITER_NORMAL,
  1389. iwl_mvm_d0i3_exit_work_iter,
  1390. &iter_data);
  1391. out:
  1392. iwl_mvm_d0i3_enable_tx(mvm, qos_seq);
  1393. IWL_DEBUG_INFO(mvm, "d0i3 exit completed (wakeup reasons: 0x%x)\n",
  1394. wakeup_reasons);
  1395. /* qos_seq might point inside resp_pkt, so free it only now */
  1396. if (get_status_cmd.resp_pkt)
  1397. iwl_free_resp(&get_status_cmd);
  1398. /* the FW might have updated the regdomain */
  1399. iwl_mvm_update_changed_regdom(mvm);
  1400. iwl_mvm_unref(mvm, IWL_MVM_REF_EXIT_WORK);
  1401. mutex_unlock(&mvm->mutex);
  1402. }
  1403. int _iwl_mvm_exit_d0i3(struct iwl_mvm *mvm)
  1404. {
  1405. u32 flags = CMD_ASYNC | CMD_HIGH_PRIO | CMD_SEND_IN_IDLE |
  1406. CMD_WAKE_UP_TRANS;
  1407. int ret;
  1408. IWL_DEBUG_RPM(mvm, "MVM exiting D0i3\n");
  1409. if (WARN_ON_ONCE(mvm->cur_ucode != IWL_UCODE_REGULAR))
  1410. return -EINVAL;
  1411. mutex_lock(&mvm->d0i3_suspend_mutex);
  1412. if (test_bit(D0I3_DEFER_WAKEUP, &mvm->d0i3_suspend_flags)) {
  1413. IWL_DEBUG_RPM(mvm, "Deferring d0i3 exit until resume\n");
  1414. __set_bit(D0I3_PENDING_WAKEUP, &mvm->d0i3_suspend_flags);
  1415. mutex_unlock(&mvm->d0i3_suspend_mutex);
  1416. return 0;
  1417. }
  1418. mutex_unlock(&mvm->d0i3_suspend_mutex);
  1419. ret = iwl_mvm_send_cmd_pdu(mvm, D0I3_END_CMD, flags, 0, NULL);
  1420. if (ret)
  1421. goto out;
  1422. ieee80211_iterate_active_interfaces_atomic(mvm->hw,
  1423. IEEE80211_IFACE_ITER_NORMAL,
  1424. iwl_mvm_exit_d0i3_iterator,
  1425. mvm);
  1426. out:
  1427. schedule_work(&mvm->d0i3_exit_work);
  1428. return ret;
  1429. }
  1430. int iwl_mvm_exit_d0i3(struct iwl_op_mode *op_mode)
  1431. {
  1432. struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode);
  1433. iwl_mvm_ref(mvm, IWL_MVM_REF_EXIT_WORK);
  1434. return _iwl_mvm_exit_d0i3(mvm);
  1435. }
  1436. #define IWL_MVM_COMMON_OPS \
  1437. /* these could be differentiated */ \
  1438. .async_cb = iwl_mvm_async_cb, \
  1439. .queue_full = iwl_mvm_stop_sw_queue, \
  1440. .queue_not_full = iwl_mvm_wake_sw_queue, \
  1441. .hw_rf_kill = iwl_mvm_set_hw_rfkill_state, \
  1442. .free_skb = iwl_mvm_free_skb, \
  1443. .nic_error = iwl_mvm_nic_error, \
  1444. .cmd_queue_full = iwl_mvm_cmd_queue_full, \
  1445. .nic_config = iwl_mvm_nic_config, \
  1446. .enter_d0i3 = iwl_mvm_enter_d0i3, \
  1447. .exit_d0i3 = iwl_mvm_exit_d0i3, \
  1448. /* as we only register one, these MUST be common! */ \
  1449. .start = iwl_op_mode_mvm_start, \
  1450. .stop = iwl_op_mode_mvm_stop
  1451. static const struct iwl_op_mode_ops iwl_mvm_ops = {
  1452. IWL_MVM_COMMON_OPS,
  1453. .rx = iwl_mvm_rx,
  1454. };
  1455. static void iwl_mvm_rx_mq_rss(struct iwl_op_mode *op_mode,
  1456. struct napi_struct *napi,
  1457. struct iwl_rx_cmd_buffer *rxb,
  1458. unsigned int queue)
  1459. {
  1460. struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode);
  1461. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  1462. u16 cmd = WIDE_ID(pkt->hdr.group_id, pkt->hdr.cmd);
  1463. if (unlikely(cmd == WIDE_ID(LEGACY_GROUP, FRAME_RELEASE)))
  1464. iwl_mvm_rx_frame_release(mvm, napi, rxb, queue);
  1465. else if (unlikely(cmd == WIDE_ID(DATA_PATH_GROUP,
  1466. RX_QUEUES_NOTIFICATION)))
  1467. iwl_mvm_rx_queue_notif(mvm, rxb, queue);
  1468. else if (likely(cmd == WIDE_ID(LEGACY_GROUP, REPLY_RX_MPDU_CMD)))
  1469. iwl_mvm_rx_mpdu_mq(mvm, napi, rxb, queue);
  1470. }
  1471. static const struct iwl_op_mode_ops iwl_mvm_ops_mq = {
  1472. IWL_MVM_COMMON_OPS,
  1473. .rx = iwl_mvm_rx_mq,
  1474. .rx_rss = iwl_mvm_rx_mq_rss,
  1475. };