bnxt_ethtool.c 70 KB

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  1. /* Broadcom NetXtreme-C/E network driver.
  2. *
  3. * Copyright (c) 2014-2016 Broadcom Corporation
  4. * Copyright (c) 2016-2017 Broadcom Limited
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation.
  9. */
  10. #include <linux/ctype.h>
  11. #include <linux/stringify.h>
  12. #include <linux/ethtool.h>
  13. #include <linux/interrupt.h>
  14. #include <linux/pci.h>
  15. #include <linux/etherdevice.h>
  16. #include <linux/crc32.h>
  17. #include <linux/firmware.h>
  18. #include "bnxt_hsi.h"
  19. #include "bnxt.h"
  20. #include "bnxt_xdp.h"
  21. #include "bnxt_ethtool.h"
  22. #include "bnxt_nvm_defs.h" /* NVRAM content constant and structure defs */
  23. #include "bnxt_fw_hdr.h" /* Firmware hdr constant and structure defs */
  24. #define FLASH_NVRAM_TIMEOUT ((HWRM_CMD_TIMEOUT) * 100)
  25. #define FLASH_PACKAGE_TIMEOUT ((HWRM_CMD_TIMEOUT) * 200)
  26. #define INSTALL_PACKAGE_TIMEOUT ((HWRM_CMD_TIMEOUT) * 200)
  27. static char *bnxt_get_pkgver(struct net_device *dev, char *buf, size_t buflen);
  28. static u32 bnxt_get_msglevel(struct net_device *dev)
  29. {
  30. struct bnxt *bp = netdev_priv(dev);
  31. return bp->msg_enable;
  32. }
  33. static void bnxt_set_msglevel(struct net_device *dev, u32 value)
  34. {
  35. struct bnxt *bp = netdev_priv(dev);
  36. bp->msg_enable = value;
  37. }
  38. static int bnxt_get_coalesce(struct net_device *dev,
  39. struct ethtool_coalesce *coal)
  40. {
  41. struct bnxt *bp = netdev_priv(dev);
  42. memset(coal, 0, sizeof(*coal));
  43. coal->rx_coalesce_usecs = bp->rx_coal_ticks;
  44. /* 2 completion records per rx packet */
  45. coal->rx_max_coalesced_frames = bp->rx_coal_bufs / 2;
  46. coal->rx_coalesce_usecs_irq = bp->rx_coal_ticks_irq;
  47. coal->rx_max_coalesced_frames_irq = bp->rx_coal_bufs_irq / 2;
  48. coal->tx_coalesce_usecs = bp->tx_coal_ticks;
  49. coal->tx_max_coalesced_frames = bp->tx_coal_bufs;
  50. coal->tx_coalesce_usecs_irq = bp->tx_coal_ticks_irq;
  51. coal->tx_max_coalesced_frames_irq = bp->tx_coal_bufs_irq;
  52. coal->stats_block_coalesce_usecs = bp->stats_coal_ticks;
  53. return 0;
  54. }
  55. static int bnxt_set_coalesce(struct net_device *dev,
  56. struct ethtool_coalesce *coal)
  57. {
  58. struct bnxt *bp = netdev_priv(dev);
  59. bool update_stats = false;
  60. int rc = 0;
  61. bp->rx_coal_ticks = coal->rx_coalesce_usecs;
  62. /* 2 completion records per rx packet */
  63. bp->rx_coal_bufs = coal->rx_max_coalesced_frames * 2;
  64. bp->rx_coal_ticks_irq = coal->rx_coalesce_usecs_irq;
  65. bp->rx_coal_bufs_irq = coal->rx_max_coalesced_frames_irq * 2;
  66. bp->tx_coal_ticks = coal->tx_coalesce_usecs;
  67. bp->tx_coal_bufs = coal->tx_max_coalesced_frames;
  68. bp->tx_coal_ticks_irq = coal->tx_coalesce_usecs_irq;
  69. bp->tx_coal_bufs_irq = coal->tx_max_coalesced_frames_irq;
  70. if (bp->stats_coal_ticks != coal->stats_block_coalesce_usecs) {
  71. u32 stats_ticks = coal->stats_block_coalesce_usecs;
  72. stats_ticks = clamp_t(u32, stats_ticks,
  73. BNXT_MIN_STATS_COAL_TICKS,
  74. BNXT_MAX_STATS_COAL_TICKS);
  75. stats_ticks = rounddown(stats_ticks, BNXT_MIN_STATS_COAL_TICKS);
  76. bp->stats_coal_ticks = stats_ticks;
  77. update_stats = true;
  78. }
  79. if (netif_running(dev)) {
  80. if (update_stats) {
  81. rc = bnxt_close_nic(bp, true, false);
  82. if (!rc)
  83. rc = bnxt_open_nic(bp, true, false);
  84. } else {
  85. rc = bnxt_hwrm_set_coal(bp);
  86. }
  87. }
  88. return rc;
  89. }
  90. #define BNXT_NUM_STATS 21
  91. #define BNXT_RX_STATS_ENTRY(counter) \
  92. { BNXT_RX_STATS_OFFSET(counter), __stringify(counter) }
  93. #define BNXT_TX_STATS_ENTRY(counter) \
  94. { BNXT_TX_STATS_OFFSET(counter), __stringify(counter) }
  95. static const struct {
  96. long offset;
  97. char string[ETH_GSTRING_LEN];
  98. } bnxt_port_stats_arr[] = {
  99. BNXT_RX_STATS_ENTRY(rx_64b_frames),
  100. BNXT_RX_STATS_ENTRY(rx_65b_127b_frames),
  101. BNXT_RX_STATS_ENTRY(rx_128b_255b_frames),
  102. BNXT_RX_STATS_ENTRY(rx_256b_511b_frames),
  103. BNXT_RX_STATS_ENTRY(rx_512b_1023b_frames),
  104. BNXT_RX_STATS_ENTRY(rx_1024b_1518_frames),
  105. BNXT_RX_STATS_ENTRY(rx_good_vlan_frames),
  106. BNXT_RX_STATS_ENTRY(rx_1519b_2047b_frames),
  107. BNXT_RX_STATS_ENTRY(rx_2048b_4095b_frames),
  108. BNXT_RX_STATS_ENTRY(rx_4096b_9216b_frames),
  109. BNXT_RX_STATS_ENTRY(rx_9217b_16383b_frames),
  110. BNXT_RX_STATS_ENTRY(rx_total_frames),
  111. BNXT_RX_STATS_ENTRY(rx_ucast_frames),
  112. BNXT_RX_STATS_ENTRY(rx_mcast_frames),
  113. BNXT_RX_STATS_ENTRY(rx_bcast_frames),
  114. BNXT_RX_STATS_ENTRY(rx_fcs_err_frames),
  115. BNXT_RX_STATS_ENTRY(rx_ctrl_frames),
  116. BNXT_RX_STATS_ENTRY(rx_pause_frames),
  117. BNXT_RX_STATS_ENTRY(rx_pfc_frames),
  118. BNXT_RX_STATS_ENTRY(rx_align_err_frames),
  119. BNXT_RX_STATS_ENTRY(rx_ovrsz_frames),
  120. BNXT_RX_STATS_ENTRY(rx_jbr_frames),
  121. BNXT_RX_STATS_ENTRY(rx_mtu_err_frames),
  122. BNXT_RX_STATS_ENTRY(rx_tagged_frames),
  123. BNXT_RX_STATS_ENTRY(rx_double_tagged_frames),
  124. BNXT_RX_STATS_ENTRY(rx_good_frames),
  125. BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri0),
  126. BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri1),
  127. BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri2),
  128. BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri3),
  129. BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri4),
  130. BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri5),
  131. BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri6),
  132. BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri7),
  133. BNXT_RX_STATS_ENTRY(rx_undrsz_frames),
  134. BNXT_RX_STATS_ENTRY(rx_eee_lpi_events),
  135. BNXT_RX_STATS_ENTRY(rx_eee_lpi_duration),
  136. BNXT_RX_STATS_ENTRY(rx_bytes),
  137. BNXT_RX_STATS_ENTRY(rx_runt_bytes),
  138. BNXT_RX_STATS_ENTRY(rx_runt_frames),
  139. BNXT_TX_STATS_ENTRY(tx_64b_frames),
  140. BNXT_TX_STATS_ENTRY(tx_65b_127b_frames),
  141. BNXT_TX_STATS_ENTRY(tx_128b_255b_frames),
  142. BNXT_TX_STATS_ENTRY(tx_256b_511b_frames),
  143. BNXT_TX_STATS_ENTRY(tx_512b_1023b_frames),
  144. BNXT_TX_STATS_ENTRY(tx_1024b_1518_frames),
  145. BNXT_TX_STATS_ENTRY(tx_good_vlan_frames),
  146. BNXT_TX_STATS_ENTRY(tx_1519b_2047_frames),
  147. BNXT_TX_STATS_ENTRY(tx_2048b_4095b_frames),
  148. BNXT_TX_STATS_ENTRY(tx_4096b_9216b_frames),
  149. BNXT_TX_STATS_ENTRY(tx_9217b_16383b_frames),
  150. BNXT_TX_STATS_ENTRY(tx_good_frames),
  151. BNXT_TX_STATS_ENTRY(tx_total_frames),
  152. BNXT_TX_STATS_ENTRY(tx_ucast_frames),
  153. BNXT_TX_STATS_ENTRY(tx_mcast_frames),
  154. BNXT_TX_STATS_ENTRY(tx_bcast_frames),
  155. BNXT_TX_STATS_ENTRY(tx_pause_frames),
  156. BNXT_TX_STATS_ENTRY(tx_pfc_frames),
  157. BNXT_TX_STATS_ENTRY(tx_jabber_frames),
  158. BNXT_TX_STATS_ENTRY(tx_fcs_err_frames),
  159. BNXT_TX_STATS_ENTRY(tx_err),
  160. BNXT_TX_STATS_ENTRY(tx_fifo_underruns),
  161. BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri0),
  162. BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri1),
  163. BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri2),
  164. BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri3),
  165. BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri4),
  166. BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri5),
  167. BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri6),
  168. BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri7),
  169. BNXT_TX_STATS_ENTRY(tx_eee_lpi_events),
  170. BNXT_TX_STATS_ENTRY(tx_eee_lpi_duration),
  171. BNXT_TX_STATS_ENTRY(tx_total_collisions),
  172. BNXT_TX_STATS_ENTRY(tx_bytes),
  173. };
  174. #define BNXT_NUM_PORT_STATS ARRAY_SIZE(bnxt_port_stats_arr)
  175. static int bnxt_get_sset_count(struct net_device *dev, int sset)
  176. {
  177. struct bnxt *bp = netdev_priv(dev);
  178. switch (sset) {
  179. case ETH_SS_STATS: {
  180. int num_stats = BNXT_NUM_STATS * bp->cp_nr_rings;
  181. if (bp->flags & BNXT_FLAG_PORT_STATS)
  182. num_stats += BNXT_NUM_PORT_STATS;
  183. return num_stats;
  184. }
  185. case ETH_SS_TEST:
  186. if (!bp->num_tests)
  187. return -EOPNOTSUPP;
  188. return bp->num_tests;
  189. default:
  190. return -EOPNOTSUPP;
  191. }
  192. }
  193. static void bnxt_get_ethtool_stats(struct net_device *dev,
  194. struct ethtool_stats *stats, u64 *buf)
  195. {
  196. u32 i, j = 0;
  197. struct bnxt *bp = netdev_priv(dev);
  198. u32 buf_size = sizeof(struct ctx_hw_stats) * bp->cp_nr_rings;
  199. u32 stat_fields = sizeof(struct ctx_hw_stats) / 8;
  200. memset(buf, 0, buf_size);
  201. if (!bp->bnapi)
  202. return;
  203. for (i = 0; i < bp->cp_nr_rings; i++) {
  204. struct bnxt_napi *bnapi = bp->bnapi[i];
  205. struct bnxt_cp_ring_info *cpr = &bnapi->cp_ring;
  206. __le64 *hw_stats = (__le64 *)cpr->hw_stats;
  207. int k;
  208. for (k = 0; k < stat_fields; j++, k++)
  209. buf[j] = le64_to_cpu(hw_stats[k]);
  210. buf[j++] = cpr->rx_l4_csum_errors;
  211. }
  212. if (bp->flags & BNXT_FLAG_PORT_STATS) {
  213. __le64 *port_stats = (__le64 *)bp->hw_rx_port_stats;
  214. for (i = 0; i < BNXT_NUM_PORT_STATS; i++, j++) {
  215. buf[j] = le64_to_cpu(*(port_stats +
  216. bnxt_port_stats_arr[i].offset));
  217. }
  218. }
  219. }
  220. static void bnxt_get_strings(struct net_device *dev, u32 stringset, u8 *buf)
  221. {
  222. struct bnxt *bp = netdev_priv(dev);
  223. u32 i;
  224. switch (stringset) {
  225. /* The number of strings must match BNXT_NUM_STATS defined above. */
  226. case ETH_SS_STATS:
  227. for (i = 0; i < bp->cp_nr_rings; i++) {
  228. sprintf(buf, "[%d]: rx_ucast_packets", i);
  229. buf += ETH_GSTRING_LEN;
  230. sprintf(buf, "[%d]: rx_mcast_packets", i);
  231. buf += ETH_GSTRING_LEN;
  232. sprintf(buf, "[%d]: rx_bcast_packets", i);
  233. buf += ETH_GSTRING_LEN;
  234. sprintf(buf, "[%d]: rx_discards", i);
  235. buf += ETH_GSTRING_LEN;
  236. sprintf(buf, "[%d]: rx_drops", i);
  237. buf += ETH_GSTRING_LEN;
  238. sprintf(buf, "[%d]: rx_ucast_bytes", i);
  239. buf += ETH_GSTRING_LEN;
  240. sprintf(buf, "[%d]: rx_mcast_bytes", i);
  241. buf += ETH_GSTRING_LEN;
  242. sprintf(buf, "[%d]: rx_bcast_bytes", i);
  243. buf += ETH_GSTRING_LEN;
  244. sprintf(buf, "[%d]: tx_ucast_packets", i);
  245. buf += ETH_GSTRING_LEN;
  246. sprintf(buf, "[%d]: tx_mcast_packets", i);
  247. buf += ETH_GSTRING_LEN;
  248. sprintf(buf, "[%d]: tx_bcast_packets", i);
  249. buf += ETH_GSTRING_LEN;
  250. sprintf(buf, "[%d]: tx_discards", i);
  251. buf += ETH_GSTRING_LEN;
  252. sprintf(buf, "[%d]: tx_drops", i);
  253. buf += ETH_GSTRING_LEN;
  254. sprintf(buf, "[%d]: tx_ucast_bytes", i);
  255. buf += ETH_GSTRING_LEN;
  256. sprintf(buf, "[%d]: tx_mcast_bytes", i);
  257. buf += ETH_GSTRING_LEN;
  258. sprintf(buf, "[%d]: tx_bcast_bytes", i);
  259. buf += ETH_GSTRING_LEN;
  260. sprintf(buf, "[%d]: tpa_packets", i);
  261. buf += ETH_GSTRING_LEN;
  262. sprintf(buf, "[%d]: tpa_bytes", i);
  263. buf += ETH_GSTRING_LEN;
  264. sprintf(buf, "[%d]: tpa_events", i);
  265. buf += ETH_GSTRING_LEN;
  266. sprintf(buf, "[%d]: tpa_aborts", i);
  267. buf += ETH_GSTRING_LEN;
  268. sprintf(buf, "[%d]: rx_l4_csum_errors", i);
  269. buf += ETH_GSTRING_LEN;
  270. }
  271. if (bp->flags & BNXT_FLAG_PORT_STATS) {
  272. for (i = 0; i < BNXT_NUM_PORT_STATS; i++) {
  273. strcpy(buf, bnxt_port_stats_arr[i].string);
  274. buf += ETH_GSTRING_LEN;
  275. }
  276. }
  277. break;
  278. case ETH_SS_TEST:
  279. if (bp->num_tests)
  280. memcpy(buf, bp->test_info->string,
  281. bp->num_tests * ETH_GSTRING_LEN);
  282. break;
  283. default:
  284. netdev_err(bp->dev, "bnxt_get_strings invalid request %x\n",
  285. stringset);
  286. break;
  287. }
  288. }
  289. static void bnxt_get_ringparam(struct net_device *dev,
  290. struct ethtool_ringparam *ering)
  291. {
  292. struct bnxt *bp = netdev_priv(dev);
  293. ering->rx_max_pending = BNXT_MAX_RX_DESC_CNT;
  294. ering->rx_jumbo_max_pending = BNXT_MAX_RX_JUM_DESC_CNT;
  295. ering->tx_max_pending = BNXT_MAX_TX_DESC_CNT;
  296. ering->rx_pending = bp->rx_ring_size;
  297. ering->rx_jumbo_pending = bp->rx_agg_ring_size;
  298. ering->tx_pending = bp->tx_ring_size;
  299. }
  300. static int bnxt_set_ringparam(struct net_device *dev,
  301. struct ethtool_ringparam *ering)
  302. {
  303. struct bnxt *bp = netdev_priv(dev);
  304. if ((ering->rx_pending > BNXT_MAX_RX_DESC_CNT) ||
  305. (ering->tx_pending > BNXT_MAX_TX_DESC_CNT) ||
  306. (ering->tx_pending <= MAX_SKB_FRAGS))
  307. return -EINVAL;
  308. if (netif_running(dev))
  309. bnxt_close_nic(bp, false, false);
  310. bp->rx_ring_size = ering->rx_pending;
  311. bp->tx_ring_size = ering->tx_pending;
  312. bnxt_set_ring_params(bp);
  313. if (netif_running(dev))
  314. return bnxt_open_nic(bp, false, false);
  315. return 0;
  316. }
  317. static void bnxt_get_channels(struct net_device *dev,
  318. struct ethtool_channels *channel)
  319. {
  320. struct bnxt *bp = netdev_priv(dev);
  321. int max_rx_rings, max_tx_rings, tcs;
  322. bnxt_get_max_rings(bp, &max_rx_rings, &max_tx_rings, true);
  323. channel->max_combined = min_t(int, max_rx_rings, max_tx_rings);
  324. if (bnxt_get_max_rings(bp, &max_rx_rings, &max_tx_rings, false)) {
  325. max_rx_rings = 0;
  326. max_tx_rings = 0;
  327. }
  328. tcs = netdev_get_num_tc(dev);
  329. if (tcs > 1)
  330. max_tx_rings /= tcs;
  331. channel->max_rx = max_rx_rings;
  332. channel->max_tx = max_tx_rings;
  333. channel->max_other = 0;
  334. if (bp->flags & BNXT_FLAG_SHARED_RINGS) {
  335. channel->combined_count = bp->rx_nr_rings;
  336. if (BNXT_CHIP_TYPE_NITRO_A0(bp))
  337. channel->combined_count--;
  338. } else {
  339. if (!BNXT_CHIP_TYPE_NITRO_A0(bp)) {
  340. channel->rx_count = bp->rx_nr_rings;
  341. channel->tx_count = bp->tx_nr_rings_per_tc;
  342. }
  343. }
  344. }
  345. static int bnxt_set_channels(struct net_device *dev,
  346. struct ethtool_channels *channel)
  347. {
  348. struct bnxt *bp = netdev_priv(dev);
  349. int req_tx_rings, req_rx_rings, tcs;
  350. bool sh = false;
  351. int tx_xdp = 0;
  352. int rc = 0;
  353. if (channel->other_count)
  354. return -EINVAL;
  355. if (!channel->combined_count &&
  356. (!channel->rx_count || !channel->tx_count))
  357. return -EINVAL;
  358. if (channel->combined_count &&
  359. (channel->rx_count || channel->tx_count))
  360. return -EINVAL;
  361. if (BNXT_CHIP_TYPE_NITRO_A0(bp) && (channel->rx_count ||
  362. channel->tx_count))
  363. return -EINVAL;
  364. if (channel->combined_count)
  365. sh = true;
  366. tcs = netdev_get_num_tc(dev);
  367. req_tx_rings = sh ? channel->combined_count : channel->tx_count;
  368. req_rx_rings = sh ? channel->combined_count : channel->rx_count;
  369. if (bp->tx_nr_rings_xdp) {
  370. if (!sh) {
  371. netdev_err(dev, "Only combined mode supported when XDP is enabled.\n");
  372. return -EINVAL;
  373. }
  374. tx_xdp = req_rx_rings;
  375. }
  376. rc = bnxt_reserve_rings(bp, req_tx_rings, req_rx_rings, sh, tcs,
  377. tx_xdp);
  378. if (rc) {
  379. netdev_warn(dev, "Unable to allocate the requested rings\n");
  380. return rc;
  381. }
  382. if (netif_running(dev)) {
  383. if (BNXT_PF(bp)) {
  384. /* TODO CHIMP_FW: Send message to all VF's
  385. * before PF unload
  386. */
  387. }
  388. rc = bnxt_close_nic(bp, true, false);
  389. if (rc) {
  390. netdev_err(bp->dev, "Set channel failure rc :%x\n",
  391. rc);
  392. return rc;
  393. }
  394. }
  395. if (sh) {
  396. bp->flags |= BNXT_FLAG_SHARED_RINGS;
  397. bp->rx_nr_rings = channel->combined_count;
  398. bp->tx_nr_rings_per_tc = channel->combined_count;
  399. } else {
  400. bp->flags &= ~BNXT_FLAG_SHARED_RINGS;
  401. bp->rx_nr_rings = channel->rx_count;
  402. bp->tx_nr_rings_per_tc = channel->tx_count;
  403. }
  404. bp->tx_nr_rings_xdp = tx_xdp;
  405. bp->tx_nr_rings = bp->tx_nr_rings_per_tc + tx_xdp;
  406. if (tcs > 1)
  407. bp->tx_nr_rings = bp->tx_nr_rings_per_tc * tcs + tx_xdp;
  408. bp->cp_nr_rings = sh ? max_t(int, bp->tx_nr_rings, bp->rx_nr_rings) :
  409. bp->tx_nr_rings + bp->rx_nr_rings;
  410. bp->num_stat_ctxs = bp->cp_nr_rings;
  411. /* After changing number of rx channels, update NTUPLE feature. */
  412. netdev_update_features(dev);
  413. if (netif_running(dev)) {
  414. rc = bnxt_open_nic(bp, true, false);
  415. if ((!rc) && BNXT_PF(bp)) {
  416. /* TODO CHIMP_FW: Send message to all VF's
  417. * to renable
  418. */
  419. }
  420. }
  421. return rc;
  422. }
  423. #ifdef CONFIG_RFS_ACCEL
  424. static int bnxt_grxclsrlall(struct bnxt *bp, struct ethtool_rxnfc *cmd,
  425. u32 *rule_locs)
  426. {
  427. int i, j = 0;
  428. cmd->data = bp->ntp_fltr_count;
  429. for (i = 0; i < BNXT_NTP_FLTR_HASH_SIZE; i++) {
  430. struct hlist_head *head;
  431. struct bnxt_ntuple_filter *fltr;
  432. head = &bp->ntp_fltr_hash_tbl[i];
  433. rcu_read_lock();
  434. hlist_for_each_entry_rcu(fltr, head, hash) {
  435. if (j == cmd->rule_cnt)
  436. break;
  437. rule_locs[j++] = fltr->sw_id;
  438. }
  439. rcu_read_unlock();
  440. if (j == cmd->rule_cnt)
  441. break;
  442. }
  443. cmd->rule_cnt = j;
  444. return 0;
  445. }
  446. static int bnxt_grxclsrule(struct bnxt *bp, struct ethtool_rxnfc *cmd)
  447. {
  448. struct ethtool_rx_flow_spec *fs =
  449. (struct ethtool_rx_flow_spec *)&cmd->fs;
  450. struct bnxt_ntuple_filter *fltr;
  451. struct flow_keys *fkeys;
  452. int i, rc = -EINVAL;
  453. if (fs->location < 0 || fs->location >= BNXT_NTP_FLTR_MAX_FLTR)
  454. return rc;
  455. for (i = 0; i < BNXT_NTP_FLTR_HASH_SIZE; i++) {
  456. struct hlist_head *head;
  457. head = &bp->ntp_fltr_hash_tbl[i];
  458. rcu_read_lock();
  459. hlist_for_each_entry_rcu(fltr, head, hash) {
  460. if (fltr->sw_id == fs->location)
  461. goto fltr_found;
  462. }
  463. rcu_read_unlock();
  464. }
  465. return rc;
  466. fltr_found:
  467. fkeys = &fltr->fkeys;
  468. if (fkeys->basic.n_proto == htons(ETH_P_IP)) {
  469. if (fkeys->basic.ip_proto == IPPROTO_TCP)
  470. fs->flow_type = TCP_V4_FLOW;
  471. else if (fkeys->basic.ip_proto == IPPROTO_UDP)
  472. fs->flow_type = UDP_V4_FLOW;
  473. else
  474. goto fltr_err;
  475. fs->h_u.tcp_ip4_spec.ip4src = fkeys->addrs.v4addrs.src;
  476. fs->m_u.tcp_ip4_spec.ip4src = cpu_to_be32(~0);
  477. fs->h_u.tcp_ip4_spec.ip4dst = fkeys->addrs.v4addrs.dst;
  478. fs->m_u.tcp_ip4_spec.ip4dst = cpu_to_be32(~0);
  479. fs->h_u.tcp_ip4_spec.psrc = fkeys->ports.src;
  480. fs->m_u.tcp_ip4_spec.psrc = cpu_to_be16(~0);
  481. fs->h_u.tcp_ip4_spec.pdst = fkeys->ports.dst;
  482. fs->m_u.tcp_ip4_spec.pdst = cpu_to_be16(~0);
  483. } else {
  484. int i;
  485. if (fkeys->basic.ip_proto == IPPROTO_TCP)
  486. fs->flow_type = TCP_V6_FLOW;
  487. else if (fkeys->basic.ip_proto == IPPROTO_UDP)
  488. fs->flow_type = UDP_V6_FLOW;
  489. else
  490. goto fltr_err;
  491. *(struct in6_addr *)&fs->h_u.tcp_ip6_spec.ip6src[0] =
  492. fkeys->addrs.v6addrs.src;
  493. *(struct in6_addr *)&fs->h_u.tcp_ip6_spec.ip6dst[0] =
  494. fkeys->addrs.v6addrs.dst;
  495. for (i = 0; i < 4; i++) {
  496. fs->m_u.tcp_ip6_spec.ip6src[i] = cpu_to_be32(~0);
  497. fs->m_u.tcp_ip6_spec.ip6dst[i] = cpu_to_be32(~0);
  498. }
  499. fs->h_u.tcp_ip6_spec.psrc = fkeys->ports.src;
  500. fs->m_u.tcp_ip6_spec.psrc = cpu_to_be16(~0);
  501. fs->h_u.tcp_ip6_spec.pdst = fkeys->ports.dst;
  502. fs->m_u.tcp_ip6_spec.pdst = cpu_to_be16(~0);
  503. }
  504. fs->ring_cookie = fltr->rxq;
  505. rc = 0;
  506. fltr_err:
  507. rcu_read_unlock();
  508. return rc;
  509. }
  510. #endif
  511. static u64 get_ethtool_ipv4_rss(struct bnxt *bp)
  512. {
  513. if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_IPV4)
  514. return RXH_IP_SRC | RXH_IP_DST;
  515. return 0;
  516. }
  517. static u64 get_ethtool_ipv6_rss(struct bnxt *bp)
  518. {
  519. if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_IPV6)
  520. return RXH_IP_SRC | RXH_IP_DST;
  521. return 0;
  522. }
  523. static int bnxt_grxfh(struct bnxt *bp, struct ethtool_rxnfc *cmd)
  524. {
  525. cmd->data = 0;
  526. switch (cmd->flow_type) {
  527. case TCP_V4_FLOW:
  528. if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV4)
  529. cmd->data |= RXH_IP_SRC | RXH_IP_DST |
  530. RXH_L4_B_0_1 | RXH_L4_B_2_3;
  531. cmd->data |= get_ethtool_ipv4_rss(bp);
  532. break;
  533. case UDP_V4_FLOW:
  534. if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV4)
  535. cmd->data |= RXH_IP_SRC | RXH_IP_DST |
  536. RXH_L4_B_0_1 | RXH_L4_B_2_3;
  537. /* fall through */
  538. case SCTP_V4_FLOW:
  539. case AH_ESP_V4_FLOW:
  540. case AH_V4_FLOW:
  541. case ESP_V4_FLOW:
  542. case IPV4_FLOW:
  543. cmd->data |= get_ethtool_ipv4_rss(bp);
  544. break;
  545. case TCP_V6_FLOW:
  546. if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV6)
  547. cmd->data |= RXH_IP_SRC | RXH_IP_DST |
  548. RXH_L4_B_0_1 | RXH_L4_B_2_3;
  549. cmd->data |= get_ethtool_ipv6_rss(bp);
  550. break;
  551. case UDP_V6_FLOW:
  552. if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV6)
  553. cmd->data |= RXH_IP_SRC | RXH_IP_DST |
  554. RXH_L4_B_0_1 | RXH_L4_B_2_3;
  555. /* fall through */
  556. case SCTP_V6_FLOW:
  557. case AH_ESP_V6_FLOW:
  558. case AH_V6_FLOW:
  559. case ESP_V6_FLOW:
  560. case IPV6_FLOW:
  561. cmd->data |= get_ethtool_ipv6_rss(bp);
  562. break;
  563. }
  564. return 0;
  565. }
  566. #define RXH_4TUPLE (RXH_IP_SRC | RXH_IP_DST | RXH_L4_B_0_1 | RXH_L4_B_2_3)
  567. #define RXH_2TUPLE (RXH_IP_SRC | RXH_IP_DST)
  568. static int bnxt_srxfh(struct bnxt *bp, struct ethtool_rxnfc *cmd)
  569. {
  570. u32 rss_hash_cfg = bp->rss_hash_cfg;
  571. int tuple, rc = 0;
  572. if (cmd->data == RXH_4TUPLE)
  573. tuple = 4;
  574. else if (cmd->data == RXH_2TUPLE)
  575. tuple = 2;
  576. else if (!cmd->data)
  577. tuple = 0;
  578. else
  579. return -EINVAL;
  580. if (cmd->flow_type == TCP_V4_FLOW) {
  581. rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV4;
  582. if (tuple == 4)
  583. rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV4;
  584. } else if (cmd->flow_type == UDP_V4_FLOW) {
  585. if (tuple == 4 && !(bp->flags & BNXT_FLAG_UDP_RSS_CAP))
  586. return -EINVAL;
  587. rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV4;
  588. if (tuple == 4)
  589. rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV4;
  590. } else if (cmd->flow_type == TCP_V6_FLOW) {
  591. rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV6;
  592. if (tuple == 4)
  593. rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV6;
  594. } else if (cmd->flow_type == UDP_V6_FLOW) {
  595. if (tuple == 4 && !(bp->flags & BNXT_FLAG_UDP_RSS_CAP))
  596. return -EINVAL;
  597. rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV6;
  598. if (tuple == 4)
  599. rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV6;
  600. } else if (tuple == 4) {
  601. return -EINVAL;
  602. }
  603. switch (cmd->flow_type) {
  604. case TCP_V4_FLOW:
  605. case UDP_V4_FLOW:
  606. case SCTP_V4_FLOW:
  607. case AH_ESP_V4_FLOW:
  608. case AH_V4_FLOW:
  609. case ESP_V4_FLOW:
  610. case IPV4_FLOW:
  611. if (tuple == 2)
  612. rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_IPV4;
  613. else if (!tuple)
  614. rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_IPV4;
  615. break;
  616. case TCP_V6_FLOW:
  617. case UDP_V6_FLOW:
  618. case SCTP_V6_FLOW:
  619. case AH_ESP_V6_FLOW:
  620. case AH_V6_FLOW:
  621. case ESP_V6_FLOW:
  622. case IPV6_FLOW:
  623. if (tuple == 2)
  624. rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_IPV6;
  625. else if (!tuple)
  626. rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_IPV6;
  627. break;
  628. }
  629. if (bp->rss_hash_cfg == rss_hash_cfg)
  630. return 0;
  631. bp->rss_hash_cfg = rss_hash_cfg;
  632. if (netif_running(bp->dev)) {
  633. bnxt_close_nic(bp, false, false);
  634. rc = bnxt_open_nic(bp, false, false);
  635. }
  636. return rc;
  637. }
  638. static int bnxt_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd,
  639. u32 *rule_locs)
  640. {
  641. struct bnxt *bp = netdev_priv(dev);
  642. int rc = 0;
  643. switch (cmd->cmd) {
  644. #ifdef CONFIG_RFS_ACCEL
  645. case ETHTOOL_GRXRINGS:
  646. cmd->data = bp->rx_nr_rings;
  647. break;
  648. case ETHTOOL_GRXCLSRLCNT:
  649. cmd->rule_cnt = bp->ntp_fltr_count;
  650. cmd->data = BNXT_NTP_FLTR_MAX_FLTR;
  651. break;
  652. case ETHTOOL_GRXCLSRLALL:
  653. rc = bnxt_grxclsrlall(bp, cmd, (u32 *)rule_locs);
  654. break;
  655. case ETHTOOL_GRXCLSRULE:
  656. rc = bnxt_grxclsrule(bp, cmd);
  657. break;
  658. #endif
  659. case ETHTOOL_GRXFH:
  660. rc = bnxt_grxfh(bp, cmd);
  661. break;
  662. default:
  663. rc = -EOPNOTSUPP;
  664. break;
  665. }
  666. return rc;
  667. }
  668. static int bnxt_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd)
  669. {
  670. struct bnxt *bp = netdev_priv(dev);
  671. int rc;
  672. switch (cmd->cmd) {
  673. case ETHTOOL_SRXFH:
  674. rc = bnxt_srxfh(bp, cmd);
  675. break;
  676. default:
  677. rc = -EOPNOTSUPP;
  678. break;
  679. }
  680. return rc;
  681. }
  682. static u32 bnxt_get_rxfh_indir_size(struct net_device *dev)
  683. {
  684. return HW_HASH_INDEX_SIZE;
  685. }
  686. static u32 bnxt_get_rxfh_key_size(struct net_device *dev)
  687. {
  688. return HW_HASH_KEY_SIZE;
  689. }
  690. static int bnxt_get_rxfh(struct net_device *dev, u32 *indir, u8 *key,
  691. u8 *hfunc)
  692. {
  693. struct bnxt *bp = netdev_priv(dev);
  694. struct bnxt_vnic_info *vnic = &bp->vnic_info[0];
  695. int i = 0;
  696. if (hfunc)
  697. *hfunc = ETH_RSS_HASH_TOP;
  698. if (indir)
  699. for (i = 0; i < HW_HASH_INDEX_SIZE; i++)
  700. indir[i] = le16_to_cpu(vnic->rss_table[i]);
  701. if (key)
  702. memcpy(key, vnic->rss_hash_key, HW_HASH_KEY_SIZE);
  703. return 0;
  704. }
  705. static void bnxt_get_drvinfo(struct net_device *dev,
  706. struct ethtool_drvinfo *info)
  707. {
  708. struct bnxt *bp = netdev_priv(dev);
  709. char *pkglog;
  710. char *pkgver = NULL;
  711. pkglog = kmalloc(BNX_PKG_LOG_MAX_LENGTH, GFP_KERNEL);
  712. if (pkglog)
  713. pkgver = bnxt_get_pkgver(dev, pkglog, BNX_PKG_LOG_MAX_LENGTH);
  714. strlcpy(info->driver, DRV_MODULE_NAME, sizeof(info->driver));
  715. strlcpy(info->version, DRV_MODULE_VERSION, sizeof(info->version));
  716. if (pkgver && *pkgver != 0 && isdigit(*pkgver))
  717. snprintf(info->fw_version, sizeof(info->fw_version) - 1,
  718. "%s pkg %s", bp->fw_ver_str, pkgver);
  719. else
  720. strlcpy(info->fw_version, bp->fw_ver_str,
  721. sizeof(info->fw_version));
  722. strlcpy(info->bus_info, pci_name(bp->pdev), sizeof(info->bus_info));
  723. info->n_stats = BNXT_NUM_STATS * bp->cp_nr_rings;
  724. info->testinfo_len = bp->num_tests;
  725. /* TODO CHIMP_FW: eeprom dump details */
  726. info->eedump_len = 0;
  727. /* TODO CHIMP FW: reg dump details */
  728. info->regdump_len = 0;
  729. kfree(pkglog);
  730. }
  731. static void bnxt_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
  732. {
  733. struct bnxt *bp = netdev_priv(dev);
  734. wol->supported = 0;
  735. wol->wolopts = 0;
  736. memset(&wol->sopass, 0, sizeof(wol->sopass));
  737. if (bp->flags & BNXT_FLAG_WOL_CAP) {
  738. wol->supported = WAKE_MAGIC;
  739. if (bp->wol)
  740. wol->wolopts = WAKE_MAGIC;
  741. }
  742. }
  743. static int bnxt_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
  744. {
  745. struct bnxt *bp = netdev_priv(dev);
  746. if (wol->wolopts & ~WAKE_MAGIC)
  747. return -EINVAL;
  748. if (wol->wolopts & WAKE_MAGIC) {
  749. if (!(bp->flags & BNXT_FLAG_WOL_CAP))
  750. return -EINVAL;
  751. if (!bp->wol) {
  752. if (bnxt_hwrm_alloc_wol_fltr(bp))
  753. return -EBUSY;
  754. bp->wol = 1;
  755. }
  756. } else {
  757. if (bp->wol) {
  758. if (bnxt_hwrm_free_wol_fltr(bp))
  759. return -EBUSY;
  760. bp->wol = 0;
  761. }
  762. }
  763. return 0;
  764. }
  765. u32 _bnxt_fw_to_ethtool_adv_spds(u16 fw_speeds, u8 fw_pause)
  766. {
  767. u32 speed_mask = 0;
  768. /* TODO: support 25GB, 40GB, 50GB with different cable type */
  769. /* set the advertised speeds */
  770. if (fw_speeds & BNXT_LINK_SPEED_MSK_100MB)
  771. speed_mask |= ADVERTISED_100baseT_Full;
  772. if (fw_speeds & BNXT_LINK_SPEED_MSK_1GB)
  773. speed_mask |= ADVERTISED_1000baseT_Full;
  774. if (fw_speeds & BNXT_LINK_SPEED_MSK_2_5GB)
  775. speed_mask |= ADVERTISED_2500baseX_Full;
  776. if (fw_speeds & BNXT_LINK_SPEED_MSK_10GB)
  777. speed_mask |= ADVERTISED_10000baseT_Full;
  778. if (fw_speeds & BNXT_LINK_SPEED_MSK_40GB)
  779. speed_mask |= ADVERTISED_40000baseCR4_Full;
  780. if ((fw_pause & BNXT_LINK_PAUSE_BOTH) == BNXT_LINK_PAUSE_BOTH)
  781. speed_mask |= ADVERTISED_Pause;
  782. else if (fw_pause & BNXT_LINK_PAUSE_TX)
  783. speed_mask |= ADVERTISED_Asym_Pause;
  784. else if (fw_pause & BNXT_LINK_PAUSE_RX)
  785. speed_mask |= ADVERTISED_Pause | ADVERTISED_Asym_Pause;
  786. return speed_mask;
  787. }
  788. #define BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, fw_pause, lk_ksettings, name)\
  789. { \
  790. if ((fw_speeds) & BNXT_LINK_SPEED_MSK_100MB) \
  791. ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
  792. 100baseT_Full); \
  793. if ((fw_speeds) & BNXT_LINK_SPEED_MSK_1GB) \
  794. ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
  795. 1000baseT_Full); \
  796. if ((fw_speeds) & BNXT_LINK_SPEED_MSK_10GB) \
  797. ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
  798. 10000baseT_Full); \
  799. if ((fw_speeds) & BNXT_LINK_SPEED_MSK_25GB) \
  800. ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
  801. 25000baseCR_Full); \
  802. if ((fw_speeds) & BNXT_LINK_SPEED_MSK_40GB) \
  803. ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
  804. 40000baseCR4_Full);\
  805. if ((fw_speeds) & BNXT_LINK_SPEED_MSK_50GB) \
  806. ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
  807. 50000baseCR2_Full);\
  808. if ((fw_speeds) & BNXT_LINK_SPEED_MSK_100GB) \
  809. ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
  810. 100000baseCR4_Full);\
  811. if ((fw_pause) & BNXT_LINK_PAUSE_RX) { \
  812. ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
  813. Pause); \
  814. if (!((fw_pause) & BNXT_LINK_PAUSE_TX)) \
  815. ethtool_link_ksettings_add_link_mode( \
  816. lk_ksettings, name, Asym_Pause);\
  817. } else if ((fw_pause) & BNXT_LINK_PAUSE_TX) { \
  818. ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
  819. Asym_Pause); \
  820. } \
  821. }
  822. #define BNXT_ETHTOOL_TO_FW_SPDS(fw_speeds, lk_ksettings, name) \
  823. { \
  824. if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
  825. 100baseT_Full) || \
  826. ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
  827. 100baseT_Half)) \
  828. (fw_speeds) |= BNXT_LINK_SPEED_MSK_100MB; \
  829. if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
  830. 1000baseT_Full) || \
  831. ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
  832. 1000baseT_Half)) \
  833. (fw_speeds) |= BNXT_LINK_SPEED_MSK_1GB; \
  834. if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
  835. 10000baseT_Full)) \
  836. (fw_speeds) |= BNXT_LINK_SPEED_MSK_10GB; \
  837. if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
  838. 25000baseCR_Full)) \
  839. (fw_speeds) |= BNXT_LINK_SPEED_MSK_25GB; \
  840. if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
  841. 40000baseCR4_Full)) \
  842. (fw_speeds) |= BNXT_LINK_SPEED_MSK_40GB; \
  843. if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
  844. 50000baseCR2_Full)) \
  845. (fw_speeds) |= BNXT_LINK_SPEED_MSK_50GB; \
  846. if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
  847. 100000baseCR4_Full)) \
  848. (fw_speeds) |= BNXT_LINK_SPEED_MSK_100GB; \
  849. }
  850. static void bnxt_fw_to_ethtool_advertised_spds(struct bnxt_link_info *link_info,
  851. struct ethtool_link_ksettings *lk_ksettings)
  852. {
  853. u16 fw_speeds = link_info->advertising;
  854. u8 fw_pause = 0;
  855. if (link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL)
  856. fw_pause = link_info->auto_pause_setting;
  857. BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, fw_pause, lk_ksettings, advertising);
  858. }
  859. static void bnxt_fw_to_ethtool_lp_adv(struct bnxt_link_info *link_info,
  860. struct ethtool_link_ksettings *lk_ksettings)
  861. {
  862. u16 fw_speeds = link_info->lp_auto_link_speeds;
  863. u8 fw_pause = 0;
  864. if (link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL)
  865. fw_pause = link_info->lp_pause;
  866. BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, fw_pause, lk_ksettings,
  867. lp_advertising);
  868. }
  869. static void bnxt_fw_to_ethtool_support_spds(struct bnxt_link_info *link_info,
  870. struct ethtool_link_ksettings *lk_ksettings)
  871. {
  872. u16 fw_speeds = link_info->support_speeds;
  873. BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, 0, lk_ksettings, supported);
  874. ethtool_link_ksettings_add_link_mode(lk_ksettings, supported, Pause);
  875. ethtool_link_ksettings_add_link_mode(lk_ksettings, supported,
  876. Asym_Pause);
  877. if (link_info->support_auto_speeds)
  878. ethtool_link_ksettings_add_link_mode(lk_ksettings, supported,
  879. Autoneg);
  880. }
  881. u32 bnxt_fw_to_ethtool_speed(u16 fw_link_speed)
  882. {
  883. switch (fw_link_speed) {
  884. case BNXT_LINK_SPEED_100MB:
  885. return SPEED_100;
  886. case BNXT_LINK_SPEED_1GB:
  887. return SPEED_1000;
  888. case BNXT_LINK_SPEED_2_5GB:
  889. return SPEED_2500;
  890. case BNXT_LINK_SPEED_10GB:
  891. return SPEED_10000;
  892. case BNXT_LINK_SPEED_20GB:
  893. return SPEED_20000;
  894. case BNXT_LINK_SPEED_25GB:
  895. return SPEED_25000;
  896. case BNXT_LINK_SPEED_40GB:
  897. return SPEED_40000;
  898. case BNXT_LINK_SPEED_50GB:
  899. return SPEED_50000;
  900. case BNXT_LINK_SPEED_100GB:
  901. return SPEED_100000;
  902. default:
  903. return SPEED_UNKNOWN;
  904. }
  905. }
  906. static int bnxt_get_link_ksettings(struct net_device *dev,
  907. struct ethtool_link_ksettings *lk_ksettings)
  908. {
  909. struct bnxt *bp = netdev_priv(dev);
  910. struct bnxt_link_info *link_info = &bp->link_info;
  911. struct ethtool_link_settings *base = &lk_ksettings->base;
  912. u32 ethtool_speed;
  913. ethtool_link_ksettings_zero_link_mode(lk_ksettings, supported);
  914. bnxt_fw_to_ethtool_support_spds(link_info, lk_ksettings);
  915. ethtool_link_ksettings_zero_link_mode(lk_ksettings, advertising);
  916. if (link_info->autoneg) {
  917. bnxt_fw_to_ethtool_advertised_spds(link_info, lk_ksettings);
  918. ethtool_link_ksettings_add_link_mode(lk_ksettings,
  919. advertising, Autoneg);
  920. base->autoneg = AUTONEG_ENABLE;
  921. if (link_info->phy_link_status == BNXT_LINK_LINK)
  922. bnxt_fw_to_ethtool_lp_adv(link_info, lk_ksettings);
  923. ethtool_speed = bnxt_fw_to_ethtool_speed(link_info->link_speed);
  924. if (!netif_carrier_ok(dev))
  925. base->duplex = DUPLEX_UNKNOWN;
  926. else if (link_info->duplex & BNXT_LINK_DUPLEX_FULL)
  927. base->duplex = DUPLEX_FULL;
  928. else
  929. base->duplex = DUPLEX_HALF;
  930. } else {
  931. base->autoneg = AUTONEG_DISABLE;
  932. ethtool_speed =
  933. bnxt_fw_to_ethtool_speed(link_info->req_link_speed);
  934. base->duplex = DUPLEX_HALF;
  935. if (link_info->req_duplex == BNXT_LINK_DUPLEX_FULL)
  936. base->duplex = DUPLEX_FULL;
  937. }
  938. base->speed = ethtool_speed;
  939. base->port = PORT_NONE;
  940. if (link_info->media_type == PORT_PHY_QCFG_RESP_MEDIA_TYPE_TP) {
  941. base->port = PORT_TP;
  942. ethtool_link_ksettings_add_link_mode(lk_ksettings, supported,
  943. TP);
  944. ethtool_link_ksettings_add_link_mode(lk_ksettings, advertising,
  945. TP);
  946. } else {
  947. ethtool_link_ksettings_add_link_mode(lk_ksettings, supported,
  948. FIBRE);
  949. ethtool_link_ksettings_add_link_mode(lk_ksettings, advertising,
  950. FIBRE);
  951. if (link_info->media_type == PORT_PHY_QCFG_RESP_MEDIA_TYPE_DAC)
  952. base->port = PORT_DA;
  953. else if (link_info->media_type ==
  954. PORT_PHY_QCFG_RESP_MEDIA_TYPE_FIBRE)
  955. base->port = PORT_FIBRE;
  956. }
  957. base->phy_address = link_info->phy_addr;
  958. return 0;
  959. }
  960. static u32 bnxt_get_fw_speed(struct net_device *dev, u32 ethtool_speed)
  961. {
  962. struct bnxt *bp = netdev_priv(dev);
  963. struct bnxt_link_info *link_info = &bp->link_info;
  964. u16 support_spds = link_info->support_speeds;
  965. u32 fw_speed = 0;
  966. switch (ethtool_speed) {
  967. case SPEED_100:
  968. if (support_spds & BNXT_LINK_SPEED_MSK_100MB)
  969. fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_100MB;
  970. break;
  971. case SPEED_1000:
  972. if (support_spds & BNXT_LINK_SPEED_MSK_1GB)
  973. fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_1GB;
  974. break;
  975. case SPEED_2500:
  976. if (support_spds & BNXT_LINK_SPEED_MSK_2_5GB)
  977. fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_2_5GB;
  978. break;
  979. case SPEED_10000:
  980. if (support_spds & BNXT_LINK_SPEED_MSK_10GB)
  981. fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_10GB;
  982. break;
  983. case SPEED_20000:
  984. if (support_spds & BNXT_LINK_SPEED_MSK_20GB)
  985. fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_20GB;
  986. break;
  987. case SPEED_25000:
  988. if (support_spds & BNXT_LINK_SPEED_MSK_25GB)
  989. fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_25GB;
  990. break;
  991. case SPEED_40000:
  992. if (support_spds & BNXT_LINK_SPEED_MSK_40GB)
  993. fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_40GB;
  994. break;
  995. case SPEED_50000:
  996. if (support_spds & BNXT_LINK_SPEED_MSK_50GB)
  997. fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_50GB;
  998. break;
  999. case SPEED_100000:
  1000. if (support_spds & BNXT_LINK_SPEED_MSK_100GB)
  1001. fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_100GB;
  1002. break;
  1003. default:
  1004. netdev_err(dev, "unsupported speed!\n");
  1005. break;
  1006. }
  1007. return fw_speed;
  1008. }
  1009. u16 bnxt_get_fw_auto_link_speeds(u32 advertising)
  1010. {
  1011. u16 fw_speed_mask = 0;
  1012. /* only support autoneg at speed 100, 1000, and 10000 */
  1013. if (advertising & (ADVERTISED_100baseT_Full |
  1014. ADVERTISED_100baseT_Half)) {
  1015. fw_speed_mask |= BNXT_LINK_SPEED_MSK_100MB;
  1016. }
  1017. if (advertising & (ADVERTISED_1000baseT_Full |
  1018. ADVERTISED_1000baseT_Half)) {
  1019. fw_speed_mask |= BNXT_LINK_SPEED_MSK_1GB;
  1020. }
  1021. if (advertising & ADVERTISED_10000baseT_Full)
  1022. fw_speed_mask |= BNXT_LINK_SPEED_MSK_10GB;
  1023. if (advertising & ADVERTISED_40000baseCR4_Full)
  1024. fw_speed_mask |= BNXT_LINK_SPEED_MSK_40GB;
  1025. return fw_speed_mask;
  1026. }
  1027. static int bnxt_set_link_ksettings(struct net_device *dev,
  1028. const struct ethtool_link_ksettings *lk_ksettings)
  1029. {
  1030. struct bnxt *bp = netdev_priv(dev);
  1031. struct bnxt_link_info *link_info = &bp->link_info;
  1032. const struct ethtool_link_settings *base = &lk_ksettings->base;
  1033. bool set_pause = false;
  1034. u16 fw_advertising = 0;
  1035. u32 speed;
  1036. int rc = 0;
  1037. if (!BNXT_SINGLE_PF(bp))
  1038. return -EOPNOTSUPP;
  1039. if (base->autoneg == AUTONEG_ENABLE) {
  1040. BNXT_ETHTOOL_TO_FW_SPDS(fw_advertising, lk_ksettings,
  1041. advertising);
  1042. link_info->autoneg |= BNXT_AUTONEG_SPEED;
  1043. if (!fw_advertising)
  1044. link_info->advertising = link_info->support_auto_speeds;
  1045. else
  1046. link_info->advertising = fw_advertising;
  1047. /* any change to autoneg will cause link change, therefore the
  1048. * driver should put back the original pause setting in autoneg
  1049. */
  1050. set_pause = true;
  1051. } else {
  1052. u16 fw_speed;
  1053. u8 phy_type = link_info->phy_type;
  1054. if (phy_type == PORT_PHY_QCFG_RESP_PHY_TYPE_BASET ||
  1055. phy_type == PORT_PHY_QCFG_RESP_PHY_TYPE_BASETE ||
  1056. link_info->media_type == PORT_PHY_QCFG_RESP_MEDIA_TYPE_TP) {
  1057. netdev_err(dev, "10GBase-T devices must autoneg\n");
  1058. rc = -EINVAL;
  1059. goto set_setting_exit;
  1060. }
  1061. if (base->duplex == DUPLEX_HALF) {
  1062. netdev_err(dev, "HALF DUPLEX is not supported!\n");
  1063. rc = -EINVAL;
  1064. goto set_setting_exit;
  1065. }
  1066. speed = base->speed;
  1067. fw_speed = bnxt_get_fw_speed(dev, speed);
  1068. if (!fw_speed) {
  1069. rc = -EINVAL;
  1070. goto set_setting_exit;
  1071. }
  1072. link_info->req_link_speed = fw_speed;
  1073. link_info->req_duplex = BNXT_LINK_DUPLEX_FULL;
  1074. link_info->autoneg = 0;
  1075. link_info->advertising = 0;
  1076. }
  1077. if (netif_running(dev))
  1078. rc = bnxt_hwrm_set_link_setting(bp, set_pause, false);
  1079. set_setting_exit:
  1080. return rc;
  1081. }
  1082. static void bnxt_get_pauseparam(struct net_device *dev,
  1083. struct ethtool_pauseparam *epause)
  1084. {
  1085. struct bnxt *bp = netdev_priv(dev);
  1086. struct bnxt_link_info *link_info = &bp->link_info;
  1087. if (BNXT_VF(bp))
  1088. return;
  1089. epause->autoneg = !!(link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL);
  1090. epause->rx_pause = !!(link_info->req_flow_ctrl & BNXT_LINK_PAUSE_RX);
  1091. epause->tx_pause = !!(link_info->req_flow_ctrl & BNXT_LINK_PAUSE_TX);
  1092. }
  1093. static int bnxt_set_pauseparam(struct net_device *dev,
  1094. struct ethtool_pauseparam *epause)
  1095. {
  1096. int rc = 0;
  1097. struct bnxt *bp = netdev_priv(dev);
  1098. struct bnxt_link_info *link_info = &bp->link_info;
  1099. if (!BNXT_SINGLE_PF(bp))
  1100. return -EOPNOTSUPP;
  1101. if (epause->autoneg) {
  1102. if (!(link_info->autoneg & BNXT_AUTONEG_SPEED))
  1103. return -EINVAL;
  1104. link_info->autoneg |= BNXT_AUTONEG_FLOW_CTRL;
  1105. if (bp->hwrm_spec_code >= 0x10201)
  1106. link_info->req_flow_ctrl =
  1107. PORT_PHY_CFG_REQ_AUTO_PAUSE_AUTONEG_PAUSE;
  1108. } else {
  1109. /* when transition from auto pause to force pause,
  1110. * force a link change
  1111. */
  1112. if (link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL)
  1113. link_info->force_link_chng = true;
  1114. link_info->autoneg &= ~BNXT_AUTONEG_FLOW_CTRL;
  1115. link_info->req_flow_ctrl = 0;
  1116. }
  1117. if (epause->rx_pause)
  1118. link_info->req_flow_ctrl |= BNXT_LINK_PAUSE_RX;
  1119. if (epause->tx_pause)
  1120. link_info->req_flow_ctrl |= BNXT_LINK_PAUSE_TX;
  1121. if (netif_running(dev))
  1122. rc = bnxt_hwrm_set_pause(bp);
  1123. return rc;
  1124. }
  1125. static u32 bnxt_get_link(struct net_device *dev)
  1126. {
  1127. struct bnxt *bp = netdev_priv(dev);
  1128. /* TODO: handle MF, VF, driver close case */
  1129. return bp->link_info.link_up;
  1130. }
  1131. static int bnxt_find_nvram_item(struct net_device *dev, u16 type, u16 ordinal,
  1132. u16 ext, u16 *index, u32 *item_length,
  1133. u32 *data_length);
  1134. static int bnxt_flash_nvram(struct net_device *dev,
  1135. u16 dir_type,
  1136. u16 dir_ordinal,
  1137. u16 dir_ext,
  1138. u16 dir_attr,
  1139. const u8 *data,
  1140. size_t data_len)
  1141. {
  1142. struct bnxt *bp = netdev_priv(dev);
  1143. int rc;
  1144. struct hwrm_nvm_write_input req = {0};
  1145. dma_addr_t dma_handle;
  1146. u8 *kmem;
  1147. bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_WRITE, -1, -1);
  1148. req.dir_type = cpu_to_le16(dir_type);
  1149. req.dir_ordinal = cpu_to_le16(dir_ordinal);
  1150. req.dir_ext = cpu_to_le16(dir_ext);
  1151. req.dir_attr = cpu_to_le16(dir_attr);
  1152. req.dir_data_length = cpu_to_le32(data_len);
  1153. kmem = dma_alloc_coherent(&bp->pdev->dev, data_len, &dma_handle,
  1154. GFP_KERNEL);
  1155. if (!kmem) {
  1156. netdev_err(dev, "dma_alloc_coherent failure, length = %u\n",
  1157. (unsigned)data_len);
  1158. return -ENOMEM;
  1159. }
  1160. memcpy(kmem, data, data_len);
  1161. req.host_src_addr = cpu_to_le64(dma_handle);
  1162. rc = hwrm_send_message(bp, &req, sizeof(req), FLASH_NVRAM_TIMEOUT);
  1163. dma_free_coherent(&bp->pdev->dev, data_len, kmem, dma_handle);
  1164. return rc;
  1165. }
  1166. static int bnxt_firmware_reset(struct net_device *dev,
  1167. u16 dir_type)
  1168. {
  1169. struct bnxt *bp = netdev_priv(dev);
  1170. struct hwrm_fw_reset_input req = {0};
  1171. bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_FW_RESET, -1, -1);
  1172. /* TODO: Support ASAP ChiMP self-reset (e.g. upon PF driver unload) */
  1173. /* TODO: Address self-reset of APE/KONG/BONO/TANG or ungraceful reset */
  1174. /* (e.g. when firmware isn't already running) */
  1175. switch (dir_type) {
  1176. case BNX_DIR_TYPE_CHIMP_PATCH:
  1177. case BNX_DIR_TYPE_BOOTCODE:
  1178. case BNX_DIR_TYPE_BOOTCODE_2:
  1179. req.embedded_proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_BOOT;
  1180. /* Self-reset ChiMP upon next PCIe reset: */
  1181. req.selfrst_status = FW_RESET_REQ_SELFRST_STATUS_SELFRSTPCIERST;
  1182. break;
  1183. case BNX_DIR_TYPE_APE_FW:
  1184. case BNX_DIR_TYPE_APE_PATCH:
  1185. req.embedded_proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_MGMT;
  1186. /* Self-reset APE upon next PCIe reset: */
  1187. req.selfrst_status = FW_RESET_REQ_SELFRST_STATUS_SELFRSTPCIERST;
  1188. break;
  1189. case BNX_DIR_TYPE_KONG_FW:
  1190. case BNX_DIR_TYPE_KONG_PATCH:
  1191. req.embedded_proc_type =
  1192. FW_RESET_REQ_EMBEDDED_PROC_TYPE_NETCTRL;
  1193. break;
  1194. case BNX_DIR_TYPE_BONO_FW:
  1195. case BNX_DIR_TYPE_BONO_PATCH:
  1196. req.embedded_proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_ROCE;
  1197. break;
  1198. default:
  1199. return -EINVAL;
  1200. }
  1201. return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
  1202. }
  1203. static int bnxt_flash_firmware(struct net_device *dev,
  1204. u16 dir_type,
  1205. const u8 *fw_data,
  1206. size_t fw_size)
  1207. {
  1208. int rc = 0;
  1209. u16 code_type;
  1210. u32 stored_crc;
  1211. u32 calculated_crc;
  1212. struct bnxt_fw_header *header = (struct bnxt_fw_header *)fw_data;
  1213. switch (dir_type) {
  1214. case BNX_DIR_TYPE_BOOTCODE:
  1215. case BNX_DIR_TYPE_BOOTCODE_2:
  1216. code_type = CODE_BOOT;
  1217. break;
  1218. case BNX_DIR_TYPE_CHIMP_PATCH:
  1219. code_type = CODE_CHIMP_PATCH;
  1220. break;
  1221. case BNX_DIR_TYPE_APE_FW:
  1222. code_type = CODE_MCTP_PASSTHRU;
  1223. break;
  1224. case BNX_DIR_TYPE_APE_PATCH:
  1225. code_type = CODE_APE_PATCH;
  1226. break;
  1227. case BNX_DIR_TYPE_KONG_FW:
  1228. code_type = CODE_KONG_FW;
  1229. break;
  1230. case BNX_DIR_TYPE_KONG_PATCH:
  1231. code_type = CODE_KONG_PATCH;
  1232. break;
  1233. case BNX_DIR_TYPE_BONO_FW:
  1234. code_type = CODE_BONO_FW;
  1235. break;
  1236. case BNX_DIR_TYPE_BONO_PATCH:
  1237. code_type = CODE_BONO_PATCH;
  1238. break;
  1239. default:
  1240. netdev_err(dev, "Unsupported directory entry type: %u\n",
  1241. dir_type);
  1242. return -EINVAL;
  1243. }
  1244. if (fw_size < sizeof(struct bnxt_fw_header)) {
  1245. netdev_err(dev, "Invalid firmware file size: %u\n",
  1246. (unsigned int)fw_size);
  1247. return -EINVAL;
  1248. }
  1249. if (header->signature != cpu_to_le32(BNXT_FIRMWARE_BIN_SIGNATURE)) {
  1250. netdev_err(dev, "Invalid firmware signature: %08X\n",
  1251. le32_to_cpu(header->signature));
  1252. return -EINVAL;
  1253. }
  1254. if (header->code_type != code_type) {
  1255. netdev_err(dev, "Expected firmware type: %d, read: %d\n",
  1256. code_type, header->code_type);
  1257. return -EINVAL;
  1258. }
  1259. if (header->device != DEVICE_CUMULUS_FAMILY) {
  1260. netdev_err(dev, "Expected firmware device family %d, read: %d\n",
  1261. DEVICE_CUMULUS_FAMILY, header->device);
  1262. return -EINVAL;
  1263. }
  1264. /* Confirm the CRC32 checksum of the file: */
  1265. stored_crc = le32_to_cpu(*(__le32 *)(fw_data + fw_size -
  1266. sizeof(stored_crc)));
  1267. calculated_crc = ~crc32(~0, fw_data, fw_size - sizeof(stored_crc));
  1268. if (calculated_crc != stored_crc) {
  1269. netdev_err(dev, "Firmware file CRC32 checksum (%08lX) does not match calculated checksum (%08lX)\n",
  1270. (unsigned long)stored_crc,
  1271. (unsigned long)calculated_crc);
  1272. return -EINVAL;
  1273. }
  1274. rc = bnxt_flash_nvram(dev, dir_type, BNX_DIR_ORDINAL_FIRST,
  1275. 0, 0, fw_data, fw_size);
  1276. if (rc == 0) /* Firmware update successful */
  1277. rc = bnxt_firmware_reset(dev, dir_type);
  1278. return rc;
  1279. }
  1280. static int bnxt_flash_microcode(struct net_device *dev,
  1281. u16 dir_type,
  1282. const u8 *fw_data,
  1283. size_t fw_size)
  1284. {
  1285. struct bnxt_ucode_trailer *trailer;
  1286. u32 calculated_crc;
  1287. u32 stored_crc;
  1288. int rc = 0;
  1289. if (fw_size < sizeof(struct bnxt_ucode_trailer)) {
  1290. netdev_err(dev, "Invalid microcode file size: %u\n",
  1291. (unsigned int)fw_size);
  1292. return -EINVAL;
  1293. }
  1294. trailer = (struct bnxt_ucode_trailer *)(fw_data + (fw_size -
  1295. sizeof(*trailer)));
  1296. if (trailer->sig != cpu_to_le32(BNXT_UCODE_TRAILER_SIGNATURE)) {
  1297. netdev_err(dev, "Invalid microcode trailer signature: %08X\n",
  1298. le32_to_cpu(trailer->sig));
  1299. return -EINVAL;
  1300. }
  1301. if (le16_to_cpu(trailer->dir_type) != dir_type) {
  1302. netdev_err(dev, "Expected microcode type: %d, read: %d\n",
  1303. dir_type, le16_to_cpu(trailer->dir_type));
  1304. return -EINVAL;
  1305. }
  1306. if (le16_to_cpu(trailer->trailer_length) <
  1307. sizeof(struct bnxt_ucode_trailer)) {
  1308. netdev_err(dev, "Invalid microcode trailer length: %d\n",
  1309. le16_to_cpu(trailer->trailer_length));
  1310. return -EINVAL;
  1311. }
  1312. /* Confirm the CRC32 checksum of the file: */
  1313. stored_crc = le32_to_cpu(*(__le32 *)(fw_data + fw_size -
  1314. sizeof(stored_crc)));
  1315. calculated_crc = ~crc32(~0, fw_data, fw_size - sizeof(stored_crc));
  1316. if (calculated_crc != stored_crc) {
  1317. netdev_err(dev,
  1318. "CRC32 (%08lX) does not match calculated: %08lX\n",
  1319. (unsigned long)stored_crc,
  1320. (unsigned long)calculated_crc);
  1321. return -EINVAL;
  1322. }
  1323. rc = bnxt_flash_nvram(dev, dir_type, BNX_DIR_ORDINAL_FIRST,
  1324. 0, 0, fw_data, fw_size);
  1325. return rc;
  1326. }
  1327. static bool bnxt_dir_type_is_ape_bin_format(u16 dir_type)
  1328. {
  1329. switch (dir_type) {
  1330. case BNX_DIR_TYPE_CHIMP_PATCH:
  1331. case BNX_DIR_TYPE_BOOTCODE:
  1332. case BNX_DIR_TYPE_BOOTCODE_2:
  1333. case BNX_DIR_TYPE_APE_FW:
  1334. case BNX_DIR_TYPE_APE_PATCH:
  1335. case BNX_DIR_TYPE_KONG_FW:
  1336. case BNX_DIR_TYPE_KONG_PATCH:
  1337. case BNX_DIR_TYPE_BONO_FW:
  1338. case BNX_DIR_TYPE_BONO_PATCH:
  1339. return true;
  1340. }
  1341. return false;
  1342. }
  1343. static bool bnxt_dir_type_is_other_exec_format(u16 dir_type)
  1344. {
  1345. switch (dir_type) {
  1346. case BNX_DIR_TYPE_AVS:
  1347. case BNX_DIR_TYPE_EXP_ROM_MBA:
  1348. case BNX_DIR_TYPE_PCIE:
  1349. case BNX_DIR_TYPE_TSCF_UCODE:
  1350. case BNX_DIR_TYPE_EXT_PHY:
  1351. case BNX_DIR_TYPE_CCM:
  1352. case BNX_DIR_TYPE_ISCSI_BOOT:
  1353. case BNX_DIR_TYPE_ISCSI_BOOT_IPV6:
  1354. case BNX_DIR_TYPE_ISCSI_BOOT_IPV4N6:
  1355. return true;
  1356. }
  1357. return false;
  1358. }
  1359. static bool bnxt_dir_type_is_executable(u16 dir_type)
  1360. {
  1361. return bnxt_dir_type_is_ape_bin_format(dir_type) ||
  1362. bnxt_dir_type_is_other_exec_format(dir_type);
  1363. }
  1364. static int bnxt_flash_firmware_from_file(struct net_device *dev,
  1365. u16 dir_type,
  1366. const char *filename)
  1367. {
  1368. const struct firmware *fw;
  1369. int rc;
  1370. rc = request_firmware(&fw, filename, &dev->dev);
  1371. if (rc != 0) {
  1372. netdev_err(dev, "Error %d requesting firmware file: %s\n",
  1373. rc, filename);
  1374. return rc;
  1375. }
  1376. if (bnxt_dir_type_is_ape_bin_format(dir_type) == true)
  1377. rc = bnxt_flash_firmware(dev, dir_type, fw->data, fw->size);
  1378. else if (bnxt_dir_type_is_other_exec_format(dir_type) == true)
  1379. rc = bnxt_flash_microcode(dev, dir_type, fw->data, fw->size);
  1380. else
  1381. rc = bnxt_flash_nvram(dev, dir_type, BNX_DIR_ORDINAL_FIRST,
  1382. 0, 0, fw->data, fw->size);
  1383. release_firmware(fw);
  1384. return rc;
  1385. }
  1386. static int bnxt_flash_package_from_file(struct net_device *dev,
  1387. char *filename, u32 install_type)
  1388. {
  1389. struct bnxt *bp = netdev_priv(dev);
  1390. struct hwrm_nvm_install_update_output *resp = bp->hwrm_cmd_resp_addr;
  1391. struct hwrm_nvm_install_update_input install = {0};
  1392. const struct firmware *fw;
  1393. u32 item_len;
  1394. u16 index;
  1395. int rc;
  1396. bnxt_hwrm_fw_set_time(bp);
  1397. if (bnxt_find_nvram_item(dev, BNX_DIR_TYPE_UPDATE,
  1398. BNX_DIR_ORDINAL_FIRST, BNX_DIR_EXT_NONE,
  1399. &index, &item_len, NULL) != 0) {
  1400. netdev_err(dev, "PKG update area not created in nvram\n");
  1401. return -ENOBUFS;
  1402. }
  1403. rc = request_firmware(&fw, filename, &dev->dev);
  1404. if (rc != 0) {
  1405. netdev_err(dev, "PKG error %d requesting file: %s\n",
  1406. rc, filename);
  1407. return rc;
  1408. }
  1409. if (fw->size > item_len) {
  1410. netdev_err(dev, "PKG insufficient update area in nvram: %lu",
  1411. (unsigned long)fw->size);
  1412. rc = -EFBIG;
  1413. } else {
  1414. dma_addr_t dma_handle;
  1415. u8 *kmem;
  1416. struct hwrm_nvm_modify_input modify = {0};
  1417. bnxt_hwrm_cmd_hdr_init(bp, &modify, HWRM_NVM_MODIFY, -1, -1);
  1418. modify.dir_idx = cpu_to_le16(index);
  1419. modify.len = cpu_to_le32(fw->size);
  1420. kmem = dma_alloc_coherent(&bp->pdev->dev, fw->size,
  1421. &dma_handle, GFP_KERNEL);
  1422. if (!kmem) {
  1423. netdev_err(dev,
  1424. "dma_alloc_coherent failure, length = %u\n",
  1425. (unsigned int)fw->size);
  1426. rc = -ENOMEM;
  1427. } else {
  1428. memcpy(kmem, fw->data, fw->size);
  1429. modify.host_src_addr = cpu_to_le64(dma_handle);
  1430. rc = hwrm_send_message(bp, &modify, sizeof(modify),
  1431. FLASH_PACKAGE_TIMEOUT);
  1432. dma_free_coherent(&bp->pdev->dev, fw->size, kmem,
  1433. dma_handle);
  1434. }
  1435. }
  1436. release_firmware(fw);
  1437. if (rc)
  1438. return rc;
  1439. if ((install_type & 0xffff) == 0)
  1440. install_type >>= 16;
  1441. bnxt_hwrm_cmd_hdr_init(bp, &install, HWRM_NVM_INSTALL_UPDATE, -1, -1);
  1442. install.install_type = cpu_to_le32(install_type);
  1443. mutex_lock(&bp->hwrm_cmd_lock);
  1444. rc = _hwrm_send_message(bp, &install, sizeof(install),
  1445. INSTALL_PACKAGE_TIMEOUT);
  1446. if (rc) {
  1447. rc = -EOPNOTSUPP;
  1448. goto flash_pkg_exit;
  1449. }
  1450. if (resp->error_code) {
  1451. u8 error_code = ((struct hwrm_err_output *)resp)->cmd_err;
  1452. if (error_code == NVM_INSTALL_UPDATE_CMD_ERR_CODE_FRAG_ERR) {
  1453. install.flags |= cpu_to_le16(
  1454. NVM_INSTALL_UPDATE_REQ_FLAGS_ALLOWED_TO_DEFRAG);
  1455. rc = _hwrm_send_message(bp, &install, sizeof(install),
  1456. INSTALL_PACKAGE_TIMEOUT);
  1457. if (rc) {
  1458. rc = -EOPNOTSUPP;
  1459. goto flash_pkg_exit;
  1460. }
  1461. }
  1462. }
  1463. if (resp->result) {
  1464. netdev_err(dev, "PKG install error = %d, problem_item = %d\n",
  1465. (s8)resp->result, (int)resp->problem_item);
  1466. rc = -ENOPKG;
  1467. }
  1468. flash_pkg_exit:
  1469. mutex_unlock(&bp->hwrm_cmd_lock);
  1470. return rc;
  1471. }
  1472. static int bnxt_flash_device(struct net_device *dev,
  1473. struct ethtool_flash *flash)
  1474. {
  1475. if (!BNXT_PF((struct bnxt *)netdev_priv(dev))) {
  1476. netdev_err(dev, "flashdev not supported from a virtual function\n");
  1477. return -EINVAL;
  1478. }
  1479. if (flash->region == ETHTOOL_FLASH_ALL_REGIONS ||
  1480. flash->region > 0xffff)
  1481. return bnxt_flash_package_from_file(dev, flash->data,
  1482. flash->region);
  1483. return bnxt_flash_firmware_from_file(dev, flash->region, flash->data);
  1484. }
  1485. static int nvm_get_dir_info(struct net_device *dev, u32 *entries, u32 *length)
  1486. {
  1487. struct bnxt *bp = netdev_priv(dev);
  1488. int rc;
  1489. struct hwrm_nvm_get_dir_info_input req = {0};
  1490. struct hwrm_nvm_get_dir_info_output *output = bp->hwrm_cmd_resp_addr;
  1491. bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_GET_DIR_INFO, -1, -1);
  1492. mutex_lock(&bp->hwrm_cmd_lock);
  1493. rc = _hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
  1494. if (!rc) {
  1495. *entries = le32_to_cpu(output->entries);
  1496. *length = le32_to_cpu(output->entry_length);
  1497. }
  1498. mutex_unlock(&bp->hwrm_cmd_lock);
  1499. return rc;
  1500. }
  1501. static int bnxt_get_eeprom_len(struct net_device *dev)
  1502. {
  1503. /* The -1 return value allows the entire 32-bit range of offsets to be
  1504. * passed via the ethtool command-line utility.
  1505. */
  1506. return -1;
  1507. }
  1508. static int bnxt_get_nvram_directory(struct net_device *dev, u32 len, u8 *data)
  1509. {
  1510. struct bnxt *bp = netdev_priv(dev);
  1511. int rc;
  1512. u32 dir_entries;
  1513. u32 entry_length;
  1514. u8 *buf;
  1515. size_t buflen;
  1516. dma_addr_t dma_handle;
  1517. struct hwrm_nvm_get_dir_entries_input req = {0};
  1518. rc = nvm_get_dir_info(dev, &dir_entries, &entry_length);
  1519. if (rc != 0)
  1520. return rc;
  1521. /* Insert 2 bytes of directory info (count and size of entries) */
  1522. if (len < 2)
  1523. return -EINVAL;
  1524. *data++ = dir_entries;
  1525. *data++ = entry_length;
  1526. len -= 2;
  1527. memset(data, 0xff, len);
  1528. buflen = dir_entries * entry_length;
  1529. buf = dma_alloc_coherent(&bp->pdev->dev, buflen, &dma_handle,
  1530. GFP_KERNEL);
  1531. if (!buf) {
  1532. netdev_err(dev, "dma_alloc_coherent failure, length = %u\n",
  1533. (unsigned)buflen);
  1534. return -ENOMEM;
  1535. }
  1536. bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_GET_DIR_ENTRIES, -1, -1);
  1537. req.host_dest_addr = cpu_to_le64(dma_handle);
  1538. rc = hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
  1539. if (rc == 0)
  1540. memcpy(data, buf, len > buflen ? buflen : len);
  1541. dma_free_coherent(&bp->pdev->dev, buflen, buf, dma_handle);
  1542. return rc;
  1543. }
  1544. static int bnxt_get_nvram_item(struct net_device *dev, u32 index, u32 offset,
  1545. u32 length, u8 *data)
  1546. {
  1547. struct bnxt *bp = netdev_priv(dev);
  1548. int rc;
  1549. u8 *buf;
  1550. dma_addr_t dma_handle;
  1551. struct hwrm_nvm_read_input req = {0};
  1552. buf = dma_alloc_coherent(&bp->pdev->dev, length, &dma_handle,
  1553. GFP_KERNEL);
  1554. if (!buf) {
  1555. netdev_err(dev, "dma_alloc_coherent failure, length = %u\n",
  1556. (unsigned)length);
  1557. return -ENOMEM;
  1558. }
  1559. bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_READ, -1, -1);
  1560. req.host_dest_addr = cpu_to_le64(dma_handle);
  1561. req.dir_idx = cpu_to_le16(index);
  1562. req.offset = cpu_to_le32(offset);
  1563. req.len = cpu_to_le32(length);
  1564. rc = hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
  1565. if (rc == 0)
  1566. memcpy(data, buf, length);
  1567. dma_free_coherent(&bp->pdev->dev, length, buf, dma_handle);
  1568. return rc;
  1569. }
  1570. static int bnxt_find_nvram_item(struct net_device *dev, u16 type, u16 ordinal,
  1571. u16 ext, u16 *index, u32 *item_length,
  1572. u32 *data_length)
  1573. {
  1574. struct bnxt *bp = netdev_priv(dev);
  1575. int rc;
  1576. struct hwrm_nvm_find_dir_entry_input req = {0};
  1577. struct hwrm_nvm_find_dir_entry_output *output = bp->hwrm_cmd_resp_addr;
  1578. bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_FIND_DIR_ENTRY, -1, -1);
  1579. req.enables = 0;
  1580. req.dir_idx = 0;
  1581. req.dir_type = cpu_to_le16(type);
  1582. req.dir_ordinal = cpu_to_le16(ordinal);
  1583. req.dir_ext = cpu_to_le16(ext);
  1584. req.opt_ordinal = NVM_FIND_DIR_ENTRY_REQ_OPT_ORDINAL_EQ;
  1585. rc = hwrm_send_message_silent(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
  1586. if (rc == 0) {
  1587. if (index)
  1588. *index = le16_to_cpu(output->dir_idx);
  1589. if (item_length)
  1590. *item_length = le32_to_cpu(output->dir_item_length);
  1591. if (data_length)
  1592. *data_length = le32_to_cpu(output->dir_data_length);
  1593. }
  1594. return rc;
  1595. }
  1596. static char *bnxt_parse_pkglog(int desired_field, u8 *data, size_t datalen)
  1597. {
  1598. char *retval = NULL;
  1599. char *p;
  1600. char *value;
  1601. int field = 0;
  1602. if (datalen < 1)
  1603. return NULL;
  1604. /* null-terminate the log data (removing last '\n'): */
  1605. data[datalen - 1] = 0;
  1606. for (p = data; *p != 0; p++) {
  1607. field = 0;
  1608. retval = NULL;
  1609. while (*p != 0 && *p != '\n') {
  1610. value = p;
  1611. while (*p != 0 && *p != '\t' && *p != '\n')
  1612. p++;
  1613. if (field == desired_field)
  1614. retval = value;
  1615. if (*p != '\t')
  1616. break;
  1617. *p = 0;
  1618. field++;
  1619. p++;
  1620. }
  1621. if (*p == 0)
  1622. break;
  1623. *p = 0;
  1624. }
  1625. return retval;
  1626. }
  1627. static char *bnxt_get_pkgver(struct net_device *dev, char *buf, size_t buflen)
  1628. {
  1629. u16 index = 0;
  1630. u32 datalen;
  1631. if (bnxt_find_nvram_item(dev, BNX_DIR_TYPE_PKG_LOG,
  1632. BNX_DIR_ORDINAL_FIRST, BNX_DIR_EXT_NONE,
  1633. &index, NULL, &datalen) != 0)
  1634. return NULL;
  1635. memset(buf, 0, buflen);
  1636. if (bnxt_get_nvram_item(dev, index, 0, datalen, buf) != 0)
  1637. return NULL;
  1638. return bnxt_parse_pkglog(BNX_PKG_LOG_FIELD_IDX_PKG_VERSION, buf,
  1639. datalen);
  1640. }
  1641. static int bnxt_get_eeprom(struct net_device *dev,
  1642. struct ethtool_eeprom *eeprom,
  1643. u8 *data)
  1644. {
  1645. u32 index;
  1646. u32 offset;
  1647. if (eeprom->offset == 0) /* special offset value to get directory */
  1648. return bnxt_get_nvram_directory(dev, eeprom->len, data);
  1649. index = eeprom->offset >> 24;
  1650. offset = eeprom->offset & 0xffffff;
  1651. if (index == 0) {
  1652. netdev_err(dev, "unsupported index value: %d\n", index);
  1653. return -EINVAL;
  1654. }
  1655. return bnxt_get_nvram_item(dev, index - 1, offset, eeprom->len, data);
  1656. }
  1657. static int bnxt_erase_nvram_directory(struct net_device *dev, u8 index)
  1658. {
  1659. struct bnxt *bp = netdev_priv(dev);
  1660. struct hwrm_nvm_erase_dir_entry_input req = {0};
  1661. bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_ERASE_DIR_ENTRY, -1, -1);
  1662. req.dir_idx = cpu_to_le16(index);
  1663. return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
  1664. }
  1665. static int bnxt_set_eeprom(struct net_device *dev,
  1666. struct ethtool_eeprom *eeprom,
  1667. u8 *data)
  1668. {
  1669. struct bnxt *bp = netdev_priv(dev);
  1670. u8 index, dir_op;
  1671. u16 type, ext, ordinal, attr;
  1672. if (!BNXT_PF(bp)) {
  1673. netdev_err(dev, "NVM write not supported from a virtual function\n");
  1674. return -EINVAL;
  1675. }
  1676. type = eeprom->magic >> 16;
  1677. if (type == 0xffff) { /* special value for directory operations */
  1678. index = eeprom->magic & 0xff;
  1679. dir_op = eeprom->magic >> 8;
  1680. if (index == 0)
  1681. return -EINVAL;
  1682. switch (dir_op) {
  1683. case 0x0e: /* erase */
  1684. if (eeprom->offset != ~eeprom->magic)
  1685. return -EINVAL;
  1686. return bnxt_erase_nvram_directory(dev, index - 1);
  1687. default:
  1688. return -EINVAL;
  1689. }
  1690. }
  1691. /* Create or re-write an NVM item: */
  1692. if (bnxt_dir_type_is_executable(type) == true)
  1693. return -EOPNOTSUPP;
  1694. ext = eeprom->magic & 0xffff;
  1695. ordinal = eeprom->offset >> 16;
  1696. attr = eeprom->offset & 0xffff;
  1697. return bnxt_flash_nvram(dev, type, ordinal, ext, attr, data,
  1698. eeprom->len);
  1699. }
  1700. static int bnxt_set_eee(struct net_device *dev, struct ethtool_eee *edata)
  1701. {
  1702. struct bnxt *bp = netdev_priv(dev);
  1703. struct ethtool_eee *eee = &bp->eee;
  1704. struct bnxt_link_info *link_info = &bp->link_info;
  1705. u32 advertising =
  1706. _bnxt_fw_to_ethtool_adv_spds(link_info->advertising, 0);
  1707. int rc = 0;
  1708. if (!BNXT_SINGLE_PF(bp))
  1709. return -EOPNOTSUPP;
  1710. if (!(bp->flags & BNXT_FLAG_EEE_CAP))
  1711. return -EOPNOTSUPP;
  1712. if (!edata->eee_enabled)
  1713. goto eee_ok;
  1714. if (!(link_info->autoneg & BNXT_AUTONEG_SPEED)) {
  1715. netdev_warn(dev, "EEE requires autoneg\n");
  1716. return -EINVAL;
  1717. }
  1718. if (edata->tx_lpi_enabled) {
  1719. if (bp->lpi_tmr_hi && (edata->tx_lpi_timer > bp->lpi_tmr_hi ||
  1720. edata->tx_lpi_timer < bp->lpi_tmr_lo)) {
  1721. netdev_warn(dev, "Valid LPI timer range is %d and %d microsecs\n",
  1722. bp->lpi_tmr_lo, bp->lpi_tmr_hi);
  1723. return -EINVAL;
  1724. } else if (!bp->lpi_tmr_hi) {
  1725. edata->tx_lpi_timer = eee->tx_lpi_timer;
  1726. }
  1727. }
  1728. if (!edata->advertised) {
  1729. edata->advertised = advertising & eee->supported;
  1730. } else if (edata->advertised & ~advertising) {
  1731. netdev_warn(dev, "EEE advertised %x must be a subset of autoneg advertised speeds %x\n",
  1732. edata->advertised, advertising);
  1733. return -EINVAL;
  1734. }
  1735. eee->advertised = edata->advertised;
  1736. eee->tx_lpi_enabled = edata->tx_lpi_enabled;
  1737. eee->tx_lpi_timer = edata->tx_lpi_timer;
  1738. eee_ok:
  1739. eee->eee_enabled = edata->eee_enabled;
  1740. if (netif_running(dev))
  1741. rc = bnxt_hwrm_set_link_setting(bp, false, true);
  1742. return rc;
  1743. }
  1744. static int bnxt_get_eee(struct net_device *dev, struct ethtool_eee *edata)
  1745. {
  1746. struct bnxt *bp = netdev_priv(dev);
  1747. if (!(bp->flags & BNXT_FLAG_EEE_CAP))
  1748. return -EOPNOTSUPP;
  1749. *edata = bp->eee;
  1750. if (!bp->eee.eee_enabled) {
  1751. /* Preserve tx_lpi_timer so that the last value will be used
  1752. * by default when it is re-enabled.
  1753. */
  1754. edata->advertised = 0;
  1755. edata->tx_lpi_enabled = 0;
  1756. }
  1757. if (!bp->eee.eee_active)
  1758. edata->lp_advertised = 0;
  1759. return 0;
  1760. }
  1761. static int bnxt_read_sfp_module_eeprom_info(struct bnxt *bp, u16 i2c_addr,
  1762. u16 page_number, u16 start_addr,
  1763. u16 data_length, u8 *buf)
  1764. {
  1765. struct hwrm_port_phy_i2c_read_input req = {0};
  1766. struct hwrm_port_phy_i2c_read_output *output = bp->hwrm_cmd_resp_addr;
  1767. int rc, byte_offset = 0;
  1768. bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PORT_PHY_I2C_READ, -1, -1);
  1769. req.i2c_slave_addr = i2c_addr;
  1770. req.page_number = cpu_to_le16(page_number);
  1771. req.port_id = cpu_to_le16(bp->pf.port_id);
  1772. do {
  1773. u16 xfer_size;
  1774. xfer_size = min_t(u16, data_length, BNXT_MAX_PHY_I2C_RESP_SIZE);
  1775. data_length -= xfer_size;
  1776. req.page_offset = cpu_to_le16(start_addr + byte_offset);
  1777. req.data_length = xfer_size;
  1778. req.enables = cpu_to_le32(start_addr + byte_offset ?
  1779. PORT_PHY_I2C_READ_REQ_ENABLES_PAGE_OFFSET : 0);
  1780. mutex_lock(&bp->hwrm_cmd_lock);
  1781. rc = _hwrm_send_message(bp, &req, sizeof(req),
  1782. HWRM_CMD_TIMEOUT);
  1783. if (!rc)
  1784. memcpy(buf + byte_offset, output->data, xfer_size);
  1785. mutex_unlock(&bp->hwrm_cmd_lock);
  1786. byte_offset += xfer_size;
  1787. } while (!rc && data_length > 0);
  1788. return rc;
  1789. }
  1790. static int bnxt_get_module_info(struct net_device *dev,
  1791. struct ethtool_modinfo *modinfo)
  1792. {
  1793. struct bnxt *bp = netdev_priv(dev);
  1794. struct hwrm_port_phy_i2c_read_input req = {0};
  1795. struct hwrm_port_phy_i2c_read_output *output = bp->hwrm_cmd_resp_addr;
  1796. int rc;
  1797. /* No point in going further if phy status indicates
  1798. * module is not inserted or if it is powered down or
  1799. * if it is of type 10GBase-T
  1800. */
  1801. if (bp->link_info.module_status >
  1802. PORT_PHY_QCFG_RESP_MODULE_STATUS_WARNINGMSG)
  1803. return -EOPNOTSUPP;
  1804. /* This feature is not supported in older firmware versions */
  1805. if (bp->hwrm_spec_code < 0x10202)
  1806. return -EOPNOTSUPP;
  1807. bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PORT_PHY_I2C_READ, -1, -1);
  1808. req.i2c_slave_addr = I2C_DEV_ADDR_A0;
  1809. req.page_number = 0;
  1810. req.page_offset = cpu_to_le16(SFP_EEPROM_SFF_8472_COMP_ADDR);
  1811. req.data_length = SFP_EEPROM_SFF_8472_COMP_SIZE;
  1812. req.port_id = cpu_to_le16(bp->pf.port_id);
  1813. mutex_lock(&bp->hwrm_cmd_lock);
  1814. rc = _hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
  1815. if (!rc) {
  1816. u32 module_id = le32_to_cpu(output->data[0]);
  1817. switch (module_id) {
  1818. case SFF_MODULE_ID_SFP:
  1819. modinfo->type = ETH_MODULE_SFF_8472;
  1820. modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN;
  1821. break;
  1822. case SFF_MODULE_ID_QSFP:
  1823. case SFF_MODULE_ID_QSFP_PLUS:
  1824. modinfo->type = ETH_MODULE_SFF_8436;
  1825. modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN;
  1826. break;
  1827. case SFF_MODULE_ID_QSFP28:
  1828. modinfo->type = ETH_MODULE_SFF_8636;
  1829. modinfo->eeprom_len = ETH_MODULE_SFF_8636_LEN;
  1830. break;
  1831. default:
  1832. rc = -EOPNOTSUPP;
  1833. break;
  1834. }
  1835. }
  1836. mutex_unlock(&bp->hwrm_cmd_lock);
  1837. return rc;
  1838. }
  1839. static int bnxt_get_module_eeprom(struct net_device *dev,
  1840. struct ethtool_eeprom *eeprom,
  1841. u8 *data)
  1842. {
  1843. struct bnxt *bp = netdev_priv(dev);
  1844. u16 start = eeprom->offset, length = eeprom->len;
  1845. int rc = 0;
  1846. memset(data, 0, eeprom->len);
  1847. /* Read A0 portion of the EEPROM */
  1848. if (start < ETH_MODULE_SFF_8436_LEN) {
  1849. if (start + eeprom->len > ETH_MODULE_SFF_8436_LEN)
  1850. length = ETH_MODULE_SFF_8436_LEN - start;
  1851. rc = bnxt_read_sfp_module_eeprom_info(bp, I2C_DEV_ADDR_A0, 0,
  1852. start, length, data);
  1853. if (rc)
  1854. return rc;
  1855. start += length;
  1856. data += length;
  1857. length = eeprom->len - length;
  1858. }
  1859. /* Read A2 portion of the EEPROM */
  1860. if (length) {
  1861. start -= ETH_MODULE_SFF_8436_LEN;
  1862. bnxt_read_sfp_module_eeprom_info(bp, I2C_DEV_ADDR_A2, 1, start,
  1863. length, data);
  1864. }
  1865. return rc;
  1866. }
  1867. static int bnxt_nway_reset(struct net_device *dev)
  1868. {
  1869. int rc = 0;
  1870. struct bnxt *bp = netdev_priv(dev);
  1871. struct bnxt_link_info *link_info = &bp->link_info;
  1872. if (!BNXT_SINGLE_PF(bp))
  1873. return -EOPNOTSUPP;
  1874. if (!(link_info->autoneg & BNXT_AUTONEG_SPEED))
  1875. return -EINVAL;
  1876. if (netif_running(dev))
  1877. rc = bnxt_hwrm_set_link_setting(bp, true, false);
  1878. return rc;
  1879. }
  1880. static int bnxt_set_phys_id(struct net_device *dev,
  1881. enum ethtool_phys_id_state state)
  1882. {
  1883. struct hwrm_port_led_cfg_input req = {0};
  1884. struct bnxt *bp = netdev_priv(dev);
  1885. struct bnxt_pf_info *pf = &bp->pf;
  1886. struct bnxt_led_cfg *led_cfg;
  1887. u8 led_state;
  1888. __le16 duration;
  1889. int i, rc;
  1890. if (!bp->num_leds || BNXT_VF(bp))
  1891. return -EOPNOTSUPP;
  1892. if (state == ETHTOOL_ID_ACTIVE) {
  1893. led_state = PORT_LED_CFG_REQ_LED0_STATE_BLINKALT;
  1894. duration = cpu_to_le16(500);
  1895. } else if (state == ETHTOOL_ID_INACTIVE) {
  1896. led_state = PORT_LED_CFG_REQ_LED1_STATE_DEFAULT;
  1897. duration = cpu_to_le16(0);
  1898. } else {
  1899. return -EINVAL;
  1900. }
  1901. bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PORT_LED_CFG, -1, -1);
  1902. req.port_id = cpu_to_le16(pf->port_id);
  1903. req.num_leds = bp->num_leds;
  1904. led_cfg = (struct bnxt_led_cfg *)&req.led0_id;
  1905. for (i = 0; i < bp->num_leds; i++, led_cfg++) {
  1906. req.enables |= BNXT_LED_DFLT_ENABLES(i);
  1907. led_cfg->led_id = bp->leds[i].led_id;
  1908. led_cfg->led_state = led_state;
  1909. led_cfg->led_blink_on = duration;
  1910. led_cfg->led_blink_off = duration;
  1911. led_cfg->led_group_id = bp->leds[i].led_group_id;
  1912. }
  1913. rc = hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
  1914. if (rc)
  1915. rc = -EIO;
  1916. return rc;
  1917. }
  1918. static int bnxt_hwrm_selftest_irq(struct bnxt *bp, u16 cmpl_ring)
  1919. {
  1920. struct hwrm_selftest_irq_input req = {0};
  1921. bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_SELFTEST_IRQ, cmpl_ring, -1);
  1922. return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
  1923. }
  1924. static int bnxt_test_irq(struct bnxt *bp)
  1925. {
  1926. int i;
  1927. for (i = 0; i < bp->cp_nr_rings; i++) {
  1928. u16 cmpl_ring = bp->grp_info[i].cp_fw_ring_id;
  1929. int rc;
  1930. rc = bnxt_hwrm_selftest_irq(bp, cmpl_ring);
  1931. if (rc)
  1932. return rc;
  1933. }
  1934. return 0;
  1935. }
  1936. static int bnxt_hwrm_mac_loopback(struct bnxt *bp, bool enable)
  1937. {
  1938. struct hwrm_port_mac_cfg_input req = {0};
  1939. bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PORT_MAC_CFG, -1, -1);
  1940. req.enables = cpu_to_le32(PORT_MAC_CFG_REQ_ENABLES_LPBK);
  1941. if (enable)
  1942. req.lpbk = PORT_MAC_CFG_REQ_LPBK_LOCAL;
  1943. else
  1944. req.lpbk = PORT_MAC_CFG_REQ_LPBK_NONE;
  1945. return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
  1946. }
  1947. static int bnxt_disable_an_for_lpbk(struct bnxt *bp,
  1948. struct hwrm_port_phy_cfg_input *req)
  1949. {
  1950. struct bnxt_link_info *link_info = &bp->link_info;
  1951. u16 fw_advertising = link_info->advertising;
  1952. u16 fw_speed;
  1953. int rc;
  1954. if (!link_info->autoneg)
  1955. return 0;
  1956. fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_1GB;
  1957. if (netif_carrier_ok(bp->dev))
  1958. fw_speed = bp->link_info.link_speed;
  1959. else if (fw_advertising & BNXT_LINK_SPEED_MSK_10GB)
  1960. fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_10GB;
  1961. else if (fw_advertising & BNXT_LINK_SPEED_MSK_25GB)
  1962. fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_25GB;
  1963. else if (fw_advertising & BNXT_LINK_SPEED_MSK_40GB)
  1964. fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_40GB;
  1965. else if (fw_advertising & BNXT_LINK_SPEED_MSK_50GB)
  1966. fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_50GB;
  1967. req->force_link_speed = cpu_to_le16(fw_speed);
  1968. req->flags |= cpu_to_le32(PORT_PHY_CFG_REQ_FLAGS_FORCE |
  1969. PORT_PHY_CFG_REQ_FLAGS_RESET_PHY);
  1970. rc = hwrm_send_message(bp, req, sizeof(*req), HWRM_CMD_TIMEOUT);
  1971. req->flags = 0;
  1972. req->force_link_speed = cpu_to_le16(0);
  1973. return rc;
  1974. }
  1975. static int bnxt_hwrm_phy_loopback(struct bnxt *bp, bool enable)
  1976. {
  1977. struct hwrm_port_phy_cfg_input req = {0};
  1978. bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PORT_PHY_CFG, -1, -1);
  1979. if (enable) {
  1980. bnxt_disable_an_for_lpbk(bp, &req);
  1981. req.lpbk = PORT_PHY_CFG_REQ_LPBK_LOCAL;
  1982. } else {
  1983. req.lpbk = PORT_PHY_CFG_REQ_LPBK_NONE;
  1984. }
  1985. req.enables = cpu_to_le32(PORT_PHY_CFG_REQ_ENABLES_LPBK);
  1986. return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
  1987. }
  1988. static int bnxt_rx_loopback(struct bnxt *bp, struct bnxt_napi *bnapi,
  1989. u32 raw_cons, int pkt_size)
  1990. {
  1991. struct bnxt_cp_ring_info *cpr = &bnapi->cp_ring;
  1992. struct bnxt_rx_ring_info *rxr = bnapi->rx_ring;
  1993. struct bnxt_sw_rx_bd *rx_buf;
  1994. struct rx_cmp *rxcmp;
  1995. u16 cp_cons, cons;
  1996. u8 *data;
  1997. u32 len;
  1998. int i;
  1999. cp_cons = RING_CMP(raw_cons);
  2000. rxcmp = (struct rx_cmp *)
  2001. &cpr->cp_desc_ring[CP_RING(cp_cons)][CP_IDX(cp_cons)];
  2002. cons = rxcmp->rx_cmp_opaque;
  2003. rx_buf = &rxr->rx_buf_ring[cons];
  2004. data = rx_buf->data_ptr;
  2005. len = le32_to_cpu(rxcmp->rx_cmp_len_flags_type) >> RX_CMP_LEN_SHIFT;
  2006. if (len != pkt_size)
  2007. return -EIO;
  2008. i = ETH_ALEN;
  2009. if (!ether_addr_equal(data + i, bnapi->bp->dev->dev_addr))
  2010. return -EIO;
  2011. i += ETH_ALEN;
  2012. for ( ; i < pkt_size; i++) {
  2013. if (data[i] != (u8)(i & 0xff))
  2014. return -EIO;
  2015. }
  2016. return 0;
  2017. }
  2018. static int bnxt_poll_loopback(struct bnxt *bp, int pkt_size)
  2019. {
  2020. struct bnxt_napi *bnapi = bp->bnapi[0];
  2021. struct bnxt_cp_ring_info *cpr;
  2022. struct tx_cmp *txcmp;
  2023. int rc = -EIO;
  2024. u32 raw_cons;
  2025. u32 cons;
  2026. int i;
  2027. cpr = &bnapi->cp_ring;
  2028. raw_cons = cpr->cp_raw_cons;
  2029. for (i = 0; i < 200; i++) {
  2030. cons = RING_CMP(raw_cons);
  2031. txcmp = &cpr->cp_desc_ring[CP_RING(cons)][CP_IDX(cons)];
  2032. if (!TX_CMP_VALID(txcmp, raw_cons)) {
  2033. udelay(5);
  2034. continue;
  2035. }
  2036. /* The valid test of the entry must be done first before
  2037. * reading any further.
  2038. */
  2039. dma_rmb();
  2040. if (TX_CMP_TYPE(txcmp) == CMP_TYPE_RX_L2_CMP) {
  2041. rc = bnxt_rx_loopback(bp, bnapi, raw_cons, pkt_size);
  2042. raw_cons = NEXT_RAW_CMP(raw_cons);
  2043. raw_cons = NEXT_RAW_CMP(raw_cons);
  2044. break;
  2045. }
  2046. raw_cons = NEXT_RAW_CMP(raw_cons);
  2047. }
  2048. cpr->cp_raw_cons = raw_cons;
  2049. return rc;
  2050. }
  2051. static int bnxt_run_loopback(struct bnxt *bp)
  2052. {
  2053. struct bnxt_tx_ring_info *txr = &bp->tx_ring[0];
  2054. int pkt_size, i = 0;
  2055. struct sk_buff *skb;
  2056. dma_addr_t map;
  2057. u8 *data;
  2058. int rc;
  2059. pkt_size = min(bp->dev->mtu + ETH_HLEN, bp->rx_copy_thresh);
  2060. skb = netdev_alloc_skb(bp->dev, pkt_size);
  2061. if (!skb)
  2062. return -ENOMEM;
  2063. data = skb_put(skb, pkt_size);
  2064. eth_broadcast_addr(data);
  2065. i += ETH_ALEN;
  2066. ether_addr_copy(&data[i], bp->dev->dev_addr);
  2067. i += ETH_ALEN;
  2068. for ( ; i < pkt_size; i++)
  2069. data[i] = (u8)(i & 0xff);
  2070. map = dma_map_single(&bp->pdev->dev, skb->data, pkt_size,
  2071. PCI_DMA_TODEVICE);
  2072. if (dma_mapping_error(&bp->pdev->dev, map)) {
  2073. dev_kfree_skb(skb);
  2074. return -EIO;
  2075. }
  2076. bnxt_xmit_xdp(bp, txr, map, pkt_size, 0);
  2077. /* Sync BD data before updating doorbell */
  2078. wmb();
  2079. bnxt_db_write(bp, txr->tx_doorbell, DB_KEY_TX | txr->tx_prod);
  2080. rc = bnxt_poll_loopback(bp, pkt_size);
  2081. dma_unmap_single(&bp->pdev->dev, map, pkt_size, PCI_DMA_TODEVICE);
  2082. dev_kfree_skb(skb);
  2083. return rc;
  2084. }
  2085. static int bnxt_run_fw_tests(struct bnxt *bp, u8 test_mask, u8 *test_results)
  2086. {
  2087. struct hwrm_selftest_exec_output *resp = bp->hwrm_cmd_resp_addr;
  2088. struct hwrm_selftest_exec_input req = {0};
  2089. int rc;
  2090. bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_SELFTEST_EXEC, -1, -1);
  2091. mutex_lock(&bp->hwrm_cmd_lock);
  2092. resp->test_success = 0;
  2093. req.flags = test_mask;
  2094. rc = _hwrm_send_message(bp, &req, sizeof(req), bp->test_info->timeout);
  2095. *test_results = resp->test_success;
  2096. mutex_unlock(&bp->hwrm_cmd_lock);
  2097. return rc;
  2098. }
  2099. #define BNXT_DRV_TESTS 3
  2100. #define BNXT_MACLPBK_TEST_IDX (bp->num_tests - BNXT_DRV_TESTS)
  2101. #define BNXT_PHYLPBK_TEST_IDX (BNXT_MACLPBK_TEST_IDX + 1)
  2102. #define BNXT_IRQ_TEST_IDX (BNXT_MACLPBK_TEST_IDX + 2)
  2103. static void bnxt_self_test(struct net_device *dev, struct ethtool_test *etest,
  2104. u64 *buf)
  2105. {
  2106. struct bnxt *bp = netdev_priv(dev);
  2107. bool offline = false;
  2108. u8 test_results = 0;
  2109. u8 test_mask = 0;
  2110. int rc, i;
  2111. if (!bp->num_tests || !BNXT_SINGLE_PF(bp))
  2112. return;
  2113. memset(buf, 0, sizeof(u64) * bp->num_tests);
  2114. if (!netif_running(dev)) {
  2115. etest->flags |= ETH_TEST_FL_FAILED;
  2116. return;
  2117. }
  2118. if (etest->flags & ETH_TEST_FL_OFFLINE) {
  2119. if (bp->pf.active_vfs) {
  2120. etest->flags |= ETH_TEST_FL_FAILED;
  2121. netdev_warn(dev, "Offline tests cannot be run with active VFs\n");
  2122. return;
  2123. }
  2124. offline = true;
  2125. }
  2126. for (i = 0; i < bp->num_tests - BNXT_DRV_TESTS; i++) {
  2127. u8 bit_val = 1 << i;
  2128. if (!(bp->test_info->offline_mask & bit_val))
  2129. test_mask |= bit_val;
  2130. else if (offline)
  2131. test_mask |= bit_val;
  2132. }
  2133. if (!offline) {
  2134. bnxt_run_fw_tests(bp, test_mask, &test_results);
  2135. } else {
  2136. rc = bnxt_close_nic(bp, false, false);
  2137. if (rc)
  2138. return;
  2139. bnxt_run_fw_tests(bp, test_mask, &test_results);
  2140. buf[BNXT_MACLPBK_TEST_IDX] = 1;
  2141. bnxt_hwrm_mac_loopback(bp, true);
  2142. msleep(250);
  2143. rc = bnxt_half_open_nic(bp);
  2144. if (rc) {
  2145. bnxt_hwrm_mac_loopback(bp, false);
  2146. etest->flags |= ETH_TEST_FL_FAILED;
  2147. return;
  2148. }
  2149. if (bnxt_run_loopback(bp))
  2150. etest->flags |= ETH_TEST_FL_FAILED;
  2151. else
  2152. buf[BNXT_MACLPBK_TEST_IDX] = 0;
  2153. bnxt_hwrm_mac_loopback(bp, false);
  2154. bnxt_hwrm_phy_loopback(bp, true);
  2155. msleep(1000);
  2156. if (bnxt_run_loopback(bp)) {
  2157. buf[BNXT_PHYLPBK_TEST_IDX] = 1;
  2158. etest->flags |= ETH_TEST_FL_FAILED;
  2159. }
  2160. bnxt_hwrm_phy_loopback(bp, false);
  2161. bnxt_half_close_nic(bp);
  2162. bnxt_open_nic(bp, false, true);
  2163. }
  2164. if (bnxt_test_irq(bp)) {
  2165. buf[BNXT_IRQ_TEST_IDX] = 1;
  2166. etest->flags |= ETH_TEST_FL_FAILED;
  2167. }
  2168. for (i = 0; i < bp->num_tests - BNXT_DRV_TESTS; i++) {
  2169. u8 bit_val = 1 << i;
  2170. if ((test_mask & bit_val) && !(test_results & bit_val)) {
  2171. buf[i] = 1;
  2172. etest->flags |= ETH_TEST_FL_FAILED;
  2173. }
  2174. }
  2175. }
  2176. void bnxt_ethtool_init(struct bnxt *bp)
  2177. {
  2178. struct hwrm_selftest_qlist_output *resp = bp->hwrm_cmd_resp_addr;
  2179. struct hwrm_selftest_qlist_input req = {0};
  2180. struct bnxt_test_info *test_info;
  2181. int i, rc;
  2182. if (bp->hwrm_spec_code < 0x10704 || !BNXT_SINGLE_PF(bp))
  2183. return;
  2184. bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_SELFTEST_QLIST, -1, -1);
  2185. mutex_lock(&bp->hwrm_cmd_lock);
  2186. rc = _hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
  2187. if (rc)
  2188. goto ethtool_init_exit;
  2189. test_info = kzalloc(sizeof(*bp->test_info), GFP_KERNEL);
  2190. if (!test_info)
  2191. goto ethtool_init_exit;
  2192. bp->test_info = test_info;
  2193. bp->num_tests = resp->num_tests + BNXT_DRV_TESTS;
  2194. if (bp->num_tests > BNXT_MAX_TEST)
  2195. bp->num_tests = BNXT_MAX_TEST;
  2196. test_info->offline_mask = resp->offline_tests;
  2197. test_info->timeout = le16_to_cpu(resp->test_timeout);
  2198. if (!test_info->timeout)
  2199. test_info->timeout = HWRM_CMD_TIMEOUT;
  2200. for (i = 0; i < bp->num_tests; i++) {
  2201. char *str = test_info->string[i];
  2202. char *fw_str = resp->test0_name + i * 32;
  2203. if (i == BNXT_MACLPBK_TEST_IDX) {
  2204. strcpy(str, "Mac loopback test (offline)");
  2205. } else if (i == BNXT_PHYLPBK_TEST_IDX) {
  2206. strcpy(str, "Phy loopback test (offline)");
  2207. } else if (i == BNXT_IRQ_TEST_IDX) {
  2208. strcpy(str, "Interrupt_test (offline)");
  2209. } else {
  2210. strlcpy(str, fw_str, ETH_GSTRING_LEN);
  2211. strncat(str, " test", ETH_GSTRING_LEN - strlen(str));
  2212. if (test_info->offline_mask & (1 << i))
  2213. strncat(str, " (offline)",
  2214. ETH_GSTRING_LEN - strlen(str));
  2215. else
  2216. strncat(str, " (online)",
  2217. ETH_GSTRING_LEN - strlen(str));
  2218. }
  2219. }
  2220. ethtool_init_exit:
  2221. mutex_unlock(&bp->hwrm_cmd_lock);
  2222. }
  2223. void bnxt_ethtool_free(struct bnxt *bp)
  2224. {
  2225. kfree(bp->test_info);
  2226. bp->test_info = NULL;
  2227. }
  2228. const struct ethtool_ops bnxt_ethtool_ops = {
  2229. .get_link_ksettings = bnxt_get_link_ksettings,
  2230. .set_link_ksettings = bnxt_set_link_ksettings,
  2231. .get_pauseparam = bnxt_get_pauseparam,
  2232. .set_pauseparam = bnxt_set_pauseparam,
  2233. .get_drvinfo = bnxt_get_drvinfo,
  2234. .get_wol = bnxt_get_wol,
  2235. .set_wol = bnxt_set_wol,
  2236. .get_coalesce = bnxt_get_coalesce,
  2237. .set_coalesce = bnxt_set_coalesce,
  2238. .get_msglevel = bnxt_get_msglevel,
  2239. .set_msglevel = bnxt_set_msglevel,
  2240. .get_sset_count = bnxt_get_sset_count,
  2241. .get_strings = bnxt_get_strings,
  2242. .get_ethtool_stats = bnxt_get_ethtool_stats,
  2243. .set_ringparam = bnxt_set_ringparam,
  2244. .get_ringparam = bnxt_get_ringparam,
  2245. .get_channels = bnxt_get_channels,
  2246. .set_channels = bnxt_set_channels,
  2247. .get_rxnfc = bnxt_get_rxnfc,
  2248. .set_rxnfc = bnxt_set_rxnfc,
  2249. .get_rxfh_indir_size = bnxt_get_rxfh_indir_size,
  2250. .get_rxfh_key_size = bnxt_get_rxfh_key_size,
  2251. .get_rxfh = bnxt_get_rxfh,
  2252. .flash_device = bnxt_flash_device,
  2253. .get_eeprom_len = bnxt_get_eeprom_len,
  2254. .get_eeprom = bnxt_get_eeprom,
  2255. .set_eeprom = bnxt_set_eeprom,
  2256. .get_link = bnxt_get_link,
  2257. .get_eee = bnxt_get_eee,
  2258. .set_eee = bnxt_set_eee,
  2259. .get_module_info = bnxt_get_module_info,
  2260. .get_module_eeprom = bnxt_get_module_eeprom,
  2261. .nway_reset = bnxt_nway_reset,
  2262. .set_phys_id = bnxt_set_phys_id,
  2263. .self_test = bnxt_self_test,
  2264. };