cnic.c 65 KB

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  1. /* cnic.c: Broadcom CNIC core network driver.
  2. *
  3. * Copyright (c) 2006-2009 Broadcom Corporation
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation.
  8. *
  9. * Original skeleton written by: John(Zongxi) Chen (zongxi@broadcom.com)
  10. * Modified and maintained by: Michael Chan <mchan@broadcom.com>
  11. */
  12. #include <linux/module.h>
  13. #include <linux/kernel.h>
  14. #include <linux/errno.h>
  15. #include <linux/list.h>
  16. #include <linux/slab.h>
  17. #include <linux/pci.h>
  18. #include <linux/init.h>
  19. #include <linux/netdevice.h>
  20. #include <linux/uio_driver.h>
  21. #include <linux/in.h>
  22. #include <linux/dma-mapping.h>
  23. #include <linux/delay.h>
  24. #include <linux/ethtool.h>
  25. #include <linux/if_vlan.h>
  26. #if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE)
  27. #define BCM_VLAN 1
  28. #endif
  29. #include <net/ip.h>
  30. #include <net/tcp.h>
  31. #include <net/route.h>
  32. #include <net/ipv6.h>
  33. #include <net/ip6_route.h>
  34. #include <scsi/iscsi_if.h>
  35. #include "cnic_if.h"
  36. #include "bnx2.h"
  37. #include "cnic.h"
  38. #include "cnic_defs.h"
  39. #define DRV_MODULE_NAME "cnic"
  40. #define PFX DRV_MODULE_NAME ": "
  41. static char version[] __devinitdata =
  42. "Broadcom NetXtreme II CNIC Driver " DRV_MODULE_NAME " v" CNIC_MODULE_VERSION " (" CNIC_MODULE_RELDATE ")\n";
  43. MODULE_AUTHOR("Michael Chan <mchan@broadcom.com> and John(Zongxi) "
  44. "Chen (zongxi@broadcom.com");
  45. MODULE_DESCRIPTION("Broadcom NetXtreme II CNIC Driver");
  46. MODULE_LICENSE("GPL");
  47. MODULE_VERSION(CNIC_MODULE_VERSION);
  48. static LIST_HEAD(cnic_dev_list);
  49. static DEFINE_RWLOCK(cnic_dev_lock);
  50. static DEFINE_MUTEX(cnic_lock);
  51. static struct cnic_ulp_ops *cnic_ulp_tbl[MAX_CNIC_ULP_TYPE];
  52. static int cnic_service_bnx2(void *, void *);
  53. static int cnic_ctl(void *, struct cnic_ctl_info *);
  54. static struct cnic_ops cnic_bnx2_ops = {
  55. .cnic_owner = THIS_MODULE,
  56. .cnic_handler = cnic_service_bnx2,
  57. .cnic_ctl = cnic_ctl,
  58. };
  59. static void cnic_shutdown_bnx2_rx_ring(struct cnic_dev *);
  60. static void cnic_init_bnx2_tx_ring(struct cnic_dev *);
  61. static void cnic_init_bnx2_rx_ring(struct cnic_dev *);
  62. static int cnic_cm_set_pg(struct cnic_sock *);
  63. static int cnic_uio_open(struct uio_info *uinfo, struct inode *inode)
  64. {
  65. struct cnic_dev *dev = uinfo->priv;
  66. struct cnic_local *cp = dev->cnic_priv;
  67. if (!capable(CAP_NET_ADMIN))
  68. return -EPERM;
  69. if (cp->uio_dev != -1)
  70. return -EBUSY;
  71. cp->uio_dev = iminor(inode);
  72. cnic_shutdown_bnx2_rx_ring(dev);
  73. cnic_init_bnx2_tx_ring(dev);
  74. cnic_init_bnx2_rx_ring(dev);
  75. return 0;
  76. }
  77. static int cnic_uio_close(struct uio_info *uinfo, struct inode *inode)
  78. {
  79. struct cnic_dev *dev = uinfo->priv;
  80. struct cnic_local *cp = dev->cnic_priv;
  81. cp->uio_dev = -1;
  82. return 0;
  83. }
  84. static inline void cnic_hold(struct cnic_dev *dev)
  85. {
  86. atomic_inc(&dev->ref_count);
  87. }
  88. static inline void cnic_put(struct cnic_dev *dev)
  89. {
  90. atomic_dec(&dev->ref_count);
  91. }
  92. static inline void csk_hold(struct cnic_sock *csk)
  93. {
  94. atomic_inc(&csk->ref_count);
  95. }
  96. static inline void csk_put(struct cnic_sock *csk)
  97. {
  98. atomic_dec(&csk->ref_count);
  99. }
  100. static struct cnic_dev *cnic_from_netdev(struct net_device *netdev)
  101. {
  102. struct cnic_dev *cdev;
  103. read_lock(&cnic_dev_lock);
  104. list_for_each_entry(cdev, &cnic_dev_list, list) {
  105. if (netdev == cdev->netdev) {
  106. cnic_hold(cdev);
  107. read_unlock(&cnic_dev_lock);
  108. return cdev;
  109. }
  110. }
  111. read_unlock(&cnic_dev_lock);
  112. return NULL;
  113. }
  114. static void cnic_ctx_wr(struct cnic_dev *dev, u32 cid_addr, u32 off, u32 val)
  115. {
  116. struct cnic_local *cp = dev->cnic_priv;
  117. struct cnic_eth_dev *ethdev = cp->ethdev;
  118. struct drv_ctl_info info;
  119. struct drv_ctl_io *io = &info.data.io;
  120. info.cmd = DRV_CTL_CTX_WR_CMD;
  121. io->cid_addr = cid_addr;
  122. io->offset = off;
  123. io->data = val;
  124. ethdev->drv_ctl(dev->netdev, &info);
  125. }
  126. static void cnic_reg_wr_ind(struct cnic_dev *dev, u32 off, u32 val)
  127. {
  128. struct cnic_local *cp = dev->cnic_priv;
  129. struct cnic_eth_dev *ethdev = cp->ethdev;
  130. struct drv_ctl_info info;
  131. struct drv_ctl_io *io = &info.data.io;
  132. info.cmd = DRV_CTL_IO_WR_CMD;
  133. io->offset = off;
  134. io->data = val;
  135. ethdev->drv_ctl(dev->netdev, &info);
  136. }
  137. static u32 cnic_reg_rd_ind(struct cnic_dev *dev, u32 off)
  138. {
  139. struct cnic_local *cp = dev->cnic_priv;
  140. struct cnic_eth_dev *ethdev = cp->ethdev;
  141. struct drv_ctl_info info;
  142. struct drv_ctl_io *io = &info.data.io;
  143. info.cmd = DRV_CTL_IO_RD_CMD;
  144. io->offset = off;
  145. ethdev->drv_ctl(dev->netdev, &info);
  146. return io->data;
  147. }
  148. static int cnic_in_use(struct cnic_sock *csk)
  149. {
  150. return test_bit(SK_F_INUSE, &csk->flags);
  151. }
  152. static void cnic_kwq_completion(struct cnic_dev *dev, u32 count)
  153. {
  154. struct cnic_local *cp = dev->cnic_priv;
  155. struct cnic_eth_dev *ethdev = cp->ethdev;
  156. struct drv_ctl_info info;
  157. info.cmd = DRV_CTL_COMPLETION_CMD;
  158. info.data.comp.comp_count = count;
  159. ethdev->drv_ctl(dev->netdev, &info);
  160. }
  161. static int cnic_send_nlmsg(struct cnic_local *cp, u32 type,
  162. struct cnic_sock *csk)
  163. {
  164. struct iscsi_path path_req;
  165. char *buf = NULL;
  166. u16 len = 0;
  167. u32 msg_type = ISCSI_KEVENT_IF_DOWN;
  168. struct cnic_ulp_ops *ulp_ops;
  169. if (cp->uio_dev == -1)
  170. return -ENODEV;
  171. if (csk) {
  172. len = sizeof(path_req);
  173. buf = (char *) &path_req;
  174. memset(&path_req, 0, len);
  175. msg_type = ISCSI_KEVENT_PATH_REQ;
  176. path_req.handle = (u64) csk->l5_cid;
  177. if (test_bit(SK_F_IPV6, &csk->flags)) {
  178. memcpy(&path_req.dst.v6_addr, &csk->dst_ip[0],
  179. sizeof(struct in6_addr));
  180. path_req.ip_addr_len = 16;
  181. } else {
  182. memcpy(&path_req.dst.v4_addr, &csk->dst_ip[0],
  183. sizeof(struct in_addr));
  184. path_req.ip_addr_len = 4;
  185. }
  186. path_req.vlan_id = csk->vlan_id;
  187. path_req.pmtu = csk->mtu;
  188. }
  189. rcu_read_lock();
  190. ulp_ops = rcu_dereference(cnic_ulp_tbl[CNIC_ULP_ISCSI]);
  191. if (ulp_ops)
  192. ulp_ops->iscsi_nl_send_msg(cp->dev, msg_type, buf, len);
  193. rcu_read_unlock();
  194. return 0;
  195. }
  196. static int cnic_iscsi_nl_msg_recv(struct cnic_dev *dev, u32 msg_type,
  197. char *buf, u16 len)
  198. {
  199. int rc = -EINVAL;
  200. switch (msg_type) {
  201. case ISCSI_UEVENT_PATH_UPDATE: {
  202. struct cnic_local *cp;
  203. u32 l5_cid;
  204. struct cnic_sock *csk;
  205. struct iscsi_path *path_resp;
  206. if (len < sizeof(*path_resp))
  207. break;
  208. path_resp = (struct iscsi_path *) buf;
  209. cp = dev->cnic_priv;
  210. l5_cid = (u32) path_resp->handle;
  211. if (l5_cid >= MAX_CM_SK_TBL_SZ)
  212. break;
  213. csk = &cp->csk_tbl[l5_cid];
  214. csk_hold(csk);
  215. if (cnic_in_use(csk)) {
  216. memcpy(csk->ha, path_resp->mac_addr, 6);
  217. if (test_bit(SK_F_IPV6, &csk->flags))
  218. memcpy(&csk->src_ip[0], &path_resp->src.v6_addr,
  219. sizeof(struct in6_addr));
  220. else
  221. memcpy(&csk->src_ip[0], &path_resp->src.v4_addr,
  222. sizeof(struct in_addr));
  223. if (is_valid_ether_addr(csk->ha))
  224. cnic_cm_set_pg(csk);
  225. }
  226. csk_put(csk);
  227. rc = 0;
  228. }
  229. }
  230. return rc;
  231. }
  232. static int cnic_offld_prep(struct cnic_sock *csk)
  233. {
  234. if (test_and_set_bit(SK_F_OFFLD_SCHED, &csk->flags))
  235. return 0;
  236. if (!test_bit(SK_F_CONNECT_START, &csk->flags)) {
  237. clear_bit(SK_F_OFFLD_SCHED, &csk->flags);
  238. return 0;
  239. }
  240. return 1;
  241. }
  242. static int cnic_close_prep(struct cnic_sock *csk)
  243. {
  244. clear_bit(SK_F_CONNECT_START, &csk->flags);
  245. smp_mb__after_clear_bit();
  246. if (test_and_clear_bit(SK_F_OFFLD_COMPLETE, &csk->flags)) {
  247. while (test_and_set_bit(SK_F_OFFLD_SCHED, &csk->flags))
  248. msleep(1);
  249. return 1;
  250. }
  251. return 0;
  252. }
  253. static int cnic_abort_prep(struct cnic_sock *csk)
  254. {
  255. clear_bit(SK_F_CONNECT_START, &csk->flags);
  256. smp_mb__after_clear_bit();
  257. while (test_and_set_bit(SK_F_OFFLD_SCHED, &csk->flags))
  258. msleep(1);
  259. if (test_and_clear_bit(SK_F_OFFLD_COMPLETE, &csk->flags)) {
  260. csk->state = L4_KCQE_OPCODE_VALUE_RESET_COMP;
  261. return 1;
  262. }
  263. return 0;
  264. }
  265. static void cnic_uio_stop(void)
  266. {
  267. struct cnic_dev *dev;
  268. read_lock(&cnic_dev_lock);
  269. list_for_each_entry(dev, &cnic_dev_list, list) {
  270. struct cnic_local *cp = dev->cnic_priv;
  271. if (cp->cnic_uinfo)
  272. cnic_send_nlmsg(cp, ISCSI_KEVENT_IF_DOWN, NULL);
  273. }
  274. read_unlock(&cnic_dev_lock);
  275. }
  276. int cnic_register_driver(int ulp_type, struct cnic_ulp_ops *ulp_ops)
  277. {
  278. struct cnic_dev *dev;
  279. if (ulp_type >= MAX_CNIC_ULP_TYPE) {
  280. printk(KERN_ERR PFX "cnic_register_driver: Bad type %d\n",
  281. ulp_type);
  282. return -EINVAL;
  283. }
  284. mutex_lock(&cnic_lock);
  285. if (cnic_ulp_tbl[ulp_type]) {
  286. printk(KERN_ERR PFX "cnic_register_driver: Type %d has already "
  287. "been registered\n", ulp_type);
  288. mutex_unlock(&cnic_lock);
  289. return -EBUSY;
  290. }
  291. read_lock(&cnic_dev_lock);
  292. list_for_each_entry(dev, &cnic_dev_list, list) {
  293. struct cnic_local *cp = dev->cnic_priv;
  294. clear_bit(ULP_F_INIT, &cp->ulp_flags[ulp_type]);
  295. }
  296. read_unlock(&cnic_dev_lock);
  297. rcu_assign_pointer(cnic_ulp_tbl[ulp_type], ulp_ops);
  298. mutex_unlock(&cnic_lock);
  299. /* Prevent race conditions with netdev_event */
  300. rtnl_lock();
  301. read_lock(&cnic_dev_lock);
  302. list_for_each_entry(dev, &cnic_dev_list, list) {
  303. struct cnic_local *cp = dev->cnic_priv;
  304. if (!test_and_set_bit(ULP_F_INIT, &cp->ulp_flags[ulp_type]))
  305. ulp_ops->cnic_init(dev);
  306. }
  307. read_unlock(&cnic_dev_lock);
  308. rtnl_unlock();
  309. return 0;
  310. }
  311. int cnic_unregister_driver(int ulp_type)
  312. {
  313. struct cnic_dev *dev;
  314. if (ulp_type >= MAX_CNIC_ULP_TYPE) {
  315. printk(KERN_ERR PFX "cnic_unregister_driver: Bad type %d\n",
  316. ulp_type);
  317. return -EINVAL;
  318. }
  319. mutex_lock(&cnic_lock);
  320. if (!cnic_ulp_tbl[ulp_type]) {
  321. printk(KERN_ERR PFX "cnic_unregister_driver: Type %d has not "
  322. "been registered\n", ulp_type);
  323. goto out_unlock;
  324. }
  325. read_lock(&cnic_dev_lock);
  326. list_for_each_entry(dev, &cnic_dev_list, list) {
  327. struct cnic_local *cp = dev->cnic_priv;
  328. if (rcu_dereference(cp->ulp_ops[ulp_type])) {
  329. printk(KERN_ERR PFX "cnic_unregister_driver: Type %d "
  330. "still has devices registered\n", ulp_type);
  331. read_unlock(&cnic_dev_lock);
  332. goto out_unlock;
  333. }
  334. }
  335. read_unlock(&cnic_dev_lock);
  336. if (ulp_type == CNIC_ULP_ISCSI)
  337. cnic_uio_stop();
  338. rcu_assign_pointer(cnic_ulp_tbl[ulp_type], NULL);
  339. mutex_unlock(&cnic_lock);
  340. synchronize_rcu();
  341. return 0;
  342. out_unlock:
  343. mutex_unlock(&cnic_lock);
  344. return -EINVAL;
  345. }
  346. static int cnic_start_hw(struct cnic_dev *);
  347. static void cnic_stop_hw(struct cnic_dev *);
  348. static int cnic_register_device(struct cnic_dev *dev, int ulp_type,
  349. void *ulp_ctx)
  350. {
  351. struct cnic_local *cp = dev->cnic_priv;
  352. struct cnic_ulp_ops *ulp_ops;
  353. if (ulp_type >= MAX_CNIC_ULP_TYPE) {
  354. printk(KERN_ERR PFX "cnic_register_device: Bad type %d\n",
  355. ulp_type);
  356. return -EINVAL;
  357. }
  358. mutex_lock(&cnic_lock);
  359. if (cnic_ulp_tbl[ulp_type] == NULL) {
  360. printk(KERN_ERR PFX "cnic_register_device: Driver with type %d "
  361. "has not been registered\n", ulp_type);
  362. mutex_unlock(&cnic_lock);
  363. return -EAGAIN;
  364. }
  365. if (rcu_dereference(cp->ulp_ops[ulp_type])) {
  366. printk(KERN_ERR PFX "cnic_register_device: Type %d has already "
  367. "been registered to this device\n", ulp_type);
  368. mutex_unlock(&cnic_lock);
  369. return -EBUSY;
  370. }
  371. clear_bit(ULP_F_START, &cp->ulp_flags[ulp_type]);
  372. cp->ulp_handle[ulp_type] = ulp_ctx;
  373. ulp_ops = cnic_ulp_tbl[ulp_type];
  374. rcu_assign_pointer(cp->ulp_ops[ulp_type], ulp_ops);
  375. cnic_hold(dev);
  376. if (test_bit(CNIC_F_CNIC_UP, &dev->flags))
  377. if (!test_and_set_bit(ULP_F_START, &cp->ulp_flags[ulp_type]))
  378. ulp_ops->cnic_start(cp->ulp_handle[ulp_type]);
  379. mutex_unlock(&cnic_lock);
  380. return 0;
  381. }
  382. EXPORT_SYMBOL(cnic_register_driver);
  383. static int cnic_unregister_device(struct cnic_dev *dev, int ulp_type)
  384. {
  385. struct cnic_local *cp = dev->cnic_priv;
  386. if (ulp_type >= MAX_CNIC_ULP_TYPE) {
  387. printk(KERN_ERR PFX "cnic_unregister_device: Bad type %d\n",
  388. ulp_type);
  389. return -EINVAL;
  390. }
  391. mutex_lock(&cnic_lock);
  392. if (rcu_dereference(cp->ulp_ops[ulp_type])) {
  393. rcu_assign_pointer(cp->ulp_ops[ulp_type], NULL);
  394. cnic_put(dev);
  395. } else {
  396. printk(KERN_ERR PFX "cnic_unregister_device: device not "
  397. "registered to this ulp type %d\n", ulp_type);
  398. mutex_unlock(&cnic_lock);
  399. return -EINVAL;
  400. }
  401. mutex_unlock(&cnic_lock);
  402. synchronize_rcu();
  403. return 0;
  404. }
  405. EXPORT_SYMBOL(cnic_unregister_driver);
  406. static int cnic_init_id_tbl(struct cnic_id_tbl *id_tbl, u32 size, u32 start_id)
  407. {
  408. id_tbl->start = start_id;
  409. id_tbl->max = size;
  410. id_tbl->next = 0;
  411. spin_lock_init(&id_tbl->lock);
  412. id_tbl->table = kzalloc(DIV_ROUND_UP(size, 32) * 4, GFP_KERNEL);
  413. if (!id_tbl->table)
  414. return -ENOMEM;
  415. return 0;
  416. }
  417. static void cnic_free_id_tbl(struct cnic_id_tbl *id_tbl)
  418. {
  419. kfree(id_tbl->table);
  420. id_tbl->table = NULL;
  421. }
  422. static int cnic_alloc_id(struct cnic_id_tbl *id_tbl, u32 id)
  423. {
  424. int ret = -1;
  425. id -= id_tbl->start;
  426. if (id >= id_tbl->max)
  427. return ret;
  428. spin_lock(&id_tbl->lock);
  429. if (!test_bit(id, id_tbl->table)) {
  430. set_bit(id, id_tbl->table);
  431. ret = 0;
  432. }
  433. spin_unlock(&id_tbl->lock);
  434. return ret;
  435. }
  436. /* Returns -1 if not successful */
  437. static u32 cnic_alloc_new_id(struct cnic_id_tbl *id_tbl)
  438. {
  439. u32 id;
  440. spin_lock(&id_tbl->lock);
  441. id = find_next_zero_bit(id_tbl->table, id_tbl->max, id_tbl->next);
  442. if (id >= id_tbl->max) {
  443. id = -1;
  444. if (id_tbl->next != 0) {
  445. id = find_first_zero_bit(id_tbl->table, id_tbl->next);
  446. if (id >= id_tbl->next)
  447. id = -1;
  448. }
  449. }
  450. if (id < id_tbl->max) {
  451. set_bit(id, id_tbl->table);
  452. id_tbl->next = (id + 1) & (id_tbl->max - 1);
  453. id += id_tbl->start;
  454. }
  455. spin_unlock(&id_tbl->lock);
  456. return id;
  457. }
  458. static void cnic_free_id(struct cnic_id_tbl *id_tbl, u32 id)
  459. {
  460. if (id == -1)
  461. return;
  462. id -= id_tbl->start;
  463. if (id >= id_tbl->max)
  464. return;
  465. clear_bit(id, id_tbl->table);
  466. }
  467. static void cnic_free_dma(struct cnic_dev *dev, struct cnic_dma *dma)
  468. {
  469. int i;
  470. if (!dma->pg_arr)
  471. return;
  472. for (i = 0; i < dma->num_pages; i++) {
  473. if (dma->pg_arr[i]) {
  474. pci_free_consistent(dev->pcidev, BCM_PAGE_SIZE,
  475. dma->pg_arr[i], dma->pg_map_arr[i]);
  476. dma->pg_arr[i] = NULL;
  477. }
  478. }
  479. if (dma->pgtbl) {
  480. pci_free_consistent(dev->pcidev, dma->pgtbl_size,
  481. dma->pgtbl, dma->pgtbl_map);
  482. dma->pgtbl = NULL;
  483. }
  484. kfree(dma->pg_arr);
  485. dma->pg_arr = NULL;
  486. dma->num_pages = 0;
  487. }
  488. static void cnic_setup_page_tbl(struct cnic_dev *dev, struct cnic_dma *dma)
  489. {
  490. int i;
  491. u32 *page_table = dma->pgtbl;
  492. for (i = 0; i < dma->num_pages; i++) {
  493. /* Each entry needs to be in big endian format. */
  494. *page_table = (u32) ((u64) dma->pg_map_arr[i] >> 32);
  495. page_table++;
  496. *page_table = (u32) dma->pg_map_arr[i];
  497. page_table++;
  498. }
  499. }
  500. static int cnic_alloc_dma(struct cnic_dev *dev, struct cnic_dma *dma,
  501. int pages, int use_pg_tbl)
  502. {
  503. int i, size;
  504. struct cnic_local *cp = dev->cnic_priv;
  505. size = pages * (sizeof(void *) + sizeof(dma_addr_t));
  506. dma->pg_arr = kzalloc(size, GFP_ATOMIC);
  507. if (dma->pg_arr == NULL)
  508. return -ENOMEM;
  509. dma->pg_map_arr = (dma_addr_t *) (dma->pg_arr + pages);
  510. dma->num_pages = pages;
  511. for (i = 0; i < pages; i++) {
  512. dma->pg_arr[i] = pci_alloc_consistent(dev->pcidev,
  513. BCM_PAGE_SIZE,
  514. &dma->pg_map_arr[i]);
  515. if (dma->pg_arr[i] == NULL)
  516. goto error;
  517. }
  518. if (!use_pg_tbl)
  519. return 0;
  520. dma->pgtbl_size = ((pages * 8) + BCM_PAGE_SIZE - 1) &
  521. ~(BCM_PAGE_SIZE - 1);
  522. dma->pgtbl = pci_alloc_consistent(dev->pcidev, dma->pgtbl_size,
  523. &dma->pgtbl_map);
  524. if (dma->pgtbl == NULL)
  525. goto error;
  526. cp->setup_pgtbl(dev, dma);
  527. return 0;
  528. error:
  529. cnic_free_dma(dev, dma);
  530. return -ENOMEM;
  531. }
  532. static void cnic_free_resc(struct cnic_dev *dev)
  533. {
  534. struct cnic_local *cp = dev->cnic_priv;
  535. int i = 0;
  536. if (cp->cnic_uinfo) {
  537. while (cp->uio_dev != -1 && i < 15) {
  538. msleep(100);
  539. i++;
  540. }
  541. uio_unregister_device(cp->cnic_uinfo);
  542. kfree(cp->cnic_uinfo);
  543. cp->cnic_uinfo = NULL;
  544. }
  545. if (cp->l2_buf) {
  546. pci_free_consistent(dev->pcidev, cp->l2_buf_size,
  547. cp->l2_buf, cp->l2_buf_map);
  548. cp->l2_buf = NULL;
  549. }
  550. if (cp->l2_ring) {
  551. pci_free_consistent(dev->pcidev, cp->l2_ring_size,
  552. cp->l2_ring, cp->l2_ring_map);
  553. cp->l2_ring = NULL;
  554. }
  555. for (i = 0; i < cp->ctx_blks; i++) {
  556. if (cp->ctx_arr[i].ctx) {
  557. pci_free_consistent(dev->pcidev, cp->ctx_blk_size,
  558. cp->ctx_arr[i].ctx,
  559. cp->ctx_arr[i].mapping);
  560. cp->ctx_arr[i].ctx = NULL;
  561. }
  562. }
  563. kfree(cp->ctx_arr);
  564. cp->ctx_arr = NULL;
  565. cp->ctx_blks = 0;
  566. cnic_free_dma(dev, &cp->gbl_buf_info);
  567. cnic_free_dma(dev, &cp->conn_buf_info);
  568. cnic_free_dma(dev, &cp->kwq_info);
  569. cnic_free_dma(dev, &cp->kcq_info);
  570. kfree(cp->iscsi_tbl);
  571. cp->iscsi_tbl = NULL;
  572. kfree(cp->ctx_tbl);
  573. cp->ctx_tbl = NULL;
  574. cnic_free_id_tbl(&cp->cid_tbl);
  575. }
  576. static int cnic_alloc_context(struct cnic_dev *dev)
  577. {
  578. struct cnic_local *cp = dev->cnic_priv;
  579. if (CHIP_NUM(cp) == CHIP_NUM_5709) {
  580. int i, k, arr_size;
  581. cp->ctx_blk_size = BCM_PAGE_SIZE;
  582. cp->cids_per_blk = BCM_PAGE_SIZE / 128;
  583. arr_size = BNX2_MAX_CID / cp->cids_per_blk *
  584. sizeof(struct cnic_ctx);
  585. cp->ctx_arr = kzalloc(arr_size, GFP_KERNEL);
  586. if (cp->ctx_arr == NULL)
  587. return -ENOMEM;
  588. k = 0;
  589. for (i = 0; i < 2; i++) {
  590. u32 j, reg, off, lo, hi;
  591. if (i == 0)
  592. off = BNX2_PG_CTX_MAP;
  593. else
  594. off = BNX2_ISCSI_CTX_MAP;
  595. reg = cnic_reg_rd_ind(dev, off);
  596. lo = reg >> 16;
  597. hi = reg & 0xffff;
  598. for (j = lo; j < hi; j += cp->cids_per_blk, k++)
  599. cp->ctx_arr[k].cid = j;
  600. }
  601. cp->ctx_blks = k;
  602. if (cp->ctx_blks >= (BNX2_MAX_CID / cp->cids_per_blk)) {
  603. cp->ctx_blks = 0;
  604. return -ENOMEM;
  605. }
  606. for (i = 0; i < cp->ctx_blks; i++) {
  607. cp->ctx_arr[i].ctx =
  608. pci_alloc_consistent(dev->pcidev, BCM_PAGE_SIZE,
  609. &cp->ctx_arr[i].mapping);
  610. if (cp->ctx_arr[i].ctx == NULL)
  611. return -ENOMEM;
  612. }
  613. }
  614. return 0;
  615. }
  616. static int cnic_alloc_l2_rings(struct cnic_dev *dev, int pages)
  617. {
  618. struct cnic_local *cp = dev->cnic_priv;
  619. cp->l2_ring_size = pages * BCM_PAGE_SIZE;
  620. cp->l2_ring = pci_alloc_consistent(dev->pcidev, cp->l2_ring_size,
  621. &cp->l2_ring_map);
  622. if (!cp->l2_ring)
  623. return -ENOMEM;
  624. cp->l2_buf_size = (cp->l2_rx_ring_size + 1) * cp->l2_single_buf_size;
  625. cp->l2_buf_size = PAGE_ALIGN(cp->l2_buf_size);
  626. cp->l2_buf = pci_alloc_consistent(dev->pcidev, cp->l2_buf_size,
  627. &cp->l2_buf_map);
  628. if (!cp->l2_buf)
  629. return -ENOMEM;
  630. return 0;
  631. }
  632. static int cnic_alloc_bnx2_resc(struct cnic_dev *dev)
  633. {
  634. struct cnic_local *cp = dev->cnic_priv;
  635. struct uio_info *uinfo;
  636. int ret;
  637. ret = cnic_alloc_dma(dev, &cp->kwq_info, KWQ_PAGE_CNT, 1);
  638. if (ret)
  639. goto error;
  640. cp->kwq = (struct kwqe **) cp->kwq_info.pg_arr;
  641. ret = cnic_alloc_dma(dev, &cp->kcq_info, KCQ_PAGE_CNT, 1);
  642. if (ret)
  643. goto error;
  644. cp->kcq = (struct kcqe **) cp->kcq_info.pg_arr;
  645. ret = cnic_alloc_context(dev);
  646. if (ret)
  647. goto error;
  648. ret = cnic_alloc_l2_rings(dev, 2);
  649. if (ret)
  650. goto error;
  651. uinfo = kzalloc(sizeof(*uinfo), GFP_ATOMIC);
  652. if (!uinfo)
  653. goto error;
  654. uinfo->mem[0].addr = dev->netdev->base_addr;
  655. uinfo->mem[0].internal_addr = dev->regview;
  656. uinfo->mem[0].size = dev->netdev->mem_end - dev->netdev->mem_start;
  657. uinfo->mem[0].memtype = UIO_MEM_PHYS;
  658. uinfo->mem[1].addr = (unsigned long) cp->status_blk & PAGE_MASK;
  659. if (cp->ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX)
  660. uinfo->mem[1].size = BNX2_SBLK_MSIX_ALIGN_SIZE * 9;
  661. else
  662. uinfo->mem[1].size = BNX2_SBLK_MSIX_ALIGN_SIZE;
  663. uinfo->mem[1].memtype = UIO_MEM_LOGICAL;
  664. uinfo->mem[2].addr = (unsigned long) cp->l2_ring;
  665. uinfo->mem[2].size = cp->l2_ring_size;
  666. uinfo->mem[2].memtype = UIO_MEM_LOGICAL;
  667. uinfo->mem[3].addr = (unsigned long) cp->l2_buf;
  668. uinfo->mem[3].size = cp->l2_buf_size;
  669. uinfo->mem[3].memtype = UIO_MEM_LOGICAL;
  670. uinfo->name = "bnx2_cnic";
  671. uinfo->version = CNIC_MODULE_VERSION;
  672. uinfo->irq = UIO_IRQ_CUSTOM;
  673. uinfo->open = cnic_uio_open;
  674. uinfo->release = cnic_uio_close;
  675. uinfo->priv = dev;
  676. ret = uio_register_device(&dev->pcidev->dev, uinfo);
  677. if (ret) {
  678. kfree(uinfo);
  679. goto error;
  680. }
  681. cp->cnic_uinfo = uinfo;
  682. return 0;
  683. error:
  684. cnic_free_resc(dev);
  685. return ret;
  686. }
  687. static inline u32 cnic_kwq_avail(struct cnic_local *cp)
  688. {
  689. return cp->max_kwq_idx -
  690. ((cp->kwq_prod_idx - cp->kwq_con_idx) & cp->max_kwq_idx);
  691. }
  692. static int cnic_submit_bnx2_kwqes(struct cnic_dev *dev, struct kwqe *wqes[],
  693. u32 num_wqes)
  694. {
  695. struct cnic_local *cp = dev->cnic_priv;
  696. struct kwqe *prod_qe;
  697. u16 prod, sw_prod, i;
  698. if (!test_bit(CNIC_F_CNIC_UP, &dev->flags))
  699. return -EAGAIN; /* bnx2 is down */
  700. spin_lock_bh(&cp->cnic_ulp_lock);
  701. if (num_wqes > cnic_kwq_avail(cp) &&
  702. !(cp->cnic_local_flags & CNIC_LCL_FL_KWQ_INIT)) {
  703. spin_unlock_bh(&cp->cnic_ulp_lock);
  704. return -EAGAIN;
  705. }
  706. cp->cnic_local_flags &= ~CNIC_LCL_FL_KWQ_INIT;
  707. prod = cp->kwq_prod_idx;
  708. sw_prod = prod & MAX_KWQ_IDX;
  709. for (i = 0; i < num_wqes; i++) {
  710. prod_qe = &cp->kwq[KWQ_PG(sw_prod)][KWQ_IDX(sw_prod)];
  711. memcpy(prod_qe, wqes[i], sizeof(struct kwqe));
  712. prod++;
  713. sw_prod = prod & MAX_KWQ_IDX;
  714. }
  715. cp->kwq_prod_idx = prod;
  716. CNIC_WR16(dev, cp->kwq_io_addr, cp->kwq_prod_idx);
  717. spin_unlock_bh(&cp->cnic_ulp_lock);
  718. return 0;
  719. }
  720. static void service_kcqes(struct cnic_dev *dev, int num_cqes)
  721. {
  722. struct cnic_local *cp = dev->cnic_priv;
  723. int i, j;
  724. i = 0;
  725. j = 1;
  726. while (num_cqes) {
  727. struct cnic_ulp_ops *ulp_ops;
  728. int ulp_type;
  729. u32 kcqe_op_flag = cp->completed_kcq[i]->kcqe_op_flag;
  730. u32 kcqe_layer = kcqe_op_flag & KCQE_FLAGS_LAYER_MASK;
  731. if (unlikely(kcqe_op_flag & KCQE_RAMROD_COMPLETION))
  732. cnic_kwq_completion(dev, 1);
  733. while (j < num_cqes) {
  734. u32 next_op = cp->completed_kcq[i + j]->kcqe_op_flag;
  735. if ((next_op & KCQE_FLAGS_LAYER_MASK) != kcqe_layer)
  736. break;
  737. if (unlikely(next_op & KCQE_RAMROD_COMPLETION))
  738. cnic_kwq_completion(dev, 1);
  739. j++;
  740. }
  741. if (kcqe_layer == KCQE_FLAGS_LAYER_MASK_L5_RDMA)
  742. ulp_type = CNIC_ULP_RDMA;
  743. else if (kcqe_layer == KCQE_FLAGS_LAYER_MASK_L5_ISCSI)
  744. ulp_type = CNIC_ULP_ISCSI;
  745. else if (kcqe_layer == KCQE_FLAGS_LAYER_MASK_L4)
  746. ulp_type = CNIC_ULP_L4;
  747. else if (kcqe_layer == KCQE_FLAGS_LAYER_MASK_L2)
  748. goto end;
  749. else {
  750. printk(KERN_ERR PFX "%s: Unknown type of KCQE(0x%x)\n",
  751. dev->netdev->name, kcqe_op_flag);
  752. goto end;
  753. }
  754. rcu_read_lock();
  755. ulp_ops = rcu_dereference(cp->ulp_ops[ulp_type]);
  756. if (likely(ulp_ops)) {
  757. ulp_ops->indicate_kcqes(cp->ulp_handle[ulp_type],
  758. cp->completed_kcq + i, j);
  759. }
  760. rcu_read_unlock();
  761. end:
  762. num_cqes -= j;
  763. i += j;
  764. j = 1;
  765. }
  766. return;
  767. }
  768. static u16 cnic_bnx2_next_idx(u16 idx)
  769. {
  770. return idx + 1;
  771. }
  772. static u16 cnic_bnx2_hw_idx(u16 idx)
  773. {
  774. return idx;
  775. }
  776. static int cnic_get_kcqes(struct cnic_dev *dev, u16 hw_prod, u16 *sw_prod)
  777. {
  778. struct cnic_local *cp = dev->cnic_priv;
  779. u16 i, ri, last;
  780. struct kcqe *kcqe;
  781. int kcqe_cnt = 0, last_cnt = 0;
  782. i = ri = last = *sw_prod;
  783. ri &= MAX_KCQ_IDX;
  784. while ((i != hw_prod) && (kcqe_cnt < MAX_COMPLETED_KCQE)) {
  785. kcqe = &cp->kcq[KCQ_PG(ri)][KCQ_IDX(ri)];
  786. cp->completed_kcq[kcqe_cnt++] = kcqe;
  787. i = cp->next_idx(i);
  788. ri = i & MAX_KCQ_IDX;
  789. if (likely(!(kcqe->kcqe_op_flag & KCQE_FLAGS_NEXT))) {
  790. last_cnt = kcqe_cnt;
  791. last = i;
  792. }
  793. }
  794. *sw_prod = last;
  795. return last_cnt;
  796. }
  797. static void cnic_chk_bnx2_pkt_rings(struct cnic_local *cp)
  798. {
  799. u16 rx_cons = *cp->rx_cons_ptr;
  800. u16 tx_cons = *cp->tx_cons_ptr;
  801. if (cp->tx_cons != tx_cons || cp->rx_cons != rx_cons) {
  802. cp->tx_cons = tx_cons;
  803. cp->rx_cons = rx_cons;
  804. uio_event_notify(cp->cnic_uinfo);
  805. }
  806. }
  807. static int cnic_service_bnx2(void *data, void *status_blk)
  808. {
  809. struct cnic_dev *dev = data;
  810. struct status_block *sblk = status_blk;
  811. struct cnic_local *cp = dev->cnic_priv;
  812. u32 status_idx = sblk->status_idx;
  813. u16 hw_prod, sw_prod;
  814. int kcqe_cnt;
  815. if (unlikely(!test_bit(CNIC_F_CNIC_UP, &dev->flags)))
  816. return status_idx;
  817. cp->kwq_con_idx = *cp->kwq_con_idx_ptr;
  818. hw_prod = sblk->status_completion_producer_index;
  819. sw_prod = cp->kcq_prod_idx;
  820. while (sw_prod != hw_prod) {
  821. kcqe_cnt = cnic_get_kcqes(dev, hw_prod, &sw_prod);
  822. if (kcqe_cnt == 0)
  823. goto done;
  824. service_kcqes(dev, kcqe_cnt);
  825. /* Tell compiler that status_blk fields can change. */
  826. barrier();
  827. if (status_idx != sblk->status_idx) {
  828. status_idx = sblk->status_idx;
  829. cp->kwq_con_idx = *cp->kwq_con_idx_ptr;
  830. hw_prod = sblk->status_completion_producer_index;
  831. } else
  832. break;
  833. }
  834. done:
  835. CNIC_WR16(dev, cp->kcq_io_addr, sw_prod);
  836. cp->kcq_prod_idx = sw_prod;
  837. cnic_chk_bnx2_pkt_rings(cp);
  838. return status_idx;
  839. }
  840. static void cnic_service_bnx2_msix(unsigned long data)
  841. {
  842. struct cnic_dev *dev = (struct cnic_dev *) data;
  843. struct cnic_local *cp = dev->cnic_priv;
  844. struct status_block_msix *status_blk = cp->bnx2_status_blk;
  845. u32 status_idx = status_blk->status_idx;
  846. u16 hw_prod, sw_prod;
  847. int kcqe_cnt;
  848. cp->kwq_con_idx = status_blk->status_cmd_consumer_index;
  849. hw_prod = status_blk->status_completion_producer_index;
  850. sw_prod = cp->kcq_prod_idx;
  851. while (sw_prod != hw_prod) {
  852. kcqe_cnt = cnic_get_kcqes(dev, hw_prod, &sw_prod);
  853. if (kcqe_cnt == 0)
  854. goto done;
  855. service_kcqes(dev, kcqe_cnt);
  856. /* Tell compiler that status_blk fields can change. */
  857. barrier();
  858. if (status_idx != status_blk->status_idx) {
  859. status_idx = status_blk->status_idx;
  860. cp->kwq_con_idx = status_blk->status_cmd_consumer_index;
  861. hw_prod = status_blk->status_completion_producer_index;
  862. } else
  863. break;
  864. }
  865. done:
  866. CNIC_WR16(dev, cp->kcq_io_addr, sw_prod);
  867. cp->kcq_prod_idx = sw_prod;
  868. cnic_chk_bnx2_pkt_rings(cp);
  869. cp->last_status_idx = status_idx;
  870. CNIC_WR(dev, BNX2_PCICFG_INT_ACK_CMD, cp->int_num |
  871. BNX2_PCICFG_INT_ACK_CMD_INDEX_VALID | cp->last_status_idx);
  872. }
  873. static irqreturn_t cnic_irq(int irq, void *dev_instance)
  874. {
  875. struct cnic_dev *dev = dev_instance;
  876. struct cnic_local *cp = dev->cnic_priv;
  877. u16 prod = cp->kcq_prod_idx & MAX_KCQ_IDX;
  878. if (cp->ack_int)
  879. cp->ack_int(dev);
  880. prefetch(cp->status_blk);
  881. prefetch(&cp->kcq[KCQ_PG(prod)][KCQ_IDX(prod)]);
  882. if (likely(test_bit(CNIC_F_CNIC_UP, &dev->flags)))
  883. tasklet_schedule(&cp->cnic_irq_task);
  884. return IRQ_HANDLED;
  885. }
  886. static void cnic_ulp_stop(struct cnic_dev *dev)
  887. {
  888. struct cnic_local *cp = dev->cnic_priv;
  889. int if_type;
  890. if (cp->cnic_uinfo)
  891. cnic_send_nlmsg(cp, ISCSI_KEVENT_IF_DOWN, NULL);
  892. rcu_read_lock();
  893. for (if_type = 0; if_type < MAX_CNIC_ULP_TYPE; if_type++) {
  894. struct cnic_ulp_ops *ulp_ops;
  895. ulp_ops = rcu_dereference(cp->ulp_ops[if_type]);
  896. if (!ulp_ops)
  897. continue;
  898. if (test_and_clear_bit(ULP_F_START, &cp->ulp_flags[if_type]))
  899. ulp_ops->cnic_stop(cp->ulp_handle[if_type]);
  900. }
  901. rcu_read_unlock();
  902. }
  903. static void cnic_ulp_start(struct cnic_dev *dev)
  904. {
  905. struct cnic_local *cp = dev->cnic_priv;
  906. int if_type;
  907. rcu_read_lock();
  908. for (if_type = 0; if_type < MAX_CNIC_ULP_TYPE; if_type++) {
  909. struct cnic_ulp_ops *ulp_ops;
  910. ulp_ops = rcu_dereference(cp->ulp_ops[if_type]);
  911. if (!ulp_ops || !ulp_ops->cnic_start)
  912. continue;
  913. if (!test_and_set_bit(ULP_F_START, &cp->ulp_flags[if_type]))
  914. ulp_ops->cnic_start(cp->ulp_handle[if_type]);
  915. }
  916. rcu_read_unlock();
  917. }
  918. static int cnic_ctl(void *data, struct cnic_ctl_info *info)
  919. {
  920. struct cnic_dev *dev = data;
  921. switch (info->cmd) {
  922. case CNIC_CTL_STOP_CMD:
  923. cnic_hold(dev);
  924. mutex_lock(&cnic_lock);
  925. cnic_ulp_stop(dev);
  926. cnic_stop_hw(dev);
  927. mutex_unlock(&cnic_lock);
  928. cnic_put(dev);
  929. break;
  930. case CNIC_CTL_START_CMD:
  931. cnic_hold(dev);
  932. mutex_lock(&cnic_lock);
  933. if (!cnic_start_hw(dev))
  934. cnic_ulp_start(dev);
  935. mutex_unlock(&cnic_lock);
  936. cnic_put(dev);
  937. break;
  938. default:
  939. return -EINVAL;
  940. }
  941. return 0;
  942. }
  943. static void cnic_ulp_init(struct cnic_dev *dev)
  944. {
  945. int i;
  946. struct cnic_local *cp = dev->cnic_priv;
  947. rcu_read_lock();
  948. for (i = 0; i < MAX_CNIC_ULP_TYPE_EXT; i++) {
  949. struct cnic_ulp_ops *ulp_ops;
  950. ulp_ops = rcu_dereference(cnic_ulp_tbl[i]);
  951. if (!ulp_ops || !ulp_ops->cnic_init)
  952. continue;
  953. if (!test_and_set_bit(ULP_F_INIT, &cp->ulp_flags[i]))
  954. ulp_ops->cnic_init(dev);
  955. }
  956. rcu_read_unlock();
  957. }
  958. static void cnic_ulp_exit(struct cnic_dev *dev)
  959. {
  960. int i;
  961. struct cnic_local *cp = dev->cnic_priv;
  962. rcu_read_lock();
  963. for (i = 0; i < MAX_CNIC_ULP_TYPE_EXT; i++) {
  964. struct cnic_ulp_ops *ulp_ops;
  965. ulp_ops = rcu_dereference(cnic_ulp_tbl[i]);
  966. if (!ulp_ops || !ulp_ops->cnic_exit)
  967. continue;
  968. if (test_and_clear_bit(ULP_F_INIT, &cp->ulp_flags[i]))
  969. ulp_ops->cnic_exit(dev);
  970. }
  971. rcu_read_unlock();
  972. }
  973. static int cnic_cm_offload_pg(struct cnic_sock *csk)
  974. {
  975. struct cnic_dev *dev = csk->dev;
  976. struct l4_kwq_offload_pg *l4kwqe;
  977. struct kwqe *wqes[1];
  978. l4kwqe = (struct l4_kwq_offload_pg *) &csk->kwqe1;
  979. memset(l4kwqe, 0, sizeof(*l4kwqe));
  980. wqes[0] = (struct kwqe *) l4kwqe;
  981. l4kwqe->op_code = L4_KWQE_OPCODE_VALUE_OFFLOAD_PG;
  982. l4kwqe->flags =
  983. L4_LAYER_CODE << L4_KWQ_OFFLOAD_PG_LAYER_CODE_SHIFT;
  984. l4kwqe->l2hdr_nbytes = ETH_HLEN;
  985. l4kwqe->da0 = csk->ha[0];
  986. l4kwqe->da1 = csk->ha[1];
  987. l4kwqe->da2 = csk->ha[2];
  988. l4kwqe->da3 = csk->ha[3];
  989. l4kwqe->da4 = csk->ha[4];
  990. l4kwqe->da5 = csk->ha[5];
  991. l4kwqe->sa0 = dev->mac_addr[0];
  992. l4kwqe->sa1 = dev->mac_addr[1];
  993. l4kwqe->sa2 = dev->mac_addr[2];
  994. l4kwqe->sa3 = dev->mac_addr[3];
  995. l4kwqe->sa4 = dev->mac_addr[4];
  996. l4kwqe->sa5 = dev->mac_addr[5];
  997. l4kwqe->etype = ETH_P_IP;
  998. l4kwqe->ipid_count = DEF_IPID_COUNT;
  999. l4kwqe->host_opaque = csk->l5_cid;
  1000. if (csk->vlan_id) {
  1001. l4kwqe->pg_flags |= L4_KWQ_OFFLOAD_PG_VLAN_TAGGING;
  1002. l4kwqe->vlan_tag = csk->vlan_id;
  1003. l4kwqe->l2hdr_nbytes += 4;
  1004. }
  1005. return dev->submit_kwqes(dev, wqes, 1);
  1006. }
  1007. static int cnic_cm_update_pg(struct cnic_sock *csk)
  1008. {
  1009. struct cnic_dev *dev = csk->dev;
  1010. struct l4_kwq_update_pg *l4kwqe;
  1011. struct kwqe *wqes[1];
  1012. l4kwqe = (struct l4_kwq_update_pg *) &csk->kwqe1;
  1013. memset(l4kwqe, 0, sizeof(*l4kwqe));
  1014. wqes[0] = (struct kwqe *) l4kwqe;
  1015. l4kwqe->opcode = L4_KWQE_OPCODE_VALUE_UPDATE_PG;
  1016. l4kwqe->flags =
  1017. L4_LAYER_CODE << L4_KWQ_UPDATE_PG_LAYER_CODE_SHIFT;
  1018. l4kwqe->pg_cid = csk->pg_cid;
  1019. l4kwqe->da0 = csk->ha[0];
  1020. l4kwqe->da1 = csk->ha[1];
  1021. l4kwqe->da2 = csk->ha[2];
  1022. l4kwqe->da3 = csk->ha[3];
  1023. l4kwqe->da4 = csk->ha[4];
  1024. l4kwqe->da5 = csk->ha[5];
  1025. l4kwqe->pg_host_opaque = csk->l5_cid;
  1026. l4kwqe->pg_valids = L4_KWQ_UPDATE_PG_VALIDS_DA;
  1027. return dev->submit_kwqes(dev, wqes, 1);
  1028. }
  1029. static int cnic_cm_upload_pg(struct cnic_sock *csk)
  1030. {
  1031. struct cnic_dev *dev = csk->dev;
  1032. struct l4_kwq_upload *l4kwqe;
  1033. struct kwqe *wqes[1];
  1034. l4kwqe = (struct l4_kwq_upload *) &csk->kwqe1;
  1035. memset(l4kwqe, 0, sizeof(*l4kwqe));
  1036. wqes[0] = (struct kwqe *) l4kwqe;
  1037. l4kwqe->opcode = L4_KWQE_OPCODE_VALUE_UPLOAD_PG;
  1038. l4kwqe->flags =
  1039. L4_LAYER_CODE << L4_KWQ_UPLOAD_LAYER_CODE_SHIFT;
  1040. l4kwqe->cid = csk->pg_cid;
  1041. return dev->submit_kwqes(dev, wqes, 1);
  1042. }
  1043. static int cnic_cm_conn_req(struct cnic_sock *csk)
  1044. {
  1045. struct cnic_dev *dev = csk->dev;
  1046. struct l4_kwq_connect_req1 *l4kwqe1;
  1047. struct l4_kwq_connect_req2 *l4kwqe2;
  1048. struct l4_kwq_connect_req3 *l4kwqe3;
  1049. struct kwqe *wqes[3];
  1050. u8 tcp_flags = 0;
  1051. int num_wqes = 2;
  1052. l4kwqe1 = (struct l4_kwq_connect_req1 *) &csk->kwqe1;
  1053. l4kwqe2 = (struct l4_kwq_connect_req2 *) &csk->kwqe2;
  1054. l4kwqe3 = (struct l4_kwq_connect_req3 *) &csk->kwqe3;
  1055. memset(l4kwqe1, 0, sizeof(*l4kwqe1));
  1056. memset(l4kwqe2, 0, sizeof(*l4kwqe2));
  1057. memset(l4kwqe3, 0, sizeof(*l4kwqe3));
  1058. l4kwqe3->op_code = L4_KWQE_OPCODE_VALUE_CONNECT3;
  1059. l4kwqe3->flags =
  1060. L4_LAYER_CODE << L4_KWQ_CONNECT_REQ3_LAYER_CODE_SHIFT;
  1061. l4kwqe3->ka_timeout = csk->ka_timeout;
  1062. l4kwqe3->ka_interval = csk->ka_interval;
  1063. l4kwqe3->ka_max_probe_count = csk->ka_max_probe_count;
  1064. l4kwqe3->tos = csk->tos;
  1065. l4kwqe3->ttl = csk->ttl;
  1066. l4kwqe3->snd_seq_scale = csk->snd_seq_scale;
  1067. l4kwqe3->pmtu = csk->mtu;
  1068. l4kwqe3->rcv_buf = csk->rcv_buf;
  1069. l4kwqe3->snd_buf = csk->snd_buf;
  1070. l4kwqe3->seed = csk->seed;
  1071. wqes[0] = (struct kwqe *) l4kwqe1;
  1072. if (test_bit(SK_F_IPV6, &csk->flags)) {
  1073. wqes[1] = (struct kwqe *) l4kwqe2;
  1074. wqes[2] = (struct kwqe *) l4kwqe3;
  1075. num_wqes = 3;
  1076. l4kwqe1->conn_flags = L4_KWQ_CONNECT_REQ1_IP_V6;
  1077. l4kwqe2->op_code = L4_KWQE_OPCODE_VALUE_CONNECT2;
  1078. l4kwqe2->flags =
  1079. L4_KWQ_CONNECT_REQ2_LINKED_WITH_NEXT |
  1080. L4_LAYER_CODE << L4_KWQ_CONNECT_REQ2_LAYER_CODE_SHIFT;
  1081. l4kwqe2->src_ip_v6_2 = be32_to_cpu(csk->src_ip[1]);
  1082. l4kwqe2->src_ip_v6_3 = be32_to_cpu(csk->src_ip[2]);
  1083. l4kwqe2->src_ip_v6_4 = be32_to_cpu(csk->src_ip[3]);
  1084. l4kwqe2->dst_ip_v6_2 = be32_to_cpu(csk->dst_ip[1]);
  1085. l4kwqe2->dst_ip_v6_3 = be32_to_cpu(csk->dst_ip[2]);
  1086. l4kwqe2->dst_ip_v6_4 = be32_to_cpu(csk->dst_ip[3]);
  1087. l4kwqe3->mss = l4kwqe3->pmtu - sizeof(struct ipv6hdr) -
  1088. sizeof(struct tcphdr);
  1089. } else {
  1090. wqes[1] = (struct kwqe *) l4kwqe3;
  1091. l4kwqe3->mss = l4kwqe3->pmtu - sizeof(struct iphdr) -
  1092. sizeof(struct tcphdr);
  1093. }
  1094. l4kwqe1->op_code = L4_KWQE_OPCODE_VALUE_CONNECT1;
  1095. l4kwqe1->flags =
  1096. (L4_LAYER_CODE << L4_KWQ_CONNECT_REQ1_LAYER_CODE_SHIFT) |
  1097. L4_KWQ_CONNECT_REQ3_LINKED_WITH_NEXT;
  1098. l4kwqe1->cid = csk->cid;
  1099. l4kwqe1->pg_cid = csk->pg_cid;
  1100. l4kwqe1->src_ip = be32_to_cpu(csk->src_ip[0]);
  1101. l4kwqe1->dst_ip = be32_to_cpu(csk->dst_ip[0]);
  1102. l4kwqe1->src_port = be16_to_cpu(csk->src_port);
  1103. l4kwqe1->dst_port = be16_to_cpu(csk->dst_port);
  1104. if (csk->tcp_flags & SK_TCP_NO_DELAY_ACK)
  1105. tcp_flags |= L4_KWQ_CONNECT_REQ1_NO_DELAY_ACK;
  1106. if (csk->tcp_flags & SK_TCP_KEEP_ALIVE)
  1107. tcp_flags |= L4_KWQ_CONNECT_REQ1_KEEP_ALIVE;
  1108. if (csk->tcp_flags & SK_TCP_NAGLE)
  1109. tcp_flags |= L4_KWQ_CONNECT_REQ1_NAGLE_ENABLE;
  1110. if (csk->tcp_flags & SK_TCP_TIMESTAMP)
  1111. tcp_flags |= L4_KWQ_CONNECT_REQ1_TIME_STAMP;
  1112. if (csk->tcp_flags & SK_TCP_SACK)
  1113. tcp_flags |= L4_KWQ_CONNECT_REQ1_SACK;
  1114. if (csk->tcp_flags & SK_TCP_SEG_SCALING)
  1115. tcp_flags |= L4_KWQ_CONNECT_REQ1_SEG_SCALING;
  1116. l4kwqe1->tcp_flags = tcp_flags;
  1117. return dev->submit_kwqes(dev, wqes, num_wqes);
  1118. }
  1119. static int cnic_cm_close_req(struct cnic_sock *csk)
  1120. {
  1121. struct cnic_dev *dev = csk->dev;
  1122. struct l4_kwq_close_req *l4kwqe;
  1123. struct kwqe *wqes[1];
  1124. l4kwqe = (struct l4_kwq_close_req *) &csk->kwqe2;
  1125. memset(l4kwqe, 0, sizeof(*l4kwqe));
  1126. wqes[0] = (struct kwqe *) l4kwqe;
  1127. l4kwqe->op_code = L4_KWQE_OPCODE_VALUE_CLOSE;
  1128. l4kwqe->flags = L4_LAYER_CODE << L4_KWQ_CLOSE_REQ_LAYER_CODE_SHIFT;
  1129. l4kwqe->cid = csk->cid;
  1130. return dev->submit_kwqes(dev, wqes, 1);
  1131. }
  1132. static int cnic_cm_abort_req(struct cnic_sock *csk)
  1133. {
  1134. struct cnic_dev *dev = csk->dev;
  1135. struct l4_kwq_reset_req *l4kwqe;
  1136. struct kwqe *wqes[1];
  1137. l4kwqe = (struct l4_kwq_reset_req *) &csk->kwqe2;
  1138. memset(l4kwqe, 0, sizeof(*l4kwqe));
  1139. wqes[0] = (struct kwqe *) l4kwqe;
  1140. l4kwqe->op_code = L4_KWQE_OPCODE_VALUE_RESET;
  1141. l4kwqe->flags = L4_LAYER_CODE << L4_KWQ_RESET_REQ_LAYER_CODE_SHIFT;
  1142. l4kwqe->cid = csk->cid;
  1143. return dev->submit_kwqes(dev, wqes, 1);
  1144. }
  1145. static int cnic_cm_create(struct cnic_dev *dev, int ulp_type, u32 cid,
  1146. u32 l5_cid, struct cnic_sock **csk, void *context)
  1147. {
  1148. struct cnic_local *cp = dev->cnic_priv;
  1149. struct cnic_sock *csk1;
  1150. if (l5_cid >= MAX_CM_SK_TBL_SZ)
  1151. return -EINVAL;
  1152. csk1 = &cp->csk_tbl[l5_cid];
  1153. if (atomic_read(&csk1->ref_count))
  1154. return -EAGAIN;
  1155. if (test_and_set_bit(SK_F_INUSE, &csk1->flags))
  1156. return -EBUSY;
  1157. csk1->dev = dev;
  1158. csk1->cid = cid;
  1159. csk1->l5_cid = l5_cid;
  1160. csk1->ulp_type = ulp_type;
  1161. csk1->context = context;
  1162. csk1->ka_timeout = DEF_KA_TIMEOUT;
  1163. csk1->ka_interval = DEF_KA_INTERVAL;
  1164. csk1->ka_max_probe_count = DEF_KA_MAX_PROBE_COUNT;
  1165. csk1->tos = DEF_TOS;
  1166. csk1->ttl = DEF_TTL;
  1167. csk1->snd_seq_scale = DEF_SND_SEQ_SCALE;
  1168. csk1->rcv_buf = DEF_RCV_BUF;
  1169. csk1->snd_buf = DEF_SND_BUF;
  1170. csk1->seed = DEF_SEED;
  1171. *csk = csk1;
  1172. return 0;
  1173. }
  1174. static void cnic_cm_cleanup(struct cnic_sock *csk)
  1175. {
  1176. if (csk->src_port) {
  1177. struct cnic_dev *dev = csk->dev;
  1178. struct cnic_local *cp = dev->cnic_priv;
  1179. cnic_free_id(&cp->csk_port_tbl, csk->src_port);
  1180. csk->src_port = 0;
  1181. }
  1182. }
  1183. static void cnic_close_conn(struct cnic_sock *csk)
  1184. {
  1185. if (test_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags)) {
  1186. cnic_cm_upload_pg(csk);
  1187. clear_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags);
  1188. }
  1189. cnic_cm_cleanup(csk);
  1190. }
  1191. static int cnic_cm_destroy(struct cnic_sock *csk)
  1192. {
  1193. if (!cnic_in_use(csk))
  1194. return -EINVAL;
  1195. csk_hold(csk);
  1196. clear_bit(SK_F_INUSE, &csk->flags);
  1197. smp_mb__after_clear_bit();
  1198. while (atomic_read(&csk->ref_count) != 1)
  1199. msleep(1);
  1200. cnic_cm_cleanup(csk);
  1201. csk->flags = 0;
  1202. csk_put(csk);
  1203. return 0;
  1204. }
  1205. static inline u16 cnic_get_vlan(struct net_device *dev,
  1206. struct net_device **vlan_dev)
  1207. {
  1208. if (dev->priv_flags & IFF_802_1Q_VLAN) {
  1209. *vlan_dev = vlan_dev_real_dev(dev);
  1210. return vlan_dev_vlan_id(dev);
  1211. }
  1212. *vlan_dev = dev;
  1213. return 0;
  1214. }
  1215. static int cnic_get_v4_route(struct sockaddr_in *dst_addr,
  1216. struct dst_entry **dst)
  1217. {
  1218. #if defined(CONFIG_INET)
  1219. struct flowi fl;
  1220. int err;
  1221. struct rtable *rt;
  1222. memset(&fl, 0, sizeof(fl));
  1223. fl.nl_u.ip4_u.daddr = dst_addr->sin_addr.s_addr;
  1224. err = ip_route_output_key(&init_net, &rt, &fl);
  1225. if (!err)
  1226. *dst = &rt->u.dst;
  1227. return err;
  1228. #else
  1229. return -ENETUNREACH;
  1230. #endif
  1231. }
  1232. static int cnic_get_v6_route(struct sockaddr_in6 *dst_addr,
  1233. struct dst_entry **dst)
  1234. {
  1235. #if defined(CONFIG_IPV6) || (defined(CONFIG_IPV6_MODULE) && defined(MODULE))
  1236. struct flowi fl;
  1237. memset(&fl, 0, sizeof(fl));
  1238. ipv6_addr_copy(&fl.fl6_dst, &dst_addr->sin6_addr);
  1239. if (ipv6_addr_type(&fl.fl6_dst) & IPV6_ADDR_LINKLOCAL)
  1240. fl.oif = dst_addr->sin6_scope_id;
  1241. *dst = ip6_route_output(&init_net, NULL, &fl);
  1242. if (*dst)
  1243. return 0;
  1244. #endif
  1245. return -ENETUNREACH;
  1246. }
  1247. static struct cnic_dev *cnic_cm_select_dev(struct sockaddr_in *dst_addr,
  1248. int ulp_type)
  1249. {
  1250. struct cnic_dev *dev = NULL;
  1251. struct dst_entry *dst;
  1252. struct net_device *netdev = NULL;
  1253. int err = -ENETUNREACH;
  1254. if (dst_addr->sin_family == AF_INET)
  1255. err = cnic_get_v4_route(dst_addr, &dst);
  1256. else if (dst_addr->sin_family == AF_INET6) {
  1257. struct sockaddr_in6 *dst_addr6 =
  1258. (struct sockaddr_in6 *) dst_addr;
  1259. err = cnic_get_v6_route(dst_addr6, &dst);
  1260. } else
  1261. return NULL;
  1262. if (err)
  1263. return NULL;
  1264. if (!dst->dev)
  1265. goto done;
  1266. cnic_get_vlan(dst->dev, &netdev);
  1267. dev = cnic_from_netdev(netdev);
  1268. done:
  1269. dst_release(dst);
  1270. if (dev)
  1271. cnic_put(dev);
  1272. return dev;
  1273. }
  1274. static int cnic_resolve_addr(struct cnic_sock *csk, struct cnic_sockaddr *saddr)
  1275. {
  1276. struct cnic_dev *dev = csk->dev;
  1277. struct cnic_local *cp = dev->cnic_priv;
  1278. return cnic_send_nlmsg(cp, ISCSI_KEVENT_PATH_REQ, csk);
  1279. }
  1280. static int cnic_get_route(struct cnic_sock *csk, struct cnic_sockaddr *saddr)
  1281. {
  1282. struct cnic_dev *dev = csk->dev;
  1283. struct cnic_local *cp = dev->cnic_priv;
  1284. int is_v6, err, rc = -ENETUNREACH;
  1285. struct dst_entry *dst;
  1286. struct net_device *realdev;
  1287. u32 local_port;
  1288. if (saddr->local.v6.sin6_family == AF_INET6 &&
  1289. saddr->remote.v6.sin6_family == AF_INET6)
  1290. is_v6 = 1;
  1291. else if (saddr->local.v4.sin_family == AF_INET &&
  1292. saddr->remote.v4.sin_family == AF_INET)
  1293. is_v6 = 0;
  1294. else
  1295. return -EINVAL;
  1296. clear_bit(SK_F_IPV6, &csk->flags);
  1297. if (is_v6) {
  1298. #if defined(CONFIG_IPV6) || (defined(CONFIG_IPV6_MODULE) && defined(MODULE))
  1299. set_bit(SK_F_IPV6, &csk->flags);
  1300. err = cnic_get_v6_route(&saddr->remote.v6, &dst);
  1301. if (err)
  1302. return err;
  1303. if (!dst || dst->error || !dst->dev)
  1304. goto err_out;
  1305. memcpy(&csk->dst_ip[0], &saddr->remote.v6.sin6_addr,
  1306. sizeof(struct in6_addr));
  1307. csk->dst_port = saddr->remote.v6.sin6_port;
  1308. local_port = saddr->local.v6.sin6_port;
  1309. #else
  1310. return rc;
  1311. #endif
  1312. } else {
  1313. err = cnic_get_v4_route(&saddr->remote.v4, &dst);
  1314. if (err)
  1315. return err;
  1316. if (!dst || dst->error || !dst->dev)
  1317. goto err_out;
  1318. csk->dst_ip[0] = saddr->remote.v4.sin_addr.s_addr;
  1319. csk->dst_port = saddr->remote.v4.sin_port;
  1320. local_port = saddr->local.v4.sin_port;
  1321. }
  1322. csk->vlan_id = cnic_get_vlan(dst->dev, &realdev);
  1323. if (realdev != dev->netdev)
  1324. goto err_out;
  1325. if (local_port >= CNIC_LOCAL_PORT_MIN &&
  1326. local_port < CNIC_LOCAL_PORT_MAX) {
  1327. if (cnic_alloc_id(&cp->csk_port_tbl, local_port))
  1328. local_port = 0;
  1329. } else
  1330. local_port = 0;
  1331. if (!local_port) {
  1332. local_port = cnic_alloc_new_id(&cp->csk_port_tbl);
  1333. if (local_port == -1) {
  1334. rc = -ENOMEM;
  1335. goto err_out;
  1336. }
  1337. }
  1338. csk->src_port = local_port;
  1339. csk->mtu = dst_mtu(dst);
  1340. rc = 0;
  1341. err_out:
  1342. dst_release(dst);
  1343. return rc;
  1344. }
  1345. static void cnic_init_csk_state(struct cnic_sock *csk)
  1346. {
  1347. csk->state = 0;
  1348. clear_bit(SK_F_OFFLD_SCHED, &csk->flags);
  1349. clear_bit(SK_F_CLOSING, &csk->flags);
  1350. }
  1351. static int cnic_cm_connect(struct cnic_sock *csk, struct cnic_sockaddr *saddr)
  1352. {
  1353. int err = 0;
  1354. if (!cnic_in_use(csk))
  1355. return -EINVAL;
  1356. if (test_and_set_bit(SK_F_CONNECT_START, &csk->flags))
  1357. return -EINVAL;
  1358. cnic_init_csk_state(csk);
  1359. err = cnic_get_route(csk, saddr);
  1360. if (err)
  1361. goto err_out;
  1362. err = cnic_resolve_addr(csk, saddr);
  1363. if (!err)
  1364. return 0;
  1365. err_out:
  1366. clear_bit(SK_F_CONNECT_START, &csk->flags);
  1367. return err;
  1368. }
  1369. static int cnic_cm_abort(struct cnic_sock *csk)
  1370. {
  1371. struct cnic_local *cp = csk->dev->cnic_priv;
  1372. u32 opcode;
  1373. if (!cnic_in_use(csk))
  1374. return -EINVAL;
  1375. if (cnic_abort_prep(csk))
  1376. return cnic_cm_abort_req(csk);
  1377. /* Getting here means that we haven't started connect, or
  1378. * connect was not successful.
  1379. */
  1380. csk->state = L4_KCQE_OPCODE_VALUE_RESET_COMP;
  1381. if (test_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags))
  1382. opcode = csk->state;
  1383. else
  1384. opcode = L5CM_RAMROD_CMD_ID_TERMINATE_OFFLOAD;
  1385. cp->close_conn(csk, opcode);
  1386. return 0;
  1387. }
  1388. static int cnic_cm_close(struct cnic_sock *csk)
  1389. {
  1390. if (!cnic_in_use(csk))
  1391. return -EINVAL;
  1392. if (cnic_close_prep(csk)) {
  1393. csk->state = L4_KCQE_OPCODE_VALUE_CLOSE_COMP;
  1394. return cnic_cm_close_req(csk);
  1395. }
  1396. return 0;
  1397. }
  1398. static void cnic_cm_upcall(struct cnic_local *cp, struct cnic_sock *csk,
  1399. u8 opcode)
  1400. {
  1401. struct cnic_ulp_ops *ulp_ops;
  1402. int ulp_type = csk->ulp_type;
  1403. rcu_read_lock();
  1404. ulp_ops = rcu_dereference(cp->ulp_ops[ulp_type]);
  1405. if (ulp_ops) {
  1406. if (opcode == L4_KCQE_OPCODE_VALUE_CONNECT_COMPLETE)
  1407. ulp_ops->cm_connect_complete(csk);
  1408. else if (opcode == L4_KCQE_OPCODE_VALUE_CLOSE_COMP)
  1409. ulp_ops->cm_close_complete(csk);
  1410. else if (opcode == L4_KCQE_OPCODE_VALUE_RESET_RECEIVED)
  1411. ulp_ops->cm_remote_abort(csk);
  1412. else if (opcode == L4_KCQE_OPCODE_VALUE_RESET_COMP)
  1413. ulp_ops->cm_abort_complete(csk);
  1414. else if (opcode == L4_KCQE_OPCODE_VALUE_CLOSE_RECEIVED)
  1415. ulp_ops->cm_remote_close(csk);
  1416. }
  1417. rcu_read_unlock();
  1418. }
  1419. static int cnic_cm_set_pg(struct cnic_sock *csk)
  1420. {
  1421. if (cnic_offld_prep(csk)) {
  1422. if (test_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags))
  1423. cnic_cm_update_pg(csk);
  1424. else
  1425. cnic_cm_offload_pg(csk);
  1426. }
  1427. return 0;
  1428. }
  1429. static void cnic_cm_process_offld_pg(struct cnic_dev *dev, struct l4_kcq *kcqe)
  1430. {
  1431. struct cnic_local *cp = dev->cnic_priv;
  1432. u32 l5_cid = kcqe->pg_host_opaque;
  1433. u8 opcode = kcqe->op_code;
  1434. struct cnic_sock *csk = &cp->csk_tbl[l5_cid];
  1435. csk_hold(csk);
  1436. if (!cnic_in_use(csk))
  1437. goto done;
  1438. if (opcode == L4_KCQE_OPCODE_VALUE_UPDATE_PG) {
  1439. clear_bit(SK_F_OFFLD_SCHED, &csk->flags);
  1440. goto done;
  1441. }
  1442. csk->pg_cid = kcqe->pg_cid;
  1443. set_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags);
  1444. cnic_cm_conn_req(csk);
  1445. done:
  1446. csk_put(csk);
  1447. }
  1448. static void cnic_cm_process_kcqe(struct cnic_dev *dev, struct kcqe *kcqe)
  1449. {
  1450. struct cnic_local *cp = dev->cnic_priv;
  1451. struct l4_kcq *l4kcqe = (struct l4_kcq *) kcqe;
  1452. u8 opcode = l4kcqe->op_code;
  1453. u32 l5_cid;
  1454. struct cnic_sock *csk;
  1455. if (opcode == L4_KCQE_OPCODE_VALUE_OFFLOAD_PG ||
  1456. opcode == L4_KCQE_OPCODE_VALUE_UPDATE_PG) {
  1457. cnic_cm_process_offld_pg(dev, l4kcqe);
  1458. return;
  1459. }
  1460. l5_cid = l4kcqe->conn_id;
  1461. if (opcode & 0x80)
  1462. l5_cid = l4kcqe->cid;
  1463. if (l5_cid >= MAX_CM_SK_TBL_SZ)
  1464. return;
  1465. csk = &cp->csk_tbl[l5_cid];
  1466. csk_hold(csk);
  1467. if (!cnic_in_use(csk)) {
  1468. csk_put(csk);
  1469. return;
  1470. }
  1471. switch (opcode) {
  1472. case L4_KCQE_OPCODE_VALUE_CONNECT_COMPLETE:
  1473. if (l4kcqe->status == 0)
  1474. set_bit(SK_F_OFFLD_COMPLETE, &csk->flags);
  1475. smp_mb__before_clear_bit();
  1476. clear_bit(SK_F_OFFLD_SCHED, &csk->flags);
  1477. cnic_cm_upcall(cp, csk, opcode);
  1478. break;
  1479. case L4_KCQE_OPCODE_VALUE_RESET_RECEIVED:
  1480. if (test_and_clear_bit(SK_F_OFFLD_COMPLETE, &csk->flags))
  1481. csk->state = opcode;
  1482. /* fall through */
  1483. case L4_KCQE_OPCODE_VALUE_CLOSE_COMP:
  1484. case L4_KCQE_OPCODE_VALUE_RESET_COMP:
  1485. cp->close_conn(csk, opcode);
  1486. break;
  1487. case L4_KCQE_OPCODE_VALUE_CLOSE_RECEIVED:
  1488. cnic_cm_upcall(cp, csk, opcode);
  1489. break;
  1490. }
  1491. csk_put(csk);
  1492. }
  1493. static void cnic_cm_indicate_kcqe(void *data, struct kcqe *kcqe[], u32 num)
  1494. {
  1495. struct cnic_dev *dev = data;
  1496. int i;
  1497. for (i = 0; i < num; i++)
  1498. cnic_cm_process_kcqe(dev, kcqe[i]);
  1499. }
  1500. static struct cnic_ulp_ops cm_ulp_ops = {
  1501. .indicate_kcqes = cnic_cm_indicate_kcqe,
  1502. };
  1503. static void cnic_cm_free_mem(struct cnic_dev *dev)
  1504. {
  1505. struct cnic_local *cp = dev->cnic_priv;
  1506. kfree(cp->csk_tbl);
  1507. cp->csk_tbl = NULL;
  1508. cnic_free_id_tbl(&cp->csk_port_tbl);
  1509. }
  1510. static int cnic_cm_alloc_mem(struct cnic_dev *dev)
  1511. {
  1512. struct cnic_local *cp = dev->cnic_priv;
  1513. cp->csk_tbl = kzalloc(sizeof(struct cnic_sock) * MAX_CM_SK_TBL_SZ,
  1514. GFP_KERNEL);
  1515. if (!cp->csk_tbl)
  1516. return -ENOMEM;
  1517. if (cnic_init_id_tbl(&cp->csk_port_tbl, CNIC_LOCAL_PORT_RANGE,
  1518. CNIC_LOCAL_PORT_MIN)) {
  1519. cnic_cm_free_mem(dev);
  1520. return -ENOMEM;
  1521. }
  1522. return 0;
  1523. }
  1524. static int cnic_ready_to_close(struct cnic_sock *csk, u32 opcode)
  1525. {
  1526. if ((opcode == csk->state) ||
  1527. (opcode == L4_KCQE_OPCODE_VALUE_RESET_RECEIVED &&
  1528. csk->state == L4_KCQE_OPCODE_VALUE_CLOSE_COMP)) {
  1529. if (!test_and_set_bit(SK_F_CLOSING, &csk->flags))
  1530. return 1;
  1531. }
  1532. return 0;
  1533. }
  1534. static void cnic_close_bnx2_conn(struct cnic_sock *csk, u32 opcode)
  1535. {
  1536. struct cnic_dev *dev = csk->dev;
  1537. struct cnic_local *cp = dev->cnic_priv;
  1538. clear_bit(SK_F_CONNECT_START, &csk->flags);
  1539. if (cnic_ready_to_close(csk, opcode)) {
  1540. cnic_close_conn(csk);
  1541. cnic_cm_upcall(cp, csk, opcode);
  1542. }
  1543. }
  1544. static void cnic_cm_stop_bnx2_hw(struct cnic_dev *dev)
  1545. {
  1546. }
  1547. static int cnic_cm_init_bnx2_hw(struct cnic_dev *dev)
  1548. {
  1549. u32 seed;
  1550. get_random_bytes(&seed, 4);
  1551. cnic_ctx_wr(dev, 45, 0, seed);
  1552. return 0;
  1553. }
  1554. static int cnic_cm_open(struct cnic_dev *dev)
  1555. {
  1556. struct cnic_local *cp = dev->cnic_priv;
  1557. int err;
  1558. err = cnic_cm_alloc_mem(dev);
  1559. if (err)
  1560. return err;
  1561. err = cp->start_cm(dev);
  1562. if (err)
  1563. goto err_out;
  1564. dev->cm_create = cnic_cm_create;
  1565. dev->cm_destroy = cnic_cm_destroy;
  1566. dev->cm_connect = cnic_cm_connect;
  1567. dev->cm_abort = cnic_cm_abort;
  1568. dev->cm_close = cnic_cm_close;
  1569. dev->cm_select_dev = cnic_cm_select_dev;
  1570. cp->ulp_handle[CNIC_ULP_L4] = dev;
  1571. rcu_assign_pointer(cp->ulp_ops[CNIC_ULP_L4], &cm_ulp_ops);
  1572. return 0;
  1573. err_out:
  1574. cnic_cm_free_mem(dev);
  1575. return err;
  1576. }
  1577. static int cnic_cm_shutdown(struct cnic_dev *dev)
  1578. {
  1579. struct cnic_local *cp = dev->cnic_priv;
  1580. int i;
  1581. cp->stop_cm(dev);
  1582. if (!cp->csk_tbl)
  1583. return 0;
  1584. for (i = 0; i < MAX_CM_SK_TBL_SZ; i++) {
  1585. struct cnic_sock *csk = &cp->csk_tbl[i];
  1586. clear_bit(SK_F_INUSE, &csk->flags);
  1587. cnic_cm_cleanup(csk);
  1588. }
  1589. cnic_cm_free_mem(dev);
  1590. return 0;
  1591. }
  1592. static void cnic_init_context(struct cnic_dev *dev, u32 cid)
  1593. {
  1594. struct cnic_local *cp = dev->cnic_priv;
  1595. u32 cid_addr;
  1596. int i;
  1597. if (CHIP_NUM(cp) == CHIP_NUM_5709)
  1598. return;
  1599. cid_addr = GET_CID_ADDR(cid);
  1600. for (i = 0; i < CTX_SIZE; i += 4)
  1601. cnic_ctx_wr(dev, cid_addr, i, 0);
  1602. }
  1603. static int cnic_setup_5709_context(struct cnic_dev *dev, int valid)
  1604. {
  1605. struct cnic_local *cp = dev->cnic_priv;
  1606. int ret = 0, i;
  1607. u32 valid_bit = valid ? BNX2_CTX_HOST_PAGE_TBL_DATA0_VALID : 0;
  1608. if (CHIP_NUM(cp) != CHIP_NUM_5709)
  1609. return 0;
  1610. for (i = 0; i < cp->ctx_blks; i++) {
  1611. int j;
  1612. u32 idx = cp->ctx_arr[i].cid / cp->cids_per_blk;
  1613. u32 val;
  1614. memset(cp->ctx_arr[i].ctx, 0, BCM_PAGE_SIZE);
  1615. CNIC_WR(dev, BNX2_CTX_HOST_PAGE_TBL_DATA0,
  1616. (cp->ctx_arr[i].mapping & 0xffffffff) | valid_bit);
  1617. CNIC_WR(dev, BNX2_CTX_HOST_PAGE_TBL_DATA1,
  1618. (u64) cp->ctx_arr[i].mapping >> 32);
  1619. CNIC_WR(dev, BNX2_CTX_HOST_PAGE_TBL_CTRL, idx |
  1620. BNX2_CTX_HOST_PAGE_TBL_CTRL_WRITE_REQ);
  1621. for (j = 0; j < 10; j++) {
  1622. val = CNIC_RD(dev, BNX2_CTX_HOST_PAGE_TBL_CTRL);
  1623. if (!(val & BNX2_CTX_HOST_PAGE_TBL_CTRL_WRITE_REQ))
  1624. break;
  1625. udelay(5);
  1626. }
  1627. if (val & BNX2_CTX_HOST_PAGE_TBL_CTRL_WRITE_REQ) {
  1628. ret = -EBUSY;
  1629. break;
  1630. }
  1631. }
  1632. return ret;
  1633. }
  1634. static void cnic_free_irq(struct cnic_dev *dev)
  1635. {
  1636. struct cnic_local *cp = dev->cnic_priv;
  1637. struct cnic_eth_dev *ethdev = cp->ethdev;
  1638. if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) {
  1639. cp->disable_int_sync(dev);
  1640. tasklet_disable(&cp->cnic_irq_task);
  1641. free_irq(ethdev->irq_arr[0].vector, dev);
  1642. }
  1643. }
  1644. static int cnic_init_bnx2_irq(struct cnic_dev *dev)
  1645. {
  1646. struct cnic_local *cp = dev->cnic_priv;
  1647. struct cnic_eth_dev *ethdev = cp->ethdev;
  1648. if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) {
  1649. int err, i = 0;
  1650. int sblk_num = cp->status_blk_num;
  1651. u32 base = ((sblk_num - 1) * BNX2_HC_SB_CONFIG_SIZE) +
  1652. BNX2_HC_SB_CONFIG_1;
  1653. CNIC_WR(dev, base, BNX2_HC_SB_CONFIG_1_ONE_SHOT);
  1654. CNIC_WR(dev, base + BNX2_HC_COMP_PROD_TRIP_OFF, (2 << 16) | 8);
  1655. CNIC_WR(dev, base + BNX2_HC_COM_TICKS_OFF, (64 << 16) | 220);
  1656. CNIC_WR(dev, base + BNX2_HC_CMD_TICKS_OFF, (64 << 16) | 220);
  1657. cp->bnx2_status_blk = cp->status_blk;
  1658. cp->last_status_idx = cp->bnx2_status_blk->status_idx;
  1659. tasklet_init(&cp->cnic_irq_task, &cnic_service_bnx2_msix,
  1660. (unsigned long) dev);
  1661. err = request_irq(ethdev->irq_arr[0].vector, cnic_irq, 0,
  1662. "cnic", dev);
  1663. if (err) {
  1664. tasklet_disable(&cp->cnic_irq_task);
  1665. return err;
  1666. }
  1667. while (cp->bnx2_status_blk->status_completion_producer_index &&
  1668. i < 10) {
  1669. CNIC_WR(dev, BNX2_HC_COALESCE_NOW,
  1670. 1 << (11 + sblk_num));
  1671. udelay(10);
  1672. i++;
  1673. barrier();
  1674. }
  1675. if (cp->bnx2_status_blk->status_completion_producer_index) {
  1676. cnic_free_irq(dev);
  1677. goto failed;
  1678. }
  1679. } else {
  1680. struct status_block *sblk = cp->status_blk;
  1681. u32 hc_cmd = CNIC_RD(dev, BNX2_HC_COMMAND);
  1682. int i = 0;
  1683. while (sblk->status_completion_producer_index && i < 10) {
  1684. CNIC_WR(dev, BNX2_HC_COMMAND,
  1685. hc_cmd | BNX2_HC_COMMAND_COAL_NOW_WO_INT);
  1686. udelay(10);
  1687. i++;
  1688. barrier();
  1689. }
  1690. if (sblk->status_completion_producer_index)
  1691. goto failed;
  1692. }
  1693. return 0;
  1694. failed:
  1695. printk(KERN_ERR PFX "%s: " "KCQ index not resetting to 0.\n",
  1696. dev->netdev->name);
  1697. return -EBUSY;
  1698. }
  1699. static void cnic_enable_bnx2_int(struct cnic_dev *dev)
  1700. {
  1701. struct cnic_local *cp = dev->cnic_priv;
  1702. struct cnic_eth_dev *ethdev = cp->ethdev;
  1703. if (!(ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX))
  1704. return;
  1705. CNIC_WR(dev, BNX2_PCICFG_INT_ACK_CMD, cp->int_num |
  1706. BNX2_PCICFG_INT_ACK_CMD_INDEX_VALID | cp->last_status_idx);
  1707. }
  1708. static void cnic_disable_bnx2_int_sync(struct cnic_dev *dev)
  1709. {
  1710. struct cnic_local *cp = dev->cnic_priv;
  1711. struct cnic_eth_dev *ethdev = cp->ethdev;
  1712. if (!(ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX))
  1713. return;
  1714. CNIC_WR(dev, BNX2_PCICFG_INT_ACK_CMD, cp->int_num |
  1715. BNX2_PCICFG_INT_ACK_CMD_MASK_INT);
  1716. CNIC_RD(dev, BNX2_PCICFG_INT_ACK_CMD);
  1717. synchronize_irq(ethdev->irq_arr[0].vector);
  1718. }
  1719. static void cnic_init_bnx2_tx_ring(struct cnic_dev *dev)
  1720. {
  1721. struct cnic_local *cp = dev->cnic_priv;
  1722. struct cnic_eth_dev *ethdev = cp->ethdev;
  1723. u32 cid_addr, tx_cid, sb_id;
  1724. u32 val, offset0, offset1, offset2, offset3;
  1725. int i;
  1726. struct tx_bd *txbd;
  1727. dma_addr_t buf_map;
  1728. struct status_block *s_blk = cp->status_blk;
  1729. sb_id = cp->status_blk_num;
  1730. tx_cid = 20;
  1731. cnic_init_context(dev, tx_cid);
  1732. cnic_init_context(dev, tx_cid + 1);
  1733. cp->tx_cons_ptr = &s_blk->status_tx_quick_consumer_index2;
  1734. if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) {
  1735. struct status_block_msix *sblk = cp->status_blk;
  1736. tx_cid = TX_TSS_CID + sb_id - 1;
  1737. cnic_init_context(dev, tx_cid);
  1738. CNIC_WR(dev, BNX2_TSCH_TSS_CFG, (sb_id << 24) |
  1739. (TX_TSS_CID << 7));
  1740. cp->tx_cons_ptr = &sblk->status_tx_quick_consumer_index;
  1741. }
  1742. cp->tx_cons = *cp->tx_cons_ptr;
  1743. cid_addr = GET_CID_ADDR(tx_cid);
  1744. if (CHIP_NUM(cp) == CHIP_NUM_5709) {
  1745. u32 cid_addr2 = GET_CID_ADDR(tx_cid + 4) + 0x40;
  1746. for (i = 0; i < PHY_CTX_SIZE; i += 4)
  1747. cnic_ctx_wr(dev, cid_addr2, i, 0);
  1748. offset0 = BNX2_L2CTX_TYPE_XI;
  1749. offset1 = BNX2_L2CTX_CMD_TYPE_XI;
  1750. offset2 = BNX2_L2CTX_TBDR_BHADDR_HI_XI;
  1751. offset3 = BNX2_L2CTX_TBDR_BHADDR_LO_XI;
  1752. } else {
  1753. offset0 = BNX2_L2CTX_TYPE;
  1754. offset1 = BNX2_L2CTX_CMD_TYPE;
  1755. offset2 = BNX2_L2CTX_TBDR_BHADDR_HI;
  1756. offset3 = BNX2_L2CTX_TBDR_BHADDR_LO;
  1757. }
  1758. val = BNX2_L2CTX_TYPE_TYPE_L2 | BNX2_L2CTX_TYPE_SIZE_L2;
  1759. cnic_ctx_wr(dev, cid_addr, offset0, val);
  1760. val = BNX2_L2CTX_CMD_TYPE_TYPE_L2 | (8 << 16);
  1761. cnic_ctx_wr(dev, cid_addr, offset1, val);
  1762. txbd = (struct tx_bd *) cp->l2_ring;
  1763. buf_map = cp->l2_buf_map;
  1764. for (i = 0; i < MAX_TX_DESC_CNT; i++, txbd++) {
  1765. txbd->tx_bd_haddr_hi = (u64) buf_map >> 32;
  1766. txbd->tx_bd_haddr_lo = (u64) buf_map & 0xffffffff;
  1767. }
  1768. val = (u64) cp->l2_ring_map >> 32;
  1769. cnic_ctx_wr(dev, cid_addr, offset2, val);
  1770. txbd->tx_bd_haddr_hi = val;
  1771. val = (u64) cp->l2_ring_map & 0xffffffff;
  1772. cnic_ctx_wr(dev, cid_addr, offset3, val);
  1773. txbd->tx_bd_haddr_lo = val;
  1774. }
  1775. static void cnic_init_bnx2_rx_ring(struct cnic_dev *dev)
  1776. {
  1777. struct cnic_local *cp = dev->cnic_priv;
  1778. struct cnic_eth_dev *ethdev = cp->ethdev;
  1779. u32 cid_addr, sb_id, val, coal_reg, coal_val;
  1780. int i;
  1781. struct rx_bd *rxbd;
  1782. struct status_block *s_blk = cp->status_blk;
  1783. sb_id = cp->status_blk_num;
  1784. cnic_init_context(dev, 2);
  1785. cp->rx_cons_ptr = &s_blk->status_rx_quick_consumer_index2;
  1786. coal_reg = BNX2_HC_COMMAND;
  1787. coal_val = CNIC_RD(dev, coal_reg);
  1788. if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) {
  1789. struct status_block_msix *sblk = cp->status_blk;
  1790. cp->rx_cons_ptr = &sblk->status_rx_quick_consumer_index;
  1791. coal_reg = BNX2_HC_COALESCE_NOW;
  1792. coal_val = 1 << (11 + sb_id);
  1793. }
  1794. i = 0;
  1795. while (!(*cp->rx_cons_ptr != 0) && i < 10) {
  1796. CNIC_WR(dev, coal_reg, coal_val);
  1797. udelay(10);
  1798. i++;
  1799. barrier();
  1800. }
  1801. cp->rx_cons = *cp->rx_cons_ptr;
  1802. cid_addr = GET_CID_ADDR(2);
  1803. val = BNX2_L2CTX_CTX_TYPE_CTX_BD_CHN_TYPE_VALUE |
  1804. BNX2_L2CTX_CTX_TYPE_SIZE_L2 | (0x02 << 8);
  1805. cnic_ctx_wr(dev, cid_addr, BNX2_L2CTX_CTX_TYPE, val);
  1806. if (sb_id == 0)
  1807. val = 2 << BNX2_L2CTX_STATUSB_NUM_SHIFT;
  1808. else
  1809. val = BNX2_L2CTX_STATUSB_NUM(sb_id);
  1810. cnic_ctx_wr(dev, cid_addr, BNX2_L2CTX_HOST_BDIDX, val);
  1811. rxbd = (struct rx_bd *) (cp->l2_ring + BCM_PAGE_SIZE);
  1812. for (i = 0; i < MAX_RX_DESC_CNT; i++, rxbd++) {
  1813. dma_addr_t buf_map;
  1814. int n = (i % cp->l2_rx_ring_size) + 1;
  1815. buf_map = cp->l2_buf_map + (n * cp->l2_single_buf_size);
  1816. rxbd->rx_bd_len = cp->l2_single_buf_size;
  1817. rxbd->rx_bd_flags = RX_BD_FLAGS_START | RX_BD_FLAGS_END;
  1818. rxbd->rx_bd_haddr_hi = (u64) buf_map >> 32;
  1819. rxbd->rx_bd_haddr_lo = (u64) buf_map & 0xffffffff;
  1820. }
  1821. val = (u64) (cp->l2_ring_map + BCM_PAGE_SIZE) >> 32;
  1822. cnic_ctx_wr(dev, cid_addr, BNX2_L2CTX_NX_BDHADDR_HI, val);
  1823. rxbd->rx_bd_haddr_hi = val;
  1824. val = (u64) (cp->l2_ring_map + BCM_PAGE_SIZE) & 0xffffffff;
  1825. cnic_ctx_wr(dev, cid_addr, BNX2_L2CTX_NX_BDHADDR_LO, val);
  1826. rxbd->rx_bd_haddr_lo = val;
  1827. val = cnic_reg_rd_ind(dev, BNX2_RXP_SCRATCH_RXP_FLOOD);
  1828. cnic_reg_wr_ind(dev, BNX2_RXP_SCRATCH_RXP_FLOOD, val | (1 << 2));
  1829. }
  1830. static void cnic_shutdown_bnx2_rx_ring(struct cnic_dev *dev)
  1831. {
  1832. struct kwqe *wqes[1], l2kwqe;
  1833. memset(&l2kwqe, 0, sizeof(l2kwqe));
  1834. wqes[0] = &l2kwqe;
  1835. l2kwqe.kwqe_op_flag = (L2_LAYER_CODE << KWQE_FLAGS_LAYER_SHIFT) |
  1836. (L2_KWQE_OPCODE_VALUE_FLUSH <<
  1837. KWQE_OPCODE_SHIFT) | 2;
  1838. dev->submit_kwqes(dev, wqes, 1);
  1839. }
  1840. static void cnic_set_bnx2_mac(struct cnic_dev *dev)
  1841. {
  1842. struct cnic_local *cp = dev->cnic_priv;
  1843. u32 val;
  1844. val = cp->func << 2;
  1845. cp->shmem_base = cnic_reg_rd_ind(dev, BNX2_SHM_HDR_ADDR_0 + val);
  1846. val = cnic_reg_rd_ind(dev, cp->shmem_base +
  1847. BNX2_PORT_HW_CFG_ISCSI_MAC_UPPER);
  1848. dev->mac_addr[0] = (u8) (val >> 8);
  1849. dev->mac_addr[1] = (u8) val;
  1850. CNIC_WR(dev, BNX2_EMAC_MAC_MATCH4, val);
  1851. val = cnic_reg_rd_ind(dev, cp->shmem_base +
  1852. BNX2_PORT_HW_CFG_ISCSI_MAC_LOWER);
  1853. dev->mac_addr[2] = (u8) (val >> 24);
  1854. dev->mac_addr[3] = (u8) (val >> 16);
  1855. dev->mac_addr[4] = (u8) (val >> 8);
  1856. dev->mac_addr[5] = (u8) val;
  1857. CNIC_WR(dev, BNX2_EMAC_MAC_MATCH5, val);
  1858. val = 4 | BNX2_RPM_SORT_USER2_BC_EN;
  1859. if (CHIP_NUM(cp) != CHIP_NUM_5709)
  1860. val |= BNX2_RPM_SORT_USER2_PROM_VLAN;
  1861. CNIC_WR(dev, BNX2_RPM_SORT_USER2, 0x0);
  1862. CNIC_WR(dev, BNX2_RPM_SORT_USER2, val);
  1863. CNIC_WR(dev, BNX2_RPM_SORT_USER2, val | BNX2_RPM_SORT_USER2_ENA);
  1864. }
  1865. static int cnic_start_bnx2_hw(struct cnic_dev *dev)
  1866. {
  1867. struct cnic_local *cp = dev->cnic_priv;
  1868. struct cnic_eth_dev *ethdev = cp->ethdev;
  1869. struct status_block *sblk = cp->status_blk;
  1870. u32 val;
  1871. int err;
  1872. cnic_set_bnx2_mac(dev);
  1873. val = CNIC_RD(dev, BNX2_MQ_CONFIG);
  1874. val &= ~BNX2_MQ_CONFIG_KNL_BYP_BLK_SIZE;
  1875. if (BCM_PAGE_BITS > 12)
  1876. val |= (12 - 8) << 4;
  1877. else
  1878. val |= (BCM_PAGE_BITS - 8) << 4;
  1879. CNIC_WR(dev, BNX2_MQ_CONFIG, val);
  1880. CNIC_WR(dev, BNX2_HC_COMP_PROD_TRIP, (2 << 16) | 8);
  1881. CNIC_WR(dev, BNX2_HC_COM_TICKS, (64 << 16) | 220);
  1882. CNIC_WR(dev, BNX2_HC_CMD_TICKS, (64 << 16) | 220);
  1883. err = cnic_setup_5709_context(dev, 1);
  1884. if (err)
  1885. return err;
  1886. cnic_init_context(dev, KWQ_CID);
  1887. cnic_init_context(dev, KCQ_CID);
  1888. cp->kwq_cid_addr = GET_CID_ADDR(KWQ_CID);
  1889. cp->kwq_io_addr = MB_GET_CID_ADDR(KWQ_CID) + L5_KRNLQ_HOST_QIDX;
  1890. cp->max_kwq_idx = MAX_KWQ_IDX;
  1891. cp->kwq_prod_idx = 0;
  1892. cp->kwq_con_idx = 0;
  1893. cp->cnic_local_flags |= CNIC_LCL_FL_KWQ_INIT;
  1894. if (CHIP_NUM(cp) == CHIP_NUM_5706 || CHIP_NUM(cp) == CHIP_NUM_5708)
  1895. cp->kwq_con_idx_ptr = &sblk->status_rx_quick_consumer_index15;
  1896. else
  1897. cp->kwq_con_idx_ptr = &sblk->status_cmd_consumer_index;
  1898. /* Initialize the kernel work queue context. */
  1899. val = KRNLQ_TYPE_TYPE_KRNLQ | KRNLQ_SIZE_TYPE_SIZE |
  1900. (BCM_PAGE_BITS - 8) | KRNLQ_FLAGS_QE_SELF_SEQ;
  1901. cnic_ctx_wr(dev, cp->kwq_cid_addr, L5_KRNLQ_TYPE, val);
  1902. val = (BCM_PAGE_SIZE / sizeof(struct kwqe) - 1) << 16;
  1903. cnic_ctx_wr(dev, cp->kwq_cid_addr, L5_KRNLQ_QE_SELF_SEQ_MAX, val);
  1904. val = ((BCM_PAGE_SIZE / sizeof(struct kwqe)) << 16) | KWQ_PAGE_CNT;
  1905. cnic_ctx_wr(dev, cp->kwq_cid_addr, L5_KRNLQ_PGTBL_NPAGES, val);
  1906. val = (u32) ((u64) cp->kwq_info.pgtbl_map >> 32);
  1907. cnic_ctx_wr(dev, cp->kwq_cid_addr, L5_KRNLQ_PGTBL_HADDR_HI, val);
  1908. val = (u32) cp->kwq_info.pgtbl_map;
  1909. cnic_ctx_wr(dev, cp->kwq_cid_addr, L5_KRNLQ_PGTBL_HADDR_LO, val);
  1910. cp->kcq_cid_addr = GET_CID_ADDR(KCQ_CID);
  1911. cp->kcq_io_addr = MB_GET_CID_ADDR(KCQ_CID) + L5_KRNLQ_HOST_QIDX;
  1912. cp->kcq_prod_idx = 0;
  1913. /* Initialize the kernel complete queue context. */
  1914. val = KRNLQ_TYPE_TYPE_KRNLQ | KRNLQ_SIZE_TYPE_SIZE |
  1915. (BCM_PAGE_BITS - 8) | KRNLQ_FLAGS_QE_SELF_SEQ;
  1916. cnic_ctx_wr(dev, cp->kcq_cid_addr, L5_KRNLQ_TYPE, val);
  1917. val = (BCM_PAGE_SIZE / sizeof(struct kcqe) - 1) << 16;
  1918. cnic_ctx_wr(dev, cp->kcq_cid_addr, L5_KRNLQ_QE_SELF_SEQ_MAX, val);
  1919. val = ((BCM_PAGE_SIZE / sizeof(struct kcqe)) << 16) | KCQ_PAGE_CNT;
  1920. cnic_ctx_wr(dev, cp->kcq_cid_addr, L5_KRNLQ_PGTBL_NPAGES, val);
  1921. val = (u32) ((u64) cp->kcq_info.pgtbl_map >> 32);
  1922. cnic_ctx_wr(dev, cp->kcq_cid_addr, L5_KRNLQ_PGTBL_HADDR_HI, val);
  1923. val = (u32) cp->kcq_info.pgtbl_map;
  1924. cnic_ctx_wr(dev, cp->kcq_cid_addr, L5_KRNLQ_PGTBL_HADDR_LO, val);
  1925. cp->int_num = 0;
  1926. if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) {
  1927. u32 sb_id = cp->status_blk_num;
  1928. u32 sb = BNX2_L2CTX_STATUSB_NUM(sb_id);
  1929. cp->int_num = sb_id << BNX2_PCICFG_INT_ACK_CMD_INT_NUM_SHIFT;
  1930. cnic_ctx_wr(dev, cp->kwq_cid_addr, L5_KRNLQ_HOST_QIDX, sb);
  1931. cnic_ctx_wr(dev, cp->kcq_cid_addr, L5_KRNLQ_HOST_QIDX, sb);
  1932. }
  1933. /* Enable Commnad Scheduler notification when we write to the
  1934. * host producer index of the kernel contexts. */
  1935. CNIC_WR(dev, BNX2_MQ_KNL_CMD_MASK1, 2);
  1936. /* Enable Command Scheduler notification when we write to either
  1937. * the Send Queue or Receive Queue producer indexes of the kernel
  1938. * bypass contexts. */
  1939. CNIC_WR(dev, BNX2_MQ_KNL_BYP_CMD_MASK1, 7);
  1940. CNIC_WR(dev, BNX2_MQ_KNL_BYP_WRITE_MASK1, 7);
  1941. /* Notify COM when the driver post an application buffer. */
  1942. CNIC_WR(dev, BNX2_MQ_KNL_RX_V2P_MASK2, 0x2000);
  1943. /* Set the CP and COM doorbells. These two processors polls the
  1944. * doorbell for a non zero value before running. This must be done
  1945. * after setting up the kernel queue contexts. */
  1946. cnic_reg_wr_ind(dev, BNX2_CP_SCRATCH + 0x20, 1);
  1947. cnic_reg_wr_ind(dev, BNX2_COM_SCRATCH + 0x20, 1);
  1948. cnic_init_bnx2_tx_ring(dev);
  1949. cnic_init_bnx2_rx_ring(dev);
  1950. err = cnic_init_bnx2_irq(dev);
  1951. if (err) {
  1952. printk(KERN_ERR PFX "%s: cnic_init_irq failed\n",
  1953. dev->netdev->name);
  1954. cnic_reg_wr_ind(dev, BNX2_CP_SCRATCH + 0x20, 0);
  1955. cnic_reg_wr_ind(dev, BNX2_COM_SCRATCH + 0x20, 0);
  1956. return err;
  1957. }
  1958. return 0;
  1959. }
  1960. static int cnic_start_hw(struct cnic_dev *dev)
  1961. {
  1962. struct cnic_local *cp = dev->cnic_priv;
  1963. struct cnic_eth_dev *ethdev = cp->ethdev;
  1964. int err;
  1965. if (test_bit(CNIC_F_CNIC_UP, &dev->flags))
  1966. return -EALREADY;
  1967. err = ethdev->drv_register_cnic(dev->netdev, cp->cnic_ops, dev);
  1968. if (err) {
  1969. printk(KERN_ERR PFX "%s: register_cnic failed\n",
  1970. dev->netdev->name);
  1971. goto err2;
  1972. }
  1973. dev->regview = ethdev->io_base;
  1974. cp->chip_id = ethdev->chip_id;
  1975. pci_dev_get(dev->pcidev);
  1976. cp->func = PCI_FUNC(dev->pcidev->devfn);
  1977. cp->status_blk = ethdev->irq_arr[0].status_blk;
  1978. cp->status_blk_num = ethdev->irq_arr[0].status_blk_num;
  1979. err = cp->alloc_resc(dev);
  1980. if (err) {
  1981. printk(KERN_ERR PFX "%s: allocate resource failure\n",
  1982. dev->netdev->name);
  1983. goto err1;
  1984. }
  1985. err = cp->start_hw(dev);
  1986. if (err)
  1987. goto err1;
  1988. err = cnic_cm_open(dev);
  1989. if (err)
  1990. goto err1;
  1991. set_bit(CNIC_F_CNIC_UP, &dev->flags);
  1992. cp->enable_int(dev);
  1993. return 0;
  1994. err1:
  1995. ethdev->drv_unregister_cnic(dev->netdev);
  1996. cp->free_resc(dev);
  1997. pci_dev_put(dev->pcidev);
  1998. err2:
  1999. return err;
  2000. }
  2001. static void cnic_stop_bnx2_hw(struct cnic_dev *dev)
  2002. {
  2003. struct cnic_local *cp = dev->cnic_priv;
  2004. struct cnic_eth_dev *ethdev = cp->ethdev;
  2005. cnic_disable_bnx2_int_sync(dev);
  2006. cnic_reg_wr_ind(dev, BNX2_CP_SCRATCH + 0x20, 0);
  2007. cnic_reg_wr_ind(dev, BNX2_COM_SCRATCH + 0x20, 0);
  2008. cnic_init_context(dev, KWQ_CID);
  2009. cnic_init_context(dev, KCQ_CID);
  2010. cnic_setup_5709_context(dev, 0);
  2011. cnic_free_irq(dev);
  2012. ethdev->drv_unregister_cnic(dev->netdev);
  2013. cnic_free_resc(dev);
  2014. }
  2015. static void cnic_stop_hw(struct cnic_dev *dev)
  2016. {
  2017. if (test_bit(CNIC_F_CNIC_UP, &dev->flags)) {
  2018. struct cnic_local *cp = dev->cnic_priv;
  2019. clear_bit(CNIC_F_CNIC_UP, &dev->flags);
  2020. rcu_assign_pointer(cp->ulp_ops[CNIC_ULP_L4], NULL);
  2021. synchronize_rcu();
  2022. cnic_cm_shutdown(dev);
  2023. cp->stop_hw(dev);
  2024. pci_dev_put(dev->pcidev);
  2025. }
  2026. }
  2027. static void cnic_free_dev(struct cnic_dev *dev)
  2028. {
  2029. int i = 0;
  2030. while ((atomic_read(&dev->ref_count) != 0) && i < 10) {
  2031. msleep(100);
  2032. i++;
  2033. }
  2034. if (atomic_read(&dev->ref_count) != 0)
  2035. printk(KERN_ERR PFX "%s: Failed waiting for ref count to go"
  2036. " to zero.\n", dev->netdev->name);
  2037. printk(KERN_INFO PFX "Removed CNIC device: %s\n", dev->netdev->name);
  2038. dev_put(dev->netdev);
  2039. kfree(dev);
  2040. }
  2041. static struct cnic_dev *cnic_alloc_dev(struct net_device *dev,
  2042. struct pci_dev *pdev)
  2043. {
  2044. struct cnic_dev *cdev;
  2045. struct cnic_local *cp;
  2046. int alloc_size;
  2047. alloc_size = sizeof(struct cnic_dev) + sizeof(struct cnic_local);
  2048. cdev = kzalloc(alloc_size , GFP_KERNEL);
  2049. if (cdev == NULL) {
  2050. printk(KERN_ERR PFX "%s: allocate dev struct failure\n",
  2051. dev->name);
  2052. return NULL;
  2053. }
  2054. cdev->netdev = dev;
  2055. cdev->cnic_priv = (char *)cdev + sizeof(struct cnic_dev);
  2056. cdev->register_device = cnic_register_device;
  2057. cdev->unregister_device = cnic_unregister_device;
  2058. cdev->iscsi_nl_msg_recv = cnic_iscsi_nl_msg_recv;
  2059. cp = cdev->cnic_priv;
  2060. cp->dev = cdev;
  2061. cp->uio_dev = -1;
  2062. cp->l2_single_buf_size = 0x400;
  2063. cp->l2_rx_ring_size = 3;
  2064. spin_lock_init(&cp->cnic_ulp_lock);
  2065. printk(KERN_INFO PFX "Added CNIC device: %s\n", dev->name);
  2066. return cdev;
  2067. }
  2068. static struct cnic_dev *init_bnx2_cnic(struct net_device *dev)
  2069. {
  2070. struct pci_dev *pdev;
  2071. struct cnic_dev *cdev;
  2072. struct cnic_local *cp;
  2073. struct cnic_eth_dev *ethdev = NULL;
  2074. struct cnic_eth_dev *(*probe)(struct net_device *) = NULL;
  2075. probe = symbol_get(bnx2_cnic_probe);
  2076. if (probe) {
  2077. ethdev = (*probe)(dev);
  2078. symbol_put_addr(probe);
  2079. }
  2080. if (!ethdev)
  2081. return NULL;
  2082. pdev = ethdev->pdev;
  2083. if (!pdev)
  2084. return NULL;
  2085. dev_hold(dev);
  2086. pci_dev_get(pdev);
  2087. if (pdev->device == PCI_DEVICE_ID_NX2_5709 ||
  2088. pdev->device == PCI_DEVICE_ID_NX2_5709S) {
  2089. u8 rev;
  2090. pci_read_config_byte(pdev, PCI_REVISION_ID, &rev);
  2091. if (rev < 0x10) {
  2092. pci_dev_put(pdev);
  2093. goto cnic_err;
  2094. }
  2095. }
  2096. pci_dev_put(pdev);
  2097. cdev = cnic_alloc_dev(dev, pdev);
  2098. if (cdev == NULL)
  2099. goto cnic_err;
  2100. set_bit(CNIC_F_BNX2_CLASS, &cdev->flags);
  2101. cdev->submit_kwqes = cnic_submit_bnx2_kwqes;
  2102. cp = cdev->cnic_priv;
  2103. cp->ethdev = ethdev;
  2104. cdev->pcidev = pdev;
  2105. cp->cnic_ops = &cnic_bnx2_ops;
  2106. cp->start_hw = cnic_start_bnx2_hw;
  2107. cp->stop_hw = cnic_stop_bnx2_hw;
  2108. cp->setup_pgtbl = cnic_setup_page_tbl;
  2109. cp->alloc_resc = cnic_alloc_bnx2_resc;
  2110. cp->free_resc = cnic_free_resc;
  2111. cp->start_cm = cnic_cm_init_bnx2_hw;
  2112. cp->stop_cm = cnic_cm_stop_bnx2_hw;
  2113. cp->enable_int = cnic_enable_bnx2_int;
  2114. cp->disable_int_sync = cnic_disable_bnx2_int_sync;
  2115. cp->close_conn = cnic_close_bnx2_conn;
  2116. cp->next_idx = cnic_bnx2_next_idx;
  2117. cp->hw_idx = cnic_bnx2_hw_idx;
  2118. return cdev;
  2119. cnic_err:
  2120. dev_put(dev);
  2121. return NULL;
  2122. }
  2123. static struct cnic_dev *is_cnic_dev(struct net_device *dev)
  2124. {
  2125. struct ethtool_drvinfo drvinfo;
  2126. struct cnic_dev *cdev = NULL;
  2127. if (dev->ethtool_ops && dev->ethtool_ops->get_drvinfo) {
  2128. memset(&drvinfo, 0, sizeof(drvinfo));
  2129. dev->ethtool_ops->get_drvinfo(dev, &drvinfo);
  2130. if (!strcmp(drvinfo.driver, "bnx2"))
  2131. cdev = init_bnx2_cnic(dev);
  2132. if (cdev) {
  2133. write_lock(&cnic_dev_lock);
  2134. list_add(&cdev->list, &cnic_dev_list);
  2135. write_unlock(&cnic_dev_lock);
  2136. }
  2137. }
  2138. return cdev;
  2139. }
  2140. /**
  2141. * netdev event handler
  2142. */
  2143. static int cnic_netdev_event(struct notifier_block *this, unsigned long event,
  2144. void *ptr)
  2145. {
  2146. struct net_device *netdev = ptr;
  2147. struct cnic_dev *dev;
  2148. int if_type;
  2149. int new_dev = 0;
  2150. dev = cnic_from_netdev(netdev);
  2151. if (!dev && (event == NETDEV_REGISTER || event == NETDEV_UP)) {
  2152. /* Check for the hot-plug device */
  2153. dev = is_cnic_dev(netdev);
  2154. if (dev) {
  2155. new_dev = 1;
  2156. cnic_hold(dev);
  2157. }
  2158. }
  2159. if (dev) {
  2160. struct cnic_local *cp = dev->cnic_priv;
  2161. if (new_dev)
  2162. cnic_ulp_init(dev);
  2163. else if (event == NETDEV_UNREGISTER)
  2164. cnic_ulp_exit(dev);
  2165. else if (event == NETDEV_UP) {
  2166. mutex_lock(&cnic_lock);
  2167. if (!cnic_start_hw(dev))
  2168. cnic_ulp_start(dev);
  2169. mutex_unlock(&cnic_lock);
  2170. }
  2171. rcu_read_lock();
  2172. for (if_type = 0; if_type < MAX_CNIC_ULP_TYPE; if_type++) {
  2173. struct cnic_ulp_ops *ulp_ops;
  2174. void *ctx;
  2175. ulp_ops = rcu_dereference(cp->ulp_ops[if_type]);
  2176. if (!ulp_ops || !ulp_ops->indicate_netevent)
  2177. continue;
  2178. ctx = cp->ulp_handle[if_type];
  2179. ulp_ops->indicate_netevent(ctx, event);
  2180. }
  2181. rcu_read_unlock();
  2182. if (event == NETDEV_GOING_DOWN) {
  2183. mutex_lock(&cnic_lock);
  2184. cnic_ulp_stop(dev);
  2185. cnic_stop_hw(dev);
  2186. mutex_unlock(&cnic_lock);
  2187. } else if (event == NETDEV_UNREGISTER) {
  2188. write_lock(&cnic_dev_lock);
  2189. list_del_init(&dev->list);
  2190. write_unlock(&cnic_dev_lock);
  2191. cnic_put(dev);
  2192. cnic_free_dev(dev);
  2193. goto done;
  2194. }
  2195. cnic_put(dev);
  2196. }
  2197. done:
  2198. return NOTIFY_DONE;
  2199. }
  2200. static struct notifier_block cnic_netdev_notifier = {
  2201. .notifier_call = cnic_netdev_event
  2202. };
  2203. static void cnic_release(void)
  2204. {
  2205. struct cnic_dev *dev;
  2206. while (!list_empty(&cnic_dev_list)) {
  2207. dev = list_entry(cnic_dev_list.next, struct cnic_dev, list);
  2208. if (test_bit(CNIC_F_CNIC_UP, &dev->flags)) {
  2209. cnic_ulp_stop(dev);
  2210. cnic_stop_hw(dev);
  2211. }
  2212. cnic_ulp_exit(dev);
  2213. list_del_init(&dev->list);
  2214. cnic_free_dev(dev);
  2215. }
  2216. }
  2217. static int __init cnic_init(void)
  2218. {
  2219. int rc = 0;
  2220. printk(KERN_INFO "%s", version);
  2221. rc = register_netdevice_notifier(&cnic_netdev_notifier);
  2222. if (rc) {
  2223. cnic_release();
  2224. return rc;
  2225. }
  2226. return 0;
  2227. }
  2228. static void __exit cnic_exit(void)
  2229. {
  2230. unregister_netdevice_notifier(&cnic_netdev_notifier);
  2231. cnic_release();
  2232. return;
  2233. }
  2234. module_init(cnic_init);
  2235. module_exit(cnic_exit);