intel_dp_mst.c 19 KB

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  1. /*
  2. * Copyright © 2008 Intel Corporation
  3. * 2014 Red Hat Inc.
  4. *
  5. * Permission is hereby granted, free of charge, to any person obtaining a
  6. * copy of this software and associated documentation files (the "Software"),
  7. * to deal in the Software without restriction, including without limitation
  8. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  9. * and/or sell copies of the Software, and to permit persons to whom the
  10. * Software is furnished to do so, subject to the following conditions:
  11. *
  12. * The above copyright notice and this permission notice (including the next
  13. * paragraph) shall be included in all copies or substantial portions of the
  14. * Software.
  15. *
  16. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  22. * IN THE SOFTWARE.
  23. *
  24. */
  25. #include <drm/drmP.h>
  26. #include "i915_drv.h"
  27. #include "intel_drv.h"
  28. #include <drm/drm_atomic_helper.h>
  29. #include <drm/drm_crtc_helper.h>
  30. #include <drm/drm_edid.h>
  31. static bool intel_dp_mst_compute_config(struct intel_encoder *encoder,
  32. struct intel_crtc_state *pipe_config,
  33. struct drm_connector_state *conn_state)
  34. {
  35. struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
  36. struct intel_digital_port *intel_dig_port = intel_mst->primary;
  37. struct intel_dp *intel_dp = &intel_dig_port->dp;
  38. struct intel_connector *connector =
  39. to_intel_connector(conn_state->connector);
  40. struct drm_atomic_state *state = pipe_config->base.state;
  41. int bpp;
  42. int lane_count, slots;
  43. const struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
  44. int mst_pbn;
  45. pipe_config->has_pch_encoder = false;
  46. bpp = 24;
  47. if (intel_dp->compliance.test_data.bpc) {
  48. bpp = intel_dp->compliance.test_data.bpc * 3;
  49. DRM_DEBUG_KMS("Setting pipe bpp to %d\n",
  50. bpp);
  51. }
  52. /*
  53. * for MST we always configure max link bw - the spec doesn't
  54. * seem to suggest we should do otherwise.
  55. */
  56. lane_count = drm_dp_max_lane_count(intel_dp->dpcd);
  57. pipe_config->lane_count = lane_count;
  58. pipe_config->pipe_bpp = bpp;
  59. pipe_config->port_clock = intel_dp_max_link_rate(intel_dp);
  60. if (drm_dp_mst_port_has_audio(&intel_dp->mst_mgr, connector->port))
  61. pipe_config->has_audio = true;
  62. mst_pbn = drm_dp_calc_pbn_mode(adjusted_mode->crtc_clock, bpp);
  63. pipe_config->pbn = mst_pbn;
  64. slots = drm_dp_atomic_find_vcpi_slots(state, &intel_dp->mst_mgr,
  65. connector->port, mst_pbn);
  66. if (slots < 0) {
  67. DRM_DEBUG_KMS("failed finding vcpi slots:%d\n", slots);
  68. return false;
  69. }
  70. intel_link_compute_m_n(bpp, lane_count,
  71. adjusted_mode->crtc_clock,
  72. pipe_config->port_clock,
  73. &pipe_config->dp_m_n);
  74. pipe_config->dp_m_n.tu = slots;
  75. return true;
  76. }
  77. static int intel_dp_mst_atomic_check(struct drm_connector *connector,
  78. struct drm_connector_state *new_conn_state)
  79. {
  80. struct drm_atomic_state *state = new_conn_state->state;
  81. struct drm_connector_state *old_conn_state;
  82. struct drm_crtc *old_crtc;
  83. struct drm_crtc_state *crtc_state;
  84. int slots, ret = 0;
  85. old_conn_state = drm_atomic_get_old_connector_state(state, connector);
  86. old_crtc = old_conn_state->crtc;
  87. if (!old_crtc)
  88. return ret;
  89. crtc_state = drm_atomic_get_new_crtc_state(state, old_crtc);
  90. slots = to_intel_crtc_state(crtc_state)->dp_m_n.tu;
  91. if (drm_atomic_crtc_needs_modeset(crtc_state) && slots > 0) {
  92. struct drm_dp_mst_topology_mgr *mgr;
  93. struct drm_encoder *old_encoder;
  94. old_encoder = old_conn_state->best_encoder;
  95. mgr = &enc_to_mst(old_encoder)->primary->dp.mst_mgr;
  96. ret = drm_dp_atomic_release_vcpi_slots(state, mgr, slots);
  97. if (ret)
  98. DRM_DEBUG_KMS("failed releasing %d vcpi slots:%d\n", slots, ret);
  99. else
  100. to_intel_crtc_state(crtc_state)->dp_m_n.tu = 0;
  101. }
  102. return ret;
  103. }
  104. static void intel_mst_disable_dp(struct intel_encoder *encoder,
  105. struct intel_crtc_state *old_crtc_state,
  106. struct drm_connector_state *old_conn_state)
  107. {
  108. struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
  109. struct intel_digital_port *intel_dig_port = intel_mst->primary;
  110. struct intel_dp *intel_dp = &intel_dig_port->dp;
  111. struct intel_connector *connector =
  112. to_intel_connector(old_conn_state->connector);
  113. int ret;
  114. DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links);
  115. drm_dp_mst_reset_vcpi_slots(&intel_dp->mst_mgr, connector->port);
  116. ret = drm_dp_update_payload_part1(&intel_dp->mst_mgr);
  117. if (ret) {
  118. DRM_ERROR("failed to update payload %d\n", ret);
  119. }
  120. if (old_crtc_state->has_audio)
  121. intel_audio_codec_disable(encoder);
  122. }
  123. static void intel_mst_post_disable_dp(struct intel_encoder *encoder,
  124. struct intel_crtc_state *old_crtc_state,
  125. struct drm_connector_state *old_conn_state)
  126. {
  127. struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
  128. struct intel_digital_port *intel_dig_port = intel_mst->primary;
  129. struct intel_dp *intel_dp = &intel_dig_port->dp;
  130. struct intel_connector *connector =
  131. to_intel_connector(old_conn_state->connector);
  132. DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links);
  133. /* this can fail */
  134. drm_dp_check_act_status(&intel_dp->mst_mgr);
  135. /* and this can also fail */
  136. drm_dp_update_payload_part2(&intel_dp->mst_mgr);
  137. drm_dp_mst_deallocate_vcpi(&intel_dp->mst_mgr, connector->port);
  138. intel_dp->active_mst_links--;
  139. intel_mst->connector = NULL;
  140. if (intel_dp->active_mst_links == 0) {
  141. intel_dig_port->base.post_disable(&intel_dig_port->base,
  142. NULL, NULL);
  143. intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_OFF);
  144. }
  145. }
  146. static void intel_mst_pre_enable_dp(struct intel_encoder *encoder,
  147. struct intel_crtc_state *pipe_config,
  148. struct drm_connector_state *conn_state)
  149. {
  150. struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
  151. struct intel_digital_port *intel_dig_port = intel_mst->primary;
  152. struct intel_dp *intel_dp = &intel_dig_port->dp;
  153. struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
  154. enum port port = intel_dig_port->port;
  155. struct intel_connector *connector =
  156. to_intel_connector(conn_state->connector);
  157. int ret;
  158. uint32_t temp;
  159. /* MST encoders are bound to a crtc, not to a connector,
  160. * force the mapping here for get_hw_state.
  161. */
  162. connector->encoder = encoder;
  163. intel_mst->connector = connector;
  164. DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links);
  165. if (intel_dp->active_mst_links == 0)
  166. intel_dig_port->base.pre_enable(&intel_dig_port->base,
  167. pipe_config, NULL);
  168. ret = drm_dp_mst_allocate_vcpi(&intel_dp->mst_mgr,
  169. connector->port,
  170. pipe_config->pbn,
  171. pipe_config->dp_m_n.tu);
  172. if (ret == false) {
  173. DRM_ERROR("failed to allocate vcpi\n");
  174. return;
  175. }
  176. intel_dp->active_mst_links++;
  177. temp = I915_READ(DP_TP_STATUS(port));
  178. I915_WRITE(DP_TP_STATUS(port), temp);
  179. ret = drm_dp_update_payload_part1(&intel_dp->mst_mgr);
  180. }
  181. static void intel_mst_enable_dp(struct intel_encoder *encoder,
  182. struct intel_crtc_state *pipe_config,
  183. struct drm_connector_state *conn_state)
  184. {
  185. struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
  186. struct intel_digital_port *intel_dig_port = intel_mst->primary;
  187. struct intel_dp *intel_dp = &intel_dig_port->dp;
  188. struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
  189. enum port port = intel_dig_port->port;
  190. int ret;
  191. DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links);
  192. if (intel_wait_for_register(dev_priv,
  193. DP_TP_STATUS(port),
  194. DP_TP_STATUS_ACT_SENT,
  195. DP_TP_STATUS_ACT_SENT,
  196. 1))
  197. DRM_ERROR("Timed out waiting for ACT sent\n");
  198. ret = drm_dp_check_act_status(&intel_dp->mst_mgr);
  199. ret = drm_dp_update_payload_part2(&intel_dp->mst_mgr);
  200. if (pipe_config->has_audio)
  201. intel_audio_codec_enable(encoder, pipe_config, conn_state);
  202. }
  203. static bool intel_dp_mst_enc_get_hw_state(struct intel_encoder *encoder,
  204. enum pipe *pipe)
  205. {
  206. struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
  207. *pipe = intel_mst->pipe;
  208. if (intel_mst->connector)
  209. return true;
  210. return false;
  211. }
  212. static void intel_dp_mst_enc_get_config(struct intel_encoder *encoder,
  213. struct intel_crtc_state *pipe_config)
  214. {
  215. struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
  216. struct intel_digital_port *intel_dig_port = intel_mst->primary;
  217. struct intel_crtc *crtc = to_intel_crtc(pipe_config->base.crtc);
  218. struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
  219. enum transcoder cpu_transcoder = pipe_config->cpu_transcoder;
  220. u32 temp, flags = 0;
  221. pipe_config->has_audio =
  222. intel_ddi_is_audio_enabled(dev_priv, crtc);
  223. temp = I915_READ(TRANS_DDI_FUNC_CTL(cpu_transcoder));
  224. if (temp & TRANS_DDI_PHSYNC)
  225. flags |= DRM_MODE_FLAG_PHSYNC;
  226. else
  227. flags |= DRM_MODE_FLAG_NHSYNC;
  228. if (temp & TRANS_DDI_PVSYNC)
  229. flags |= DRM_MODE_FLAG_PVSYNC;
  230. else
  231. flags |= DRM_MODE_FLAG_NVSYNC;
  232. switch (temp & TRANS_DDI_BPC_MASK) {
  233. case TRANS_DDI_BPC_6:
  234. pipe_config->pipe_bpp = 18;
  235. break;
  236. case TRANS_DDI_BPC_8:
  237. pipe_config->pipe_bpp = 24;
  238. break;
  239. case TRANS_DDI_BPC_10:
  240. pipe_config->pipe_bpp = 30;
  241. break;
  242. case TRANS_DDI_BPC_12:
  243. pipe_config->pipe_bpp = 36;
  244. break;
  245. default:
  246. break;
  247. }
  248. pipe_config->base.adjusted_mode.flags |= flags;
  249. pipe_config->lane_count =
  250. ((temp & DDI_PORT_WIDTH_MASK) >> DDI_PORT_WIDTH_SHIFT) + 1;
  251. intel_dp_get_m_n(crtc, pipe_config);
  252. intel_ddi_clock_get(&intel_dig_port->base, pipe_config);
  253. }
  254. static int intel_dp_mst_get_ddc_modes(struct drm_connector *connector)
  255. {
  256. struct intel_connector *intel_connector = to_intel_connector(connector);
  257. struct intel_dp *intel_dp = intel_connector->mst_port;
  258. struct edid *edid;
  259. int ret;
  260. if (!intel_dp) {
  261. return intel_connector_update_modes(connector, NULL);
  262. }
  263. edid = drm_dp_mst_get_edid(connector, &intel_dp->mst_mgr, intel_connector->port);
  264. ret = intel_connector_update_modes(connector, edid);
  265. kfree(edid);
  266. return ret;
  267. }
  268. static enum drm_connector_status
  269. intel_dp_mst_detect(struct drm_connector *connector, bool force)
  270. {
  271. struct intel_connector *intel_connector = to_intel_connector(connector);
  272. struct intel_dp *intel_dp = intel_connector->mst_port;
  273. if (!intel_dp)
  274. return connector_status_disconnected;
  275. return drm_dp_mst_detect_port(connector, &intel_dp->mst_mgr, intel_connector->port);
  276. }
  277. static int
  278. intel_dp_mst_set_property(struct drm_connector *connector,
  279. struct drm_property *property,
  280. uint64_t val)
  281. {
  282. return 0;
  283. }
  284. static void
  285. intel_dp_mst_connector_destroy(struct drm_connector *connector)
  286. {
  287. struct intel_connector *intel_connector = to_intel_connector(connector);
  288. if (!IS_ERR_OR_NULL(intel_connector->edid))
  289. kfree(intel_connector->edid);
  290. drm_connector_cleanup(connector);
  291. kfree(connector);
  292. }
  293. static const struct drm_connector_funcs intel_dp_mst_connector_funcs = {
  294. .dpms = drm_atomic_helper_connector_dpms,
  295. .detect = intel_dp_mst_detect,
  296. .fill_modes = drm_helper_probe_single_connector_modes,
  297. .set_property = intel_dp_mst_set_property,
  298. .atomic_get_property = intel_connector_atomic_get_property,
  299. .late_register = intel_connector_register,
  300. .early_unregister = intel_connector_unregister,
  301. .destroy = intel_dp_mst_connector_destroy,
  302. .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
  303. .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
  304. };
  305. static int intel_dp_mst_get_modes(struct drm_connector *connector)
  306. {
  307. return intel_dp_mst_get_ddc_modes(connector);
  308. }
  309. static enum drm_mode_status
  310. intel_dp_mst_mode_valid(struct drm_connector *connector,
  311. struct drm_display_mode *mode)
  312. {
  313. struct intel_connector *intel_connector = to_intel_connector(connector);
  314. struct intel_dp *intel_dp = intel_connector->mst_port;
  315. int max_dotclk = to_i915(connector->dev)->max_dotclk_freq;
  316. int bpp = 24; /* MST uses fixed bpp */
  317. int max_rate, mode_rate, max_lanes, max_link_clock;
  318. max_link_clock = intel_dp_max_link_rate(intel_dp);
  319. max_lanes = drm_dp_max_lane_count(intel_dp->dpcd);
  320. max_rate = intel_dp_max_data_rate(max_link_clock, max_lanes);
  321. mode_rate = intel_dp_link_required(mode->clock, bpp);
  322. /* TODO - validate mode against available PBN for link */
  323. if (mode->clock < 10000)
  324. return MODE_CLOCK_LOW;
  325. if (mode->flags & DRM_MODE_FLAG_DBLCLK)
  326. return MODE_H_ILLEGAL;
  327. if (mode_rate > max_rate || mode->clock > max_dotclk)
  328. return MODE_CLOCK_HIGH;
  329. return MODE_OK;
  330. }
  331. static struct drm_encoder *intel_mst_atomic_best_encoder(struct drm_connector *connector,
  332. struct drm_connector_state *state)
  333. {
  334. struct intel_connector *intel_connector = to_intel_connector(connector);
  335. struct intel_dp *intel_dp = intel_connector->mst_port;
  336. struct intel_crtc *crtc = to_intel_crtc(state->crtc);
  337. if (!intel_dp)
  338. return NULL;
  339. return &intel_dp->mst_encoders[crtc->pipe]->base.base;
  340. }
  341. static struct drm_encoder *intel_mst_best_encoder(struct drm_connector *connector)
  342. {
  343. struct intel_connector *intel_connector = to_intel_connector(connector);
  344. struct intel_dp *intel_dp = intel_connector->mst_port;
  345. if (!intel_dp)
  346. return NULL;
  347. return &intel_dp->mst_encoders[0]->base.base;
  348. }
  349. static const struct drm_connector_helper_funcs intel_dp_mst_connector_helper_funcs = {
  350. .get_modes = intel_dp_mst_get_modes,
  351. .mode_valid = intel_dp_mst_mode_valid,
  352. .atomic_best_encoder = intel_mst_atomic_best_encoder,
  353. .best_encoder = intel_mst_best_encoder,
  354. .atomic_check = intel_dp_mst_atomic_check,
  355. };
  356. static void intel_dp_mst_encoder_destroy(struct drm_encoder *encoder)
  357. {
  358. struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
  359. drm_encoder_cleanup(encoder);
  360. kfree(intel_mst);
  361. }
  362. static const struct drm_encoder_funcs intel_dp_mst_enc_funcs = {
  363. .destroy = intel_dp_mst_encoder_destroy,
  364. };
  365. static bool intel_dp_mst_get_hw_state(struct intel_connector *connector)
  366. {
  367. if (connector->encoder && connector->base.state->crtc) {
  368. enum pipe pipe;
  369. if (!connector->encoder->get_hw_state(connector->encoder, &pipe))
  370. return false;
  371. return true;
  372. }
  373. return false;
  374. }
  375. static void intel_connector_add_to_fbdev(struct intel_connector *connector)
  376. {
  377. #ifdef CONFIG_DRM_FBDEV_EMULATION
  378. struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  379. if (dev_priv->fbdev)
  380. drm_fb_helper_add_one_connector(&dev_priv->fbdev->helper,
  381. &connector->base);
  382. #endif
  383. }
  384. static void intel_connector_remove_from_fbdev(struct intel_connector *connector)
  385. {
  386. #ifdef CONFIG_DRM_FBDEV_EMULATION
  387. struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  388. if (dev_priv->fbdev)
  389. drm_fb_helper_remove_one_connector(&dev_priv->fbdev->helper,
  390. &connector->base);
  391. #endif
  392. }
  393. static struct drm_connector *intel_dp_add_mst_connector(struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port, const char *pathprop)
  394. {
  395. struct intel_dp *intel_dp = container_of(mgr, struct intel_dp, mst_mgr);
  396. struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
  397. struct drm_device *dev = intel_dig_port->base.base.dev;
  398. struct intel_connector *intel_connector;
  399. struct drm_connector *connector;
  400. int i;
  401. intel_connector = intel_connector_alloc();
  402. if (!intel_connector)
  403. return NULL;
  404. connector = &intel_connector->base;
  405. drm_connector_init(dev, connector, &intel_dp_mst_connector_funcs, DRM_MODE_CONNECTOR_DisplayPort);
  406. drm_connector_helper_add(connector, &intel_dp_mst_connector_helper_funcs);
  407. intel_connector->get_hw_state = intel_dp_mst_get_hw_state;
  408. intel_connector->mst_port = intel_dp;
  409. intel_connector->port = port;
  410. for (i = PIPE_A; i <= PIPE_C; i++) {
  411. drm_mode_connector_attach_encoder(&intel_connector->base,
  412. &intel_dp->mst_encoders[i]->base.base);
  413. }
  414. intel_dp_add_properties(intel_dp, connector);
  415. drm_object_attach_property(&connector->base, dev->mode_config.path_property, 0);
  416. drm_object_attach_property(&connector->base, dev->mode_config.tile_property, 0);
  417. drm_mode_connector_set_path_property(connector, pathprop);
  418. return connector;
  419. }
  420. static void intel_dp_register_mst_connector(struct drm_connector *connector)
  421. {
  422. struct intel_connector *intel_connector = to_intel_connector(connector);
  423. struct drm_device *dev = connector->dev;
  424. drm_modeset_lock_all(dev);
  425. intel_connector_add_to_fbdev(intel_connector);
  426. drm_modeset_unlock_all(dev);
  427. drm_connector_register(&intel_connector->base);
  428. }
  429. static void intel_dp_destroy_mst_connector(struct drm_dp_mst_topology_mgr *mgr,
  430. struct drm_connector *connector)
  431. {
  432. struct intel_connector *intel_connector = to_intel_connector(connector);
  433. struct drm_device *dev = connector->dev;
  434. drm_connector_unregister(connector);
  435. /* need to nuke the connector */
  436. drm_modeset_lock_all(dev);
  437. intel_connector_remove_from_fbdev(intel_connector);
  438. intel_connector->mst_port = NULL;
  439. drm_modeset_unlock_all(dev);
  440. drm_connector_unreference(&intel_connector->base);
  441. DRM_DEBUG_KMS("\n");
  442. }
  443. static void intel_dp_mst_hotplug(struct drm_dp_mst_topology_mgr *mgr)
  444. {
  445. struct intel_dp *intel_dp = container_of(mgr, struct intel_dp, mst_mgr);
  446. struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
  447. struct drm_device *dev = intel_dig_port->base.base.dev;
  448. drm_kms_helper_hotplug_event(dev);
  449. }
  450. static const struct drm_dp_mst_topology_cbs mst_cbs = {
  451. .add_connector = intel_dp_add_mst_connector,
  452. .register_connector = intel_dp_register_mst_connector,
  453. .destroy_connector = intel_dp_destroy_mst_connector,
  454. .hotplug = intel_dp_mst_hotplug,
  455. };
  456. static struct intel_dp_mst_encoder *
  457. intel_dp_create_fake_mst_encoder(struct intel_digital_port *intel_dig_port, enum pipe pipe)
  458. {
  459. struct intel_dp_mst_encoder *intel_mst;
  460. struct intel_encoder *intel_encoder;
  461. struct drm_device *dev = intel_dig_port->base.base.dev;
  462. intel_mst = kzalloc(sizeof(*intel_mst), GFP_KERNEL);
  463. if (!intel_mst)
  464. return NULL;
  465. intel_mst->pipe = pipe;
  466. intel_encoder = &intel_mst->base;
  467. intel_mst->primary = intel_dig_port;
  468. drm_encoder_init(dev, &intel_encoder->base, &intel_dp_mst_enc_funcs,
  469. DRM_MODE_ENCODER_DPMST, "DP-MST %c", pipe_name(pipe));
  470. intel_encoder->type = INTEL_OUTPUT_DP_MST;
  471. intel_encoder->power_domain = intel_dig_port->base.power_domain;
  472. intel_encoder->port = intel_dig_port->port;
  473. intel_encoder->crtc_mask = 0x7;
  474. intel_encoder->cloneable = 0;
  475. intel_encoder->compute_config = intel_dp_mst_compute_config;
  476. intel_encoder->disable = intel_mst_disable_dp;
  477. intel_encoder->post_disable = intel_mst_post_disable_dp;
  478. intel_encoder->pre_enable = intel_mst_pre_enable_dp;
  479. intel_encoder->enable = intel_mst_enable_dp;
  480. intel_encoder->get_hw_state = intel_dp_mst_enc_get_hw_state;
  481. intel_encoder->get_config = intel_dp_mst_enc_get_config;
  482. return intel_mst;
  483. }
  484. static bool
  485. intel_dp_create_fake_mst_encoders(struct intel_digital_port *intel_dig_port)
  486. {
  487. int i;
  488. struct intel_dp *intel_dp = &intel_dig_port->dp;
  489. for (i = PIPE_A; i <= PIPE_C; i++)
  490. intel_dp->mst_encoders[i] = intel_dp_create_fake_mst_encoder(intel_dig_port, i);
  491. return true;
  492. }
  493. int
  494. intel_dp_mst_encoder_init(struct intel_digital_port *intel_dig_port, int conn_base_id)
  495. {
  496. struct intel_dp *intel_dp = &intel_dig_port->dp;
  497. struct drm_device *dev = intel_dig_port->base.base.dev;
  498. int ret;
  499. intel_dp->can_mst = true;
  500. intel_dp->mst_mgr.cbs = &mst_cbs;
  501. /* create encoders */
  502. intel_dp_create_fake_mst_encoders(intel_dig_port);
  503. ret = drm_dp_mst_topology_mgr_init(&intel_dp->mst_mgr, dev,
  504. &intel_dp->aux, 16, 3, conn_base_id);
  505. if (ret) {
  506. intel_dp->can_mst = false;
  507. return ret;
  508. }
  509. return 0;
  510. }
  511. void
  512. intel_dp_mst_encoder_cleanup(struct intel_digital_port *intel_dig_port)
  513. {
  514. struct intel_dp *intel_dp = &intel_dig_port->dp;
  515. if (!intel_dp->can_mst)
  516. return;
  517. drm_dp_mst_topology_mgr_destroy(&intel_dp->mst_mgr);
  518. /* encoders will get killed by normal cleanup */
  519. }