core.c 61 KB

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  1. /*
  2. * NVM Express device driver
  3. * Copyright (c) 2011-2014, Intel Corporation.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms and conditions of the GNU General Public License,
  7. * version 2, as published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. */
  14. #include <linux/blkdev.h>
  15. #include <linux/blk-mq.h>
  16. #include <linux/delay.h>
  17. #include <linux/errno.h>
  18. #include <linux/hdreg.h>
  19. #include <linux/kernel.h>
  20. #include <linux/module.h>
  21. #include <linux/list_sort.h>
  22. #include <linux/slab.h>
  23. #include <linux/types.h>
  24. #include <linux/pr.h>
  25. #include <linux/ptrace.h>
  26. #include <linux/nvme_ioctl.h>
  27. #include <linux/t10-pi.h>
  28. #include <linux/pm_qos.h>
  29. #include <scsi/sg.h>
  30. #include <asm/unaligned.h>
  31. #include "nvme.h"
  32. #include "fabrics.h"
  33. #define NVME_MINORS (1U << MINORBITS)
  34. unsigned char admin_timeout = 60;
  35. module_param(admin_timeout, byte, 0644);
  36. MODULE_PARM_DESC(admin_timeout, "timeout in seconds for admin commands");
  37. EXPORT_SYMBOL_GPL(admin_timeout);
  38. unsigned char nvme_io_timeout = 30;
  39. module_param_named(io_timeout, nvme_io_timeout, byte, 0644);
  40. MODULE_PARM_DESC(io_timeout, "timeout in seconds for I/O");
  41. EXPORT_SYMBOL_GPL(nvme_io_timeout);
  42. unsigned char shutdown_timeout = 5;
  43. module_param(shutdown_timeout, byte, 0644);
  44. MODULE_PARM_DESC(shutdown_timeout, "timeout in seconds for controller shutdown");
  45. static u8 nvme_max_retries = 5;
  46. module_param_named(max_retries, nvme_max_retries, byte, 0644);
  47. MODULE_PARM_DESC(max_retries, "max number of retries a command may have");
  48. static int nvme_char_major;
  49. module_param(nvme_char_major, int, 0);
  50. static unsigned long default_ps_max_latency_us = 25000;
  51. module_param(default_ps_max_latency_us, ulong, 0644);
  52. MODULE_PARM_DESC(default_ps_max_latency_us,
  53. "max power saving latency for new devices; use PM QOS to change per device");
  54. static LIST_HEAD(nvme_ctrl_list);
  55. static DEFINE_SPINLOCK(dev_list_lock);
  56. static struct class *nvme_class;
  57. static inline bool nvme_req_needs_retry(struct request *req)
  58. {
  59. if (blk_noretry_request(req))
  60. return false;
  61. if (req->errors & NVME_SC_DNR)
  62. return false;
  63. if (jiffies - req->start_time >= req->timeout)
  64. return false;
  65. if (nvme_req(req)->retries >= nvme_max_retries)
  66. return false;
  67. return true;
  68. }
  69. void nvme_complete_rq(struct request *req)
  70. {
  71. int error = 0;
  72. if (unlikely(req->errors)) {
  73. if (nvme_req_needs_retry(req)) {
  74. nvme_req(req)->retries++;
  75. blk_mq_requeue_request(req,
  76. !blk_mq_queue_stopped(req->q));
  77. return;
  78. }
  79. if (blk_rq_is_passthrough(req))
  80. error = req->errors;
  81. else
  82. error = nvme_error_status(req->errors);
  83. }
  84. blk_mq_end_request(req, error);
  85. }
  86. EXPORT_SYMBOL_GPL(nvme_complete_rq);
  87. void nvme_cancel_request(struct request *req, void *data, bool reserved)
  88. {
  89. int status;
  90. if (!blk_mq_request_started(req))
  91. return;
  92. dev_dbg_ratelimited(((struct nvme_ctrl *) data)->device,
  93. "Cancelling I/O %d", req->tag);
  94. status = NVME_SC_ABORT_REQ;
  95. if (blk_queue_dying(req->q))
  96. status |= NVME_SC_DNR;
  97. blk_mq_complete_request(req, status);
  98. }
  99. EXPORT_SYMBOL_GPL(nvme_cancel_request);
  100. bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl,
  101. enum nvme_ctrl_state new_state)
  102. {
  103. enum nvme_ctrl_state old_state;
  104. bool changed = false;
  105. spin_lock_irq(&ctrl->lock);
  106. old_state = ctrl->state;
  107. switch (new_state) {
  108. case NVME_CTRL_LIVE:
  109. switch (old_state) {
  110. case NVME_CTRL_NEW:
  111. case NVME_CTRL_RESETTING:
  112. case NVME_CTRL_RECONNECTING:
  113. changed = true;
  114. /* FALLTHRU */
  115. default:
  116. break;
  117. }
  118. break;
  119. case NVME_CTRL_RESETTING:
  120. switch (old_state) {
  121. case NVME_CTRL_NEW:
  122. case NVME_CTRL_LIVE:
  123. case NVME_CTRL_RECONNECTING:
  124. changed = true;
  125. /* FALLTHRU */
  126. default:
  127. break;
  128. }
  129. break;
  130. case NVME_CTRL_RECONNECTING:
  131. switch (old_state) {
  132. case NVME_CTRL_LIVE:
  133. changed = true;
  134. /* FALLTHRU */
  135. default:
  136. break;
  137. }
  138. break;
  139. case NVME_CTRL_DELETING:
  140. switch (old_state) {
  141. case NVME_CTRL_LIVE:
  142. case NVME_CTRL_RESETTING:
  143. case NVME_CTRL_RECONNECTING:
  144. changed = true;
  145. /* FALLTHRU */
  146. default:
  147. break;
  148. }
  149. break;
  150. case NVME_CTRL_DEAD:
  151. switch (old_state) {
  152. case NVME_CTRL_DELETING:
  153. changed = true;
  154. /* FALLTHRU */
  155. default:
  156. break;
  157. }
  158. break;
  159. default:
  160. break;
  161. }
  162. if (changed)
  163. ctrl->state = new_state;
  164. spin_unlock_irq(&ctrl->lock);
  165. return changed;
  166. }
  167. EXPORT_SYMBOL_GPL(nvme_change_ctrl_state);
  168. static void nvme_free_ns(struct kref *kref)
  169. {
  170. struct nvme_ns *ns = container_of(kref, struct nvme_ns, kref);
  171. if (ns->ndev)
  172. nvme_nvm_unregister(ns);
  173. if (ns->disk) {
  174. spin_lock(&dev_list_lock);
  175. ns->disk->private_data = NULL;
  176. spin_unlock(&dev_list_lock);
  177. }
  178. put_disk(ns->disk);
  179. ida_simple_remove(&ns->ctrl->ns_ida, ns->instance);
  180. nvme_put_ctrl(ns->ctrl);
  181. kfree(ns);
  182. }
  183. static void nvme_put_ns(struct nvme_ns *ns)
  184. {
  185. kref_put(&ns->kref, nvme_free_ns);
  186. }
  187. static struct nvme_ns *nvme_get_ns_from_disk(struct gendisk *disk)
  188. {
  189. struct nvme_ns *ns;
  190. spin_lock(&dev_list_lock);
  191. ns = disk->private_data;
  192. if (ns) {
  193. if (!kref_get_unless_zero(&ns->kref))
  194. goto fail;
  195. if (!try_module_get(ns->ctrl->ops->module))
  196. goto fail_put_ns;
  197. }
  198. spin_unlock(&dev_list_lock);
  199. return ns;
  200. fail_put_ns:
  201. kref_put(&ns->kref, nvme_free_ns);
  202. fail:
  203. spin_unlock(&dev_list_lock);
  204. return NULL;
  205. }
  206. struct request *nvme_alloc_request(struct request_queue *q,
  207. struct nvme_command *cmd, unsigned int flags, int qid)
  208. {
  209. unsigned op = nvme_is_write(cmd) ? REQ_OP_DRV_OUT : REQ_OP_DRV_IN;
  210. struct request *req;
  211. if (qid == NVME_QID_ANY) {
  212. req = blk_mq_alloc_request(q, op, flags);
  213. } else {
  214. req = blk_mq_alloc_request_hctx(q, op, flags,
  215. qid ? qid - 1 : 0);
  216. }
  217. if (IS_ERR(req))
  218. return req;
  219. req->cmd_flags |= REQ_FAILFAST_DRIVER;
  220. nvme_req(req)->cmd = cmd;
  221. return req;
  222. }
  223. EXPORT_SYMBOL_GPL(nvme_alloc_request);
  224. static inline void nvme_setup_flush(struct nvme_ns *ns,
  225. struct nvme_command *cmnd)
  226. {
  227. memset(cmnd, 0, sizeof(*cmnd));
  228. cmnd->common.opcode = nvme_cmd_flush;
  229. cmnd->common.nsid = cpu_to_le32(ns->ns_id);
  230. }
  231. static inline int nvme_setup_discard(struct nvme_ns *ns, struct request *req,
  232. struct nvme_command *cmnd)
  233. {
  234. unsigned short segments = blk_rq_nr_discard_segments(req), n = 0;
  235. struct nvme_dsm_range *range;
  236. struct bio *bio;
  237. range = kmalloc_array(segments, sizeof(*range), GFP_ATOMIC);
  238. if (!range)
  239. return BLK_MQ_RQ_QUEUE_BUSY;
  240. __rq_for_each_bio(bio, req) {
  241. u64 slba = nvme_block_nr(ns, bio->bi_iter.bi_sector);
  242. u32 nlb = bio->bi_iter.bi_size >> ns->lba_shift;
  243. range[n].cattr = cpu_to_le32(0);
  244. range[n].nlb = cpu_to_le32(nlb);
  245. range[n].slba = cpu_to_le64(slba);
  246. n++;
  247. }
  248. if (WARN_ON_ONCE(n != segments)) {
  249. kfree(range);
  250. return BLK_MQ_RQ_QUEUE_ERROR;
  251. }
  252. memset(cmnd, 0, sizeof(*cmnd));
  253. cmnd->dsm.opcode = nvme_cmd_dsm;
  254. cmnd->dsm.nsid = cpu_to_le32(ns->ns_id);
  255. cmnd->dsm.nr = cpu_to_le32(segments - 1);
  256. cmnd->dsm.attributes = cpu_to_le32(NVME_DSMGMT_AD);
  257. req->special_vec.bv_page = virt_to_page(range);
  258. req->special_vec.bv_offset = offset_in_page(range);
  259. req->special_vec.bv_len = sizeof(*range) * segments;
  260. req->rq_flags |= RQF_SPECIAL_PAYLOAD;
  261. return BLK_MQ_RQ_QUEUE_OK;
  262. }
  263. static inline void nvme_setup_rw(struct nvme_ns *ns, struct request *req,
  264. struct nvme_command *cmnd)
  265. {
  266. u16 control = 0;
  267. u32 dsmgmt = 0;
  268. if (req->cmd_flags & REQ_FUA)
  269. control |= NVME_RW_FUA;
  270. if (req->cmd_flags & (REQ_FAILFAST_DEV | REQ_RAHEAD))
  271. control |= NVME_RW_LR;
  272. if (req->cmd_flags & REQ_RAHEAD)
  273. dsmgmt |= NVME_RW_DSM_FREQ_PREFETCH;
  274. memset(cmnd, 0, sizeof(*cmnd));
  275. cmnd->rw.opcode = (rq_data_dir(req) ? nvme_cmd_write : nvme_cmd_read);
  276. cmnd->rw.nsid = cpu_to_le32(ns->ns_id);
  277. cmnd->rw.slba = cpu_to_le64(nvme_block_nr(ns, blk_rq_pos(req)));
  278. cmnd->rw.length = cpu_to_le16((blk_rq_bytes(req) >> ns->lba_shift) - 1);
  279. if (ns->ms) {
  280. switch (ns->pi_type) {
  281. case NVME_NS_DPS_PI_TYPE3:
  282. control |= NVME_RW_PRINFO_PRCHK_GUARD;
  283. break;
  284. case NVME_NS_DPS_PI_TYPE1:
  285. case NVME_NS_DPS_PI_TYPE2:
  286. control |= NVME_RW_PRINFO_PRCHK_GUARD |
  287. NVME_RW_PRINFO_PRCHK_REF;
  288. cmnd->rw.reftag = cpu_to_le32(
  289. nvme_block_nr(ns, blk_rq_pos(req)));
  290. break;
  291. }
  292. if (!blk_integrity_rq(req))
  293. control |= NVME_RW_PRINFO_PRACT;
  294. }
  295. cmnd->rw.control = cpu_to_le16(control);
  296. cmnd->rw.dsmgmt = cpu_to_le32(dsmgmt);
  297. }
  298. int nvme_setup_cmd(struct nvme_ns *ns, struct request *req,
  299. struct nvme_command *cmd)
  300. {
  301. int ret = BLK_MQ_RQ_QUEUE_OK;
  302. if (!(req->rq_flags & RQF_DONTPREP)) {
  303. nvme_req(req)->retries = 0;
  304. req->rq_flags |= RQF_DONTPREP;
  305. }
  306. switch (req_op(req)) {
  307. case REQ_OP_DRV_IN:
  308. case REQ_OP_DRV_OUT:
  309. memcpy(cmd, nvme_req(req)->cmd, sizeof(*cmd));
  310. break;
  311. case REQ_OP_FLUSH:
  312. nvme_setup_flush(ns, cmd);
  313. break;
  314. case REQ_OP_WRITE_ZEROES:
  315. /* currently only aliased to deallocate for a few ctrls: */
  316. case REQ_OP_DISCARD:
  317. ret = nvme_setup_discard(ns, req, cmd);
  318. break;
  319. case REQ_OP_READ:
  320. case REQ_OP_WRITE:
  321. nvme_setup_rw(ns, req, cmd);
  322. break;
  323. default:
  324. WARN_ON_ONCE(1);
  325. return BLK_MQ_RQ_QUEUE_ERROR;
  326. }
  327. cmd->common.command_id = req->tag;
  328. return ret;
  329. }
  330. EXPORT_SYMBOL_GPL(nvme_setup_cmd);
  331. /*
  332. * Returns 0 on success. If the result is negative, it's a Linux error code;
  333. * if the result is positive, it's an NVM Express status code
  334. */
  335. int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
  336. union nvme_result *result, void *buffer, unsigned bufflen,
  337. unsigned timeout, int qid, int at_head, int flags)
  338. {
  339. struct request *req;
  340. int ret;
  341. req = nvme_alloc_request(q, cmd, flags, qid);
  342. if (IS_ERR(req))
  343. return PTR_ERR(req);
  344. req->timeout = timeout ? timeout : ADMIN_TIMEOUT;
  345. if (buffer && bufflen) {
  346. ret = blk_rq_map_kern(q, req, buffer, bufflen, GFP_KERNEL);
  347. if (ret)
  348. goto out;
  349. }
  350. blk_execute_rq(req->q, NULL, req, at_head);
  351. if (result)
  352. *result = nvme_req(req)->result;
  353. ret = req->errors;
  354. out:
  355. blk_mq_free_request(req);
  356. return ret;
  357. }
  358. EXPORT_SYMBOL_GPL(__nvme_submit_sync_cmd);
  359. int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
  360. void *buffer, unsigned bufflen)
  361. {
  362. return __nvme_submit_sync_cmd(q, cmd, NULL, buffer, bufflen, 0,
  363. NVME_QID_ANY, 0, 0);
  364. }
  365. EXPORT_SYMBOL_GPL(nvme_submit_sync_cmd);
  366. int __nvme_submit_user_cmd(struct request_queue *q, struct nvme_command *cmd,
  367. void __user *ubuffer, unsigned bufflen,
  368. void __user *meta_buffer, unsigned meta_len, u32 meta_seed,
  369. u32 *result, unsigned timeout)
  370. {
  371. bool write = nvme_is_write(cmd);
  372. struct nvme_ns *ns = q->queuedata;
  373. struct gendisk *disk = ns ? ns->disk : NULL;
  374. struct request *req;
  375. struct bio *bio = NULL;
  376. void *meta = NULL;
  377. int ret;
  378. req = nvme_alloc_request(q, cmd, 0, NVME_QID_ANY);
  379. if (IS_ERR(req))
  380. return PTR_ERR(req);
  381. req->timeout = timeout ? timeout : ADMIN_TIMEOUT;
  382. if (ubuffer && bufflen) {
  383. ret = blk_rq_map_user(q, req, NULL, ubuffer, bufflen,
  384. GFP_KERNEL);
  385. if (ret)
  386. goto out;
  387. bio = req->bio;
  388. if (!disk)
  389. goto submit;
  390. bio->bi_bdev = bdget_disk(disk, 0);
  391. if (!bio->bi_bdev) {
  392. ret = -ENODEV;
  393. goto out_unmap;
  394. }
  395. if (meta_buffer && meta_len) {
  396. struct bio_integrity_payload *bip;
  397. meta = kmalloc(meta_len, GFP_KERNEL);
  398. if (!meta) {
  399. ret = -ENOMEM;
  400. goto out_unmap;
  401. }
  402. if (write) {
  403. if (copy_from_user(meta, meta_buffer,
  404. meta_len)) {
  405. ret = -EFAULT;
  406. goto out_free_meta;
  407. }
  408. }
  409. bip = bio_integrity_alloc(bio, GFP_KERNEL, 1);
  410. if (IS_ERR(bip)) {
  411. ret = PTR_ERR(bip);
  412. goto out_free_meta;
  413. }
  414. bip->bip_iter.bi_size = meta_len;
  415. bip->bip_iter.bi_sector = meta_seed;
  416. ret = bio_integrity_add_page(bio, virt_to_page(meta),
  417. meta_len, offset_in_page(meta));
  418. if (ret != meta_len) {
  419. ret = -ENOMEM;
  420. goto out_free_meta;
  421. }
  422. }
  423. }
  424. submit:
  425. blk_execute_rq(req->q, disk, req, 0);
  426. ret = req->errors;
  427. if (result)
  428. *result = le32_to_cpu(nvme_req(req)->result.u32);
  429. if (meta && !ret && !write) {
  430. if (copy_to_user(meta_buffer, meta, meta_len))
  431. ret = -EFAULT;
  432. }
  433. out_free_meta:
  434. kfree(meta);
  435. out_unmap:
  436. if (bio) {
  437. if (disk && bio->bi_bdev)
  438. bdput(bio->bi_bdev);
  439. blk_rq_unmap_user(bio);
  440. }
  441. out:
  442. blk_mq_free_request(req);
  443. return ret;
  444. }
  445. int nvme_submit_user_cmd(struct request_queue *q, struct nvme_command *cmd,
  446. void __user *ubuffer, unsigned bufflen, u32 *result,
  447. unsigned timeout)
  448. {
  449. return __nvme_submit_user_cmd(q, cmd, ubuffer, bufflen, NULL, 0, 0,
  450. result, timeout);
  451. }
  452. static void nvme_keep_alive_end_io(struct request *rq, int error)
  453. {
  454. struct nvme_ctrl *ctrl = rq->end_io_data;
  455. blk_mq_free_request(rq);
  456. if (error) {
  457. dev_err(ctrl->device,
  458. "failed nvme_keep_alive_end_io error=%d\n", error);
  459. return;
  460. }
  461. schedule_delayed_work(&ctrl->ka_work, ctrl->kato * HZ);
  462. }
  463. static int nvme_keep_alive(struct nvme_ctrl *ctrl)
  464. {
  465. struct nvme_command c;
  466. struct request *rq;
  467. memset(&c, 0, sizeof(c));
  468. c.common.opcode = nvme_admin_keep_alive;
  469. rq = nvme_alloc_request(ctrl->admin_q, &c, BLK_MQ_REQ_RESERVED,
  470. NVME_QID_ANY);
  471. if (IS_ERR(rq))
  472. return PTR_ERR(rq);
  473. rq->timeout = ctrl->kato * HZ;
  474. rq->end_io_data = ctrl;
  475. blk_execute_rq_nowait(rq->q, NULL, rq, 0, nvme_keep_alive_end_io);
  476. return 0;
  477. }
  478. static void nvme_keep_alive_work(struct work_struct *work)
  479. {
  480. struct nvme_ctrl *ctrl = container_of(to_delayed_work(work),
  481. struct nvme_ctrl, ka_work);
  482. if (nvme_keep_alive(ctrl)) {
  483. /* allocation failure, reset the controller */
  484. dev_err(ctrl->device, "keep-alive failed\n");
  485. ctrl->ops->reset_ctrl(ctrl);
  486. return;
  487. }
  488. }
  489. void nvme_start_keep_alive(struct nvme_ctrl *ctrl)
  490. {
  491. if (unlikely(ctrl->kato == 0))
  492. return;
  493. INIT_DELAYED_WORK(&ctrl->ka_work, nvme_keep_alive_work);
  494. schedule_delayed_work(&ctrl->ka_work, ctrl->kato * HZ);
  495. }
  496. EXPORT_SYMBOL_GPL(nvme_start_keep_alive);
  497. void nvme_stop_keep_alive(struct nvme_ctrl *ctrl)
  498. {
  499. if (unlikely(ctrl->kato == 0))
  500. return;
  501. cancel_delayed_work_sync(&ctrl->ka_work);
  502. }
  503. EXPORT_SYMBOL_GPL(nvme_stop_keep_alive);
  504. int nvme_identify_ctrl(struct nvme_ctrl *dev, struct nvme_id_ctrl **id)
  505. {
  506. struct nvme_command c = { };
  507. int error;
  508. /* gcc-4.4.4 (at least) has issues with initializers and anon unions */
  509. c.identify.opcode = nvme_admin_identify;
  510. c.identify.cns = NVME_ID_CNS_CTRL;
  511. *id = kmalloc(sizeof(struct nvme_id_ctrl), GFP_KERNEL);
  512. if (!*id)
  513. return -ENOMEM;
  514. error = nvme_submit_sync_cmd(dev->admin_q, &c, *id,
  515. sizeof(struct nvme_id_ctrl));
  516. if (error)
  517. kfree(*id);
  518. return error;
  519. }
  520. static int nvme_identify_ns_list(struct nvme_ctrl *dev, unsigned nsid, __le32 *ns_list)
  521. {
  522. struct nvme_command c = { };
  523. c.identify.opcode = nvme_admin_identify;
  524. c.identify.cns = NVME_ID_CNS_NS_ACTIVE_LIST;
  525. c.identify.nsid = cpu_to_le32(nsid);
  526. return nvme_submit_sync_cmd(dev->admin_q, &c, ns_list, 0x1000);
  527. }
  528. int nvme_identify_ns(struct nvme_ctrl *dev, unsigned nsid,
  529. struct nvme_id_ns **id)
  530. {
  531. struct nvme_command c = { };
  532. int error;
  533. /* gcc-4.4.4 (at least) has issues with initializers and anon unions */
  534. c.identify.opcode = nvme_admin_identify;
  535. c.identify.nsid = cpu_to_le32(nsid);
  536. c.identify.cns = NVME_ID_CNS_NS;
  537. *id = kmalloc(sizeof(struct nvme_id_ns), GFP_KERNEL);
  538. if (!*id)
  539. return -ENOMEM;
  540. error = nvme_submit_sync_cmd(dev->admin_q, &c, *id,
  541. sizeof(struct nvme_id_ns));
  542. if (error)
  543. kfree(*id);
  544. return error;
  545. }
  546. int nvme_get_features(struct nvme_ctrl *dev, unsigned fid, unsigned nsid,
  547. void *buffer, size_t buflen, u32 *result)
  548. {
  549. struct nvme_command c;
  550. union nvme_result res;
  551. int ret;
  552. memset(&c, 0, sizeof(c));
  553. c.features.opcode = nvme_admin_get_features;
  554. c.features.nsid = cpu_to_le32(nsid);
  555. c.features.fid = cpu_to_le32(fid);
  556. ret = __nvme_submit_sync_cmd(dev->admin_q, &c, &res, buffer, buflen, 0,
  557. NVME_QID_ANY, 0, 0);
  558. if (ret >= 0 && result)
  559. *result = le32_to_cpu(res.u32);
  560. return ret;
  561. }
  562. int nvme_set_features(struct nvme_ctrl *dev, unsigned fid, unsigned dword11,
  563. void *buffer, size_t buflen, u32 *result)
  564. {
  565. struct nvme_command c;
  566. union nvme_result res;
  567. int ret;
  568. memset(&c, 0, sizeof(c));
  569. c.features.opcode = nvme_admin_set_features;
  570. c.features.fid = cpu_to_le32(fid);
  571. c.features.dword11 = cpu_to_le32(dword11);
  572. ret = __nvme_submit_sync_cmd(dev->admin_q, &c, &res,
  573. buffer, buflen, 0, NVME_QID_ANY, 0, 0);
  574. if (ret >= 0 && result)
  575. *result = le32_to_cpu(res.u32);
  576. return ret;
  577. }
  578. int nvme_get_log_page(struct nvme_ctrl *dev, struct nvme_smart_log **log)
  579. {
  580. struct nvme_command c = { };
  581. int error;
  582. c.common.opcode = nvme_admin_get_log_page,
  583. c.common.nsid = cpu_to_le32(0xFFFFFFFF),
  584. c.common.cdw10[0] = cpu_to_le32(
  585. (((sizeof(struct nvme_smart_log) / 4) - 1) << 16) |
  586. NVME_LOG_SMART),
  587. *log = kmalloc(sizeof(struct nvme_smart_log), GFP_KERNEL);
  588. if (!*log)
  589. return -ENOMEM;
  590. error = nvme_submit_sync_cmd(dev->admin_q, &c, *log,
  591. sizeof(struct nvme_smart_log));
  592. if (error)
  593. kfree(*log);
  594. return error;
  595. }
  596. int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count)
  597. {
  598. u32 q_count = (*count - 1) | ((*count - 1) << 16);
  599. u32 result;
  600. int status, nr_io_queues;
  601. status = nvme_set_features(ctrl, NVME_FEAT_NUM_QUEUES, q_count, NULL, 0,
  602. &result);
  603. if (status < 0)
  604. return status;
  605. /*
  606. * Degraded controllers might return an error when setting the queue
  607. * count. We still want to be able to bring them online and offer
  608. * access to the admin queue, as that might be only way to fix them up.
  609. */
  610. if (status > 0) {
  611. dev_err(ctrl->dev, "Could not set queue count (%d)\n", status);
  612. *count = 0;
  613. } else {
  614. nr_io_queues = min(result & 0xffff, result >> 16) + 1;
  615. *count = min(*count, nr_io_queues);
  616. }
  617. return 0;
  618. }
  619. EXPORT_SYMBOL_GPL(nvme_set_queue_count);
  620. static int nvme_submit_io(struct nvme_ns *ns, struct nvme_user_io __user *uio)
  621. {
  622. struct nvme_user_io io;
  623. struct nvme_command c;
  624. unsigned length, meta_len;
  625. void __user *metadata;
  626. if (copy_from_user(&io, uio, sizeof(io)))
  627. return -EFAULT;
  628. if (io.flags)
  629. return -EINVAL;
  630. switch (io.opcode) {
  631. case nvme_cmd_write:
  632. case nvme_cmd_read:
  633. case nvme_cmd_compare:
  634. break;
  635. default:
  636. return -EINVAL;
  637. }
  638. length = (io.nblocks + 1) << ns->lba_shift;
  639. meta_len = (io.nblocks + 1) * ns->ms;
  640. metadata = (void __user *)(uintptr_t)io.metadata;
  641. if (ns->ext) {
  642. length += meta_len;
  643. meta_len = 0;
  644. } else if (meta_len) {
  645. if ((io.metadata & 3) || !io.metadata)
  646. return -EINVAL;
  647. }
  648. memset(&c, 0, sizeof(c));
  649. c.rw.opcode = io.opcode;
  650. c.rw.flags = io.flags;
  651. c.rw.nsid = cpu_to_le32(ns->ns_id);
  652. c.rw.slba = cpu_to_le64(io.slba);
  653. c.rw.length = cpu_to_le16(io.nblocks);
  654. c.rw.control = cpu_to_le16(io.control);
  655. c.rw.dsmgmt = cpu_to_le32(io.dsmgmt);
  656. c.rw.reftag = cpu_to_le32(io.reftag);
  657. c.rw.apptag = cpu_to_le16(io.apptag);
  658. c.rw.appmask = cpu_to_le16(io.appmask);
  659. return __nvme_submit_user_cmd(ns->queue, &c,
  660. (void __user *)(uintptr_t)io.addr, length,
  661. metadata, meta_len, io.slba, NULL, 0);
  662. }
  663. static int nvme_user_cmd(struct nvme_ctrl *ctrl, struct nvme_ns *ns,
  664. struct nvme_passthru_cmd __user *ucmd)
  665. {
  666. struct nvme_passthru_cmd cmd;
  667. struct nvme_command c;
  668. unsigned timeout = 0;
  669. int status;
  670. if (!capable(CAP_SYS_ADMIN))
  671. return -EACCES;
  672. if (copy_from_user(&cmd, ucmd, sizeof(cmd)))
  673. return -EFAULT;
  674. if (cmd.flags)
  675. return -EINVAL;
  676. memset(&c, 0, sizeof(c));
  677. c.common.opcode = cmd.opcode;
  678. c.common.flags = cmd.flags;
  679. c.common.nsid = cpu_to_le32(cmd.nsid);
  680. c.common.cdw2[0] = cpu_to_le32(cmd.cdw2);
  681. c.common.cdw2[1] = cpu_to_le32(cmd.cdw3);
  682. c.common.cdw10[0] = cpu_to_le32(cmd.cdw10);
  683. c.common.cdw10[1] = cpu_to_le32(cmd.cdw11);
  684. c.common.cdw10[2] = cpu_to_le32(cmd.cdw12);
  685. c.common.cdw10[3] = cpu_to_le32(cmd.cdw13);
  686. c.common.cdw10[4] = cpu_to_le32(cmd.cdw14);
  687. c.common.cdw10[5] = cpu_to_le32(cmd.cdw15);
  688. if (cmd.timeout_ms)
  689. timeout = msecs_to_jiffies(cmd.timeout_ms);
  690. status = nvme_submit_user_cmd(ns ? ns->queue : ctrl->admin_q, &c,
  691. (void __user *)(uintptr_t)cmd.addr, cmd.data_len,
  692. &cmd.result, timeout);
  693. if (status >= 0) {
  694. if (put_user(cmd.result, &ucmd->result))
  695. return -EFAULT;
  696. }
  697. return status;
  698. }
  699. static int nvme_ioctl(struct block_device *bdev, fmode_t mode,
  700. unsigned int cmd, unsigned long arg)
  701. {
  702. struct nvme_ns *ns = bdev->bd_disk->private_data;
  703. switch (cmd) {
  704. case NVME_IOCTL_ID:
  705. force_successful_syscall_return();
  706. return ns->ns_id;
  707. case NVME_IOCTL_ADMIN_CMD:
  708. return nvme_user_cmd(ns->ctrl, NULL, (void __user *)arg);
  709. case NVME_IOCTL_IO_CMD:
  710. return nvme_user_cmd(ns->ctrl, ns, (void __user *)arg);
  711. case NVME_IOCTL_SUBMIT_IO:
  712. return nvme_submit_io(ns, (void __user *)arg);
  713. #ifdef CONFIG_BLK_DEV_NVME_SCSI
  714. case SG_GET_VERSION_NUM:
  715. return nvme_sg_get_version_num((void __user *)arg);
  716. case SG_IO:
  717. return nvme_sg_io(ns, (void __user *)arg);
  718. #endif
  719. default:
  720. #ifdef CONFIG_NVM
  721. if (ns->ndev)
  722. return nvme_nvm_ioctl(ns, cmd, arg);
  723. #endif
  724. if (is_sed_ioctl(cmd))
  725. return sed_ioctl(ns->ctrl->opal_dev, cmd,
  726. (void __user *) arg);
  727. return -ENOTTY;
  728. }
  729. }
  730. #ifdef CONFIG_COMPAT
  731. static int nvme_compat_ioctl(struct block_device *bdev, fmode_t mode,
  732. unsigned int cmd, unsigned long arg)
  733. {
  734. switch (cmd) {
  735. case SG_IO:
  736. return -ENOIOCTLCMD;
  737. }
  738. return nvme_ioctl(bdev, mode, cmd, arg);
  739. }
  740. #else
  741. #define nvme_compat_ioctl NULL
  742. #endif
  743. static int nvme_open(struct block_device *bdev, fmode_t mode)
  744. {
  745. return nvme_get_ns_from_disk(bdev->bd_disk) ? 0 : -ENXIO;
  746. }
  747. static void nvme_release(struct gendisk *disk, fmode_t mode)
  748. {
  749. struct nvme_ns *ns = disk->private_data;
  750. module_put(ns->ctrl->ops->module);
  751. nvme_put_ns(ns);
  752. }
  753. static int nvme_getgeo(struct block_device *bdev, struct hd_geometry *geo)
  754. {
  755. /* some standard values */
  756. geo->heads = 1 << 6;
  757. geo->sectors = 1 << 5;
  758. geo->cylinders = get_capacity(bdev->bd_disk) >> 11;
  759. return 0;
  760. }
  761. #ifdef CONFIG_BLK_DEV_INTEGRITY
  762. static void nvme_init_integrity(struct nvme_ns *ns)
  763. {
  764. struct blk_integrity integrity;
  765. memset(&integrity, 0, sizeof(integrity));
  766. switch (ns->pi_type) {
  767. case NVME_NS_DPS_PI_TYPE3:
  768. integrity.profile = &t10_pi_type3_crc;
  769. integrity.tag_size = sizeof(u16) + sizeof(u32);
  770. integrity.flags |= BLK_INTEGRITY_DEVICE_CAPABLE;
  771. break;
  772. case NVME_NS_DPS_PI_TYPE1:
  773. case NVME_NS_DPS_PI_TYPE2:
  774. integrity.profile = &t10_pi_type1_crc;
  775. integrity.tag_size = sizeof(u16);
  776. integrity.flags |= BLK_INTEGRITY_DEVICE_CAPABLE;
  777. break;
  778. default:
  779. integrity.profile = NULL;
  780. break;
  781. }
  782. integrity.tuple_size = ns->ms;
  783. blk_integrity_register(ns->disk, &integrity);
  784. blk_queue_max_integrity_segments(ns->queue, 1);
  785. }
  786. #else
  787. static void nvme_init_integrity(struct nvme_ns *ns)
  788. {
  789. }
  790. #endif /* CONFIG_BLK_DEV_INTEGRITY */
  791. static void nvme_config_discard(struct nvme_ns *ns)
  792. {
  793. struct nvme_ctrl *ctrl = ns->ctrl;
  794. u32 logical_block_size = queue_logical_block_size(ns->queue);
  795. BUILD_BUG_ON(PAGE_SIZE / sizeof(struct nvme_dsm_range) <
  796. NVME_DSM_MAX_RANGES);
  797. ns->queue->limits.discard_alignment = logical_block_size;
  798. ns->queue->limits.discard_granularity = logical_block_size;
  799. blk_queue_max_discard_sectors(ns->queue, UINT_MAX);
  800. blk_queue_max_discard_segments(ns->queue, NVME_DSM_MAX_RANGES);
  801. queue_flag_set_unlocked(QUEUE_FLAG_DISCARD, ns->queue);
  802. if (ctrl->quirks & NVME_QUIRK_DEALLOCATE_ZEROES)
  803. blk_queue_max_write_zeroes_sectors(ns->queue, UINT_MAX);
  804. }
  805. static int nvme_revalidate_ns(struct nvme_ns *ns, struct nvme_id_ns **id)
  806. {
  807. if (nvme_identify_ns(ns->ctrl, ns->ns_id, id)) {
  808. dev_warn(ns->ctrl->dev, "%s: Identify failure\n", __func__);
  809. return -ENODEV;
  810. }
  811. if ((*id)->ncap == 0) {
  812. kfree(*id);
  813. return -ENODEV;
  814. }
  815. if (ns->ctrl->vs >= NVME_VS(1, 1, 0))
  816. memcpy(ns->eui, (*id)->eui64, sizeof(ns->eui));
  817. if (ns->ctrl->vs >= NVME_VS(1, 2, 0))
  818. memcpy(ns->uuid, (*id)->nguid, sizeof(ns->uuid));
  819. return 0;
  820. }
  821. static void __nvme_revalidate_disk(struct gendisk *disk, struct nvme_id_ns *id)
  822. {
  823. struct nvme_ns *ns = disk->private_data;
  824. u8 lbaf, pi_type;
  825. u16 old_ms;
  826. unsigned short bs;
  827. old_ms = ns->ms;
  828. lbaf = id->flbas & NVME_NS_FLBAS_LBA_MASK;
  829. ns->lba_shift = id->lbaf[lbaf].ds;
  830. ns->ms = le16_to_cpu(id->lbaf[lbaf].ms);
  831. ns->ext = ns->ms && (id->flbas & NVME_NS_FLBAS_META_EXT);
  832. /*
  833. * If identify namespace failed, use default 512 byte block size so
  834. * block layer can use before failing read/write for 0 capacity.
  835. */
  836. if (ns->lba_shift == 0)
  837. ns->lba_shift = 9;
  838. bs = 1 << ns->lba_shift;
  839. /* XXX: PI implementation requires metadata equal t10 pi tuple size */
  840. pi_type = ns->ms == sizeof(struct t10_pi_tuple) ?
  841. id->dps & NVME_NS_DPS_PI_MASK : 0;
  842. blk_mq_freeze_queue(disk->queue);
  843. if (blk_get_integrity(disk) && (ns->pi_type != pi_type ||
  844. ns->ms != old_ms ||
  845. bs != queue_logical_block_size(disk->queue) ||
  846. (ns->ms && ns->ext)))
  847. blk_integrity_unregister(disk);
  848. ns->pi_type = pi_type;
  849. blk_queue_logical_block_size(ns->queue, bs);
  850. if (ns->ms && !blk_get_integrity(disk) && !ns->ext)
  851. nvme_init_integrity(ns);
  852. if (ns->ms && !(ns->ms == 8 && ns->pi_type) && !blk_get_integrity(disk))
  853. set_capacity(disk, 0);
  854. else
  855. set_capacity(disk, le64_to_cpup(&id->nsze) << (ns->lba_shift - 9));
  856. if (ns->ctrl->oncs & NVME_CTRL_ONCS_DSM)
  857. nvme_config_discard(ns);
  858. blk_mq_unfreeze_queue(disk->queue);
  859. }
  860. static int nvme_revalidate_disk(struct gendisk *disk)
  861. {
  862. struct nvme_ns *ns = disk->private_data;
  863. struct nvme_id_ns *id = NULL;
  864. int ret;
  865. if (test_bit(NVME_NS_DEAD, &ns->flags)) {
  866. set_capacity(disk, 0);
  867. return -ENODEV;
  868. }
  869. ret = nvme_revalidate_ns(ns, &id);
  870. if (ret)
  871. return ret;
  872. __nvme_revalidate_disk(disk, id);
  873. kfree(id);
  874. return 0;
  875. }
  876. static char nvme_pr_type(enum pr_type type)
  877. {
  878. switch (type) {
  879. case PR_WRITE_EXCLUSIVE:
  880. return 1;
  881. case PR_EXCLUSIVE_ACCESS:
  882. return 2;
  883. case PR_WRITE_EXCLUSIVE_REG_ONLY:
  884. return 3;
  885. case PR_EXCLUSIVE_ACCESS_REG_ONLY:
  886. return 4;
  887. case PR_WRITE_EXCLUSIVE_ALL_REGS:
  888. return 5;
  889. case PR_EXCLUSIVE_ACCESS_ALL_REGS:
  890. return 6;
  891. default:
  892. return 0;
  893. }
  894. };
  895. static int nvme_pr_command(struct block_device *bdev, u32 cdw10,
  896. u64 key, u64 sa_key, u8 op)
  897. {
  898. struct nvme_ns *ns = bdev->bd_disk->private_data;
  899. struct nvme_command c;
  900. u8 data[16] = { 0, };
  901. put_unaligned_le64(key, &data[0]);
  902. put_unaligned_le64(sa_key, &data[8]);
  903. memset(&c, 0, sizeof(c));
  904. c.common.opcode = op;
  905. c.common.nsid = cpu_to_le32(ns->ns_id);
  906. c.common.cdw10[0] = cpu_to_le32(cdw10);
  907. return nvme_submit_sync_cmd(ns->queue, &c, data, 16);
  908. }
  909. static int nvme_pr_register(struct block_device *bdev, u64 old,
  910. u64 new, unsigned flags)
  911. {
  912. u32 cdw10;
  913. if (flags & ~PR_FL_IGNORE_KEY)
  914. return -EOPNOTSUPP;
  915. cdw10 = old ? 2 : 0;
  916. cdw10 |= (flags & PR_FL_IGNORE_KEY) ? 1 << 3 : 0;
  917. cdw10 |= (1 << 30) | (1 << 31); /* PTPL=1 */
  918. return nvme_pr_command(bdev, cdw10, old, new, nvme_cmd_resv_register);
  919. }
  920. static int nvme_pr_reserve(struct block_device *bdev, u64 key,
  921. enum pr_type type, unsigned flags)
  922. {
  923. u32 cdw10;
  924. if (flags & ~PR_FL_IGNORE_KEY)
  925. return -EOPNOTSUPP;
  926. cdw10 = nvme_pr_type(type) << 8;
  927. cdw10 |= ((flags & PR_FL_IGNORE_KEY) ? 1 << 3 : 0);
  928. return nvme_pr_command(bdev, cdw10, key, 0, nvme_cmd_resv_acquire);
  929. }
  930. static int nvme_pr_preempt(struct block_device *bdev, u64 old, u64 new,
  931. enum pr_type type, bool abort)
  932. {
  933. u32 cdw10 = nvme_pr_type(type) << 8 | abort ? 2 : 1;
  934. return nvme_pr_command(bdev, cdw10, old, new, nvme_cmd_resv_acquire);
  935. }
  936. static int nvme_pr_clear(struct block_device *bdev, u64 key)
  937. {
  938. u32 cdw10 = 1 | (key ? 1 << 3 : 0);
  939. return nvme_pr_command(bdev, cdw10, key, 0, nvme_cmd_resv_register);
  940. }
  941. static int nvme_pr_release(struct block_device *bdev, u64 key, enum pr_type type)
  942. {
  943. u32 cdw10 = nvme_pr_type(type) << 8 | key ? 1 << 3 : 0;
  944. return nvme_pr_command(bdev, cdw10, key, 0, nvme_cmd_resv_release);
  945. }
  946. static const struct pr_ops nvme_pr_ops = {
  947. .pr_register = nvme_pr_register,
  948. .pr_reserve = nvme_pr_reserve,
  949. .pr_release = nvme_pr_release,
  950. .pr_preempt = nvme_pr_preempt,
  951. .pr_clear = nvme_pr_clear,
  952. };
  953. #ifdef CONFIG_BLK_SED_OPAL
  954. int nvme_sec_submit(void *data, u16 spsp, u8 secp, void *buffer, size_t len,
  955. bool send)
  956. {
  957. struct nvme_ctrl *ctrl = data;
  958. struct nvme_command cmd;
  959. memset(&cmd, 0, sizeof(cmd));
  960. if (send)
  961. cmd.common.opcode = nvme_admin_security_send;
  962. else
  963. cmd.common.opcode = nvme_admin_security_recv;
  964. cmd.common.nsid = 0;
  965. cmd.common.cdw10[0] = cpu_to_le32(((u32)secp) << 24 | ((u32)spsp) << 8);
  966. cmd.common.cdw10[1] = cpu_to_le32(len);
  967. return __nvme_submit_sync_cmd(ctrl->admin_q, &cmd, NULL, buffer, len,
  968. ADMIN_TIMEOUT, NVME_QID_ANY, 1, 0);
  969. }
  970. EXPORT_SYMBOL_GPL(nvme_sec_submit);
  971. #endif /* CONFIG_BLK_SED_OPAL */
  972. static const struct block_device_operations nvme_fops = {
  973. .owner = THIS_MODULE,
  974. .ioctl = nvme_ioctl,
  975. .compat_ioctl = nvme_compat_ioctl,
  976. .open = nvme_open,
  977. .release = nvme_release,
  978. .getgeo = nvme_getgeo,
  979. .revalidate_disk= nvme_revalidate_disk,
  980. .pr_ops = &nvme_pr_ops,
  981. };
  982. static int nvme_wait_ready(struct nvme_ctrl *ctrl, u64 cap, bool enabled)
  983. {
  984. unsigned long timeout =
  985. ((NVME_CAP_TIMEOUT(cap) + 1) * HZ / 2) + jiffies;
  986. u32 csts, bit = enabled ? NVME_CSTS_RDY : 0;
  987. int ret;
  988. while ((ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &csts)) == 0) {
  989. if (csts == ~0)
  990. return -ENODEV;
  991. if ((csts & NVME_CSTS_RDY) == bit)
  992. break;
  993. msleep(100);
  994. if (fatal_signal_pending(current))
  995. return -EINTR;
  996. if (time_after(jiffies, timeout)) {
  997. dev_err(ctrl->device,
  998. "Device not ready; aborting %s\n", enabled ?
  999. "initialisation" : "reset");
  1000. return -ENODEV;
  1001. }
  1002. }
  1003. return ret;
  1004. }
  1005. /*
  1006. * If the device has been passed off to us in an enabled state, just clear
  1007. * the enabled bit. The spec says we should set the 'shutdown notification
  1008. * bits', but doing so may cause the device to complete commands to the
  1009. * admin queue ... and we don't know what memory that might be pointing at!
  1010. */
  1011. int nvme_disable_ctrl(struct nvme_ctrl *ctrl, u64 cap)
  1012. {
  1013. int ret;
  1014. ctrl->ctrl_config &= ~NVME_CC_SHN_MASK;
  1015. ctrl->ctrl_config &= ~NVME_CC_ENABLE;
  1016. ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config);
  1017. if (ret)
  1018. return ret;
  1019. if (ctrl->quirks & NVME_QUIRK_DELAY_BEFORE_CHK_RDY)
  1020. msleep(NVME_QUIRK_DELAY_AMOUNT);
  1021. return nvme_wait_ready(ctrl, cap, false);
  1022. }
  1023. EXPORT_SYMBOL_GPL(nvme_disable_ctrl);
  1024. int nvme_enable_ctrl(struct nvme_ctrl *ctrl, u64 cap)
  1025. {
  1026. /*
  1027. * Default to a 4K page size, with the intention to update this
  1028. * path in the future to accomodate architectures with differing
  1029. * kernel and IO page sizes.
  1030. */
  1031. unsigned dev_page_min = NVME_CAP_MPSMIN(cap) + 12, page_shift = 12;
  1032. int ret;
  1033. if (page_shift < dev_page_min) {
  1034. dev_err(ctrl->device,
  1035. "Minimum device page size %u too large for host (%u)\n",
  1036. 1 << dev_page_min, 1 << page_shift);
  1037. return -ENODEV;
  1038. }
  1039. ctrl->page_size = 1 << page_shift;
  1040. ctrl->ctrl_config = NVME_CC_CSS_NVM;
  1041. ctrl->ctrl_config |= (page_shift - 12) << NVME_CC_MPS_SHIFT;
  1042. ctrl->ctrl_config |= NVME_CC_ARB_RR | NVME_CC_SHN_NONE;
  1043. ctrl->ctrl_config |= NVME_CC_IOSQES | NVME_CC_IOCQES;
  1044. ctrl->ctrl_config |= NVME_CC_ENABLE;
  1045. ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config);
  1046. if (ret)
  1047. return ret;
  1048. return nvme_wait_ready(ctrl, cap, true);
  1049. }
  1050. EXPORT_SYMBOL_GPL(nvme_enable_ctrl);
  1051. int nvme_shutdown_ctrl(struct nvme_ctrl *ctrl)
  1052. {
  1053. unsigned long timeout = SHUTDOWN_TIMEOUT + jiffies;
  1054. u32 csts;
  1055. int ret;
  1056. ctrl->ctrl_config &= ~NVME_CC_SHN_MASK;
  1057. ctrl->ctrl_config |= NVME_CC_SHN_NORMAL;
  1058. ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config);
  1059. if (ret)
  1060. return ret;
  1061. while ((ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &csts)) == 0) {
  1062. if ((csts & NVME_CSTS_SHST_MASK) == NVME_CSTS_SHST_CMPLT)
  1063. break;
  1064. msleep(100);
  1065. if (fatal_signal_pending(current))
  1066. return -EINTR;
  1067. if (time_after(jiffies, timeout)) {
  1068. dev_err(ctrl->device,
  1069. "Device shutdown incomplete; abort shutdown\n");
  1070. return -ENODEV;
  1071. }
  1072. }
  1073. return ret;
  1074. }
  1075. EXPORT_SYMBOL_GPL(nvme_shutdown_ctrl);
  1076. static void nvme_set_queue_limits(struct nvme_ctrl *ctrl,
  1077. struct request_queue *q)
  1078. {
  1079. bool vwc = false;
  1080. if (ctrl->max_hw_sectors) {
  1081. u32 max_segments =
  1082. (ctrl->max_hw_sectors / (ctrl->page_size >> 9)) + 1;
  1083. blk_queue_max_hw_sectors(q, ctrl->max_hw_sectors);
  1084. blk_queue_max_segments(q, min_t(u32, max_segments, USHRT_MAX));
  1085. }
  1086. if (ctrl->quirks & NVME_QUIRK_STRIPE_SIZE)
  1087. blk_queue_chunk_sectors(q, ctrl->max_hw_sectors);
  1088. blk_queue_virt_boundary(q, ctrl->page_size - 1);
  1089. if (ctrl->vwc & NVME_CTRL_VWC_PRESENT)
  1090. vwc = true;
  1091. blk_queue_write_cache(q, vwc, vwc);
  1092. }
  1093. static void nvme_configure_apst(struct nvme_ctrl *ctrl)
  1094. {
  1095. /*
  1096. * APST (Autonomous Power State Transition) lets us program a
  1097. * table of power state transitions that the controller will
  1098. * perform automatically. We configure it with a simple
  1099. * heuristic: we are willing to spend at most 2% of the time
  1100. * transitioning between power states. Therefore, when running
  1101. * in any given state, we will enter the next lower-power
  1102. * non-operational state after waiting 100 * (enlat + exlat)
  1103. * microseconds, as long as that state's total latency is under
  1104. * the requested maximum latency.
  1105. *
  1106. * We will not autonomously enter any non-operational state for
  1107. * which the total latency exceeds ps_max_latency_us. Users
  1108. * can set ps_max_latency_us to zero to turn off APST.
  1109. */
  1110. unsigned apste;
  1111. struct nvme_feat_auto_pst *table;
  1112. int ret;
  1113. /*
  1114. * If APST isn't supported or if we haven't been initialized yet,
  1115. * then don't do anything.
  1116. */
  1117. if (!ctrl->apsta)
  1118. return;
  1119. if (ctrl->npss > 31) {
  1120. dev_warn(ctrl->device, "NPSS is invalid; not using APST\n");
  1121. return;
  1122. }
  1123. table = kzalloc(sizeof(*table), GFP_KERNEL);
  1124. if (!table)
  1125. return;
  1126. if (ctrl->ps_max_latency_us == 0) {
  1127. /* Turn off APST. */
  1128. apste = 0;
  1129. } else {
  1130. __le64 target = cpu_to_le64(0);
  1131. int state;
  1132. /*
  1133. * Walk through all states from lowest- to highest-power.
  1134. * According to the spec, lower-numbered states use more
  1135. * power. NPSS, despite the name, is the index of the
  1136. * lowest-power state, not the number of states.
  1137. */
  1138. for (state = (int)ctrl->npss; state >= 0; state--) {
  1139. u64 total_latency_us, transition_ms;
  1140. if (target)
  1141. table->entries[state] = target;
  1142. /*
  1143. * Is this state a useful non-operational state for
  1144. * higher-power states to autonomously transition to?
  1145. */
  1146. if (!(ctrl->psd[state].flags &
  1147. NVME_PS_FLAGS_NON_OP_STATE))
  1148. continue;
  1149. total_latency_us =
  1150. (u64)le32_to_cpu(ctrl->psd[state].entry_lat) +
  1151. + le32_to_cpu(ctrl->psd[state].exit_lat);
  1152. if (total_latency_us > ctrl->ps_max_latency_us)
  1153. continue;
  1154. /*
  1155. * This state is good. Use it as the APST idle
  1156. * target for higher power states.
  1157. */
  1158. transition_ms = total_latency_us + 19;
  1159. do_div(transition_ms, 20);
  1160. if (transition_ms > (1 << 24) - 1)
  1161. transition_ms = (1 << 24) - 1;
  1162. target = cpu_to_le64((state << 3) |
  1163. (transition_ms << 8));
  1164. }
  1165. apste = 1;
  1166. }
  1167. ret = nvme_set_features(ctrl, NVME_FEAT_AUTO_PST, apste,
  1168. table, sizeof(*table), NULL);
  1169. if (ret)
  1170. dev_err(ctrl->device, "failed to set APST feature (%d)\n", ret);
  1171. kfree(table);
  1172. }
  1173. static void nvme_set_latency_tolerance(struct device *dev, s32 val)
  1174. {
  1175. struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
  1176. u64 latency;
  1177. switch (val) {
  1178. case PM_QOS_LATENCY_TOLERANCE_NO_CONSTRAINT:
  1179. case PM_QOS_LATENCY_ANY:
  1180. latency = U64_MAX;
  1181. break;
  1182. default:
  1183. latency = val;
  1184. }
  1185. if (ctrl->ps_max_latency_us != latency) {
  1186. ctrl->ps_max_latency_us = latency;
  1187. nvme_configure_apst(ctrl);
  1188. }
  1189. }
  1190. struct nvme_core_quirk_entry {
  1191. /*
  1192. * NVMe model and firmware strings are padded with spaces. For
  1193. * simplicity, strings in the quirk table are padded with NULLs
  1194. * instead.
  1195. */
  1196. u16 vid;
  1197. const char *mn;
  1198. const char *fr;
  1199. unsigned long quirks;
  1200. };
  1201. static const struct nvme_core_quirk_entry core_quirks[] = {
  1202. /*
  1203. * Seen on a Samsung "SM951 NVMe SAMSUNG 256GB": using APST causes
  1204. * the controller to go out to lunch. It dies when the watchdog
  1205. * timer reads CSTS and gets 0xffffffff.
  1206. */
  1207. {
  1208. .vid = 0x144d,
  1209. .fr = "BXW75D0Q",
  1210. .quirks = NVME_QUIRK_NO_APST,
  1211. },
  1212. };
  1213. /* match is null-terminated but idstr is space-padded. */
  1214. static bool string_matches(const char *idstr, const char *match, size_t len)
  1215. {
  1216. size_t matchlen;
  1217. if (!match)
  1218. return true;
  1219. matchlen = strlen(match);
  1220. WARN_ON_ONCE(matchlen > len);
  1221. if (memcmp(idstr, match, matchlen))
  1222. return false;
  1223. for (; matchlen < len; matchlen++)
  1224. if (idstr[matchlen] != ' ')
  1225. return false;
  1226. return true;
  1227. }
  1228. static bool quirk_matches(const struct nvme_id_ctrl *id,
  1229. const struct nvme_core_quirk_entry *q)
  1230. {
  1231. return q->vid == le16_to_cpu(id->vid) &&
  1232. string_matches(id->mn, q->mn, sizeof(id->mn)) &&
  1233. string_matches(id->fr, q->fr, sizeof(id->fr));
  1234. }
  1235. /*
  1236. * Initialize the cached copies of the Identify data and various controller
  1237. * register in our nvme_ctrl structure. This should be called as soon as
  1238. * the admin queue is fully up and running.
  1239. */
  1240. int nvme_init_identify(struct nvme_ctrl *ctrl)
  1241. {
  1242. struct nvme_id_ctrl *id;
  1243. u64 cap;
  1244. int ret, page_shift;
  1245. u32 max_hw_sectors;
  1246. u8 prev_apsta;
  1247. ret = ctrl->ops->reg_read32(ctrl, NVME_REG_VS, &ctrl->vs);
  1248. if (ret) {
  1249. dev_err(ctrl->device, "Reading VS failed (%d)\n", ret);
  1250. return ret;
  1251. }
  1252. ret = ctrl->ops->reg_read64(ctrl, NVME_REG_CAP, &cap);
  1253. if (ret) {
  1254. dev_err(ctrl->device, "Reading CAP failed (%d)\n", ret);
  1255. return ret;
  1256. }
  1257. page_shift = NVME_CAP_MPSMIN(cap) + 12;
  1258. if (ctrl->vs >= NVME_VS(1, 1, 0))
  1259. ctrl->subsystem = NVME_CAP_NSSRC(cap);
  1260. ret = nvme_identify_ctrl(ctrl, &id);
  1261. if (ret) {
  1262. dev_err(ctrl->device, "Identify Controller failed (%d)\n", ret);
  1263. return -EIO;
  1264. }
  1265. if (!ctrl->identified) {
  1266. /*
  1267. * Check for quirks. Quirk can depend on firmware version,
  1268. * so, in principle, the set of quirks present can change
  1269. * across a reset. As a possible future enhancement, we
  1270. * could re-scan for quirks every time we reinitialize
  1271. * the device, but we'd have to make sure that the driver
  1272. * behaves intelligently if the quirks change.
  1273. */
  1274. int i;
  1275. for (i = 0; i < ARRAY_SIZE(core_quirks); i++) {
  1276. if (quirk_matches(id, &core_quirks[i]))
  1277. ctrl->quirks |= core_quirks[i].quirks;
  1278. }
  1279. }
  1280. ctrl->oacs = le16_to_cpu(id->oacs);
  1281. ctrl->vid = le16_to_cpu(id->vid);
  1282. ctrl->oncs = le16_to_cpup(&id->oncs);
  1283. atomic_set(&ctrl->abort_limit, id->acl + 1);
  1284. ctrl->vwc = id->vwc;
  1285. ctrl->cntlid = le16_to_cpup(&id->cntlid);
  1286. memcpy(ctrl->serial, id->sn, sizeof(id->sn));
  1287. memcpy(ctrl->model, id->mn, sizeof(id->mn));
  1288. memcpy(ctrl->firmware_rev, id->fr, sizeof(id->fr));
  1289. if (id->mdts)
  1290. max_hw_sectors = 1 << (id->mdts + page_shift - 9);
  1291. else
  1292. max_hw_sectors = UINT_MAX;
  1293. ctrl->max_hw_sectors =
  1294. min_not_zero(ctrl->max_hw_sectors, max_hw_sectors);
  1295. nvme_set_queue_limits(ctrl, ctrl->admin_q);
  1296. ctrl->sgls = le32_to_cpu(id->sgls);
  1297. ctrl->kas = le16_to_cpu(id->kas);
  1298. ctrl->npss = id->npss;
  1299. prev_apsta = ctrl->apsta;
  1300. ctrl->apsta = (ctrl->quirks & NVME_QUIRK_NO_APST) ? 0 : id->apsta;
  1301. memcpy(ctrl->psd, id->psd, sizeof(ctrl->psd));
  1302. if (ctrl->ops->is_fabrics) {
  1303. ctrl->icdoff = le16_to_cpu(id->icdoff);
  1304. ctrl->ioccsz = le32_to_cpu(id->ioccsz);
  1305. ctrl->iorcsz = le32_to_cpu(id->iorcsz);
  1306. ctrl->maxcmd = le16_to_cpu(id->maxcmd);
  1307. /*
  1308. * In fabrics we need to verify the cntlid matches the
  1309. * admin connect
  1310. */
  1311. if (ctrl->cntlid != le16_to_cpu(id->cntlid))
  1312. ret = -EINVAL;
  1313. if (!ctrl->opts->discovery_nqn && !ctrl->kas) {
  1314. dev_err(ctrl->dev,
  1315. "keep-alive support is mandatory for fabrics\n");
  1316. ret = -EINVAL;
  1317. }
  1318. } else {
  1319. ctrl->cntlid = le16_to_cpu(id->cntlid);
  1320. }
  1321. kfree(id);
  1322. if (ctrl->apsta && !prev_apsta)
  1323. dev_pm_qos_expose_latency_tolerance(ctrl->device);
  1324. else if (!ctrl->apsta && prev_apsta)
  1325. dev_pm_qos_hide_latency_tolerance(ctrl->device);
  1326. nvme_configure_apst(ctrl);
  1327. ctrl->identified = true;
  1328. return ret;
  1329. }
  1330. EXPORT_SYMBOL_GPL(nvme_init_identify);
  1331. static int nvme_dev_open(struct inode *inode, struct file *file)
  1332. {
  1333. struct nvme_ctrl *ctrl;
  1334. int instance = iminor(inode);
  1335. int ret = -ENODEV;
  1336. spin_lock(&dev_list_lock);
  1337. list_for_each_entry(ctrl, &nvme_ctrl_list, node) {
  1338. if (ctrl->instance != instance)
  1339. continue;
  1340. if (!ctrl->admin_q) {
  1341. ret = -EWOULDBLOCK;
  1342. break;
  1343. }
  1344. if (!kref_get_unless_zero(&ctrl->kref))
  1345. break;
  1346. file->private_data = ctrl;
  1347. ret = 0;
  1348. break;
  1349. }
  1350. spin_unlock(&dev_list_lock);
  1351. return ret;
  1352. }
  1353. static int nvme_dev_release(struct inode *inode, struct file *file)
  1354. {
  1355. nvme_put_ctrl(file->private_data);
  1356. return 0;
  1357. }
  1358. static int nvme_dev_user_cmd(struct nvme_ctrl *ctrl, void __user *argp)
  1359. {
  1360. struct nvme_ns *ns;
  1361. int ret;
  1362. mutex_lock(&ctrl->namespaces_mutex);
  1363. if (list_empty(&ctrl->namespaces)) {
  1364. ret = -ENOTTY;
  1365. goto out_unlock;
  1366. }
  1367. ns = list_first_entry(&ctrl->namespaces, struct nvme_ns, list);
  1368. if (ns != list_last_entry(&ctrl->namespaces, struct nvme_ns, list)) {
  1369. dev_warn(ctrl->device,
  1370. "NVME_IOCTL_IO_CMD not supported when multiple namespaces present!\n");
  1371. ret = -EINVAL;
  1372. goto out_unlock;
  1373. }
  1374. dev_warn(ctrl->device,
  1375. "using deprecated NVME_IOCTL_IO_CMD ioctl on the char device!\n");
  1376. kref_get(&ns->kref);
  1377. mutex_unlock(&ctrl->namespaces_mutex);
  1378. ret = nvme_user_cmd(ctrl, ns, argp);
  1379. nvme_put_ns(ns);
  1380. return ret;
  1381. out_unlock:
  1382. mutex_unlock(&ctrl->namespaces_mutex);
  1383. return ret;
  1384. }
  1385. static long nvme_dev_ioctl(struct file *file, unsigned int cmd,
  1386. unsigned long arg)
  1387. {
  1388. struct nvme_ctrl *ctrl = file->private_data;
  1389. void __user *argp = (void __user *)arg;
  1390. switch (cmd) {
  1391. case NVME_IOCTL_ADMIN_CMD:
  1392. return nvme_user_cmd(ctrl, NULL, argp);
  1393. case NVME_IOCTL_IO_CMD:
  1394. return nvme_dev_user_cmd(ctrl, argp);
  1395. case NVME_IOCTL_RESET:
  1396. dev_warn(ctrl->device, "resetting controller\n");
  1397. return ctrl->ops->reset_ctrl(ctrl);
  1398. case NVME_IOCTL_SUBSYS_RESET:
  1399. return nvme_reset_subsystem(ctrl);
  1400. case NVME_IOCTL_RESCAN:
  1401. nvme_queue_scan(ctrl);
  1402. return 0;
  1403. default:
  1404. return -ENOTTY;
  1405. }
  1406. }
  1407. static const struct file_operations nvme_dev_fops = {
  1408. .owner = THIS_MODULE,
  1409. .open = nvme_dev_open,
  1410. .release = nvme_dev_release,
  1411. .unlocked_ioctl = nvme_dev_ioctl,
  1412. .compat_ioctl = nvme_dev_ioctl,
  1413. };
  1414. static ssize_t nvme_sysfs_reset(struct device *dev,
  1415. struct device_attribute *attr, const char *buf,
  1416. size_t count)
  1417. {
  1418. struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
  1419. int ret;
  1420. ret = ctrl->ops->reset_ctrl(ctrl);
  1421. if (ret < 0)
  1422. return ret;
  1423. return count;
  1424. }
  1425. static DEVICE_ATTR(reset_controller, S_IWUSR, NULL, nvme_sysfs_reset);
  1426. static ssize_t nvme_sysfs_rescan(struct device *dev,
  1427. struct device_attribute *attr, const char *buf,
  1428. size_t count)
  1429. {
  1430. struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
  1431. nvme_queue_scan(ctrl);
  1432. return count;
  1433. }
  1434. static DEVICE_ATTR(rescan_controller, S_IWUSR, NULL, nvme_sysfs_rescan);
  1435. static ssize_t wwid_show(struct device *dev, struct device_attribute *attr,
  1436. char *buf)
  1437. {
  1438. struct nvme_ns *ns = nvme_get_ns_from_dev(dev);
  1439. struct nvme_ctrl *ctrl = ns->ctrl;
  1440. int serial_len = sizeof(ctrl->serial);
  1441. int model_len = sizeof(ctrl->model);
  1442. if (memchr_inv(ns->uuid, 0, sizeof(ns->uuid)))
  1443. return sprintf(buf, "eui.%16phN\n", ns->uuid);
  1444. if (memchr_inv(ns->eui, 0, sizeof(ns->eui)))
  1445. return sprintf(buf, "eui.%8phN\n", ns->eui);
  1446. while (ctrl->serial[serial_len - 1] == ' ')
  1447. serial_len--;
  1448. while (ctrl->model[model_len - 1] == ' ')
  1449. model_len--;
  1450. return sprintf(buf, "nvme.%04x-%*phN-%*phN-%08x\n", ctrl->vid,
  1451. serial_len, ctrl->serial, model_len, ctrl->model, ns->ns_id);
  1452. }
  1453. static DEVICE_ATTR(wwid, S_IRUGO, wwid_show, NULL);
  1454. static ssize_t uuid_show(struct device *dev, struct device_attribute *attr,
  1455. char *buf)
  1456. {
  1457. struct nvme_ns *ns = nvme_get_ns_from_dev(dev);
  1458. return sprintf(buf, "%pU\n", ns->uuid);
  1459. }
  1460. static DEVICE_ATTR(uuid, S_IRUGO, uuid_show, NULL);
  1461. static ssize_t eui_show(struct device *dev, struct device_attribute *attr,
  1462. char *buf)
  1463. {
  1464. struct nvme_ns *ns = nvme_get_ns_from_dev(dev);
  1465. return sprintf(buf, "%8phd\n", ns->eui);
  1466. }
  1467. static DEVICE_ATTR(eui, S_IRUGO, eui_show, NULL);
  1468. static ssize_t nsid_show(struct device *dev, struct device_attribute *attr,
  1469. char *buf)
  1470. {
  1471. struct nvme_ns *ns = nvme_get_ns_from_dev(dev);
  1472. return sprintf(buf, "%d\n", ns->ns_id);
  1473. }
  1474. static DEVICE_ATTR(nsid, S_IRUGO, nsid_show, NULL);
  1475. static struct attribute *nvme_ns_attrs[] = {
  1476. &dev_attr_wwid.attr,
  1477. &dev_attr_uuid.attr,
  1478. &dev_attr_eui.attr,
  1479. &dev_attr_nsid.attr,
  1480. NULL,
  1481. };
  1482. static umode_t nvme_ns_attrs_are_visible(struct kobject *kobj,
  1483. struct attribute *a, int n)
  1484. {
  1485. struct device *dev = container_of(kobj, struct device, kobj);
  1486. struct nvme_ns *ns = nvme_get_ns_from_dev(dev);
  1487. if (a == &dev_attr_uuid.attr) {
  1488. if (!memchr_inv(ns->uuid, 0, sizeof(ns->uuid)))
  1489. return 0;
  1490. }
  1491. if (a == &dev_attr_eui.attr) {
  1492. if (!memchr_inv(ns->eui, 0, sizeof(ns->eui)))
  1493. return 0;
  1494. }
  1495. return a->mode;
  1496. }
  1497. static const struct attribute_group nvme_ns_attr_group = {
  1498. .attrs = nvme_ns_attrs,
  1499. .is_visible = nvme_ns_attrs_are_visible,
  1500. };
  1501. #define nvme_show_str_function(field) \
  1502. static ssize_t field##_show(struct device *dev, \
  1503. struct device_attribute *attr, char *buf) \
  1504. { \
  1505. struct nvme_ctrl *ctrl = dev_get_drvdata(dev); \
  1506. return sprintf(buf, "%.*s\n", (int)sizeof(ctrl->field), ctrl->field); \
  1507. } \
  1508. static DEVICE_ATTR(field, S_IRUGO, field##_show, NULL);
  1509. #define nvme_show_int_function(field) \
  1510. static ssize_t field##_show(struct device *dev, \
  1511. struct device_attribute *attr, char *buf) \
  1512. { \
  1513. struct nvme_ctrl *ctrl = dev_get_drvdata(dev); \
  1514. return sprintf(buf, "%d\n", ctrl->field); \
  1515. } \
  1516. static DEVICE_ATTR(field, S_IRUGO, field##_show, NULL);
  1517. nvme_show_str_function(model);
  1518. nvme_show_str_function(serial);
  1519. nvme_show_str_function(firmware_rev);
  1520. nvme_show_int_function(cntlid);
  1521. static ssize_t nvme_sysfs_delete(struct device *dev,
  1522. struct device_attribute *attr, const char *buf,
  1523. size_t count)
  1524. {
  1525. struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
  1526. if (device_remove_file_self(dev, attr))
  1527. ctrl->ops->delete_ctrl(ctrl);
  1528. return count;
  1529. }
  1530. static DEVICE_ATTR(delete_controller, S_IWUSR, NULL, nvme_sysfs_delete);
  1531. static ssize_t nvme_sysfs_show_transport(struct device *dev,
  1532. struct device_attribute *attr,
  1533. char *buf)
  1534. {
  1535. struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
  1536. return snprintf(buf, PAGE_SIZE, "%s\n", ctrl->ops->name);
  1537. }
  1538. static DEVICE_ATTR(transport, S_IRUGO, nvme_sysfs_show_transport, NULL);
  1539. static ssize_t nvme_sysfs_show_state(struct device *dev,
  1540. struct device_attribute *attr,
  1541. char *buf)
  1542. {
  1543. struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
  1544. static const char *const state_name[] = {
  1545. [NVME_CTRL_NEW] = "new",
  1546. [NVME_CTRL_LIVE] = "live",
  1547. [NVME_CTRL_RESETTING] = "resetting",
  1548. [NVME_CTRL_RECONNECTING]= "reconnecting",
  1549. [NVME_CTRL_DELETING] = "deleting",
  1550. [NVME_CTRL_DEAD] = "dead",
  1551. };
  1552. if ((unsigned)ctrl->state < ARRAY_SIZE(state_name) &&
  1553. state_name[ctrl->state])
  1554. return sprintf(buf, "%s\n", state_name[ctrl->state]);
  1555. return sprintf(buf, "unknown state\n");
  1556. }
  1557. static DEVICE_ATTR(state, S_IRUGO, nvme_sysfs_show_state, NULL);
  1558. static ssize_t nvme_sysfs_show_subsysnqn(struct device *dev,
  1559. struct device_attribute *attr,
  1560. char *buf)
  1561. {
  1562. struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
  1563. return snprintf(buf, PAGE_SIZE, "%s\n",
  1564. ctrl->ops->get_subsysnqn(ctrl));
  1565. }
  1566. static DEVICE_ATTR(subsysnqn, S_IRUGO, nvme_sysfs_show_subsysnqn, NULL);
  1567. static ssize_t nvme_sysfs_show_address(struct device *dev,
  1568. struct device_attribute *attr,
  1569. char *buf)
  1570. {
  1571. struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
  1572. return ctrl->ops->get_address(ctrl, buf, PAGE_SIZE);
  1573. }
  1574. static DEVICE_ATTR(address, S_IRUGO, nvme_sysfs_show_address, NULL);
  1575. static struct attribute *nvme_dev_attrs[] = {
  1576. &dev_attr_reset_controller.attr,
  1577. &dev_attr_rescan_controller.attr,
  1578. &dev_attr_model.attr,
  1579. &dev_attr_serial.attr,
  1580. &dev_attr_firmware_rev.attr,
  1581. &dev_attr_cntlid.attr,
  1582. &dev_attr_delete_controller.attr,
  1583. &dev_attr_transport.attr,
  1584. &dev_attr_subsysnqn.attr,
  1585. &dev_attr_address.attr,
  1586. &dev_attr_state.attr,
  1587. NULL
  1588. };
  1589. #define CHECK_ATTR(ctrl, a, name) \
  1590. if ((a) == &dev_attr_##name.attr && \
  1591. !(ctrl)->ops->get_##name) \
  1592. return 0
  1593. static umode_t nvme_dev_attrs_are_visible(struct kobject *kobj,
  1594. struct attribute *a, int n)
  1595. {
  1596. struct device *dev = container_of(kobj, struct device, kobj);
  1597. struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
  1598. if (a == &dev_attr_delete_controller.attr) {
  1599. if (!ctrl->ops->delete_ctrl)
  1600. return 0;
  1601. }
  1602. CHECK_ATTR(ctrl, a, subsysnqn);
  1603. CHECK_ATTR(ctrl, a, address);
  1604. return a->mode;
  1605. }
  1606. static struct attribute_group nvme_dev_attrs_group = {
  1607. .attrs = nvme_dev_attrs,
  1608. .is_visible = nvme_dev_attrs_are_visible,
  1609. };
  1610. static const struct attribute_group *nvme_dev_attr_groups[] = {
  1611. &nvme_dev_attrs_group,
  1612. NULL,
  1613. };
  1614. static int ns_cmp(void *priv, struct list_head *a, struct list_head *b)
  1615. {
  1616. struct nvme_ns *nsa = container_of(a, struct nvme_ns, list);
  1617. struct nvme_ns *nsb = container_of(b, struct nvme_ns, list);
  1618. return nsa->ns_id - nsb->ns_id;
  1619. }
  1620. static struct nvme_ns *nvme_find_get_ns(struct nvme_ctrl *ctrl, unsigned nsid)
  1621. {
  1622. struct nvme_ns *ns, *ret = NULL;
  1623. mutex_lock(&ctrl->namespaces_mutex);
  1624. list_for_each_entry(ns, &ctrl->namespaces, list) {
  1625. if (ns->ns_id == nsid) {
  1626. kref_get(&ns->kref);
  1627. ret = ns;
  1628. break;
  1629. }
  1630. if (ns->ns_id > nsid)
  1631. break;
  1632. }
  1633. mutex_unlock(&ctrl->namespaces_mutex);
  1634. return ret;
  1635. }
  1636. static void nvme_alloc_ns(struct nvme_ctrl *ctrl, unsigned nsid)
  1637. {
  1638. struct nvme_ns *ns;
  1639. struct gendisk *disk;
  1640. struct nvme_id_ns *id;
  1641. char disk_name[DISK_NAME_LEN];
  1642. int node = dev_to_node(ctrl->dev);
  1643. ns = kzalloc_node(sizeof(*ns), GFP_KERNEL, node);
  1644. if (!ns)
  1645. return;
  1646. ns->instance = ida_simple_get(&ctrl->ns_ida, 1, 0, GFP_KERNEL);
  1647. if (ns->instance < 0)
  1648. goto out_free_ns;
  1649. ns->queue = blk_mq_init_queue(ctrl->tagset);
  1650. if (IS_ERR(ns->queue))
  1651. goto out_release_instance;
  1652. queue_flag_set_unlocked(QUEUE_FLAG_NONROT, ns->queue);
  1653. ns->queue->queuedata = ns;
  1654. ns->ctrl = ctrl;
  1655. kref_init(&ns->kref);
  1656. ns->ns_id = nsid;
  1657. ns->lba_shift = 9; /* set to a default value for 512 until disk is validated */
  1658. blk_queue_logical_block_size(ns->queue, 1 << ns->lba_shift);
  1659. nvme_set_queue_limits(ctrl, ns->queue);
  1660. sprintf(disk_name, "nvme%dn%d", ctrl->instance, ns->instance);
  1661. if (nvme_revalidate_ns(ns, &id))
  1662. goto out_free_queue;
  1663. if (nvme_nvm_ns_supported(ns, id) &&
  1664. nvme_nvm_register(ns, disk_name, node)) {
  1665. dev_warn(ctrl->dev, "%s: LightNVM init failure\n", __func__);
  1666. goto out_free_id;
  1667. }
  1668. disk = alloc_disk_node(0, node);
  1669. if (!disk)
  1670. goto out_free_id;
  1671. disk->fops = &nvme_fops;
  1672. disk->private_data = ns;
  1673. disk->queue = ns->queue;
  1674. disk->flags = GENHD_FL_EXT_DEVT;
  1675. memcpy(disk->disk_name, disk_name, DISK_NAME_LEN);
  1676. ns->disk = disk;
  1677. __nvme_revalidate_disk(disk, id);
  1678. mutex_lock(&ctrl->namespaces_mutex);
  1679. list_add_tail(&ns->list, &ctrl->namespaces);
  1680. mutex_unlock(&ctrl->namespaces_mutex);
  1681. kref_get(&ctrl->kref);
  1682. kfree(id);
  1683. device_add_disk(ctrl->device, ns->disk);
  1684. if (sysfs_create_group(&disk_to_dev(ns->disk)->kobj,
  1685. &nvme_ns_attr_group))
  1686. pr_warn("%s: failed to create sysfs group for identification\n",
  1687. ns->disk->disk_name);
  1688. if (ns->ndev && nvme_nvm_register_sysfs(ns))
  1689. pr_warn("%s: failed to register lightnvm sysfs group for identification\n",
  1690. ns->disk->disk_name);
  1691. return;
  1692. out_free_id:
  1693. kfree(id);
  1694. out_free_queue:
  1695. blk_cleanup_queue(ns->queue);
  1696. out_release_instance:
  1697. ida_simple_remove(&ctrl->ns_ida, ns->instance);
  1698. out_free_ns:
  1699. kfree(ns);
  1700. }
  1701. static void nvme_ns_remove(struct nvme_ns *ns)
  1702. {
  1703. if (test_and_set_bit(NVME_NS_REMOVING, &ns->flags))
  1704. return;
  1705. if (ns->disk && ns->disk->flags & GENHD_FL_UP) {
  1706. if (blk_get_integrity(ns->disk))
  1707. blk_integrity_unregister(ns->disk);
  1708. sysfs_remove_group(&disk_to_dev(ns->disk)->kobj,
  1709. &nvme_ns_attr_group);
  1710. if (ns->ndev)
  1711. nvme_nvm_unregister_sysfs(ns);
  1712. del_gendisk(ns->disk);
  1713. blk_mq_abort_requeue_list(ns->queue);
  1714. blk_cleanup_queue(ns->queue);
  1715. }
  1716. mutex_lock(&ns->ctrl->namespaces_mutex);
  1717. list_del_init(&ns->list);
  1718. mutex_unlock(&ns->ctrl->namespaces_mutex);
  1719. nvme_put_ns(ns);
  1720. }
  1721. static void nvme_validate_ns(struct nvme_ctrl *ctrl, unsigned nsid)
  1722. {
  1723. struct nvme_ns *ns;
  1724. ns = nvme_find_get_ns(ctrl, nsid);
  1725. if (ns) {
  1726. if (ns->disk && revalidate_disk(ns->disk))
  1727. nvme_ns_remove(ns);
  1728. nvme_put_ns(ns);
  1729. } else
  1730. nvme_alloc_ns(ctrl, nsid);
  1731. }
  1732. static void nvme_remove_invalid_namespaces(struct nvme_ctrl *ctrl,
  1733. unsigned nsid)
  1734. {
  1735. struct nvme_ns *ns, *next;
  1736. list_for_each_entry_safe(ns, next, &ctrl->namespaces, list) {
  1737. if (ns->ns_id > nsid)
  1738. nvme_ns_remove(ns);
  1739. }
  1740. }
  1741. static int nvme_scan_ns_list(struct nvme_ctrl *ctrl, unsigned nn)
  1742. {
  1743. struct nvme_ns *ns;
  1744. __le32 *ns_list;
  1745. unsigned i, j, nsid, prev = 0, num_lists = DIV_ROUND_UP(nn, 1024);
  1746. int ret = 0;
  1747. ns_list = kzalloc(0x1000, GFP_KERNEL);
  1748. if (!ns_list)
  1749. return -ENOMEM;
  1750. for (i = 0; i < num_lists; i++) {
  1751. ret = nvme_identify_ns_list(ctrl, prev, ns_list);
  1752. if (ret)
  1753. goto free;
  1754. for (j = 0; j < min(nn, 1024U); j++) {
  1755. nsid = le32_to_cpu(ns_list[j]);
  1756. if (!nsid)
  1757. goto out;
  1758. nvme_validate_ns(ctrl, nsid);
  1759. while (++prev < nsid) {
  1760. ns = nvme_find_get_ns(ctrl, prev);
  1761. if (ns) {
  1762. nvme_ns_remove(ns);
  1763. nvme_put_ns(ns);
  1764. }
  1765. }
  1766. }
  1767. nn -= j;
  1768. }
  1769. out:
  1770. nvme_remove_invalid_namespaces(ctrl, prev);
  1771. free:
  1772. kfree(ns_list);
  1773. return ret;
  1774. }
  1775. static void nvme_scan_ns_sequential(struct nvme_ctrl *ctrl, unsigned nn)
  1776. {
  1777. unsigned i;
  1778. for (i = 1; i <= nn; i++)
  1779. nvme_validate_ns(ctrl, i);
  1780. nvme_remove_invalid_namespaces(ctrl, nn);
  1781. }
  1782. static void nvme_scan_work(struct work_struct *work)
  1783. {
  1784. struct nvme_ctrl *ctrl =
  1785. container_of(work, struct nvme_ctrl, scan_work);
  1786. struct nvme_id_ctrl *id;
  1787. unsigned nn;
  1788. if (ctrl->state != NVME_CTRL_LIVE)
  1789. return;
  1790. if (nvme_identify_ctrl(ctrl, &id))
  1791. return;
  1792. nn = le32_to_cpu(id->nn);
  1793. if (ctrl->vs >= NVME_VS(1, 1, 0) &&
  1794. !(ctrl->quirks & NVME_QUIRK_IDENTIFY_CNS)) {
  1795. if (!nvme_scan_ns_list(ctrl, nn))
  1796. goto done;
  1797. }
  1798. nvme_scan_ns_sequential(ctrl, nn);
  1799. done:
  1800. mutex_lock(&ctrl->namespaces_mutex);
  1801. list_sort(NULL, &ctrl->namespaces, ns_cmp);
  1802. mutex_unlock(&ctrl->namespaces_mutex);
  1803. kfree(id);
  1804. }
  1805. void nvme_queue_scan(struct nvme_ctrl *ctrl)
  1806. {
  1807. /*
  1808. * Do not queue new scan work when a controller is reset during
  1809. * removal.
  1810. */
  1811. if (ctrl->state == NVME_CTRL_LIVE)
  1812. schedule_work(&ctrl->scan_work);
  1813. }
  1814. EXPORT_SYMBOL_GPL(nvme_queue_scan);
  1815. /*
  1816. * This function iterates the namespace list unlocked to allow recovery from
  1817. * controller failure. It is up to the caller to ensure the namespace list is
  1818. * not modified by scan work while this function is executing.
  1819. */
  1820. void nvme_remove_namespaces(struct nvme_ctrl *ctrl)
  1821. {
  1822. struct nvme_ns *ns, *next;
  1823. /*
  1824. * The dead states indicates the controller was not gracefully
  1825. * disconnected. In that case, we won't be able to flush any data while
  1826. * removing the namespaces' disks; fail all the queues now to avoid
  1827. * potentially having to clean up the failed sync later.
  1828. */
  1829. if (ctrl->state == NVME_CTRL_DEAD)
  1830. nvme_kill_queues(ctrl);
  1831. list_for_each_entry_safe(ns, next, &ctrl->namespaces, list)
  1832. nvme_ns_remove(ns);
  1833. }
  1834. EXPORT_SYMBOL_GPL(nvme_remove_namespaces);
  1835. static void nvme_async_event_work(struct work_struct *work)
  1836. {
  1837. struct nvme_ctrl *ctrl =
  1838. container_of(work, struct nvme_ctrl, async_event_work);
  1839. spin_lock_irq(&ctrl->lock);
  1840. while (ctrl->event_limit > 0) {
  1841. int aer_idx = --ctrl->event_limit;
  1842. spin_unlock_irq(&ctrl->lock);
  1843. ctrl->ops->submit_async_event(ctrl, aer_idx);
  1844. spin_lock_irq(&ctrl->lock);
  1845. }
  1846. spin_unlock_irq(&ctrl->lock);
  1847. }
  1848. void nvme_complete_async_event(struct nvme_ctrl *ctrl, __le16 status,
  1849. union nvme_result *res)
  1850. {
  1851. u32 result = le32_to_cpu(res->u32);
  1852. bool done = true;
  1853. switch (le16_to_cpu(status) >> 1) {
  1854. case NVME_SC_SUCCESS:
  1855. done = false;
  1856. /*FALLTHRU*/
  1857. case NVME_SC_ABORT_REQ:
  1858. ++ctrl->event_limit;
  1859. schedule_work(&ctrl->async_event_work);
  1860. break;
  1861. default:
  1862. break;
  1863. }
  1864. if (done)
  1865. return;
  1866. switch (result & 0xff07) {
  1867. case NVME_AER_NOTICE_NS_CHANGED:
  1868. dev_info(ctrl->device, "rescanning\n");
  1869. nvme_queue_scan(ctrl);
  1870. break;
  1871. default:
  1872. dev_warn(ctrl->device, "async event result %08x\n", result);
  1873. }
  1874. }
  1875. EXPORT_SYMBOL_GPL(nvme_complete_async_event);
  1876. void nvme_queue_async_events(struct nvme_ctrl *ctrl)
  1877. {
  1878. ctrl->event_limit = NVME_NR_AERS;
  1879. schedule_work(&ctrl->async_event_work);
  1880. }
  1881. EXPORT_SYMBOL_GPL(nvme_queue_async_events);
  1882. static DEFINE_IDA(nvme_instance_ida);
  1883. static int nvme_set_instance(struct nvme_ctrl *ctrl)
  1884. {
  1885. int instance, error;
  1886. do {
  1887. if (!ida_pre_get(&nvme_instance_ida, GFP_KERNEL))
  1888. return -ENODEV;
  1889. spin_lock(&dev_list_lock);
  1890. error = ida_get_new(&nvme_instance_ida, &instance);
  1891. spin_unlock(&dev_list_lock);
  1892. } while (error == -EAGAIN);
  1893. if (error)
  1894. return -ENODEV;
  1895. ctrl->instance = instance;
  1896. return 0;
  1897. }
  1898. static void nvme_release_instance(struct nvme_ctrl *ctrl)
  1899. {
  1900. spin_lock(&dev_list_lock);
  1901. ida_remove(&nvme_instance_ida, ctrl->instance);
  1902. spin_unlock(&dev_list_lock);
  1903. }
  1904. void nvme_uninit_ctrl(struct nvme_ctrl *ctrl)
  1905. {
  1906. flush_work(&ctrl->async_event_work);
  1907. flush_work(&ctrl->scan_work);
  1908. nvme_remove_namespaces(ctrl);
  1909. device_destroy(nvme_class, MKDEV(nvme_char_major, ctrl->instance));
  1910. spin_lock(&dev_list_lock);
  1911. list_del(&ctrl->node);
  1912. spin_unlock(&dev_list_lock);
  1913. }
  1914. EXPORT_SYMBOL_GPL(nvme_uninit_ctrl);
  1915. static void nvme_free_ctrl(struct kref *kref)
  1916. {
  1917. struct nvme_ctrl *ctrl = container_of(kref, struct nvme_ctrl, kref);
  1918. put_device(ctrl->device);
  1919. nvme_release_instance(ctrl);
  1920. ida_destroy(&ctrl->ns_ida);
  1921. ctrl->ops->free_ctrl(ctrl);
  1922. }
  1923. void nvme_put_ctrl(struct nvme_ctrl *ctrl)
  1924. {
  1925. kref_put(&ctrl->kref, nvme_free_ctrl);
  1926. }
  1927. EXPORT_SYMBOL_GPL(nvme_put_ctrl);
  1928. /*
  1929. * Initialize a NVMe controller structures. This needs to be called during
  1930. * earliest initialization so that we have the initialized structured around
  1931. * during probing.
  1932. */
  1933. int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev,
  1934. const struct nvme_ctrl_ops *ops, unsigned long quirks)
  1935. {
  1936. int ret;
  1937. ctrl->state = NVME_CTRL_NEW;
  1938. spin_lock_init(&ctrl->lock);
  1939. INIT_LIST_HEAD(&ctrl->namespaces);
  1940. mutex_init(&ctrl->namespaces_mutex);
  1941. kref_init(&ctrl->kref);
  1942. ctrl->dev = dev;
  1943. ctrl->ops = ops;
  1944. ctrl->quirks = quirks;
  1945. INIT_WORK(&ctrl->scan_work, nvme_scan_work);
  1946. INIT_WORK(&ctrl->async_event_work, nvme_async_event_work);
  1947. ret = nvme_set_instance(ctrl);
  1948. if (ret)
  1949. goto out;
  1950. ctrl->device = device_create_with_groups(nvme_class, ctrl->dev,
  1951. MKDEV(nvme_char_major, ctrl->instance),
  1952. ctrl, nvme_dev_attr_groups,
  1953. "nvme%d", ctrl->instance);
  1954. if (IS_ERR(ctrl->device)) {
  1955. ret = PTR_ERR(ctrl->device);
  1956. goto out_release_instance;
  1957. }
  1958. get_device(ctrl->device);
  1959. ida_init(&ctrl->ns_ida);
  1960. spin_lock(&dev_list_lock);
  1961. list_add_tail(&ctrl->node, &nvme_ctrl_list);
  1962. spin_unlock(&dev_list_lock);
  1963. /*
  1964. * Initialize latency tolerance controls. The sysfs files won't
  1965. * be visible to userspace unless the device actually supports APST.
  1966. */
  1967. ctrl->device->power.set_latency_tolerance = nvme_set_latency_tolerance;
  1968. dev_pm_qos_update_user_latency_tolerance(ctrl->device,
  1969. min(default_ps_max_latency_us, (unsigned long)S32_MAX));
  1970. return 0;
  1971. out_release_instance:
  1972. nvme_release_instance(ctrl);
  1973. out:
  1974. return ret;
  1975. }
  1976. EXPORT_SYMBOL_GPL(nvme_init_ctrl);
  1977. /**
  1978. * nvme_kill_queues(): Ends all namespace queues
  1979. * @ctrl: the dead controller that needs to end
  1980. *
  1981. * Call this function when the driver determines it is unable to get the
  1982. * controller in a state capable of servicing IO.
  1983. */
  1984. void nvme_kill_queues(struct nvme_ctrl *ctrl)
  1985. {
  1986. struct nvme_ns *ns;
  1987. mutex_lock(&ctrl->namespaces_mutex);
  1988. list_for_each_entry(ns, &ctrl->namespaces, list) {
  1989. /*
  1990. * Revalidating a dead namespace sets capacity to 0. This will
  1991. * end buffered writers dirtying pages that can't be synced.
  1992. */
  1993. if (!ns->disk || test_and_set_bit(NVME_NS_DEAD, &ns->flags))
  1994. continue;
  1995. revalidate_disk(ns->disk);
  1996. blk_set_queue_dying(ns->queue);
  1997. blk_mq_abort_requeue_list(ns->queue);
  1998. blk_mq_start_stopped_hw_queues(ns->queue, true);
  1999. }
  2000. mutex_unlock(&ctrl->namespaces_mutex);
  2001. }
  2002. EXPORT_SYMBOL_GPL(nvme_kill_queues);
  2003. void nvme_unfreeze(struct nvme_ctrl *ctrl)
  2004. {
  2005. struct nvme_ns *ns;
  2006. mutex_lock(&ctrl->namespaces_mutex);
  2007. list_for_each_entry(ns, &ctrl->namespaces, list)
  2008. blk_mq_unfreeze_queue(ns->queue);
  2009. mutex_unlock(&ctrl->namespaces_mutex);
  2010. }
  2011. EXPORT_SYMBOL_GPL(nvme_unfreeze);
  2012. void nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl, long timeout)
  2013. {
  2014. struct nvme_ns *ns;
  2015. mutex_lock(&ctrl->namespaces_mutex);
  2016. list_for_each_entry(ns, &ctrl->namespaces, list) {
  2017. timeout = blk_mq_freeze_queue_wait_timeout(ns->queue, timeout);
  2018. if (timeout <= 0)
  2019. break;
  2020. }
  2021. mutex_unlock(&ctrl->namespaces_mutex);
  2022. }
  2023. EXPORT_SYMBOL_GPL(nvme_wait_freeze_timeout);
  2024. void nvme_wait_freeze(struct nvme_ctrl *ctrl)
  2025. {
  2026. struct nvme_ns *ns;
  2027. mutex_lock(&ctrl->namespaces_mutex);
  2028. list_for_each_entry(ns, &ctrl->namespaces, list)
  2029. blk_mq_freeze_queue_wait(ns->queue);
  2030. mutex_unlock(&ctrl->namespaces_mutex);
  2031. }
  2032. EXPORT_SYMBOL_GPL(nvme_wait_freeze);
  2033. void nvme_start_freeze(struct nvme_ctrl *ctrl)
  2034. {
  2035. struct nvme_ns *ns;
  2036. mutex_lock(&ctrl->namespaces_mutex);
  2037. list_for_each_entry(ns, &ctrl->namespaces, list)
  2038. blk_freeze_queue_start(ns->queue);
  2039. mutex_unlock(&ctrl->namespaces_mutex);
  2040. }
  2041. EXPORT_SYMBOL_GPL(nvme_start_freeze);
  2042. void nvme_stop_queues(struct nvme_ctrl *ctrl)
  2043. {
  2044. struct nvme_ns *ns;
  2045. mutex_lock(&ctrl->namespaces_mutex);
  2046. list_for_each_entry(ns, &ctrl->namespaces, list)
  2047. blk_mq_quiesce_queue(ns->queue);
  2048. mutex_unlock(&ctrl->namespaces_mutex);
  2049. }
  2050. EXPORT_SYMBOL_GPL(nvme_stop_queues);
  2051. void nvme_start_queues(struct nvme_ctrl *ctrl)
  2052. {
  2053. struct nvme_ns *ns;
  2054. mutex_lock(&ctrl->namespaces_mutex);
  2055. list_for_each_entry(ns, &ctrl->namespaces, list) {
  2056. blk_mq_start_stopped_hw_queues(ns->queue, true);
  2057. blk_mq_kick_requeue_list(ns->queue);
  2058. }
  2059. mutex_unlock(&ctrl->namespaces_mutex);
  2060. }
  2061. EXPORT_SYMBOL_GPL(nvme_start_queues);
  2062. int __init nvme_core_init(void)
  2063. {
  2064. int result;
  2065. result = __register_chrdev(nvme_char_major, 0, NVME_MINORS, "nvme",
  2066. &nvme_dev_fops);
  2067. if (result < 0)
  2068. return result;
  2069. else if (result > 0)
  2070. nvme_char_major = result;
  2071. nvme_class = class_create(THIS_MODULE, "nvme");
  2072. if (IS_ERR(nvme_class)) {
  2073. result = PTR_ERR(nvme_class);
  2074. goto unregister_chrdev;
  2075. }
  2076. return 0;
  2077. unregister_chrdev:
  2078. __unregister_chrdev(nvme_char_major, 0, NVME_MINORS, "nvme");
  2079. return result;
  2080. }
  2081. void nvme_core_exit(void)
  2082. {
  2083. class_destroy(nvme_class);
  2084. __unregister_chrdev(nvme_char_major, 0, NVME_MINORS, "nvme");
  2085. }
  2086. MODULE_LICENSE("GPL");
  2087. MODULE_VERSION("1.0");
  2088. module_init(nvme_core_init);
  2089. module_exit(nvme_core_exit);