fw-api-rx.h 9.3 KB

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  1. /******************************************************************************
  2. *
  3. * This file is provided under a dual BSD/GPLv2 license. When using or
  4. * redistributing this file, you may do so under either license.
  5. *
  6. * GPL LICENSE SUMMARY
  7. *
  8. * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
  9. * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
  10. * Copyright(c) 2015 Intel Deutschland GmbH
  11. *
  12. * This program is free software; you can redistribute it and/or modify
  13. * it under the terms of version 2 of the GNU General Public License as
  14. * published by the Free Software Foundation.
  15. *
  16. * This program is distributed in the hope that it will be useful, but
  17. * WITHOUT ANY WARRANTY; without even the implied warranty of
  18. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  19. * General Public License for more details.
  20. *
  21. * You should have received a copy of the GNU General Public License
  22. * along with this program; if not, write to the Free Software
  23. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
  24. * USA
  25. *
  26. * The full GNU General Public License is included in this distribution
  27. * in the file called COPYING.
  28. *
  29. * Contact Information:
  30. * Intel Linux Wireless <ilw@linux.intel.com>
  31. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  32. *
  33. * BSD LICENSE
  34. *
  35. * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
  36. * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
  37. * Copyright(c) 2015 Intel Deutschland GmbH
  38. * All rights reserved.
  39. *
  40. * Redistribution and use in source and binary forms, with or without
  41. * modification, are permitted provided that the following conditions
  42. * are met:
  43. *
  44. * * Redistributions of source code must retain the above copyright
  45. * notice, this list of conditions and the following disclaimer.
  46. * * Redistributions in binary form must reproduce the above copyright
  47. * notice, this list of conditions and the following disclaimer in
  48. * the documentation and/or other materials provided with the
  49. * distribution.
  50. * * Neither the name Intel Corporation nor the names of its
  51. * contributors may be used to endorse or promote products derived
  52. * from this software without specific prior written permission.
  53. *
  54. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  55. * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  56. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  57. * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  58. * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  59. * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  60. * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  61. * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  62. * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  63. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  64. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  65. *
  66. *****************************************************************************/
  67. #ifndef __fw_api_rx_h__
  68. #define __fw_api_rx_h__
  69. #define IWL_RX_INFO_PHY_CNT 8
  70. #define IWL_RX_INFO_ENERGY_ANT_ABC_IDX 1
  71. #define IWL_RX_INFO_ENERGY_ANT_A_MSK 0x000000ff
  72. #define IWL_RX_INFO_ENERGY_ANT_B_MSK 0x0000ff00
  73. #define IWL_RX_INFO_ENERGY_ANT_C_MSK 0x00ff0000
  74. #define IWL_RX_INFO_ENERGY_ANT_A_POS 0
  75. #define IWL_RX_INFO_ENERGY_ANT_B_POS 8
  76. #define IWL_RX_INFO_ENERGY_ANT_C_POS 16
  77. /**
  78. * struct iwl_rx_phy_info - phy info
  79. * (REPLY_RX_PHY_CMD = 0xc0)
  80. * @non_cfg_phy_cnt: non configurable DSP phy data byte count
  81. * @cfg_phy_cnt: configurable DSP phy data byte count
  82. * @stat_id: configurable DSP phy data set ID
  83. * @reserved1:
  84. * @system_timestamp: GP2 at on air rise
  85. * @timestamp: TSF at on air rise
  86. * @beacon_time_stamp: beacon at on-air rise
  87. * @phy_flags: general phy flags: band, modulation, ...
  88. * @channel: channel number
  89. * @non_cfg_phy_buf: for various implementations of non_cfg_phy
  90. * @rate_n_flags: RATE_MCS_*
  91. * @byte_count: frame's byte-count
  92. * @frame_time: frame's time on the air, based on byte count and frame rate
  93. * calculation
  94. * @mac_active_msk: what MACs were active when the frame was received
  95. *
  96. * Before each Rx, the device sends this data. It contains PHY information
  97. * about the reception of the packet.
  98. */
  99. struct iwl_rx_phy_info {
  100. u8 non_cfg_phy_cnt;
  101. u8 cfg_phy_cnt;
  102. u8 stat_id;
  103. u8 reserved1;
  104. __le32 system_timestamp;
  105. __le64 timestamp;
  106. __le32 beacon_time_stamp;
  107. __le16 phy_flags;
  108. __le16 channel;
  109. __le32 non_cfg_phy[IWL_RX_INFO_PHY_CNT];
  110. __le32 rate_n_flags;
  111. __le32 byte_count;
  112. __le16 mac_active_msk;
  113. __le16 frame_time;
  114. } __packed;
  115. /*
  116. * TCP offload Rx assist info
  117. *
  118. * bits 0:3 - reserved
  119. * bits 4:7 - MIC CRC length
  120. * bits 8:12 - MAC header length
  121. * bit 13 - Padding indication
  122. * bit 14 - A-AMSDU indication
  123. * bit 15 - Offload enabled
  124. */
  125. enum iwl_csum_rx_assist_info {
  126. CSUM_RXA_RESERVED_MASK = 0x000f,
  127. CSUM_RXA_MICSIZE_MASK = 0x00f0,
  128. CSUM_RXA_HEADERLEN_MASK = 0x1f00,
  129. CSUM_RXA_PADD = BIT(13),
  130. CSUM_RXA_AMSDU = BIT(14),
  131. CSUM_RXA_ENA = BIT(15)
  132. };
  133. /**
  134. * struct iwl_rx_mpdu_res_start - phy info
  135. * @assist: see CSUM_RX_ASSIST_ above
  136. */
  137. struct iwl_rx_mpdu_res_start {
  138. __le16 byte_count;
  139. __le16 assist;
  140. } __packed; /* _RX_MPDU_RES_START_API_S_VER_2 */
  141. /**
  142. * enum iwl_rx_phy_flags - to parse %iwl_rx_phy_info phy_flags
  143. * @RX_RES_PHY_FLAGS_BAND_24: true if the packet was received on 2.4 band
  144. * @RX_RES_PHY_FLAGS_MOD_CCK:
  145. * @RX_RES_PHY_FLAGS_SHORT_PREAMBLE: true if packet's preamble was short
  146. * @RX_RES_PHY_FLAGS_NARROW_BAND:
  147. * @RX_RES_PHY_FLAGS_ANTENNA: antenna on which the packet was received
  148. * @RX_RES_PHY_FLAGS_AGG: set if the packet was part of an A-MPDU
  149. * @RX_RES_PHY_FLAGS_OFDM_HT: The frame was an HT frame
  150. * @RX_RES_PHY_FLAGS_OFDM_GF: The frame used GF preamble
  151. * @RX_RES_PHY_FLAGS_OFDM_VHT: The frame was a VHT frame
  152. */
  153. enum iwl_rx_phy_flags {
  154. RX_RES_PHY_FLAGS_BAND_24 = BIT(0),
  155. RX_RES_PHY_FLAGS_MOD_CCK = BIT(1),
  156. RX_RES_PHY_FLAGS_SHORT_PREAMBLE = BIT(2),
  157. RX_RES_PHY_FLAGS_NARROW_BAND = BIT(3),
  158. RX_RES_PHY_FLAGS_ANTENNA = (0x7 << 4),
  159. RX_RES_PHY_FLAGS_ANTENNA_POS = 4,
  160. RX_RES_PHY_FLAGS_AGG = BIT(7),
  161. RX_RES_PHY_FLAGS_OFDM_HT = BIT(8),
  162. RX_RES_PHY_FLAGS_OFDM_GF = BIT(9),
  163. RX_RES_PHY_FLAGS_OFDM_VHT = BIT(10),
  164. };
  165. /**
  166. * enum iwl_mvm_rx_status - written by fw for each Rx packet
  167. * @RX_MPDU_RES_STATUS_CRC_OK: CRC is fine
  168. * @RX_MPDU_RES_STATUS_OVERRUN_OK: there was no RXE overflow
  169. * @RX_MPDU_RES_STATUS_SRC_STA_FOUND:
  170. * @RX_MPDU_RES_STATUS_KEY_VALID:
  171. * @RX_MPDU_RES_STATUS_KEY_PARAM_OK:
  172. * @RX_MPDU_RES_STATUS_ICV_OK: ICV is fine, if not, the packet is destroyed
  173. * @RX_MPDU_RES_STATUS_MIC_OK: used for CCM alg only. TKIP MIC is checked
  174. * in the driver.
  175. * @RX_MPDU_RES_STATUS_TTAK_OK: TTAK is fine
  176. * @RX_MPDU_RES_STATUS_MNG_FRAME_REPLAY_ERR: valid for alg = CCM_CMAC or
  177. * alg = CCM only. Checks replay attack for 11w frames. Relevant only if
  178. * %RX_MPDU_RES_STATUS_ROBUST_MNG_FRAME is set.
  179. * @RX_MPDU_RES_STATUS_SEC_NO_ENC: this frame is not encrypted
  180. * @RX_MPDU_RES_STATUS_SEC_WEP_ENC: this frame is encrypted using WEP
  181. * @RX_MPDU_RES_STATUS_SEC_CCM_ENC: this frame is encrypted using CCM
  182. * @RX_MPDU_RES_STATUS_SEC_TKIP_ENC: this frame is encrypted using TKIP
  183. * @RX_MPDU_RES_STATUS_SEC_CCM_CMAC_ENC: this frame is encrypted using CCM_CMAC
  184. * @RX_MPDU_RES_STATUS_SEC_ENC_ERR: this frame couldn't be decrypted
  185. * @RX_MPDU_RES_STATUS_SEC_ENC_MSK: bitmask of the encryption algorithm
  186. * @RX_MPDU_RES_STATUS_DEC_DONE: this frame has been successfully decrypted
  187. * @RX_MPDU_RES_STATUS_PROTECT_FRAME_BIT_CMP:
  188. * @RX_MPDU_RES_STATUS_EXT_IV_BIT_CMP:
  189. * @RX_MPDU_RES_STATUS_KEY_ID_CMP_BIT:
  190. * @RX_MPDU_RES_STATUS_ROBUST_MNG_FRAME: this frame is an 11w management frame
  191. * @RX_MPDU_RES_STATUS_CSUM_DONE: checksum was done by the hw
  192. * @RX_MPDU_RES_STATUS_CSUM_OK: checksum found no errors
  193. * @RX_MPDU_RES_STATUS_HASH_INDEX_MSK:
  194. * @RX_MPDU_RES_STATUS_STA_ID_MSK:
  195. * @RX_MPDU_RES_STATUS_RRF_KILL:
  196. * @RX_MPDU_RES_STATUS_FILTERING_MSK:
  197. * @RX_MPDU_RES_STATUS2_FILTERING_MSK:
  198. */
  199. enum iwl_mvm_rx_status {
  200. RX_MPDU_RES_STATUS_CRC_OK = BIT(0),
  201. RX_MPDU_RES_STATUS_OVERRUN_OK = BIT(1),
  202. RX_MPDU_RES_STATUS_SRC_STA_FOUND = BIT(2),
  203. RX_MPDU_RES_STATUS_KEY_VALID = BIT(3),
  204. RX_MPDU_RES_STATUS_KEY_PARAM_OK = BIT(4),
  205. RX_MPDU_RES_STATUS_ICV_OK = BIT(5),
  206. RX_MPDU_RES_STATUS_MIC_OK = BIT(6),
  207. RX_MPDU_RES_STATUS_TTAK_OK = BIT(7),
  208. RX_MPDU_RES_STATUS_MNG_FRAME_REPLAY_ERR = BIT(7),
  209. RX_MPDU_RES_STATUS_SEC_NO_ENC = (0 << 8),
  210. RX_MPDU_RES_STATUS_SEC_WEP_ENC = (1 << 8),
  211. RX_MPDU_RES_STATUS_SEC_CCM_ENC = (2 << 8),
  212. RX_MPDU_RES_STATUS_SEC_TKIP_ENC = (3 << 8),
  213. RX_MPDU_RES_STATUS_SEC_EXT_ENC = (4 << 8),
  214. RX_MPDU_RES_STATUS_SEC_CCM_CMAC_ENC = (6 << 8),
  215. RX_MPDU_RES_STATUS_SEC_ENC_ERR = (7 << 8),
  216. RX_MPDU_RES_STATUS_SEC_ENC_MSK = (7 << 8),
  217. RX_MPDU_RES_STATUS_DEC_DONE = BIT(11),
  218. RX_MPDU_RES_STATUS_PROTECT_FRAME_BIT_CMP = BIT(12),
  219. RX_MPDU_RES_STATUS_EXT_IV_BIT_CMP = BIT(13),
  220. RX_MPDU_RES_STATUS_KEY_ID_CMP_BIT = BIT(14),
  221. RX_MPDU_RES_STATUS_ROBUST_MNG_FRAME = BIT(15),
  222. RX_MPDU_RES_STATUS_CSUM_DONE = BIT(16),
  223. RX_MPDU_RES_STATUS_CSUM_OK = BIT(17),
  224. RX_MPDU_RES_STATUS_HASH_INDEX_MSK = (0x3F0000),
  225. RX_MPDU_RES_STATUS_STA_ID_MSK = (0x1f000000),
  226. RX_MPDU_RES_STATUS_RRF_KILL = BIT(29),
  227. RX_MPDU_RES_STATUS_FILTERING_MSK = (0xc00000),
  228. RX_MPDU_RES_STATUS2_FILTERING_MSK = (0xc0000000),
  229. };
  230. #endif /* __fw_api_rx_h__ */