traps.c 27 KB

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  1. /*
  2. * Copyright (C) 1991, 1992 Linus Torvalds
  3. * Copyright (C) 2000, 2001, 2002 Andi Kleen, SuSE Labs
  4. *
  5. * Pentium III FXSR, SSE support
  6. * Gareth Hughes <gareth@valinux.com>, May 2000
  7. */
  8. /*
  9. * Handle hardware traps and faults.
  10. */
  11. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  12. #include <linux/context_tracking.h>
  13. #include <linux/interrupt.h>
  14. #include <linux/kallsyms.h>
  15. #include <linux/spinlock.h>
  16. #include <linux/kprobes.h>
  17. #include <linux/uaccess.h>
  18. #include <linux/kdebug.h>
  19. #include <linux/kgdb.h>
  20. #include <linux/kernel.h>
  21. #include <linux/export.h>
  22. #include <linux/ptrace.h>
  23. #include <linux/uprobes.h>
  24. #include <linux/string.h>
  25. #include <linux/delay.h>
  26. #include <linux/errno.h>
  27. #include <linux/kexec.h>
  28. #include <linux/sched.h>
  29. #include <linux/sched/task_stack.h>
  30. #include <linux/timer.h>
  31. #include <linux/init.h>
  32. #include <linux/bug.h>
  33. #include <linux/nmi.h>
  34. #include <linux/mm.h>
  35. #include <linux/smp.h>
  36. #include <linux/io.h>
  37. #if defined(CONFIG_EDAC)
  38. #include <linux/edac.h>
  39. #endif
  40. #include <asm/stacktrace.h>
  41. #include <asm/processor.h>
  42. #include <asm/debugreg.h>
  43. #include <linux/atomic.h>
  44. #include <asm/text-patching.h>
  45. #include <asm/ftrace.h>
  46. #include <asm/traps.h>
  47. #include <asm/desc.h>
  48. #include <asm/fpu/internal.h>
  49. #include <asm/cpu_entry_area.h>
  50. #include <asm/mce.h>
  51. #include <asm/fixmap.h>
  52. #include <asm/mach_traps.h>
  53. #include <asm/alternative.h>
  54. #include <asm/fpu/xstate.h>
  55. #include <asm/trace/mpx.h>
  56. #include <asm/nospec-branch.h>
  57. #include <asm/mpx.h>
  58. #include <asm/vm86.h>
  59. #include <asm/umip.h>
  60. #ifdef CONFIG_X86_64
  61. #include <asm/x86_init.h>
  62. #include <asm/pgalloc.h>
  63. #include <asm/proto.h>
  64. #else
  65. #include <asm/processor-flags.h>
  66. #include <asm/setup.h>
  67. #include <asm/proto.h>
  68. #endif
  69. DECLARE_BITMAP(system_vectors, NR_VECTORS);
  70. static inline void cond_local_irq_enable(struct pt_regs *regs)
  71. {
  72. if (regs->flags & X86_EFLAGS_IF)
  73. local_irq_enable();
  74. }
  75. static inline void cond_local_irq_disable(struct pt_regs *regs)
  76. {
  77. if (regs->flags & X86_EFLAGS_IF)
  78. local_irq_disable();
  79. }
  80. /*
  81. * In IST context, we explicitly disable preemption. This serves two
  82. * purposes: it makes it much less likely that we would accidentally
  83. * schedule in IST context and it will force a warning if we somehow
  84. * manage to schedule by accident.
  85. */
  86. void ist_enter(struct pt_regs *regs)
  87. {
  88. if (user_mode(regs)) {
  89. RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU");
  90. } else {
  91. /*
  92. * We might have interrupted pretty much anything. In
  93. * fact, if we're a machine check, we can even interrupt
  94. * NMI processing. We don't want in_nmi() to return true,
  95. * but we need to notify RCU.
  96. */
  97. rcu_nmi_enter();
  98. }
  99. preempt_disable();
  100. /* This code is a bit fragile. Test it. */
  101. RCU_LOCKDEP_WARN(!rcu_is_watching(), "ist_enter didn't work");
  102. }
  103. void ist_exit(struct pt_regs *regs)
  104. {
  105. preempt_enable_no_resched();
  106. if (!user_mode(regs))
  107. rcu_nmi_exit();
  108. }
  109. /**
  110. * ist_begin_non_atomic() - begin a non-atomic section in an IST exception
  111. * @regs: regs passed to the IST exception handler
  112. *
  113. * IST exception handlers normally cannot schedule. As a special
  114. * exception, if the exception interrupted userspace code (i.e.
  115. * user_mode(regs) would return true) and the exception was not
  116. * a double fault, it can be safe to schedule. ist_begin_non_atomic()
  117. * begins a non-atomic section within an ist_enter()/ist_exit() region.
  118. * Callers are responsible for enabling interrupts themselves inside
  119. * the non-atomic section, and callers must call ist_end_non_atomic()
  120. * before ist_exit().
  121. */
  122. void ist_begin_non_atomic(struct pt_regs *regs)
  123. {
  124. BUG_ON(!user_mode(regs));
  125. /*
  126. * Sanity check: we need to be on the normal thread stack. This
  127. * will catch asm bugs and any attempt to use ist_preempt_enable
  128. * from double_fault.
  129. */
  130. BUG_ON(!on_thread_stack());
  131. preempt_enable_no_resched();
  132. }
  133. /**
  134. * ist_end_non_atomic() - begin a non-atomic section in an IST exception
  135. *
  136. * Ends a non-atomic section started with ist_begin_non_atomic().
  137. */
  138. void ist_end_non_atomic(void)
  139. {
  140. preempt_disable();
  141. }
  142. int is_valid_bugaddr(unsigned long addr)
  143. {
  144. unsigned short ud;
  145. if (addr < TASK_SIZE_MAX)
  146. return 0;
  147. if (probe_kernel_address((unsigned short *)addr, ud))
  148. return 0;
  149. return ud == INSN_UD0 || ud == INSN_UD2;
  150. }
  151. int fixup_bug(struct pt_regs *regs, int trapnr)
  152. {
  153. if (trapnr != X86_TRAP_UD)
  154. return 0;
  155. switch (report_bug(regs->ip, regs)) {
  156. case BUG_TRAP_TYPE_NONE:
  157. case BUG_TRAP_TYPE_BUG:
  158. break;
  159. case BUG_TRAP_TYPE_WARN:
  160. regs->ip += LEN_UD2;
  161. return 1;
  162. }
  163. return 0;
  164. }
  165. static nokprobe_inline int
  166. do_trap_no_signal(struct task_struct *tsk, int trapnr, char *str,
  167. struct pt_regs *regs, long error_code)
  168. {
  169. if (v8086_mode(regs)) {
  170. /*
  171. * Traps 0, 1, 3, 4, and 5 should be forwarded to vm86.
  172. * On nmi (interrupt 2), do_trap should not be called.
  173. */
  174. if (trapnr < X86_TRAP_UD) {
  175. if (!handle_vm86_trap((struct kernel_vm86_regs *) regs,
  176. error_code, trapnr))
  177. return 0;
  178. }
  179. return -1;
  180. }
  181. if (!user_mode(regs)) {
  182. if (fixup_exception(regs, trapnr))
  183. return 0;
  184. tsk->thread.error_code = error_code;
  185. tsk->thread.trap_nr = trapnr;
  186. die(str, regs, error_code);
  187. }
  188. return -1;
  189. }
  190. static siginfo_t *fill_trap_info(struct pt_regs *regs, int signr, int trapnr,
  191. siginfo_t *info)
  192. {
  193. unsigned long siaddr;
  194. int sicode;
  195. switch (trapnr) {
  196. default:
  197. return SEND_SIG_PRIV;
  198. case X86_TRAP_DE:
  199. sicode = FPE_INTDIV;
  200. siaddr = uprobe_get_trap_addr(regs);
  201. break;
  202. case X86_TRAP_UD:
  203. sicode = ILL_ILLOPN;
  204. siaddr = uprobe_get_trap_addr(regs);
  205. break;
  206. case X86_TRAP_AC:
  207. sicode = BUS_ADRALN;
  208. siaddr = 0;
  209. break;
  210. }
  211. info->si_signo = signr;
  212. info->si_errno = 0;
  213. info->si_code = sicode;
  214. info->si_addr = (void __user *)siaddr;
  215. return info;
  216. }
  217. static void
  218. do_trap(int trapnr, int signr, char *str, struct pt_regs *regs,
  219. long error_code, siginfo_t *info)
  220. {
  221. struct task_struct *tsk = current;
  222. if (!do_trap_no_signal(tsk, trapnr, str, regs, error_code))
  223. return;
  224. /*
  225. * We want error_code and trap_nr set for userspace faults and
  226. * kernelspace faults which result in die(), but not
  227. * kernelspace faults which are fixed up. die() gives the
  228. * process no chance to handle the signal and notice the
  229. * kernel fault information, so that won't result in polluting
  230. * the information about previously queued, but not yet
  231. * delivered, faults. See also do_general_protection below.
  232. */
  233. tsk->thread.error_code = error_code;
  234. tsk->thread.trap_nr = trapnr;
  235. if (show_unhandled_signals && unhandled_signal(tsk, signr) &&
  236. printk_ratelimit()) {
  237. pr_info("%s[%d] trap %s ip:%lx sp:%lx error:%lx",
  238. tsk->comm, tsk->pid, str,
  239. regs->ip, regs->sp, error_code);
  240. print_vma_addr(KERN_CONT " in ", regs->ip);
  241. pr_cont("\n");
  242. }
  243. force_sig_info(signr, info ?: SEND_SIG_PRIV, tsk);
  244. }
  245. NOKPROBE_SYMBOL(do_trap);
  246. static void do_error_trap(struct pt_regs *regs, long error_code, char *str,
  247. unsigned long trapnr, int signr)
  248. {
  249. siginfo_t info;
  250. RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU");
  251. /*
  252. * WARN*()s end up here; fix them up before we call the
  253. * notifier chain.
  254. */
  255. if (!user_mode(regs) && fixup_bug(regs, trapnr))
  256. return;
  257. if (notify_die(DIE_TRAP, str, regs, error_code, trapnr, signr) !=
  258. NOTIFY_STOP) {
  259. cond_local_irq_enable(regs);
  260. clear_siginfo(&info);
  261. do_trap(trapnr, signr, str, regs, error_code,
  262. fill_trap_info(regs, signr, trapnr, &info));
  263. }
  264. }
  265. #define DO_ERROR(trapnr, signr, str, name) \
  266. dotraplinkage void do_##name(struct pt_regs *regs, long error_code) \
  267. { \
  268. do_error_trap(regs, error_code, str, trapnr, signr); \
  269. }
  270. DO_ERROR(X86_TRAP_DE, SIGFPE, "divide error", divide_error)
  271. DO_ERROR(X86_TRAP_OF, SIGSEGV, "overflow", overflow)
  272. DO_ERROR(X86_TRAP_UD, SIGILL, "invalid opcode", invalid_op)
  273. DO_ERROR(X86_TRAP_OLD_MF, SIGFPE, "coprocessor segment overrun",coprocessor_segment_overrun)
  274. DO_ERROR(X86_TRAP_TS, SIGSEGV, "invalid TSS", invalid_TSS)
  275. DO_ERROR(X86_TRAP_NP, SIGBUS, "segment not present", segment_not_present)
  276. DO_ERROR(X86_TRAP_SS, SIGBUS, "stack segment", stack_segment)
  277. DO_ERROR(X86_TRAP_AC, SIGBUS, "alignment check", alignment_check)
  278. #ifdef CONFIG_VMAP_STACK
  279. __visible void __noreturn handle_stack_overflow(const char *message,
  280. struct pt_regs *regs,
  281. unsigned long fault_address)
  282. {
  283. printk(KERN_EMERG "BUG: stack guard page was hit at %p (stack is %p..%p)\n",
  284. (void *)fault_address, current->stack,
  285. (char *)current->stack + THREAD_SIZE - 1);
  286. die(message, regs, 0);
  287. /* Be absolutely certain we don't return. */
  288. panic(message);
  289. }
  290. #endif
  291. #ifdef CONFIG_X86_64
  292. /* Runs on IST stack */
  293. dotraplinkage void do_double_fault(struct pt_regs *regs, long error_code)
  294. {
  295. static const char str[] = "double fault";
  296. struct task_struct *tsk = current;
  297. #ifdef CONFIG_VMAP_STACK
  298. unsigned long cr2;
  299. #endif
  300. #ifdef CONFIG_X86_ESPFIX64
  301. extern unsigned char native_irq_return_iret[];
  302. /*
  303. * If IRET takes a non-IST fault on the espfix64 stack, then we
  304. * end up promoting it to a doublefault. In that case, take
  305. * advantage of the fact that we're not using the normal (TSS.sp0)
  306. * stack right now. We can write a fake #GP(0) frame at TSS.sp0
  307. * and then modify our own IRET frame so that, when we return,
  308. * we land directly at the #GP(0) vector with the stack already
  309. * set up according to its expectations.
  310. *
  311. * The net result is that our #GP handler will think that we
  312. * entered from usermode with the bad user context.
  313. *
  314. * No need for ist_enter here because we don't use RCU.
  315. */
  316. if (((long)regs->sp >> P4D_SHIFT) == ESPFIX_PGD_ENTRY &&
  317. regs->cs == __KERNEL_CS &&
  318. regs->ip == (unsigned long)native_irq_return_iret)
  319. {
  320. struct pt_regs *gpregs = (struct pt_regs *)this_cpu_read(cpu_tss_rw.x86_tss.sp0) - 1;
  321. /*
  322. * regs->sp points to the failing IRET frame on the
  323. * ESPFIX64 stack. Copy it to the entry stack. This fills
  324. * in gpregs->ss through gpregs->ip.
  325. *
  326. */
  327. memmove(&gpregs->ip, (void *)regs->sp, 5*8);
  328. gpregs->orig_ax = 0; /* Missing (lost) #GP error code */
  329. /*
  330. * Adjust our frame so that we return straight to the #GP
  331. * vector with the expected RSP value. This is safe because
  332. * we won't enable interupts or schedule before we invoke
  333. * general_protection, so nothing will clobber the stack
  334. * frame we just set up.
  335. */
  336. regs->ip = (unsigned long)general_protection;
  337. regs->sp = (unsigned long)&gpregs->orig_ax;
  338. /*
  339. * This situation can be triggered by userspace via
  340. * modify_ldt(2) and the return does not take the regular
  341. * user space exit, so a CPU buffer clear is required when
  342. * MDS mitigation is enabled.
  343. */
  344. mds_user_clear_cpu_buffers();
  345. return;
  346. }
  347. #endif
  348. ist_enter(regs);
  349. notify_die(DIE_TRAP, str, regs, error_code, X86_TRAP_DF, SIGSEGV);
  350. tsk->thread.error_code = error_code;
  351. tsk->thread.trap_nr = X86_TRAP_DF;
  352. #ifdef CONFIG_VMAP_STACK
  353. /*
  354. * If we overflow the stack into a guard page, the CPU will fail
  355. * to deliver #PF and will send #DF instead. Similarly, if we
  356. * take any non-IST exception while too close to the bottom of
  357. * the stack, the processor will get a page fault while
  358. * delivering the exception and will generate a double fault.
  359. *
  360. * According to the SDM (footnote in 6.15 under "Interrupt 14 -
  361. * Page-Fault Exception (#PF):
  362. *
  363. * Processors update CR2 whenever a page fault is detected. If a
  364. * second page fault occurs while an earlier page fault is being
  365. * delivered, the faulting linear address of the second fault will
  366. * overwrite the contents of CR2 (replacing the previous
  367. * address). These updates to CR2 occur even if the page fault
  368. * results in a double fault or occurs during the delivery of a
  369. * double fault.
  370. *
  371. * The logic below has a small possibility of incorrectly diagnosing
  372. * some errors as stack overflows. For example, if the IDT or GDT
  373. * gets corrupted such that #GP delivery fails due to a bad descriptor
  374. * causing #GP and we hit this condition while CR2 coincidentally
  375. * points to the stack guard page, we'll think we overflowed the
  376. * stack. Given that we're going to panic one way or another
  377. * if this happens, this isn't necessarily worth fixing.
  378. *
  379. * If necessary, we could improve the test by only diagnosing
  380. * a stack overflow if the saved RSP points within 47 bytes of
  381. * the bottom of the stack: if RSP == tsk_stack + 48 and we
  382. * take an exception, the stack is already aligned and there
  383. * will be enough room SS, RSP, RFLAGS, CS, RIP, and a
  384. * possible error code, so a stack overflow would *not* double
  385. * fault. With any less space left, exception delivery could
  386. * fail, and, as a practical matter, we've overflowed the
  387. * stack even if the actual trigger for the double fault was
  388. * something else.
  389. */
  390. cr2 = read_cr2();
  391. if ((unsigned long)task_stack_page(tsk) - 1 - cr2 < PAGE_SIZE)
  392. handle_stack_overflow("kernel stack overflow (double-fault)", regs, cr2);
  393. #endif
  394. #ifdef CONFIG_DOUBLEFAULT
  395. df_debug(regs, error_code);
  396. #endif
  397. /*
  398. * This is always a kernel trap and never fixable (and thus must
  399. * never return).
  400. */
  401. for (;;)
  402. die(str, regs, error_code);
  403. }
  404. #endif
  405. dotraplinkage void do_bounds(struct pt_regs *regs, long error_code)
  406. {
  407. const struct mpx_bndcsr *bndcsr;
  408. siginfo_t *info;
  409. RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU");
  410. if (notify_die(DIE_TRAP, "bounds", regs, error_code,
  411. X86_TRAP_BR, SIGSEGV) == NOTIFY_STOP)
  412. return;
  413. cond_local_irq_enable(regs);
  414. if (!user_mode(regs))
  415. die("bounds", regs, error_code);
  416. if (!cpu_feature_enabled(X86_FEATURE_MPX)) {
  417. /* The exception is not from Intel MPX */
  418. goto exit_trap;
  419. }
  420. /*
  421. * We need to look at BNDSTATUS to resolve this exception.
  422. * A NULL here might mean that it is in its 'init state',
  423. * which is all zeros which indicates MPX was not
  424. * responsible for the exception.
  425. */
  426. bndcsr = get_xsave_field_ptr(XFEATURE_MASK_BNDCSR);
  427. if (!bndcsr)
  428. goto exit_trap;
  429. trace_bounds_exception_mpx(bndcsr);
  430. /*
  431. * The error code field of the BNDSTATUS register communicates status
  432. * information of a bound range exception #BR or operation involving
  433. * bound directory.
  434. */
  435. switch (bndcsr->bndstatus & MPX_BNDSTA_ERROR_CODE) {
  436. case 2: /* Bound directory has invalid entry. */
  437. if (mpx_handle_bd_fault())
  438. goto exit_trap;
  439. break; /* Success, it was handled */
  440. case 1: /* Bound violation. */
  441. info = mpx_generate_siginfo(regs);
  442. if (IS_ERR(info)) {
  443. /*
  444. * We failed to decode the MPX instruction. Act as if
  445. * the exception was not caused by MPX.
  446. */
  447. goto exit_trap;
  448. }
  449. /*
  450. * Success, we decoded the instruction and retrieved
  451. * an 'info' containing the address being accessed
  452. * which caused the exception. This information
  453. * allows and application to possibly handle the
  454. * #BR exception itself.
  455. */
  456. do_trap(X86_TRAP_BR, SIGSEGV, "bounds", regs, error_code, info);
  457. kfree(info);
  458. break;
  459. case 0: /* No exception caused by Intel MPX operations. */
  460. goto exit_trap;
  461. default:
  462. die("bounds", regs, error_code);
  463. }
  464. return;
  465. exit_trap:
  466. /*
  467. * This path out is for all the cases where we could not
  468. * handle the exception in some way (like allocating a
  469. * table or telling userspace about it. We will also end
  470. * up here if the kernel has MPX turned off at compile
  471. * time..
  472. */
  473. do_trap(X86_TRAP_BR, SIGSEGV, "bounds", regs, error_code, NULL);
  474. }
  475. dotraplinkage void
  476. do_general_protection(struct pt_regs *regs, long error_code)
  477. {
  478. struct task_struct *tsk;
  479. RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU");
  480. cond_local_irq_enable(regs);
  481. if (static_cpu_has(X86_FEATURE_UMIP)) {
  482. if (user_mode(regs) && fixup_umip_exception(regs))
  483. return;
  484. }
  485. if (v8086_mode(regs)) {
  486. local_irq_enable();
  487. handle_vm86_fault((struct kernel_vm86_regs *) regs, error_code);
  488. return;
  489. }
  490. tsk = current;
  491. if (!user_mode(regs)) {
  492. if (fixup_exception(regs, X86_TRAP_GP))
  493. return;
  494. tsk->thread.error_code = error_code;
  495. tsk->thread.trap_nr = X86_TRAP_GP;
  496. if (notify_die(DIE_GPF, "general protection fault", regs, error_code,
  497. X86_TRAP_GP, SIGSEGV) != NOTIFY_STOP)
  498. die("general protection fault", regs, error_code);
  499. return;
  500. }
  501. tsk->thread.error_code = error_code;
  502. tsk->thread.trap_nr = X86_TRAP_GP;
  503. if (show_unhandled_signals && unhandled_signal(tsk, SIGSEGV) &&
  504. printk_ratelimit()) {
  505. pr_info("%s[%d] general protection ip:%lx sp:%lx error:%lx",
  506. tsk->comm, task_pid_nr(tsk),
  507. regs->ip, regs->sp, error_code);
  508. print_vma_addr(KERN_CONT " in ", regs->ip);
  509. pr_cont("\n");
  510. }
  511. force_sig_info(SIGSEGV, SEND_SIG_PRIV, tsk);
  512. }
  513. NOKPROBE_SYMBOL(do_general_protection);
  514. dotraplinkage void notrace do_int3(struct pt_regs *regs, long error_code)
  515. {
  516. #ifdef CONFIG_DYNAMIC_FTRACE
  517. /*
  518. * ftrace must be first, everything else may cause a recursive crash.
  519. * See note by declaration of modifying_ftrace_code in ftrace.c
  520. */
  521. if (unlikely(atomic_read(&modifying_ftrace_code)) &&
  522. ftrace_int3_handler(regs))
  523. return;
  524. #endif
  525. if (poke_int3_handler(regs))
  526. return;
  527. /*
  528. * Use ist_enter despite the fact that we don't use an IST stack.
  529. * We can be called from a kprobe in non-CONTEXT_KERNEL kernel
  530. * mode or even during context tracking state changes.
  531. *
  532. * This means that we can't schedule. That's okay.
  533. */
  534. ist_enter(regs);
  535. RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU");
  536. #ifdef CONFIG_KGDB_LOW_LEVEL_TRAP
  537. if (kgdb_ll_trap(DIE_INT3, "int3", regs, error_code, X86_TRAP_BP,
  538. SIGTRAP) == NOTIFY_STOP)
  539. goto exit;
  540. #endif /* CONFIG_KGDB_LOW_LEVEL_TRAP */
  541. #ifdef CONFIG_KPROBES
  542. if (kprobe_int3_handler(regs))
  543. goto exit;
  544. #endif
  545. if (notify_die(DIE_INT3, "int3", regs, error_code, X86_TRAP_BP,
  546. SIGTRAP) == NOTIFY_STOP)
  547. goto exit;
  548. cond_local_irq_enable(regs);
  549. do_trap(X86_TRAP_BP, SIGTRAP, "int3", regs, error_code, NULL);
  550. cond_local_irq_disable(regs);
  551. exit:
  552. ist_exit(regs);
  553. }
  554. NOKPROBE_SYMBOL(do_int3);
  555. #ifdef CONFIG_X86_64
  556. /*
  557. * Help handler running on a per-cpu (IST or entry trampoline) stack
  558. * to switch to the normal thread stack if the interrupted code was in
  559. * user mode. The actual stack switch is done in entry_64.S
  560. */
  561. asmlinkage __visible notrace struct pt_regs *sync_regs(struct pt_regs *eregs)
  562. {
  563. struct pt_regs *regs = (struct pt_regs *)this_cpu_read(cpu_current_top_of_stack) - 1;
  564. if (regs != eregs)
  565. *regs = *eregs;
  566. return regs;
  567. }
  568. NOKPROBE_SYMBOL(sync_regs);
  569. struct bad_iret_stack {
  570. void *error_entry_ret;
  571. struct pt_regs regs;
  572. };
  573. asmlinkage __visible notrace
  574. struct bad_iret_stack *fixup_bad_iret(struct bad_iret_stack *s)
  575. {
  576. /*
  577. * This is called from entry_64.S early in handling a fault
  578. * caused by a bad iret to user mode. To handle the fault
  579. * correctly, we want to move our stack frame to where it would
  580. * be had we entered directly on the entry stack (rather than
  581. * just below the IRET frame) and we want to pretend that the
  582. * exception came from the IRET target.
  583. */
  584. struct bad_iret_stack *new_stack =
  585. (struct bad_iret_stack *)this_cpu_read(cpu_tss_rw.x86_tss.sp0) - 1;
  586. /* Copy the IRET target to the new stack. */
  587. memmove(&new_stack->regs.ip, (void *)s->regs.sp, 5*8);
  588. /* Copy the remainder of the stack from the current stack. */
  589. memmove(new_stack, s, offsetof(struct bad_iret_stack, regs.ip));
  590. BUG_ON(!user_mode(&new_stack->regs));
  591. return new_stack;
  592. }
  593. NOKPROBE_SYMBOL(fixup_bad_iret);
  594. #endif
  595. static bool is_sysenter_singlestep(struct pt_regs *regs)
  596. {
  597. /*
  598. * We don't try for precision here. If we're anywhere in the region of
  599. * code that can be single-stepped in the SYSENTER entry path, then
  600. * assume that this is a useless single-step trap due to SYSENTER
  601. * being invoked with TF set. (We don't know in advance exactly
  602. * which instructions will be hit because BTF could plausibly
  603. * be set.)
  604. */
  605. #ifdef CONFIG_X86_32
  606. return (regs->ip - (unsigned long)__begin_SYSENTER_singlestep_region) <
  607. (unsigned long)__end_SYSENTER_singlestep_region -
  608. (unsigned long)__begin_SYSENTER_singlestep_region;
  609. #elif defined(CONFIG_IA32_EMULATION)
  610. return (regs->ip - (unsigned long)entry_SYSENTER_compat) <
  611. (unsigned long)__end_entry_SYSENTER_compat -
  612. (unsigned long)entry_SYSENTER_compat;
  613. #else
  614. return false;
  615. #endif
  616. }
  617. /*
  618. * Our handling of the processor debug registers is non-trivial.
  619. * We do not clear them on entry and exit from the kernel. Therefore
  620. * it is possible to get a watchpoint trap here from inside the kernel.
  621. * However, the code in ./ptrace.c has ensured that the user can
  622. * only set watchpoints on userspace addresses. Therefore the in-kernel
  623. * watchpoint trap can only occur in code which is reading/writing
  624. * from user space. Such code must not hold kernel locks (since it
  625. * can equally take a page fault), therefore it is safe to call
  626. * force_sig_info even though that claims and releases locks.
  627. *
  628. * Code in ./signal.c ensures that the debug control register
  629. * is restored before we deliver any signal, and therefore that
  630. * user code runs with the correct debug control register even though
  631. * we clear it here.
  632. *
  633. * Being careful here means that we don't have to be as careful in a
  634. * lot of more complicated places (task switching can be a bit lazy
  635. * about restoring all the debug state, and ptrace doesn't have to
  636. * find every occurrence of the TF bit that could be saved away even
  637. * by user code)
  638. *
  639. * May run on IST stack.
  640. */
  641. dotraplinkage void do_debug(struct pt_regs *regs, long error_code)
  642. {
  643. struct task_struct *tsk = current;
  644. int user_icebp = 0;
  645. unsigned long dr6;
  646. int si_code;
  647. ist_enter(regs);
  648. get_debugreg(dr6, 6);
  649. /*
  650. * The Intel SDM says:
  651. *
  652. * Certain debug exceptions may clear bits 0-3. The remaining
  653. * contents of the DR6 register are never cleared by the
  654. * processor. To avoid confusion in identifying debug
  655. * exceptions, debug handlers should clear the register before
  656. * returning to the interrupted task.
  657. *
  658. * Keep it simple: clear DR6 immediately.
  659. */
  660. set_debugreg(0, 6);
  661. /* Filter out all the reserved bits which are preset to 1 */
  662. dr6 &= ~DR6_RESERVED;
  663. /*
  664. * The SDM says "The processor clears the BTF flag when it
  665. * generates a debug exception." Clear TIF_BLOCKSTEP to keep
  666. * TIF_BLOCKSTEP in sync with the hardware BTF flag.
  667. */
  668. clear_tsk_thread_flag(tsk, TIF_BLOCKSTEP);
  669. if (unlikely(!user_mode(regs) && (dr6 & DR_STEP) &&
  670. is_sysenter_singlestep(regs))) {
  671. dr6 &= ~DR_STEP;
  672. if (!dr6)
  673. goto exit;
  674. /*
  675. * else we might have gotten a single-step trap and hit a
  676. * watchpoint at the same time, in which case we should fall
  677. * through and handle the watchpoint.
  678. */
  679. }
  680. /*
  681. * If dr6 has no reason to give us about the origin of this trap,
  682. * then it's very likely the result of an icebp/int01 trap.
  683. * User wants a sigtrap for that.
  684. */
  685. if (!dr6 && user_mode(regs))
  686. user_icebp = 1;
  687. /* Store the virtualized DR6 value */
  688. tsk->thread.debugreg6 = dr6;
  689. #ifdef CONFIG_KPROBES
  690. if (kprobe_debug_handler(regs))
  691. goto exit;
  692. #endif
  693. if (notify_die(DIE_DEBUG, "debug", regs, (long)&dr6, error_code,
  694. SIGTRAP) == NOTIFY_STOP)
  695. goto exit;
  696. /*
  697. * Let others (NMI) know that the debug stack is in use
  698. * as we may switch to the interrupt stack.
  699. */
  700. debug_stack_usage_inc();
  701. /* It's safe to allow irq's after DR6 has been saved */
  702. cond_local_irq_enable(regs);
  703. if (v8086_mode(regs)) {
  704. handle_vm86_trap((struct kernel_vm86_regs *) regs, error_code,
  705. X86_TRAP_DB);
  706. cond_local_irq_disable(regs);
  707. debug_stack_usage_dec();
  708. goto exit;
  709. }
  710. if (WARN_ON_ONCE((dr6 & DR_STEP) && !user_mode(regs))) {
  711. /*
  712. * Historical junk that used to handle SYSENTER single-stepping.
  713. * This should be unreachable now. If we survive for a while
  714. * without anyone hitting this warning, we'll turn this into
  715. * an oops.
  716. */
  717. tsk->thread.debugreg6 &= ~DR_STEP;
  718. set_tsk_thread_flag(tsk, TIF_SINGLESTEP);
  719. regs->flags &= ~X86_EFLAGS_TF;
  720. }
  721. si_code = get_si_code(tsk->thread.debugreg6);
  722. if (tsk->thread.debugreg6 & (DR_STEP | DR_TRAP_BITS) || user_icebp)
  723. send_sigtrap(tsk, regs, error_code, si_code);
  724. cond_local_irq_disable(regs);
  725. debug_stack_usage_dec();
  726. exit:
  727. ist_exit(regs);
  728. }
  729. NOKPROBE_SYMBOL(do_debug);
  730. /*
  731. * Note that we play around with the 'TS' bit in an attempt to get
  732. * the correct behaviour even in the presence of the asynchronous
  733. * IRQ13 behaviour
  734. */
  735. static void math_error(struct pt_regs *regs, int error_code, int trapnr)
  736. {
  737. struct task_struct *task = current;
  738. struct fpu *fpu = &task->thread.fpu;
  739. siginfo_t info;
  740. char *str = (trapnr == X86_TRAP_MF) ? "fpu exception" :
  741. "simd exception";
  742. cond_local_irq_enable(regs);
  743. if (!user_mode(regs)) {
  744. if (fixup_exception(regs, trapnr))
  745. return;
  746. task->thread.error_code = error_code;
  747. task->thread.trap_nr = trapnr;
  748. if (notify_die(DIE_TRAP, str, regs, error_code,
  749. trapnr, SIGFPE) != NOTIFY_STOP)
  750. die(str, regs, error_code);
  751. return;
  752. }
  753. /*
  754. * Save the info for the exception handler and clear the error.
  755. */
  756. fpu__save(fpu);
  757. task->thread.trap_nr = trapnr;
  758. task->thread.error_code = error_code;
  759. clear_siginfo(&info);
  760. info.si_signo = SIGFPE;
  761. info.si_errno = 0;
  762. info.si_addr = (void __user *)uprobe_get_trap_addr(regs);
  763. info.si_code = fpu__exception_code(fpu, trapnr);
  764. /* Retry when we get spurious exceptions: */
  765. if (!info.si_code)
  766. return;
  767. force_sig_info(SIGFPE, &info, task);
  768. }
  769. dotraplinkage void do_coprocessor_error(struct pt_regs *regs, long error_code)
  770. {
  771. RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU");
  772. math_error(regs, error_code, X86_TRAP_MF);
  773. }
  774. dotraplinkage void
  775. do_simd_coprocessor_error(struct pt_regs *regs, long error_code)
  776. {
  777. RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU");
  778. math_error(regs, error_code, X86_TRAP_XF);
  779. }
  780. dotraplinkage void
  781. do_spurious_interrupt_bug(struct pt_regs *regs, long error_code)
  782. {
  783. cond_local_irq_enable(regs);
  784. }
  785. dotraplinkage void
  786. do_device_not_available(struct pt_regs *regs, long error_code)
  787. {
  788. unsigned long cr0;
  789. RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU");
  790. #ifdef CONFIG_MATH_EMULATION
  791. if (!boot_cpu_has(X86_FEATURE_FPU) && (read_cr0() & X86_CR0_EM)) {
  792. struct math_emu_info info = { };
  793. cond_local_irq_enable(regs);
  794. info.regs = regs;
  795. math_emulate(&info);
  796. return;
  797. }
  798. #endif
  799. /* This should not happen. */
  800. cr0 = read_cr0();
  801. if (WARN(cr0 & X86_CR0_TS, "CR0.TS was set")) {
  802. /* Try to fix it up and carry on. */
  803. write_cr0(cr0 & ~X86_CR0_TS);
  804. } else {
  805. /*
  806. * Something terrible happened, and we're better off trying
  807. * to kill the task than getting stuck in a never-ending
  808. * loop of #NM faults.
  809. */
  810. die("unexpected #NM exception", regs, error_code);
  811. }
  812. }
  813. NOKPROBE_SYMBOL(do_device_not_available);
  814. #ifdef CONFIG_X86_32
  815. dotraplinkage void do_iret_error(struct pt_regs *regs, long error_code)
  816. {
  817. siginfo_t info;
  818. RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU");
  819. local_irq_enable();
  820. clear_siginfo(&info);
  821. info.si_signo = SIGILL;
  822. info.si_errno = 0;
  823. info.si_code = ILL_BADSTK;
  824. info.si_addr = NULL;
  825. if (notify_die(DIE_TRAP, "iret exception", regs, error_code,
  826. X86_TRAP_IRET, SIGILL) != NOTIFY_STOP) {
  827. do_trap(X86_TRAP_IRET, SIGILL, "iret exception", regs, error_code,
  828. &info);
  829. }
  830. }
  831. #endif
  832. void __init trap_init(void)
  833. {
  834. /* Init cpu_entry_area before IST entries are set up */
  835. setup_cpu_entry_areas();
  836. idt_setup_traps();
  837. /*
  838. * Set the IDT descriptor to a fixed read-only location, so that the
  839. * "sidt" instruction will not leak the location of the kernel, and
  840. * to defend the IDT against arbitrary memory write vulnerabilities.
  841. * It will be reloaded in cpu_init() */
  842. cea_set_pte(CPU_ENTRY_AREA_RO_IDT_VADDR, __pa_symbol(idt_table),
  843. PAGE_KERNEL_RO);
  844. idt_descr.address = CPU_ENTRY_AREA_RO_IDT;
  845. /*
  846. * Should be a barrier for any external CPU state:
  847. */
  848. cpu_init();
  849. idt_setup_ist_traps();
  850. x86_init.irqs.trap_init();
  851. idt_setup_debugidt_traps();
  852. }