htt_rx.c 66 KB

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  1. /*
  2. * Copyright (c) 2005-2011 Atheros Communications Inc.
  3. * Copyright (c) 2011-2013 Qualcomm Atheros, Inc.
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for any
  6. * purpose with or without fee is hereby granted, provided that the above
  7. * copyright notice and this permission notice appear in all copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  10. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  11. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  12. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  13. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  14. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  15. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  16. */
  17. #include "core.h"
  18. #include "htc.h"
  19. #include "htt.h"
  20. #include "txrx.h"
  21. #include "debug.h"
  22. #include "trace.h"
  23. #include "mac.h"
  24. #include <linux/log2.h>
  25. #define HTT_RX_RING_SIZE HTT_RX_RING_SIZE_MAX
  26. #define HTT_RX_RING_FILL_LEVEL (((HTT_RX_RING_SIZE) / 2) - 1)
  27. /* when under memory pressure rx ring refill may fail and needs a retry */
  28. #define HTT_RX_RING_REFILL_RETRY_MS 50
  29. static int ath10k_htt_rx_get_csum_state(struct sk_buff *skb);
  30. static void ath10k_htt_txrx_compl_task(unsigned long ptr);
  31. static struct sk_buff *
  32. ath10k_htt_rx_find_skb_paddr(struct ath10k *ar, u32 paddr)
  33. {
  34. struct ath10k_skb_rxcb *rxcb;
  35. hash_for_each_possible(ar->htt.rx_ring.skb_table, rxcb, hlist, paddr)
  36. if (rxcb->paddr == paddr)
  37. return ATH10K_RXCB_SKB(rxcb);
  38. WARN_ON_ONCE(1);
  39. return NULL;
  40. }
  41. static void ath10k_htt_rx_ring_free(struct ath10k_htt *htt)
  42. {
  43. struct sk_buff *skb;
  44. struct ath10k_skb_rxcb *rxcb;
  45. struct hlist_node *n;
  46. int i;
  47. if (htt->rx_ring.in_ord_rx) {
  48. hash_for_each_safe(htt->rx_ring.skb_table, i, n, rxcb, hlist) {
  49. skb = ATH10K_RXCB_SKB(rxcb);
  50. dma_unmap_single(htt->ar->dev, rxcb->paddr,
  51. skb->len + skb_tailroom(skb),
  52. DMA_FROM_DEVICE);
  53. hash_del(&rxcb->hlist);
  54. dev_kfree_skb_any(skb);
  55. }
  56. } else {
  57. for (i = 0; i < htt->rx_ring.size; i++) {
  58. skb = htt->rx_ring.netbufs_ring[i];
  59. if (!skb)
  60. continue;
  61. rxcb = ATH10K_SKB_RXCB(skb);
  62. dma_unmap_single(htt->ar->dev, rxcb->paddr,
  63. skb->len + skb_tailroom(skb),
  64. DMA_FROM_DEVICE);
  65. dev_kfree_skb_any(skb);
  66. }
  67. }
  68. htt->rx_ring.fill_cnt = 0;
  69. hash_init(htt->rx_ring.skb_table);
  70. memset(htt->rx_ring.netbufs_ring, 0,
  71. htt->rx_ring.size * sizeof(htt->rx_ring.netbufs_ring[0]));
  72. }
  73. static int __ath10k_htt_rx_ring_fill_n(struct ath10k_htt *htt, int num)
  74. {
  75. struct htt_rx_desc *rx_desc;
  76. struct ath10k_skb_rxcb *rxcb;
  77. struct sk_buff *skb;
  78. dma_addr_t paddr;
  79. int ret = 0, idx;
  80. /* The Full Rx Reorder firmware has no way of telling the host
  81. * implicitly when it copied HTT Rx Ring buffers to MAC Rx Ring.
  82. * To keep things simple make sure ring is always half empty. This
  83. * guarantees there'll be no replenishment overruns possible.
  84. */
  85. BUILD_BUG_ON(HTT_RX_RING_FILL_LEVEL >= HTT_RX_RING_SIZE / 2);
  86. idx = __le32_to_cpu(*htt->rx_ring.alloc_idx.vaddr);
  87. while (num > 0) {
  88. skb = dev_alloc_skb(HTT_RX_BUF_SIZE + HTT_RX_DESC_ALIGN);
  89. if (!skb) {
  90. ret = -ENOMEM;
  91. goto fail;
  92. }
  93. if (!IS_ALIGNED((unsigned long)skb->data, HTT_RX_DESC_ALIGN))
  94. skb_pull(skb,
  95. PTR_ALIGN(skb->data, HTT_RX_DESC_ALIGN) -
  96. skb->data);
  97. /* Clear rx_desc attention word before posting to Rx ring */
  98. rx_desc = (struct htt_rx_desc *)skb->data;
  99. rx_desc->attention.flags = __cpu_to_le32(0);
  100. paddr = dma_map_single(htt->ar->dev, skb->data,
  101. skb->len + skb_tailroom(skb),
  102. DMA_FROM_DEVICE);
  103. if (unlikely(dma_mapping_error(htt->ar->dev, paddr))) {
  104. dev_kfree_skb_any(skb);
  105. ret = -ENOMEM;
  106. goto fail;
  107. }
  108. rxcb = ATH10K_SKB_RXCB(skb);
  109. rxcb->paddr = paddr;
  110. htt->rx_ring.netbufs_ring[idx] = skb;
  111. htt->rx_ring.paddrs_ring[idx] = __cpu_to_le32(paddr);
  112. htt->rx_ring.fill_cnt++;
  113. if (htt->rx_ring.in_ord_rx) {
  114. hash_add(htt->rx_ring.skb_table,
  115. &ATH10K_SKB_RXCB(skb)->hlist,
  116. (u32)paddr);
  117. }
  118. num--;
  119. idx++;
  120. idx &= htt->rx_ring.size_mask;
  121. }
  122. fail:
  123. /*
  124. * Make sure the rx buffer is updated before available buffer
  125. * index to avoid any potential rx ring corruption.
  126. */
  127. mb();
  128. *htt->rx_ring.alloc_idx.vaddr = __cpu_to_le32(idx);
  129. return ret;
  130. }
  131. static int ath10k_htt_rx_ring_fill_n(struct ath10k_htt *htt, int num)
  132. {
  133. lockdep_assert_held(&htt->rx_ring.lock);
  134. return __ath10k_htt_rx_ring_fill_n(htt, num);
  135. }
  136. static void ath10k_htt_rx_msdu_buff_replenish(struct ath10k_htt *htt)
  137. {
  138. int ret, num_deficit, num_to_fill;
  139. /* Refilling the whole RX ring buffer proves to be a bad idea. The
  140. * reason is RX may take up significant amount of CPU cycles and starve
  141. * other tasks, e.g. TX on an ethernet device while acting as a bridge
  142. * with ath10k wlan interface. This ended up with very poor performance
  143. * once CPU the host system was overwhelmed with RX on ath10k.
  144. *
  145. * By limiting the number of refills the replenishing occurs
  146. * progressively. This in turns makes use of the fact tasklets are
  147. * processed in FIFO order. This means actual RX processing can starve
  148. * out refilling. If there's not enough buffers on RX ring FW will not
  149. * report RX until it is refilled with enough buffers. This
  150. * automatically balances load wrt to CPU power.
  151. *
  152. * This probably comes at a cost of lower maximum throughput but
  153. * improves the average and stability. */
  154. spin_lock_bh(&htt->rx_ring.lock);
  155. num_deficit = htt->rx_ring.fill_level - htt->rx_ring.fill_cnt;
  156. num_to_fill = min(ATH10K_HTT_MAX_NUM_REFILL, num_deficit);
  157. num_deficit -= num_to_fill;
  158. ret = ath10k_htt_rx_ring_fill_n(htt, num_to_fill);
  159. if (ret == -ENOMEM) {
  160. /*
  161. * Failed to fill it to the desired level -
  162. * we'll start a timer and try again next time.
  163. * As long as enough buffers are left in the ring for
  164. * another A-MPDU rx, no special recovery is needed.
  165. */
  166. mod_timer(&htt->rx_ring.refill_retry_timer, jiffies +
  167. msecs_to_jiffies(HTT_RX_RING_REFILL_RETRY_MS));
  168. } else if (num_deficit > 0) {
  169. tasklet_schedule(&htt->rx_replenish_task);
  170. }
  171. spin_unlock_bh(&htt->rx_ring.lock);
  172. }
  173. static void ath10k_htt_rx_ring_refill_retry(unsigned long arg)
  174. {
  175. struct ath10k_htt *htt = (struct ath10k_htt *)arg;
  176. ath10k_htt_rx_msdu_buff_replenish(htt);
  177. }
  178. int ath10k_htt_rx_ring_refill(struct ath10k *ar)
  179. {
  180. struct ath10k_htt *htt = &ar->htt;
  181. int ret;
  182. spin_lock_bh(&htt->rx_ring.lock);
  183. ret = ath10k_htt_rx_ring_fill_n(htt, (htt->rx_ring.fill_level -
  184. htt->rx_ring.fill_cnt));
  185. spin_unlock_bh(&htt->rx_ring.lock);
  186. if (ret)
  187. ath10k_htt_rx_ring_free(htt);
  188. return ret;
  189. }
  190. void ath10k_htt_rx_free(struct ath10k_htt *htt)
  191. {
  192. del_timer_sync(&htt->rx_ring.refill_retry_timer);
  193. tasklet_kill(&htt->rx_replenish_task);
  194. tasklet_kill(&htt->txrx_compl_task);
  195. skb_queue_purge(&htt->rx_compl_q);
  196. skb_queue_purge(&htt->rx_in_ord_compl_q);
  197. skb_queue_purge(&htt->tx_fetch_ind_q);
  198. ath10k_htt_rx_ring_free(htt);
  199. dma_free_coherent(htt->ar->dev,
  200. (htt->rx_ring.size *
  201. sizeof(htt->rx_ring.paddrs_ring)),
  202. htt->rx_ring.paddrs_ring,
  203. htt->rx_ring.base_paddr);
  204. dma_free_coherent(htt->ar->dev,
  205. sizeof(*htt->rx_ring.alloc_idx.vaddr),
  206. htt->rx_ring.alloc_idx.vaddr,
  207. htt->rx_ring.alloc_idx.paddr);
  208. kfree(htt->rx_ring.netbufs_ring);
  209. }
  210. static inline struct sk_buff *ath10k_htt_rx_netbuf_pop(struct ath10k_htt *htt)
  211. {
  212. struct ath10k *ar = htt->ar;
  213. int idx;
  214. struct sk_buff *msdu;
  215. lockdep_assert_held(&htt->rx_ring.lock);
  216. if (htt->rx_ring.fill_cnt == 0) {
  217. ath10k_warn(ar, "tried to pop sk_buff from an empty rx ring\n");
  218. return NULL;
  219. }
  220. idx = htt->rx_ring.sw_rd_idx.msdu_payld;
  221. msdu = htt->rx_ring.netbufs_ring[idx];
  222. htt->rx_ring.netbufs_ring[idx] = NULL;
  223. htt->rx_ring.paddrs_ring[idx] = 0;
  224. idx++;
  225. idx &= htt->rx_ring.size_mask;
  226. htt->rx_ring.sw_rd_idx.msdu_payld = idx;
  227. htt->rx_ring.fill_cnt--;
  228. dma_unmap_single(htt->ar->dev,
  229. ATH10K_SKB_RXCB(msdu)->paddr,
  230. msdu->len + skb_tailroom(msdu),
  231. DMA_FROM_DEVICE);
  232. ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt rx netbuf pop: ",
  233. msdu->data, msdu->len + skb_tailroom(msdu));
  234. return msdu;
  235. }
  236. /* return: < 0 fatal error, 0 - non chained msdu, 1 chained msdu */
  237. static int ath10k_htt_rx_amsdu_pop(struct ath10k_htt *htt,
  238. struct sk_buff_head *amsdu)
  239. {
  240. struct ath10k *ar = htt->ar;
  241. int msdu_len, msdu_chaining = 0;
  242. struct sk_buff *msdu;
  243. struct htt_rx_desc *rx_desc;
  244. lockdep_assert_held(&htt->rx_ring.lock);
  245. for (;;) {
  246. int last_msdu, msdu_len_invalid, msdu_chained;
  247. msdu = ath10k_htt_rx_netbuf_pop(htt);
  248. if (!msdu) {
  249. __skb_queue_purge(amsdu);
  250. return -ENOENT;
  251. }
  252. __skb_queue_tail(amsdu, msdu);
  253. rx_desc = (struct htt_rx_desc *)msdu->data;
  254. /* FIXME: we must report msdu payload since this is what caller
  255. * expects now */
  256. skb_put(msdu, offsetof(struct htt_rx_desc, msdu_payload));
  257. skb_pull(msdu, offsetof(struct htt_rx_desc, msdu_payload));
  258. /*
  259. * Sanity check - confirm the HW is finished filling in the
  260. * rx data.
  261. * If the HW and SW are working correctly, then it's guaranteed
  262. * that the HW's MAC DMA is done before this point in the SW.
  263. * To prevent the case that we handle a stale Rx descriptor,
  264. * just assert for now until we have a way to recover.
  265. */
  266. if (!(__le32_to_cpu(rx_desc->attention.flags)
  267. & RX_ATTENTION_FLAGS_MSDU_DONE)) {
  268. __skb_queue_purge(amsdu);
  269. return -EIO;
  270. }
  271. msdu_len_invalid = !!(__le32_to_cpu(rx_desc->attention.flags)
  272. & (RX_ATTENTION_FLAGS_MPDU_LENGTH_ERR |
  273. RX_ATTENTION_FLAGS_MSDU_LENGTH_ERR));
  274. msdu_len = MS(__le32_to_cpu(rx_desc->msdu_start.common.info0),
  275. RX_MSDU_START_INFO0_MSDU_LENGTH);
  276. msdu_chained = rx_desc->frag_info.ring2_more_count;
  277. if (msdu_len_invalid)
  278. msdu_len = 0;
  279. skb_trim(msdu, 0);
  280. skb_put(msdu, min(msdu_len, HTT_RX_MSDU_SIZE));
  281. msdu_len -= msdu->len;
  282. /* Note: Chained buffers do not contain rx descriptor */
  283. while (msdu_chained--) {
  284. msdu = ath10k_htt_rx_netbuf_pop(htt);
  285. if (!msdu) {
  286. __skb_queue_purge(amsdu);
  287. return -ENOENT;
  288. }
  289. __skb_queue_tail(amsdu, msdu);
  290. skb_trim(msdu, 0);
  291. skb_put(msdu, min(msdu_len, HTT_RX_BUF_SIZE));
  292. msdu_len -= msdu->len;
  293. msdu_chaining = 1;
  294. }
  295. last_msdu = __le32_to_cpu(rx_desc->msdu_end.common.info0) &
  296. RX_MSDU_END_INFO0_LAST_MSDU;
  297. trace_ath10k_htt_rx_desc(ar, &rx_desc->attention,
  298. sizeof(*rx_desc) - sizeof(u32));
  299. if (last_msdu)
  300. break;
  301. }
  302. if (skb_queue_empty(amsdu))
  303. msdu_chaining = -1;
  304. /*
  305. * Don't refill the ring yet.
  306. *
  307. * First, the elements popped here are still in use - it is not
  308. * safe to overwrite them until the matching call to
  309. * mpdu_desc_list_next. Second, for efficiency it is preferable to
  310. * refill the rx ring with 1 PPDU's worth of rx buffers (something
  311. * like 32 x 3 buffers), rather than one MPDU's worth of rx buffers
  312. * (something like 3 buffers). Consequently, we'll rely on the txrx
  313. * SW to tell us when it is done pulling all the PPDU's rx buffers
  314. * out of the rx ring, and then refill it just once.
  315. */
  316. return msdu_chaining;
  317. }
  318. static void ath10k_htt_rx_replenish_task(unsigned long ptr)
  319. {
  320. struct ath10k_htt *htt = (struct ath10k_htt *)ptr;
  321. ath10k_htt_rx_msdu_buff_replenish(htt);
  322. }
  323. static struct sk_buff *ath10k_htt_rx_pop_paddr(struct ath10k_htt *htt,
  324. u32 paddr)
  325. {
  326. struct ath10k *ar = htt->ar;
  327. struct ath10k_skb_rxcb *rxcb;
  328. struct sk_buff *msdu;
  329. lockdep_assert_held(&htt->rx_ring.lock);
  330. msdu = ath10k_htt_rx_find_skb_paddr(ar, paddr);
  331. if (!msdu)
  332. return NULL;
  333. rxcb = ATH10K_SKB_RXCB(msdu);
  334. hash_del(&rxcb->hlist);
  335. htt->rx_ring.fill_cnt--;
  336. dma_unmap_single(htt->ar->dev, rxcb->paddr,
  337. msdu->len + skb_tailroom(msdu),
  338. DMA_FROM_DEVICE);
  339. ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt rx netbuf pop: ",
  340. msdu->data, msdu->len + skb_tailroom(msdu));
  341. return msdu;
  342. }
  343. static int ath10k_htt_rx_pop_paddr_list(struct ath10k_htt *htt,
  344. struct htt_rx_in_ord_ind *ev,
  345. struct sk_buff_head *list)
  346. {
  347. struct ath10k *ar = htt->ar;
  348. struct htt_rx_in_ord_msdu_desc *msdu_desc = ev->msdu_descs;
  349. struct htt_rx_desc *rxd;
  350. struct sk_buff *msdu;
  351. int msdu_count;
  352. bool is_offload;
  353. u32 paddr;
  354. lockdep_assert_held(&htt->rx_ring.lock);
  355. msdu_count = __le16_to_cpu(ev->msdu_count);
  356. is_offload = !!(ev->info & HTT_RX_IN_ORD_IND_INFO_OFFLOAD_MASK);
  357. while (msdu_count--) {
  358. paddr = __le32_to_cpu(msdu_desc->msdu_paddr);
  359. msdu = ath10k_htt_rx_pop_paddr(htt, paddr);
  360. if (!msdu) {
  361. __skb_queue_purge(list);
  362. return -ENOENT;
  363. }
  364. __skb_queue_tail(list, msdu);
  365. if (!is_offload) {
  366. rxd = (void *)msdu->data;
  367. trace_ath10k_htt_rx_desc(ar, rxd, sizeof(*rxd));
  368. skb_put(msdu, sizeof(*rxd));
  369. skb_pull(msdu, sizeof(*rxd));
  370. skb_put(msdu, __le16_to_cpu(msdu_desc->msdu_len));
  371. if (!(__le32_to_cpu(rxd->attention.flags) &
  372. RX_ATTENTION_FLAGS_MSDU_DONE)) {
  373. ath10k_warn(htt->ar, "tried to pop an incomplete frame, oops!\n");
  374. return -EIO;
  375. }
  376. }
  377. msdu_desc++;
  378. }
  379. return 0;
  380. }
  381. int ath10k_htt_rx_alloc(struct ath10k_htt *htt)
  382. {
  383. struct ath10k *ar = htt->ar;
  384. dma_addr_t paddr;
  385. void *vaddr;
  386. size_t size;
  387. struct timer_list *timer = &htt->rx_ring.refill_retry_timer;
  388. htt->rx_confused = false;
  389. /* XXX: The fill level could be changed during runtime in response to
  390. * the host processing latency. Is this really worth it?
  391. */
  392. htt->rx_ring.size = HTT_RX_RING_SIZE;
  393. htt->rx_ring.size_mask = htt->rx_ring.size - 1;
  394. htt->rx_ring.fill_level = HTT_RX_RING_FILL_LEVEL;
  395. if (!is_power_of_2(htt->rx_ring.size)) {
  396. ath10k_warn(ar, "htt rx ring size is not power of 2\n");
  397. return -EINVAL;
  398. }
  399. htt->rx_ring.netbufs_ring =
  400. kzalloc(htt->rx_ring.size * sizeof(struct sk_buff *),
  401. GFP_KERNEL);
  402. if (!htt->rx_ring.netbufs_ring)
  403. goto err_netbuf;
  404. size = htt->rx_ring.size * sizeof(htt->rx_ring.paddrs_ring);
  405. vaddr = dma_alloc_coherent(htt->ar->dev, size, &paddr, GFP_KERNEL);
  406. if (!vaddr)
  407. goto err_dma_ring;
  408. htt->rx_ring.paddrs_ring = vaddr;
  409. htt->rx_ring.base_paddr = paddr;
  410. vaddr = dma_alloc_coherent(htt->ar->dev,
  411. sizeof(*htt->rx_ring.alloc_idx.vaddr),
  412. &paddr, GFP_KERNEL);
  413. if (!vaddr)
  414. goto err_dma_idx;
  415. htt->rx_ring.alloc_idx.vaddr = vaddr;
  416. htt->rx_ring.alloc_idx.paddr = paddr;
  417. htt->rx_ring.sw_rd_idx.msdu_payld = htt->rx_ring.size_mask;
  418. *htt->rx_ring.alloc_idx.vaddr = 0;
  419. /* Initialize the Rx refill retry timer */
  420. setup_timer(timer, ath10k_htt_rx_ring_refill_retry, (unsigned long)htt);
  421. spin_lock_init(&htt->rx_ring.lock);
  422. htt->rx_ring.fill_cnt = 0;
  423. htt->rx_ring.sw_rd_idx.msdu_payld = 0;
  424. hash_init(htt->rx_ring.skb_table);
  425. tasklet_init(&htt->rx_replenish_task, ath10k_htt_rx_replenish_task,
  426. (unsigned long)htt);
  427. skb_queue_head_init(&htt->rx_compl_q);
  428. skb_queue_head_init(&htt->rx_in_ord_compl_q);
  429. skb_queue_head_init(&htt->tx_fetch_ind_q);
  430. atomic_set(&htt->num_mpdus_ready, 0);
  431. tasklet_init(&htt->txrx_compl_task, ath10k_htt_txrx_compl_task,
  432. (unsigned long)htt);
  433. ath10k_dbg(ar, ATH10K_DBG_BOOT, "htt rx ring size %d fill_level %d\n",
  434. htt->rx_ring.size, htt->rx_ring.fill_level);
  435. return 0;
  436. err_dma_idx:
  437. dma_free_coherent(htt->ar->dev,
  438. (htt->rx_ring.size *
  439. sizeof(htt->rx_ring.paddrs_ring)),
  440. htt->rx_ring.paddrs_ring,
  441. htt->rx_ring.base_paddr);
  442. err_dma_ring:
  443. kfree(htt->rx_ring.netbufs_ring);
  444. err_netbuf:
  445. return -ENOMEM;
  446. }
  447. static int ath10k_htt_rx_crypto_param_len(struct ath10k *ar,
  448. enum htt_rx_mpdu_encrypt_type type)
  449. {
  450. switch (type) {
  451. case HTT_RX_MPDU_ENCRYPT_NONE:
  452. return 0;
  453. case HTT_RX_MPDU_ENCRYPT_WEP40:
  454. case HTT_RX_MPDU_ENCRYPT_WEP104:
  455. return IEEE80211_WEP_IV_LEN;
  456. case HTT_RX_MPDU_ENCRYPT_TKIP_WITHOUT_MIC:
  457. case HTT_RX_MPDU_ENCRYPT_TKIP_WPA:
  458. return IEEE80211_TKIP_IV_LEN;
  459. case HTT_RX_MPDU_ENCRYPT_AES_CCM_WPA2:
  460. return IEEE80211_CCMP_HDR_LEN;
  461. case HTT_RX_MPDU_ENCRYPT_WEP128:
  462. case HTT_RX_MPDU_ENCRYPT_WAPI:
  463. break;
  464. }
  465. ath10k_warn(ar, "unsupported encryption type %d\n", type);
  466. return 0;
  467. }
  468. #define MICHAEL_MIC_LEN 8
  469. static int ath10k_htt_rx_crypto_tail_len(struct ath10k *ar,
  470. enum htt_rx_mpdu_encrypt_type type)
  471. {
  472. switch (type) {
  473. case HTT_RX_MPDU_ENCRYPT_NONE:
  474. return 0;
  475. case HTT_RX_MPDU_ENCRYPT_WEP40:
  476. case HTT_RX_MPDU_ENCRYPT_WEP104:
  477. return IEEE80211_WEP_ICV_LEN;
  478. case HTT_RX_MPDU_ENCRYPT_TKIP_WITHOUT_MIC:
  479. case HTT_RX_MPDU_ENCRYPT_TKIP_WPA:
  480. return IEEE80211_TKIP_ICV_LEN;
  481. case HTT_RX_MPDU_ENCRYPT_AES_CCM_WPA2:
  482. return IEEE80211_CCMP_MIC_LEN;
  483. case HTT_RX_MPDU_ENCRYPT_WEP128:
  484. case HTT_RX_MPDU_ENCRYPT_WAPI:
  485. break;
  486. }
  487. ath10k_warn(ar, "unsupported encryption type %d\n", type);
  488. return 0;
  489. }
  490. struct amsdu_subframe_hdr {
  491. u8 dst[ETH_ALEN];
  492. u8 src[ETH_ALEN];
  493. __be16 len;
  494. } __packed;
  495. #define GROUP_ID_IS_SU_MIMO(x) ((x) == 0 || (x) == 63)
  496. static void ath10k_htt_rx_h_rates(struct ath10k *ar,
  497. struct ieee80211_rx_status *status,
  498. struct htt_rx_desc *rxd)
  499. {
  500. struct ieee80211_supported_band *sband;
  501. u8 cck, rate, bw, sgi, mcs, nss;
  502. u8 preamble = 0;
  503. u8 group_id;
  504. u32 info1, info2, info3;
  505. info1 = __le32_to_cpu(rxd->ppdu_start.info1);
  506. info2 = __le32_to_cpu(rxd->ppdu_start.info2);
  507. info3 = __le32_to_cpu(rxd->ppdu_start.info3);
  508. preamble = MS(info1, RX_PPDU_START_INFO1_PREAMBLE_TYPE);
  509. switch (preamble) {
  510. case HTT_RX_LEGACY:
  511. /* To get legacy rate index band is required. Since band can't
  512. * be undefined check if freq is non-zero.
  513. */
  514. if (!status->freq)
  515. return;
  516. cck = info1 & RX_PPDU_START_INFO1_L_SIG_RATE_SELECT;
  517. rate = MS(info1, RX_PPDU_START_INFO1_L_SIG_RATE);
  518. rate &= ~RX_PPDU_START_RATE_FLAG;
  519. sband = &ar->mac.sbands[status->band];
  520. status->rate_idx = ath10k_mac_hw_rate_to_idx(sband, rate, cck);
  521. break;
  522. case HTT_RX_HT:
  523. case HTT_RX_HT_WITH_TXBF:
  524. /* HT-SIG - Table 20-11 in info2 and info3 */
  525. mcs = info2 & 0x1F;
  526. nss = mcs >> 3;
  527. bw = (info2 >> 7) & 1;
  528. sgi = (info3 >> 7) & 1;
  529. status->rate_idx = mcs;
  530. status->flag |= RX_FLAG_HT;
  531. if (sgi)
  532. status->flag |= RX_FLAG_SHORT_GI;
  533. if (bw)
  534. status->flag |= RX_FLAG_40MHZ;
  535. break;
  536. case HTT_RX_VHT:
  537. case HTT_RX_VHT_WITH_TXBF:
  538. /* VHT-SIG-A1 in info2, VHT-SIG-A2 in info3
  539. TODO check this */
  540. bw = info2 & 3;
  541. sgi = info3 & 1;
  542. group_id = (info2 >> 4) & 0x3F;
  543. if (GROUP_ID_IS_SU_MIMO(group_id)) {
  544. mcs = (info3 >> 4) & 0x0F;
  545. nss = ((info2 >> 10) & 0x07) + 1;
  546. } else {
  547. /* Hardware doesn't decode VHT-SIG-B into Rx descriptor
  548. * so it's impossible to decode MCS. Also since
  549. * firmware consumes Group Id Management frames host
  550. * has no knowledge regarding group/user position
  551. * mapping so it's impossible to pick the correct Nsts
  552. * from VHT-SIG-A1.
  553. *
  554. * Bandwidth and SGI are valid so report the rateinfo
  555. * on best-effort basis.
  556. */
  557. mcs = 0;
  558. nss = 1;
  559. }
  560. if (mcs > 0x09) {
  561. ath10k_warn(ar, "invalid MCS received %u\n", mcs);
  562. ath10k_warn(ar, "rxd %08x mpdu start %08x %08x msdu start %08x %08x ppdu start %08x %08x %08x %08x %08x\n",
  563. __le32_to_cpu(rxd->attention.flags),
  564. __le32_to_cpu(rxd->mpdu_start.info0),
  565. __le32_to_cpu(rxd->mpdu_start.info1),
  566. __le32_to_cpu(rxd->msdu_start.common.info0),
  567. __le32_to_cpu(rxd->msdu_start.common.info1),
  568. rxd->ppdu_start.info0,
  569. __le32_to_cpu(rxd->ppdu_start.info1),
  570. __le32_to_cpu(rxd->ppdu_start.info2),
  571. __le32_to_cpu(rxd->ppdu_start.info3),
  572. __le32_to_cpu(rxd->ppdu_start.info4));
  573. ath10k_warn(ar, "msdu end %08x mpdu end %08x\n",
  574. __le32_to_cpu(rxd->msdu_end.common.info0),
  575. __le32_to_cpu(rxd->mpdu_end.info0));
  576. ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL,
  577. "rx desc msdu payload: ",
  578. rxd->msdu_payload, 50);
  579. }
  580. status->rate_idx = mcs;
  581. status->vht_nss = nss;
  582. if (sgi)
  583. status->flag |= RX_FLAG_SHORT_GI;
  584. switch (bw) {
  585. /* 20MHZ */
  586. case 0:
  587. break;
  588. /* 40MHZ */
  589. case 1:
  590. status->flag |= RX_FLAG_40MHZ;
  591. break;
  592. /* 80MHZ */
  593. case 2:
  594. status->vht_flag |= RX_VHT_FLAG_80MHZ;
  595. }
  596. status->flag |= RX_FLAG_VHT;
  597. break;
  598. default:
  599. break;
  600. }
  601. }
  602. static struct ieee80211_channel *
  603. ath10k_htt_rx_h_peer_channel(struct ath10k *ar, struct htt_rx_desc *rxd)
  604. {
  605. struct ath10k_peer *peer;
  606. struct ath10k_vif *arvif;
  607. struct cfg80211_chan_def def;
  608. u16 peer_id;
  609. lockdep_assert_held(&ar->data_lock);
  610. if (!rxd)
  611. return NULL;
  612. if (rxd->attention.flags &
  613. __cpu_to_le32(RX_ATTENTION_FLAGS_PEER_IDX_INVALID))
  614. return NULL;
  615. if (!(rxd->msdu_end.common.info0 &
  616. __cpu_to_le32(RX_MSDU_END_INFO0_FIRST_MSDU)))
  617. return NULL;
  618. peer_id = MS(__le32_to_cpu(rxd->mpdu_start.info0),
  619. RX_MPDU_START_INFO0_PEER_IDX);
  620. peer = ath10k_peer_find_by_id(ar, peer_id);
  621. if (!peer)
  622. return NULL;
  623. arvif = ath10k_get_arvif(ar, peer->vdev_id);
  624. if (WARN_ON_ONCE(!arvif))
  625. return NULL;
  626. if (WARN_ON(ath10k_mac_vif_chan(arvif->vif, &def)))
  627. return NULL;
  628. return def.chan;
  629. }
  630. static struct ieee80211_channel *
  631. ath10k_htt_rx_h_vdev_channel(struct ath10k *ar, u32 vdev_id)
  632. {
  633. struct ath10k_vif *arvif;
  634. struct cfg80211_chan_def def;
  635. lockdep_assert_held(&ar->data_lock);
  636. list_for_each_entry(arvif, &ar->arvifs, list) {
  637. if (arvif->vdev_id == vdev_id &&
  638. ath10k_mac_vif_chan(arvif->vif, &def) == 0)
  639. return def.chan;
  640. }
  641. return NULL;
  642. }
  643. static void
  644. ath10k_htt_rx_h_any_chan_iter(struct ieee80211_hw *hw,
  645. struct ieee80211_chanctx_conf *conf,
  646. void *data)
  647. {
  648. struct cfg80211_chan_def *def = data;
  649. *def = conf->def;
  650. }
  651. static struct ieee80211_channel *
  652. ath10k_htt_rx_h_any_channel(struct ath10k *ar)
  653. {
  654. struct cfg80211_chan_def def = {};
  655. ieee80211_iter_chan_contexts_atomic(ar->hw,
  656. ath10k_htt_rx_h_any_chan_iter,
  657. &def);
  658. return def.chan;
  659. }
  660. static bool ath10k_htt_rx_h_channel(struct ath10k *ar,
  661. struct ieee80211_rx_status *status,
  662. struct htt_rx_desc *rxd,
  663. u32 vdev_id)
  664. {
  665. struct ieee80211_channel *ch;
  666. spin_lock_bh(&ar->data_lock);
  667. ch = ar->scan_channel;
  668. if (!ch)
  669. ch = ar->rx_channel;
  670. if (!ch)
  671. ch = ath10k_htt_rx_h_peer_channel(ar, rxd);
  672. if (!ch)
  673. ch = ath10k_htt_rx_h_vdev_channel(ar, vdev_id);
  674. if (!ch)
  675. ch = ath10k_htt_rx_h_any_channel(ar);
  676. if (!ch)
  677. ch = ar->tgt_oper_chan;
  678. spin_unlock_bh(&ar->data_lock);
  679. if (!ch)
  680. return false;
  681. status->band = ch->band;
  682. status->freq = ch->center_freq;
  683. return true;
  684. }
  685. static void ath10k_htt_rx_h_signal(struct ath10k *ar,
  686. struct ieee80211_rx_status *status,
  687. struct htt_rx_desc *rxd)
  688. {
  689. /* FIXME: Get real NF */
  690. status->signal = ATH10K_DEFAULT_NOISE_FLOOR +
  691. rxd->ppdu_start.rssi_comb;
  692. status->flag &= ~RX_FLAG_NO_SIGNAL_VAL;
  693. }
  694. static void ath10k_htt_rx_h_mactime(struct ath10k *ar,
  695. struct ieee80211_rx_status *status,
  696. struct htt_rx_desc *rxd)
  697. {
  698. /* FIXME: TSF is known only at the end of PPDU, in the last MPDU. This
  699. * means all prior MSDUs in a PPDU are reported to mac80211 without the
  700. * TSF. Is it worth holding frames until end of PPDU is known?
  701. *
  702. * FIXME: Can we get/compute 64bit TSF?
  703. */
  704. status->mactime = __le32_to_cpu(rxd->ppdu_end.common.tsf_timestamp);
  705. status->flag |= RX_FLAG_MACTIME_END;
  706. }
  707. static void ath10k_htt_rx_h_ppdu(struct ath10k *ar,
  708. struct sk_buff_head *amsdu,
  709. struct ieee80211_rx_status *status,
  710. u32 vdev_id)
  711. {
  712. struct sk_buff *first;
  713. struct htt_rx_desc *rxd;
  714. bool is_first_ppdu;
  715. bool is_last_ppdu;
  716. if (skb_queue_empty(amsdu))
  717. return;
  718. first = skb_peek(amsdu);
  719. rxd = (void *)first->data - sizeof(*rxd);
  720. is_first_ppdu = !!(rxd->attention.flags &
  721. __cpu_to_le32(RX_ATTENTION_FLAGS_FIRST_MPDU));
  722. is_last_ppdu = !!(rxd->attention.flags &
  723. __cpu_to_le32(RX_ATTENTION_FLAGS_LAST_MPDU));
  724. if (is_first_ppdu) {
  725. /* New PPDU starts so clear out the old per-PPDU status. */
  726. status->freq = 0;
  727. status->rate_idx = 0;
  728. status->vht_nss = 0;
  729. status->vht_flag &= ~RX_VHT_FLAG_80MHZ;
  730. status->flag &= ~(RX_FLAG_HT |
  731. RX_FLAG_VHT |
  732. RX_FLAG_SHORT_GI |
  733. RX_FLAG_40MHZ |
  734. RX_FLAG_MACTIME_END);
  735. status->flag |= RX_FLAG_NO_SIGNAL_VAL;
  736. ath10k_htt_rx_h_signal(ar, status, rxd);
  737. ath10k_htt_rx_h_channel(ar, status, rxd, vdev_id);
  738. ath10k_htt_rx_h_rates(ar, status, rxd);
  739. }
  740. if (is_last_ppdu)
  741. ath10k_htt_rx_h_mactime(ar, status, rxd);
  742. }
  743. static const char * const tid_to_ac[] = {
  744. "BE",
  745. "BK",
  746. "BK",
  747. "BE",
  748. "VI",
  749. "VI",
  750. "VO",
  751. "VO",
  752. };
  753. static char *ath10k_get_tid(struct ieee80211_hdr *hdr, char *out, size_t size)
  754. {
  755. u8 *qc;
  756. int tid;
  757. if (!ieee80211_is_data_qos(hdr->frame_control))
  758. return "";
  759. qc = ieee80211_get_qos_ctl(hdr);
  760. tid = *qc & IEEE80211_QOS_CTL_TID_MASK;
  761. if (tid < 8)
  762. snprintf(out, size, "tid %d (%s)", tid, tid_to_ac[tid]);
  763. else
  764. snprintf(out, size, "tid %d", tid);
  765. return out;
  766. }
  767. static void ath10k_process_rx(struct ath10k *ar,
  768. struct ieee80211_rx_status *rx_status,
  769. struct sk_buff *skb)
  770. {
  771. struct ieee80211_rx_status *status;
  772. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  773. char tid[32];
  774. status = IEEE80211_SKB_RXCB(skb);
  775. *status = *rx_status;
  776. ath10k_dbg(ar, ATH10K_DBG_DATA,
  777. "rx skb %p len %u peer %pM %s %s sn %u %s%s%s%s%s %srate_idx %u vht_nss %u freq %u band %u flag 0x%x fcs-err %i mic-err %i amsdu-more %i\n",
  778. skb,
  779. skb->len,
  780. ieee80211_get_SA(hdr),
  781. ath10k_get_tid(hdr, tid, sizeof(tid)),
  782. is_multicast_ether_addr(ieee80211_get_DA(hdr)) ?
  783. "mcast" : "ucast",
  784. (__le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_SEQ) >> 4,
  785. status->flag == 0 ? "legacy" : "",
  786. status->flag & RX_FLAG_HT ? "ht" : "",
  787. status->flag & RX_FLAG_VHT ? "vht" : "",
  788. status->flag & RX_FLAG_40MHZ ? "40" : "",
  789. status->vht_flag & RX_VHT_FLAG_80MHZ ? "80" : "",
  790. status->flag & RX_FLAG_SHORT_GI ? "sgi " : "",
  791. status->rate_idx,
  792. status->vht_nss,
  793. status->freq,
  794. status->band, status->flag,
  795. !!(status->flag & RX_FLAG_FAILED_FCS_CRC),
  796. !!(status->flag & RX_FLAG_MMIC_ERROR),
  797. !!(status->flag & RX_FLAG_AMSDU_MORE));
  798. ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "rx skb: ",
  799. skb->data, skb->len);
  800. trace_ath10k_rx_hdr(ar, skb->data, skb->len);
  801. trace_ath10k_rx_payload(ar, skb->data, skb->len);
  802. ieee80211_rx(ar->hw, skb);
  803. }
  804. static int ath10k_htt_rx_nwifi_hdrlen(struct ath10k *ar,
  805. struct ieee80211_hdr *hdr)
  806. {
  807. int len = ieee80211_hdrlen(hdr->frame_control);
  808. if (!test_bit(ATH10K_FW_FEATURE_NO_NWIFI_DECAP_4ADDR_PADDING,
  809. ar->fw_features))
  810. len = round_up(len, 4);
  811. return len;
  812. }
  813. static void ath10k_htt_rx_h_undecap_raw(struct ath10k *ar,
  814. struct sk_buff *msdu,
  815. struct ieee80211_rx_status *status,
  816. enum htt_rx_mpdu_encrypt_type enctype,
  817. bool is_decrypted)
  818. {
  819. struct ieee80211_hdr *hdr;
  820. struct htt_rx_desc *rxd;
  821. size_t hdr_len;
  822. size_t crypto_len;
  823. bool is_first;
  824. bool is_last;
  825. rxd = (void *)msdu->data - sizeof(*rxd);
  826. is_first = !!(rxd->msdu_end.common.info0 &
  827. __cpu_to_le32(RX_MSDU_END_INFO0_FIRST_MSDU));
  828. is_last = !!(rxd->msdu_end.common.info0 &
  829. __cpu_to_le32(RX_MSDU_END_INFO0_LAST_MSDU));
  830. /* Delivered decapped frame:
  831. * [802.11 header]
  832. * [crypto param] <-- can be trimmed if !fcs_err &&
  833. * !decrypt_err && !peer_idx_invalid
  834. * [amsdu header] <-- only if A-MSDU
  835. * [rfc1042/llc]
  836. * [payload]
  837. * [FCS] <-- at end, needs to be trimmed
  838. */
  839. /* This probably shouldn't happen but warn just in case */
  840. if (unlikely(WARN_ON_ONCE(!is_first)))
  841. return;
  842. /* This probably shouldn't happen but warn just in case */
  843. if (unlikely(WARN_ON_ONCE(!(is_first && is_last))))
  844. return;
  845. skb_trim(msdu, msdu->len - FCS_LEN);
  846. /* In most cases this will be true for sniffed frames. It makes sense
  847. * to deliver them as-is without stripping the crypto param. This is
  848. * necessary for software based decryption.
  849. *
  850. * If there's no error then the frame is decrypted. At least that is
  851. * the case for frames that come in via fragmented rx indication.
  852. */
  853. if (!is_decrypted)
  854. return;
  855. /* The payload is decrypted so strip crypto params. Start from tail
  856. * since hdr is used to compute some stuff.
  857. */
  858. hdr = (void *)msdu->data;
  859. /* Tail */
  860. if (status->flag & RX_FLAG_IV_STRIPPED)
  861. skb_trim(msdu, msdu->len -
  862. ath10k_htt_rx_crypto_tail_len(ar, enctype));
  863. /* MMIC */
  864. if ((status->flag & RX_FLAG_MMIC_STRIPPED) &&
  865. !ieee80211_has_morefrags(hdr->frame_control) &&
  866. enctype == HTT_RX_MPDU_ENCRYPT_TKIP_WPA)
  867. skb_trim(msdu, msdu->len - 8);
  868. /* Head */
  869. if (status->flag & RX_FLAG_IV_STRIPPED) {
  870. hdr_len = ieee80211_hdrlen(hdr->frame_control);
  871. crypto_len = ath10k_htt_rx_crypto_param_len(ar, enctype);
  872. memmove((void *)msdu->data + crypto_len,
  873. (void *)msdu->data, hdr_len);
  874. skb_pull(msdu, crypto_len);
  875. }
  876. }
  877. static void ath10k_htt_rx_h_undecap_nwifi(struct ath10k *ar,
  878. struct sk_buff *msdu,
  879. struct ieee80211_rx_status *status,
  880. const u8 first_hdr[64])
  881. {
  882. struct ieee80211_hdr *hdr;
  883. size_t hdr_len;
  884. u8 da[ETH_ALEN];
  885. u8 sa[ETH_ALEN];
  886. /* Delivered decapped frame:
  887. * [nwifi 802.11 header] <-- replaced with 802.11 hdr
  888. * [rfc1042/llc]
  889. *
  890. * Note: The nwifi header doesn't have QoS Control and is
  891. * (always?) a 3addr frame.
  892. *
  893. * Note2: There's no A-MSDU subframe header. Even if it's part
  894. * of an A-MSDU.
  895. */
  896. /* pull decapped header and copy SA & DA */
  897. if ((ar->hw_params.hw_4addr_pad == ATH10K_HW_4ADDR_PAD_BEFORE) &&
  898. ieee80211_has_a4(((struct ieee80211_hdr *)first_hdr)->frame_control)) {
  899. /* The QCA99X0 4 address mode pad 2 bytes at the
  900. * beginning of MSDU
  901. */
  902. hdr = (struct ieee80211_hdr *)(msdu->data + 2);
  903. /* The skb length need be extended 2 as the 2 bytes at the tail
  904. * be excluded due to the padding
  905. */
  906. skb_put(msdu, 2);
  907. } else {
  908. hdr = (struct ieee80211_hdr *)(msdu->data);
  909. }
  910. hdr_len = ath10k_htt_rx_nwifi_hdrlen(ar, hdr);
  911. ether_addr_copy(da, ieee80211_get_DA(hdr));
  912. ether_addr_copy(sa, ieee80211_get_SA(hdr));
  913. skb_pull(msdu, hdr_len);
  914. /* push original 802.11 header */
  915. hdr = (struct ieee80211_hdr *)first_hdr;
  916. hdr_len = ieee80211_hdrlen(hdr->frame_control);
  917. memcpy(skb_push(msdu, hdr_len), hdr, hdr_len);
  918. /* original 802.11 header has a different DA and in
  919. * case of 4addr it may also have different SA
  920. */
  921. hdr = (struct ieee80211_hdr *)msdu->data;
  922. ether_addr_copy(ieee80211_get_DA(hdr), da);
  923. ether_addr_copy(ieee80211_get_SA(hdr), sa);
  924. }
  925. static void *ath10k_htt_rx_h_find_rfc1042(struct ath10k *ar,
  926. struct sk_buff *msdu,
  927. enum htt_rx_mpdu_encrypt_type enctype)
  928. {
  929. struct ieee80211_hdr *hdr;
  930. struct htt_rx_desc *rxd;
  931. size_t hdr_len, crypto_len;
  932. void *rfc1042;
  933. bool is_first, is_last, is_amsdu;
  934. rxd = (void *)msdu->data - sizeof(*rxd);
  935. hdr = (void *)rxd->rx_hdr_status;
  936. is_first = !!(rxd->msdu_end.common.info0 &
  937. __cpu_to_le32(RX_MSDU_END_INFO0_FIRST_MSDU));
  938. is_last = !!(rxd->msdu_end.common.info0 &
  939. __cpu_to_le32(RX_MSDU_END_INFO0_LAST_MSDU));
  940. is_amsdu = !(is_first && is_last);
  941. rfc1042 = hdr;
  942. if (is_first) {
  943. hdr_len = ieee80211_hdrlen(hdr->frame_control);
  944. crypto_len = ath10k_htt_rx_crypto_param_len(ar, enctype);
  945. rfc1042 += round_up(hdr_len, 4) +
  946. round_up(crypto_len, 4);
  947. }
  948. if (is_amsdu)
  949. rfc1042 += sizeof(struct amsdu_subframe_hdr);
  950. return rfc1042;
  951. }
  952. static void ath10k_htt_rx_h_undecap_eth(struct ath10k *ar,
  953. struct sk_buff *msdu,
  954. struct ieee80211_rx_status *status,
  955. const u8 first_hdr[64],
  956. enum htt_rx_mpdu_encrypt_type enctype)
  957. {
  958. struct ieee80211_hdr *hdr;
  959. struct ethhdr *eth;
  960. size_t hdr_len;
  961. void *rfc1042;
  962. u8 da[ETH_ALEN];
  963. u8 sa[ETH_ALEN];
  964. /* Delivered decapped frame:
  965. * [eth header] <-- replaced with 802.11 hdr & rfc1042/llc
  966. * [payload]
  967. */
  968. rfc1042 = ath10k_htt_rx_h_find_rfc1042(ar, msdu, enctype);
  969. if (WARN_ON_ONCE(!rfc1042))
  970. return;
  971. /* pull decapped header and copy SA & DA */
  972. eth = (struct ethhdr *)msdu->data;
  973. ether_addr_copy(da, eth->h_dest);
  974. ether_addr_copy(sa, eth->h_source);
  975. skb_pull(msdu, sizeof(struct ethhdr));
  976. /* push rfc1042/llc/snap */
  977. memcpy(skb_push(msdu, sizeof(struct rfc1042_hdr)), rfc1042,
  978. sizeof(struct rfc1042_hdr));
  979. /* push original 802.11 header */
  980. hdr = (struct ieee80211_hdr *)first_hdr;
  981. hdr_len = ieee80211_hdrlen(hdr->frame_control);
  982. memcpy(skb_push(msdu, hdr_len), hdr, hdr_len);
  983. /* original 802.11 header has a different DA and in
  984. * case of 4addr it may also have different SA
  985. */
  986. hdr = (struct ieee80211_hdr *)msdu->data;
  987. ether_addr_copy(ieee80211_get_DA(hdr), da);
  988. ether_addr_copy(ieee80211_get_SA(hdr), sa);
  989. }
  990. static void ath10k_htt_rx_h_undecap_snap(struct ath10k *ar,
  991. struct sk_buff *msdu,
  992. struct ieee80211_rx_status *status,
  993. const u8 first_hdr[64])
  994. {
  995. struct ieee80211_hdr *hdr;
  996. size_t hdr_len;
  997. /* Delivered decapped frame:
  998. * [amsdu header] <-- replaced with 802.11 hdr
  999. * [rfc1042/llc]
  1000. * [payload]
  1001. */
  1002. skb_pull(msdu, sizeof(struct amsdu_subframe_hdr));
  1003. hdr = (struct ieee80211_hdr *)first_hdr;
  1004. hdr_len = ieee80211_hdrlen(hdr->frame_control);
  1005. memcpy(skb_push(msdu, hdr_len), hdr, hdr_len);
  1006. }
  1007. static void ath10k_htt_rx_h_undecap(struct ath10k *ar,
  1008. struct sk_buff *msdu,
  1009. struct ieee80211_rx_status *status,
  1010. u8 first_hdr[64],
  1011. enum htt_rx_mpdu_encrypt_type enctype,
  1012. bool is_decrypted)
  1013. {
  1014. struct htt_rx_desc *rxd;
  1015. enum rx_msdu_decap_format decap;
  1016. /* First msdu's decapped header:
  1017. * [802.11 header] <-- padded to 4 bytes long
  1018. * [crypto param] <-- padded to 4 bytes long
  1019. * [amsdu header] <-- only if A-MSDU
  1020. * [rfc1042/llc]
  1021. *
  1022. * Other (2nd, 3rd, ..) msdu's decapped header:
  1023. * [amsdu header] <-- only if A-MSDU
  1024. * [rfc1042/llc]
  1025. */
  1026. rxd = (void *)msdu->data - sizeof(*rxd);
  1027. decap = MS(__le32_to_cpu(rxd->msdu_start.common.info1),
  1028. RX_MSDU_START_INFO1_DECAP_FORMAT);
  1029. switch (decap) {
  1030. case RX_MSDU_DECAP_RAW:
  1031. ath10k_htt_rx_h_undecap_raw(ar, msdu, status, enctype,
  1032. is_decrypted);
  1033. break;
  1034. case RX_MSDU_DECAP_NATIVE_WIFI:
  1035. ath10k_htt_rx_h_undecap_nwifi(ar, msdu, status, first_hdr);
  1036. break;
  1037. case RX_MSDU_DECAP_ETHERNET2_DIX:
  1038. ath10k_htt_rx_h_undecap_eth(ar, msdu, status, first_hdr, enctype);
  1039. break;
  1040. case RX_MSDU_DECAP_8023_SNAP_LLC:
  1041. ath10k_htt_rx_h_undecap_snap(ar, msdu, status, first_hdr);
  1042. break;
  1043. }
  1044. }
  1045. static int ath10k_htt_rx_get_csum_state(struct sk_buff *skb)
  1046. {
  1047. struct htt_rx_desc *rxd;
  1048. u32 flags, info;
  1049. bool is_ip4, is_ip6;
  1050. bool is_tcp, is_udp;
  1051. bool ip_csum_ok, tcpudp_csum_ok;
  1052. rxd = (void *)skb->data - sizeof(*rxd);
  1053. flags = __le32_to_cpu(rxd->attention.flags);
  1054. info = __le32_to_cpu(rxd->msdu_start.common.info1);
  1055. is_ip4 = !!(info & RX_MSDU_START_INFO1_IPV4_PROTO);
  1056. is_ip6 = !!(info & RX_MSDU_START_INFO1_IPV6_PROTO);
  1057. is_tcp = !!(info & RX_MSDU_START_INFO1_TCP_PROTO);
  1058. is_udp = !!(info & RX_MSDU_START_INFO1_UDP_PROTO);
  1059. ip_csum_ok = !(flags & RX_ATTENTION_FLAGS_IP_CHKSUM_FAIL);
  1060. tcpudp_csum_ok = !(flags & RX_ATTENTION_FLAGS_TCP_UDP_CHKSUM_FAIL);
  1061. if (!is_ip4 && !is_ip6)
  1062. return CHECKSUM_NONE;
  1063. if (!is_tcp && !is_udp)
  1064. return CHECKSUM_NONE;
  1065. if (!ip_csum_ok)
  1066. return CHECKSUM_NONE;
  1067. if (!tcpudp_csum_ok)
  1068. return CHECKSUM_NONE;
  1069. return CHECKSUM_UNNECESSARY;
  1070. }
  1071. static void ath10k_htt_rx_h_csum_offload(struct sk_buff *msdu)
  1072. {
  1073. msdu->ip_summed = ath10k_htt_rx_get_csum_state(msdu);
  1074. }
  1075. static void ath10k_htt_rx_h_mpdu(struct ath10k *ar,
  1076. struct sk_buff_head *amsdu,
  1077. struct ieee80211_rx_status *status)
  1078. {
  1079. struct sk_buff *first;
  1080. struct sk_buff *last;
  1081. struct sk_buff *msdu;
  1082. struct htt_rx_desc *rxd;
  1083. struct ieee80211_hdr *hdr;
  1084. enum htt_rx_mpdu_encrypt_type enctype;
  1085. u8 first_hdr[64];
  1086. u8 *qos;
  1087. size_t hdr_len;
  1088. bool has_fcs_err;
  1089. bool has_crypto_err;
  1090. bool has_tkip_err;
  1091. bool has_peer_idx_invalid;
  1092. bool is_decrypted;
  1093. bool is_mgmt;
  1094. u32 attention;
  1095. if (skb_queue_empty(amsdu))
  1096. return;
  1097. first = skb_peek(amsdu);
  1098. rxd = (void *)first->data - sizeof(*rxd);
  1099. is_mgmt = !!(rxd->attention.flags &
  1100. __cpu_to_le32(RX_ATTENTION_FLAGS_MGMT_TYPE));
  1101. enctype = MS(__le32_to_cpu(rxd->mpdu_start.info0),
  1102. RX_MPDU_START_INFO0_ENCRYPT_TYPE);
  1103. /* First MSDU's Rx descriptor in an A-MSDU contains full 802.11
  1104. * decapped header. It'll be used for undecapping of each MSDU.
  1105. */
  1106. hdr = (void *)rxd->rx_hdr_status;
  1107. hdr_len = ieee80211_hdrlen(hdr->frame_control);
  1108. memcpy(first_hdr, hdr, hdr_len);
  1109. /* Each A-MSDU subframe will use the original header as the base and be
  1110. * reported as a separate MSDU so strip the A-MSDU bit from QoS Ctl.
  1111. */
  1112. hdr = (void *)first_hdr;
  1113. qos = ieee80211_get_qos_ctl(hdr);
  1114. qos[0] &= ~IEEE80211_QOS_CTL_A_MSDU_PRESENT;
  1115. /* Some attention flags are valid only in the last MSDU. */
  1116. last = skb_peek_tail(amsdu);
  1117. rxd = (void *)last->data - sizeof(*rxd);
  1118. attention = __le32_to_cpu(rxd->attention.flags);
  1119. has_fcs_err = !!(attention & RX_ATTENTION_FLAGS_FCS_ERR);
  1120. has_crypto_err = !!(attention & RX_ATTENTION_FLAGS_DECRYPT_ERR);
  1121. has_tkip_err = !!(attention & RX_ATTENTION_FLAGS_TKIP_MIC_ERR);
  1122. has_peer_idx_invalid = !!(attention & RX_ATTENTION_FLAGS_PEER_IDX_INVALID);
  1123. /* Note: If hardware captures an encrypted frame that it can't decrypt,
  1124. * e.g. due to fcs error, missing peer or invalid key data it will
  1125. * report the frame as raw.
  1126. */
  1127. is_decrypted = (enctype != HTT_RX_MPDU_ENCRYPT_NONE &&
  1128. !has_fcs_err &&
  1129. !has_crypto_err &&
  1130. !has_peer_idx_invalid);
  1131. /* Clear per-MPDU flags while leaving per-PPDU flags intact. */
  1132. status->flag &= ~(RX_FLAG_FAILED_FCS_CRC |
  1133. RX_FLAG_MMIC_ERROR |
  1134. RX_FLAG_DECRYPTED |
  1135. RX_FLAG_IV_STRIPPED |
  1136. RX_FLAG_ONLY_MONITOR |
  1137. RX_FLAG_MMIC_STRIPPED);
  1138. if (has_fcs_err)
  1139. status->flag |= RX_FLAG_FAILED_FCS_CRC;
  1140. if (has_tkip_err)
  1141. status->flag |= RX_FLAG_MMIC_ERROR;
  1142. /* Firmware reports all necessary management frames via WMI already.
  1143. * They are not reported to monitor interfaces at all so pass the ones
  1144. * coming via HTT to monitor interfaces instead. This simplifies
  1145. * matters a lot.
  1146. */
  1147. if (is_mgmt)
  1148. status->flag |= RX_FLAG_ONLY_MONITOR;
  1149. if (is_decrypted) {
  1150. status->flag |= RX_FLAG_DECRYPTED;
  1151. if (likely(!is_mgmt))
  1152. status->flag |= RX_FLAG_IV_STRIPPED |
  1153. RX_FLAG_MMIC_STRIPPED;
  1154. }
  1155. skb_queue_walk(amsdu, msdu) {
  1156. ath10k_htt_rx_h_csum_offload(msdu);
  1157. ath10k_htt_rx_h_undecap(ar, msdu, status, first_hdr, enctype,
  1158. is_decrypted);
  1159. /* Undecapping involves copying the original 802.11 header back
  1160. * to sk_buff. If frame is protected and hardware has decrypted
  1161. * it then remove the protected bit.
  1162. */
  1163. if (!is_decrypted)
  1164. continue;
  1165. if (is_mgmt)
  1166. continue;
  1167. hdr = (void *)msdu->data;
  1168. hdr->frame_control &= ~__cpu_to_le16(IEEE80211_FCTL_PROTECTED);
  1169. }
  1170. }
  1171. static void ath10k_htt_rx_h_deliver(struct ath10k *ar,
  1172. struct sk_buff_head *amsdu,
  1173. struct ieee80211_rx_status *status)
  1174. {
  1175. struct sk_buff *msdu;
  1176. while ((msdu = __skb_dequeue(amsdu))) {
  1177. /* Setup per-MSDU flags */
  1178. if (skb_queue_empty(amsdu))
  1179. status->flag &= ~RX_FLAG_AMSDU_MORE;
  1180. else
  1181. status->flag |= RX_FLAG_AMSDU_MORE;
  1182. ath10k_process_rx(ar, status, msdu);
  1183. }
  1184. }
  1185. static int ath10k_unchain_msdu(struct sk_buff_head *amsdu)
  1186. {
  1187. struct sk_buff *skb, *first;
  1188. int space;
  1189. int total_len = 0;
  1190. /* TODO: Might could optimize this by using
  1191. * skb_try_coalesce or similar method to
  1192. * decrease copying, or maybe get mac80211 to
  1193. * provide a way to just receive a list of
  1194. * skb?
  1195. */
  1196. first = __skb_dequeue(amsdu);
  1197. /* Allocate total length all at once. */
  1198. skb_queue_walk(amsdu, skb)
  1199. total_len += skb->len;
  1200. space = total_len - skb_tailroom(first);
  1201. if ((space > 0) &&
  1202. (pskb_expand_head(first, 0, space, GFP_ATOMIC) < 0)) {
  1203. /* TODO: bump some rx-oom error stat */
  1204. /* put it back together so we can free the
  1205. * whole list at once.
  1206. */
  1207. __skb_queue_head(amsdu, first);
  1208. return -1;
  1209. }
  1210. /* Walk list again, copying contents into
  1211. * msdu_head
  1212. */
  1213. while ((skb = __skb_dequeue(amsdu))) {
  1214. skb_copy_from_linear_data(skb, skb_put(first, skb->len),
  1215. skb->len);
  1216. dev_kfree_skb_any(skb);
  1217. }
  1218. __skb_queue_head(amsdu, first);
  1219. return 0;
  1220. }
  1221. static void ath10k_htt_rx_h_unchain(struct ath10k *ar,
  1222. struct sk_buff_head *amsdu,
  1223. bool chained)
  1224. {
  1225. struct sk_buff *first;
  1226. struct htt_rx_desc *rxd;
  1227. enum rx_msdu_decap_format decap;
  1228. first = skb_peek(amsdu);
  1229. rxd = (void *)first->data - sizeof(*rxd);
  1230. decap = MS(__le32_to_cpu(rxd->msdu_start.common.info1),
  1231. RX_MSDU_START_INFO1_DECAP_FORMAT);
  1232. if (!chained)
  1233. return;
  1234. /* FIXME: Current unchaining logic can only handle simple case of raw
  1235. * msdu chaining. If decapping is other than raw the chaining may be
  1236. * more complex and this isn't handled by the current code. Don't even
  1237. * try re-constructing such frames - it'll be pretty much garbage.
  1238. */
  1239. if (decap != RX_MSDU_DECAP_RAW ||
  1240. skb_queue_len(amsdu) != 1 + rxd->frag_info.ring2_more_count) {
  1241. __skb_queue_purge(amsdu);
  1242. return;
  1243. }
  1244. ath10k_unchain_msdu(amsdu);
  1245. }
  1246. static bool ath10k_htt_rx_amsdu_allowed(struct ath10k *ar,
  1247. struct sk_buff_head *amsdu,
  1248. struct ieee80211_rx_status *rx_status)
  1249. {
  1250. /* FIXME: It might be a good idea to do some fuzzy-testing to drop
  1251. * invalid/dangerous frames.
  1252. */
  1253. if (!rx_status->freq) {
  1254. ath10k_warn(ar, "no channel configured; ignoring frame(s)!\n");
  1255. return false;
  1256. }
  1257. if (test_bit(ATH10K_CAC_RUNNING, &ar->dev_flags)) {
  1258. ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx cac running\n");
  1259. return false;
  1260. }
  1261. return true;
  1262. }
  1263. static void ath10k_htt_rx_h_filter(struct ath10k *ar,
  1264. struct sk_buff_head *amsdu,
  1265. struct ieee80211_rx_status *rx_status)
  1266. {
  1267. if (skb_queue_empty(amsdu))
  1268. return;
  1269. if (ath10k_htt_rx_amsdu_allowed(ar, amsdu, rx_status))
  1270. return;
  1271. __skb_queue_purge(amsdu);
  1272. }
  1273. static int ath10k_htt_rx_handle_amsdu(struct ath10k_htt *htt)
  1274. {
  1275. struct ath10k *ar = htt->ar;
  1276. static struct ieee80211_rx_status rx_status;
  1277. struct sk_buff_head amsdu;
  1278. int ret;
  1279. __skb_queue_head_init(&amsdu);
  1280. spin_lock_bh(&htt->rx_ring.lock);
  1281. if (htt->rx_confused) {
  1282. spin_unlock_bh(&htt->rx_ring.lock);
  1283. return -EIO;
  1284. }
  1285. ret = ath10k_htt_rx_amsdu_pop(htt, &amsdu);
  1286. spin_unlock_bh(&htt->rx_ring.lock);
  1287. if (ret < 0) {
  1288. ath10k_warn(ar, "rx ring became corrupted: %d\n", ret);
  1289. __skb_queue_purge(&amsdu);
  1290. /* FIXME: It's probably a good idea to reboot the
  1291. * device instead of leaving it inoperable.
  1292. */
  1293. htt->rx_confused = true;
  1294. return ret;
  1295. }
  1296. ath10k_htt_rx_h_ppdu(ar, &amsdu, &rx_status, 0xffff);
  1297. ath10k_htt_rx_h_unchain(ar, &amsdu, ret > 0);
  1298. ath10k_htt_rx_h_filter(ar, &amsdu, &rx_status);
  1299. ath10k_htt_rx_h_mpdu(ar, &amsdu, &rx_status);
  1300. ath10k_htt_rx_h_deliver(ar, &amsdu, &rx_status);
  1301. return 0;
  1302. }
  1303. static void ath10k_htt_rx_proc_rx_ind(struct ath10k_htt *htt,
  1304. struct htt_rx_indication *rx)
  1305. {
  1306. struct ath10k *ar = htt->ar;
  1307. struct htt_rx_indication_mpdu_range *mpdu_ranges;
  1308. int num_mpdu_ranges;
  1309. int i, mpdu_count = 0;
  1310. num_mpdu_ranges = MS(__le32_to_cpu(rx->hdr.info1),
  1311. HTT_RX_INDICATION_INFO1_NUM_MPDU_RANGES);
  1312. mpdu_ranges = htt_rx_ind_get_mpdu_ranges(rx);
  1313. ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt rx ind: ",
  1314. rx, sizeof(*rx) +
  1315. (sizeof(struct htt_rx_indication_mpdu_range) *
  1316. num_mpdu_ranges));
  1317. for (i = 0; i < num_mpdu_ranges; i++)
  1318. mpdu_count += mpdu_ranges[i].mpdu_count;
  1319. atomic_add(mpdu_count, &htt->num_mpdus_ready);
  1320. tasklet_schedule(&htt->txrx_compl_task);
  1321. }
  1322. static void ath10k_htt_rx_frag_handler(struct ath10k_htt *htt)
  1323. {
  1324. atomic_inc(&htt->num_mpdus_ready);
  1325. tasklet_schedule(&htt->txrx_compl_task);
  1326. }
  1327. static void ath10k_htt_rx_tx_compl_ind(struct ath10k *ar,
  1328. struct sk_buff *skb)
  1329. {
  1330. struct ath10k_htt *htt = &ar->htt;
  1331. struct htt_resp *resp = (struct htt_resp *)skb->data;
  1332. struct htt_tx_done tx_done = {};
  1333. int status = MS(resp->data_tx_completion.flags, HTT_DATA_TX_STATUS);
  1334. __le16 msdu_id;
  1335. int i;
  1336. switch (status) {
  1337. case HTT_DATA_TX_STATUS_NO_ACK:
  1338. tx_done.status = HTT_TX_COMPL_STATE_NOACK;
  1339. break;
  1340. case HTT_DATA_TX_STATUS_OK:
  1341. tx_done.status = HTT_TX_COMPL_STATE_ACK;
  1342. break;
  1343. case HTT_DATA_TX_STATUS_DISCARD:
  1344. case HTT_DATA_TX_STATUS_POSTPONE:
  1345. case HTT_DATA_TX_STATUS_DOWNLOAD_FAIL:
  1346. tx_done.status = HTT_TX_COMPL_STATE_DISCARD;
  1347. break;
  1348. default:
  1349. ath10k_warn(ar, "unhandled tx completion status %d\n", status);
  1350. tx_done.status = HTT_TX_COMPL_STATE_DISCARD;
  1351. break;
  1352. }
  1353. ath10k_dbg(ar, ATH10K_DBG_HTT, "htt tx completion num_msdus %d\n",
  1354. resp->data_tx_completion.num_msdus);
  1355. for (i = 0; i < resp->data_tx_completion.num_msdus; i++) {
  1356. msdu_id = resp->data_tx_completion.msdus[i];
  1357. tx_done.msdu_id = __le16_to_cpu(msdu_id);
  1358. /* kfifo_put: In practice firmware shouldn't fire off per-CE
  1359. * interrupt and main interrupt (MSI/-X range case) for the same
  1360. * HTC service so it should be safe to use kfifo_put w/o lock.
  1361. *
  1362. * From kfifo_put() documentation:
  1363. * Note that with only one concurrent reader and one concurrent
  1364. * writer, you don't need extra locking to use these macro.
  1365. */
  1366. if (!kfifo_put(&htt->txdone_fifo, tx_done)) {
  1367. ath10k_warn(ar, "txdone fifo overrun, msdu_id %d status %d\n",
  1368. tx_done.msdu_id, tx_done.status);
  1369. ath10k_txrx_tx_unref(htt, &tx_done);
  1370. }
  1371. }
  1372. }
  1373. static void ath10k_htt_rx_addba(struct ath10k *ar, struct htt_resp *resp)
  1374. {
  1375. struct htt_rx_addba *ev = &resp->rx_addba;
  1376. struct ath10k_peer *peer;
  1377. struct ath10k_vif *arvif;
  1378. u16 info0, tid, peer_id;
  1379. info0 = __le16_to_cpu(ev->info0);
  1380. tid = MS(info0, HTT_RX_BA_INFO0_TID);
  1381. peer_id = MS(info0, HTT_RX_BA_INFO0_PEER_ID);
  1382. ath10k_dbg(ar, ATH10K_DBG_HTT,
  1383. "htt rx addba tid %hu peer_id %hu size %hhu\n",
  1384. tid, peer_id, ev->window_size);
  1385. spin_lock_bh(&ar->data_lock);
  1386. peer = ath10k_peer_find_by_id(ar, peer_id);
  1387. if (!peer) {
  1388. ath10k_warn(ar, "received addba event for invalid peer_id: %hu\n",
  1389. peer_id);
  1390. spin_unlock_bh(&ar->data_lock);
  1391. return;
  1392. }
  1393. arvif = ath10k_get_arvif(ar, peer->vdev_id);
  1394. if (!arvif) {
  1395. ath10k_warn(ar, "received addba event for invalid vdev_id: %u\n",
  1396. peer->vdev_id);
  1397. spin_unlock_bh(&ar->data_lock);
  1398. return;
  1399. }
  1400. ath10k_dbg(ar, ATH10K_DBG_HTT,
  1401. "htt rx start rx ba session sta %pM tid %hu size %hhu\n",
  1402. peer->addr, tid, ev->window_size);
  1403. ieee80211_start_rx_ba_session_offl(arvif->vif, peer->addr, tid);
  1404. spin_unlock_bh(&ar->data_lock);
  1405. }
  1406. static void ath10k_htt_rx_delba(struct ath10k *ar, struct htt_resp *resp)
  1407. {
  1408. struct htt_rx_delba *ev = &resp->rx_delba;
  1409. struct ath10k_peer *peer;
  1410. struct ath10k_vif *arvif;
  1411. u16 info0, tid, peer_id;
  1412. info0 = __le16_to_cpu(ev->info0);
  1413. tid = MS(info0, HTT_RX_BA_INFO0_TID);
  1414. peer_id = MS(info0, HTT_RX_BA_INFO0_PEER_ID);
  1415. ath10k_dbg(ar, ATH10K_DBG_HTT,
  1416. "htt rx delba tid %hu peer_id %hu\n",
  1417. tid, peer_id);
  1418. spin_lock_bh(&ar->data_lock);
  1419. peer = ath10k_peer_find_by_id(ar, peer_id);
  1420. if (!peer) {
  1421. ath10k_warn(ar, "received addba event for invalid peer_id: %hu\n",
  1422. peer_id);
  1423. spin_unlock_bh(&ar->data_lock);
  1424. return;
  1425. }
  1426. arvif = ath10k_get_arvif(ar, peer->vdev_id);
  1427. if (!arvif) {
  1428. ath10k_warn(ar, "received addba event for invalid vdev_id: %u\n",
  1429. peer->vdev_id);
  1430. spin_unlock_bh(&ar->data_lock);
  1431. return;
  1432. }
  1433. ath10k_dbg(ar, ATH10K_DBG_HTT,
  1434. "htt rx stop rx ba session sta %pM tid %hu\n",
  1435. peer->addr, tid);
  1436. ieee80211_stop_rx_ba_session_offl(arvif->vif, peer->addr, tid);
  1437. spin_unlock_bh(&ar->data_lock);
  1438. }
  1439. static int ath10k_htt_rx_extract_amsdu(struct sk_buff_head *list,
  1440. struct sk_buff_head *amsdu)
  1441. {
  1442. struct sk_buff *msdu;
  1443. struct htt_rx_desc *rxd;
  1444. if (skb_queue_empty(list))
  1445. return -ENOBUFS;
  1446. if (WARN_ON(!skb_queue_empty(amsdu)))
  1447. return -EINVAL;
  1448. while ((msdu = __skb_dequeue(list))) {
  1449. __skb_queue_tail(amsdu, msdu);
  1450. rxd = (void *)msdu->data - sizeof(*rxd);
  1451. if (rxd->msdu_end.common.info0 &
  1452. __cpu_to_le32(RX_MSDU_END_INFO0_LAST_MSDU))
  1453. break;
  1454. }
  1455. msdu = skb_peek_tail(amsdu);
  1456. rxd = (void *)msdu->data - sizeof(*rxd);
  1457. if (!(rxd->msdu_end.common.info0 &
  1458. __cpu_to_le32(RX_MSDU_END_INFO0_LAST_MSDU))) {
  1459. skb_queue_splice_init(amsdu, list);
  1460. return -EAGAIN;
  1461. }
  1462. return 0;
  1463. }
  1464. static void ath10k_htt_rx_h_rx_offload_prot(struct ieee80211_rx_status *status,
  1465. struct sk_buff *skb)
  1466. {
  1467. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  1468. if (!ieee80211_has_protected(hdr->frame_control))
  1469. return;
  1470. /* Offloaded frames are already decrypted but firmware insists they are
  1471. * protected in the 802.11 header. Strip the flag. Otherwise mac80211
  1472. * will drop the frame.
  1473. */
  1474. hdr->frame_control &= ~__cpu_to_le16(IEEE80211_FCTL_PROTECTED);
  1475. status->flag |= RX_FLAG_DECRYPTED |
  1476. RX_FLAG_IV_STRIPPED |
  1477. RX_FLAG_MMIC_STRIPPED;
  1478. }
  1479. static void ath10k_htt_rx_h_rx_offload(struct ath10k *ar,
  1480. struct sk_buff_head *list)
  1481. {
  1482. struct ath10k_htt *htt = &ar->htt;
  1483. struct ieee80211_rx_status *status = &htt->rx_status;
  1484. struct htt_rx_offload_msdu *rx;
  1485. struct sk_buff *msdu;
  1486. size_t offset;
  1487. while ((msdu = __skb_dequeue(list))) {
  1488. /* Offloaded frames don't have Rx descriptor. Instead they have
  1489. * a short meta information header.
  1490. */
  1491. rx = (void *)msdu->data;
  1492. skb_put(msdu, sizeof(*rx));
  1493. skb_pull(msdu, sizeof(*rx));
  1494. if (skb_tailroom(msdu) < __le16_to_cpu(rx->msdu_len)) {
  1495. ath10k_warn(ar, "dropping frame: offloaded rx msdu is too long!\n");
  1496. dev_kfree_skb_any(msdu);
  1497. continue;
  1498. }
  1499. skb_put(msdu, __le16_to_cpu(rx->msdu_len));
  1500. /* Offloaded rx header length isn't multiple of 2 nor 4 so the
  1501. * actual payload is unaligned. Align the frame. Otherwise
  1502. * mac80211 complains. This shouldn't reduce performance much
  1503. * because these offloaded frames are rare.
  1504. */
  1505. offset = 4 - ((unsigned long)msdu->data & 3);
  1506. skb_put(msdu, offset);
  1507. memmove(msdu->data + offset, msdu->data, msdu->len);
  1508. skb_pull(msdu, offset);
  1509. /* FIXME: The frame is NWifi. Re-construct QoS Control
  1510. * if possible later.
  1511. */
  1512. memset(status, 0, sizeof(*status));
  1513. status->flag |= RX_FLAG_NO_SIGNAL_VAL;
  1514. ath10k_htt_rx_h_rx_offload_prot(status, msdu);
  1515. ath10k_htt_rx_h_channel(ar, status, NULL, rx->vdev_id);
  1516. ath10k_process_rx(ar, status, msdu);
  1517. }
  1518. }
  1519. static void ath10k_htt_rx_in_ord_ind(struct ath10k *ar, struct sk_buff *skb)
  1520. {
  1521. struct ath10k_htt *htt = &ar->htt;
  1522. struct htt_resp *resp = (void *)skb->data;
  1523. struct ieee80211_rx_status *status = &htt->rx_status;
  1524. struct sk_buff_head list;
  1525. struct sk_buff_head amsdu;
  1526. u16 peer_id;
  1527. u16 msdu_count;
  1528. u8 vdev_id;
  1529. u8 tid;
  1530. bool offload;
  1531. bool frag;
  1532. int ret;
  1533. lockdep_assert_held(&htt->rx_ring.lock);
  1534. if (htt->rx_confused)
  1535. return;
  1536. skb_pull(skb, sizeof(resp->hdr));
  1537. skb_pull(skb, sizeof(resp->rx_in_ord_ind));
  1538. peer_id = __le16_to_cpu(resp->rx_in_ord_ind.peer_id);
  1539. msdu_count = __le16_to_cpu(resp->rx_in_ord_ind.msdu_count);
  1540. vdev_id = resp->rx_in_ord_ind.vdev_id;
  1541. tid = SM(resp->rx_in_ord_ind.info, HTT_RX_IN_ORD_IND_INFO_TID);
  1542. offload = !!(resp->rx_in_ord_ind.info &
  1543. HTT_RX_IN_ORD_IND_INFO_OFFLOAD_MASK);
  1544. frag = !!(resp->rx_in_ord_ind.info & HTT_RX_IN_ORD_IND_INFO_FRAG_MASK);
  1545. ath10k_dbg(ar, ATH10K_DBG_HTT,
  1546. "htt rx in ord vdev %i peer %i tid %i offload %i frag %i msdu count %i\n",
  1547. vdev_id, peer_id, tid, offload, frag, msdu_count);
  1548. if (skb->len < msdu_count * sizeof(*resp->rx_in_ord_ind.msdu_descs)) {
  1549. ath10k_warn(ar, "dropping invalid in order rx indication\n");
  1550. return;
  1551. }
  1552. /* The event can deliver more than 1 A-MSDU. Each A-MSDU is later
  1553. * extracted and processed.
  1554. */
  1555. __skb_queue_head_init(&list);
  1556. ret = ath10k_htt_rx_pop_paddr_list(htt, &resp->rx_in_ord_ind, &list);
  1557. if (ret < 0) {
  1558. ath10k_warn(ar, "failed to pop paddr list: %d\n", ret);
  1559. htt->rx_confused = true;
  1560. return;
  1561. }
  1562. /* Offloaded frames are very different and need to be handled
  1563. * separately.
  1564. */
  1565. if (offload)
  1566. ath10k_htt_rx_h_rx_offload(ar, &list);
  1567. while (!skb_queue_empty(&list)) {
  1568. __skb_queue_head_init(&amsdu);
  1569. ret = ath10k_htt_rx_extract_amsdu(&list, &amsdu);
  1570. switch (ret) {
  1571. case 0:
  1572. /* Note: The in-order indication may report interleaved
  1573. * frames from different PPDUs meaning reported rx rate
  1574. * to mac80211 isn't accurate/reliable. It's still
  1575. * better to report something than nothing though. This
  1576. * should still give an idea about rx rate to the user.
  1577. */
  1578. ath10k_htt_rx_h_ppdu(ar, &amsdu, status, vdev_id);
  1579. ath10k_htt_rx_h_filter(ar, &amsdu, status);
  1580. ath10k_htt_rx_h_mpdu(ar, &amsdu, status);
  1581. ath10k_htt_rx_h_deliver(ar, &amsdu, status);
  1582. break;
  1583. case -EAGAIN:
  1584. /* fall through */
  1585. default:
  1586. /* Should not happen. */
  1587. ath10k_warn(ar, "failed to extract amsdu: %d\n", ret);
  1588. htt->rx_confused = true;
  1589. __skb_queue_purge(&list);
  1590. return;
  1591. }
  1592. }
  1593. tasklet_schedule(&htt->rx_replenish_task);
  1594. }
  1595. static void ath10k_htt_rx_tx_fetch_resp_id_confirm(struct ath10k *ar,
  1596. const __le32 *resp_ids,
  1597. int num_resp_ids)
  1598. {
  1599. int i;
  1600. u32 resp_id;
  1601. ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx fetch confirm num_resp_ids %d\n",
  1602. num_resp_ids);
  1603. for (i = 0; i < num_resp_ids; i++) {
  1604. resp_id = le32_to_cpu(resp_ids[i]);
  1605. ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx fetch confirm resp_id %u\n",
  1606. resp_id);
  1607. /* TODO: free resp_id */
  1608. }
  1609. }
  1610. static void ath10k_htt_rx_tx_fetch_ind(struct ath10k *ar, struct sk_buff *skb)
  1611. {
  1612. struct ieee80211_hw *hw = ar->hw;
  1613. struct ieee80211_txq *txq;
  1614. struct htt_resp *resp = (struct htt_resp *)skb->data;
  1615. struct htt_tx_fetch_record *record;
  1616. size_t len;
  1617. size_t max_num_bytes;
  1618. size_t max_num_msdus;
  1619. size_t num_bytes;
  1620. size_t num_msdus;
  1621. const __le32 *resp_ids;
  1622. u16 num_records;
  1623. u16 num_resp_ids;
  1624. u16 peer_id;
  1625. u8 tid;
  1626. int ret;
  1627. int i;
  1628. ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx fetch ind\n");
  1629. len = sizeof(resp->hdr) + sizeof(resp->tx_fetch_ind);
  1630. if (unlikely(skb->len < len)) {
  1631. ath10k_warn(ar, "received corrupted tx_fetch_ind event: buffer too short\n");
  1632. return;
  1633. }
  1634. num_records = le16_to_cpu(resp->tx_fetch_ind.num_records);
  1635. num_resp_ids = le16_to_cpu(resp->tx_fetch_ind.num_resp_ids);
  1636. len += sizeof(resp->tx_fetch_ind.records[0]) * num_records;
  1637. len += sizeof(resp->tx_fetch_ind.resp_ids[0]) * num_resp_ids;
  1638. if (unlikely(skb->len < len)) {
  1639. ath10k_warn(ar, "received corrupted tx_fetch_ind event: too many records/resp_ids\n");
  1640. return;
  1641. }
  1642. ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx fetch ind num records %hu num resps %hu seq %hu\n",
  1643. num_records, num_resp_ids,
  1644. le16_to_cpu(resp->tx_fetch_ind.fetch_seq_num));
  1645. if (!ar->htt.tx_q_state.enabled) {
  1646. ath10k_warn(ar, "received unexpected tx_fetch_ind event: not enabled\n");
  1647. return;
  1648. }
  1649. if (ar->htt.tx_q_state.mode == HTT_TX_MODE_SWITCH_PUSH) {
  1650. ath10k_warn(ar, "received unexpected tx_fetch_ind event: in push mode\n");
  1651. return;
  1652. }
  1653. rcu_read_lock();
  1654. for (i = 0; i < num_records; i++) {
  1655. record = &resp->tx_fetch_ind.records[i];
  1656. peer_id = MS(le16_to_cpu(record->info),
  1657. HTT_TX_FETCH_RECORD_INFO_PEER_ID);
  1658. tid = MS(le16_to_cpu(record->info),
  1659. HTT_TX_FETCH_RECORD_INFO_TID);
  1660. max_num_msdus = le16_to_cpu(record->num_msdus);
  1661. max_num_bytes = le32_to_cpu(record->num_bytes);
  1662. ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx fetch record %i peer_id %hu tid %hhu msdus %zu bytes %zu\n",
  1663. i, peer_id, tid, max_num_msdus, max_num_bytes);
  1664. if (unlikely(peer_id >= ar->htt.tx_q_state.num_peers) ||
  1665. unlikely(tid >= ar->htt.tx_q_state.num_tids)) {
  1666. ath10k_warn(ar, "received out of range peer_id %hu tid %hhu\n",
  1667. peer_id, tid);
  1668. continue;
  1669. }
  1670. spin_lock_bh(&ar->data_lock);
  1671. txq = ath10k_mac_txq_lookup(ar, peer_id, tid);
  1672. spin_unlock_bh(&ar->data_lock);
  1673. /* It is okay to release the lock and use txq because RCU read
  1674. * lock is held.
  1675. */
  1676. if (unlikely(!txq)) {
  1677. ath10k_warn(ar, "failed to lookup txq for peer_id %hu tid %hhu\n",
  1678. peer_id, tid);
  1679. continue;
  1680. }
  1681. num_msdus = 0;
  1682. num_bytes = 0;
  1683. while (num_msdus < max_num_msdus &&
  1684. num_bytes < max_num_bytes) {
  1685. ret = ath10k_mac_tx_push_txq(hw, txq);
  1686. if (ret < 0)
  1687. break;
  1688. num_msdus++;
  1689. num_bytes += ret;
  1690. }
  1691. record->num_msdus = cpu_to_le16(num_msdus);
  1692. record->num_bytes = cpu_to_le32(num_bytes);
  1693. ath10k_htt_tx_txq_recalc(hw, txq);
  1694. }
  1695. rcu_read_unlock();
  1696. resp_ids = ath10k_htt_get_tx_fetch_ind_resp_ids(&resp->tx_fetch_ind);
  1697. ath10k_htt_rx_tx_fetch_resp_id_confirm(ar, resp_ids, num_resp_ids);
  1698. ret = ath10k_htt_tx_fetch_resp(ar,
  1699. resp->tx_fetch_ind.token,
  1700. resp->tx_fetch_ind.fetch_seq_num,
  1701. resp->tx_fetch_ind.records,
  1702. num_records);
  1703. if (unlikely(ret)) {
  1704. ath10k_warn(ar, "failed to submit tx fetch resp for token 0x%08x: %d\n",
  1705. le32_to_cpu(resp->tx_fetch_ind.token), ret);
  1706. /* FIXME: request fw restart */
  1707. }
  1708. ath10k_htt_tx_txq_sync(ar);
  1709. }
  1710. static void ath10k_htt_rx_tx_fetch_confirm(struct ath10k *ar,
  1711. struct sk_buff *skb)
  1712. {
  1713. const struct htt_resp *resp = (void *)skb->data;
  1714. size_t len;
  1715. int num_resp_ids;
  1716. ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx fetch confirm\n");
  1717. len = sizeof(resp->hdr) + sizeof(resp->tx_fetch_confirm);
  1718. if (unlikely(skb->len < len)) {
  1719. ath10k_warn(ar, "received corrupted tx_fetch_confirm event: buffer too short\n");
  1720. return;
  1721. }
  1722. num_resp_ids = le16_to_cpu(resp->tx_fetch_confirm.num_resp_ids);
  1723. len += sizeof(resp->tx_fetch_confirm.resp_ids[0]) * num_resp_ids;
  1724. if (unlikely(skb->len < len)) {
  1725. ath10k_warn(ar, "received corrupted tx_fetch_confirm event: resp_ids buffer overflow\n");
  1726. return;
  1727. }
  1728. ath10k_htt_rx_tx_fetch_resp_id_confirm(ar,
  1729. resp->tx_fetch_confirm.resp_ids,
  1730. num_resp_ids);
  1731. }
  1732. static void ath10k_htt_rx_tx_mode_switch_ind(struct ath10k *ar,
  1733. struct sk_buff *skb)
  1734. {
  1735. const struct htt_resp *resp = (void *)skb->data;
  1736. const struct htt_tx_mode_switch_record *record;
  1737. struct ieee80211_txq *txq;
  1738. struct ath10k_txq *artxq;
  1739. size_t len;
  1740. size_t num_records;
  1741. enum htt_tx_mode_switch_mode mode;
  1742. bool enable;
  1743. u16 info0;
  1744. u16 info1;
  1745. u16 threshold;
  1746. u16 peer_id;
  1747. u8 tid;
  1748. int i;
  1749. ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx mode switch ind\n");
  1750. len = sizeof(resp->hdr) + sizeof(resp->tx_mode_switch_ind);
  1751. if (unlikely(skb->len < len)) {
  1752. ath10k_warn(ar, "received corrupted tx_mode_switch_ind event: buffer too short\n");
  1753. return;
  1754. }
  1755. info0 = le16_to_cpu(resp->tx_mode_switch_ind.info0);
  1756. info1 = le16_to_cpu(resp->tx_mode_switch_ind.info1);
  1757. enable = !!(info0 & HTT_TX_MODE_SWITCH_IND_INFO0_ENABLE);
  1758. num_records = MS(info0, HTT_TX_MODE_SWITCH_IND_INFO1_THRESHOLD);
  1759. mode = MS(info1, HTT_TX_MODE_SWITCH_IND_INFO1_MODE);
  1760. threshold = MS(info1, HTT_TX_MODE_SWITCH_IND_INFO1_THRESHOLD);
  1761. ath10k_dbg(ar, ATH10K_DBG_HTT,
  1762. "htt rx tx mode switch ind info0 0x%04hx info1 0x%04hx enable %d num records %zd mode %d threshold %hu\n",
  1763. info0, info1, enable, num_records, mode, threshold);
  1764. len += sizeof(resp->tx_mode_switch_ind.records[0]) * num_records;
  1765. if (unlikely(skb->len < len)) {
  1766. ath10k_warn(ar, "received corrupted tx_mode_switch_mode_ind event: too many records\n");
  1767. return;
  1768. }
  1769. switch (mode) {
  1770. case HTT_TX_MODE_SWITCH_PUSH:
  1771. case HTT_TX_MODE_SWITCH_PUSH_PULL:
  1772. break;
  1773. default:
  1774. ath10k_warn(ar, "received invalid tx_mode_switch_mode_ind mode %d, ignoring\n",
  1775. mode);
  1776. return;
  1777. }
  1778. if (!enable)
  1779. return;
  1780. ar->htt.tx_q_state.enabled = enable;
  1781. ar->htt.tx_q_state.mode = mode;
  1782. ar->htt.tx_q_state.num_push_allowed = threshold;
  1783. rcu_read_lock();
  1784. for (i = 0; i < num_records; i++) {
  1785. record = &resp->tx_mode_switch_ind.records[i];
  1786. info0 = le16_to_cpu(record->info0);
  1787. peer_id = MS(info0, HTT_TX_MODE_SWITCH_RECORD_INFO0_PEER_ID);
  1788. tid = MS(info0, HTT_TX_MODE_SWITCH_RECORD_INFO0_TID);
  1789. if (unlikely(peer_id >= ar->htt.tx_q_state.num_peers) ||
  1790. unlikely(tid >= ar->htt.tx_q_state.num_tids)) {
  1791. ath10k_warn(ar, "received out of range peer_id %hu tid %hhu\n",
  1792. peer_id, tid);
  1793. continue;
  1794. }
  1795. spin_lock_bh(&ar->data_lock);
  1796. txq = ath10k_mac_txq_lookup(ar, peer_id, tid);
  1797. spin_unlock_bh(&ar->data_lock);
  1798. /* It is okay to release the lock and use txq because RCU read
  1799. * lock is held.
  1800. */
  1801. if (unlikely(!txq)) {
  1802. ath10k_warn(ar, "failed to lookup txq for peer_id %hu tid %hhu\n",
  1803. peer_id, tid);
  1804. continue;
  1805. }
  1806. spin_lock_bh(&ar->htt.tx_lock);
  1807. artxq = (void *)txq->drv_priv;
  1808. artxq->num_push_allowed = le16_to_cpu(record->num_max_msdus);
  1809. spin_unlock_bh(&ar->htt.tx_lock);
  1810. }
  1811. rcu_read_unlock();
  1812. ath10k_mac_tx_push_pending(ar);
  1813. }
  1814. static inline enum ieee80211_band phy_mode_to_band(u32 phy_mode)
  1815. {
  1816. enum ieee80211_band band;
  1817. switch (phy_mode) {
  1818. case MODE_11A:
  1819. case MODE_11NA_HT20:
  1820. case MODE_11NA_HT40:
  1821. case MODE_11AC_VHT20:
  1822. case MODE_11AC_VHT40:
  1823. case MODE_11AC_VHT80:
  1824. band = IEEE80211_BAND_5GHZ;
  1825. break;
  1826. case MODE_11G:
  1827. case MODE_11B:
  1828. case MODE_11GONLY:
  1829. case MODE_11NG_HT20:
  1830. case MODE_11NG_HT40:
  1831. case MODE_11AC_VHT20_2G:
  1832. case MODE_11AC_VHT40_2G:
  1833. case MODE_11AC_VHT80_2G:
  1834. default:
  1835. band = IEEE80211_BAND_2GHZ;
  1836. }
  1837. return band;
  1838. }
  1839. void ath10k_htt_htc_t2h_msg_handler(struct ath10k *ar, struct sk_buff *skb)
  1840. {
  1841. bool release;
  1842. release = ath10k_htt_t2h_msg_handler(ar, skb);
  1843. /* Free the indication buffer */
  1844. if (release)
  1845. dev_kfree_skb_any(skb);
  1846. }
  1847. bool ath10k_htt_t2h_msg_handler(struct ath10k *ar, struct sk_buff *skb)
  1848. {
  1849. struct ath10k_htt *htt = &ar->htt;
  1850. struct htt_resp *resp = (struct htt_resp *)skb->data;
  1851. enum htt_t2h_msg_type type;
  1852. /* confirm alignment */
  1853. if (!IS_ALIGNED((unsigned long)skb->data, 4))
  1854. ath10k_warn(ar, "unaligned htt message, expect trouble\n");
  1855. ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx, msg_type: 0x%0X\n",
  1856. resp->hdr.msg_type);
  1857. if (resp->hdr.msg_type >= ar->htt.t2h_msg_types_max) {
  1858. ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx, unsupported msg_type: 0x%0X\n max: 0x%0X",
  1859. resp->hdr.msg_type, ar->htt.t2h_msg_types_max);
  1860. return true;
  1861. }
  1862. type = ar->htt.t2h_msg_types[resp->hdr.msg_type];
  1863. switch (type) {
  1864. case HTT_T2H_MSG_TYPE_VERSION_CONF: {
  1865. htt->target_version_major = resp->ver_resp.major;
  1866. htt->target_version_minor = resp->ver_resp.minor;
  1867. complete(&htt->target_version_received);
  1868. break;
  1869. }
  1870. case HTT_T2H_MSG_TYPE_RX_IND:
  1871. ath10k_htt_rx_proc_rx_ind(htt, &resp->rx_ind);
  1872. break;
  1873. case HTT_T2H_MSG_TYPE_PEER_MAP: {
  1874. struct htt_peer_map_event ev = {
  1875. .vdev_id = resp->peer_map.vdev_id,
  1876. .peer_id = __le16_to_cpu(resp->peer_map.peer_id),
  1877. };
  1878. memcpy(ev.addr, resp->peer_map.addr, sizeof(ev.addr));
  1879. ath10k_peer_map_event(htt, &ev);
  1880. break;
  1881. }
  1882. case HTT_T2H_MSG_TYPE_PEER_UNMAP: {
  1883. struct htt_peer_unmap_event ev = {
  1884. .peer_id = __le16_to_cpu(resp->peer_unmap.peer_id),
  1885. };
  1886. ath10k_peer_unmap_event(htt, &ev);
  1887. break;
  1888. }
  1889. case HTT_T2H_MSG_TYPE_MGMT_TX_COMPLETION: {
  1890. struct htt_tx_done tx_done = {};
  1891. int status = __le32_to_cpu(resp->mgmt_tx_completion.status);
  1892. tx_done.msdu_id = __le32_to_cpu(resp->mgmt_tx_completion.desc_id);
  1893. switch (status) {
  1894. case HTT_MGMT_TX_STATUS_OK:
  1895. tx_done.status = HTT_TX_COMPL_STATE_ACK;
  1896. break;
  1897. case HTT_MGMT_TX_STATUS_RETRY:
  1898. tx_done.status = HTT_TX_COMPL_STATE_NOACK;
  1899. break;
  1900. case HTT_MGMT_TX_STATUS_DROP:
  1901. tx_done.status = HTT_TX_COMPL_STATE_DISCARD;
  1902. break;
  1903. }
  1904. status = ath10k_txrx_tx_unref(htt, &tx_done);
  1905. if (!status) {
  1906. spin_lock_bh(&htt->tx_lock);
  1907. ath10k_htt_tx_mgmt_dec_pending(htt);
  1908. spin_unlock_bh(&htt->tx_lock);
  1909. }
  1910. ath10k_mac_tx_push_pending(ar);
  1911. break;
  1912. }
  1913. case HTT_T2H_MSG_TYPE_TX_COMPL_IND:
  1914. ath10k_htt_rx_tx_compl_ind(htt->ar, skb);
  1915. tasklet_schedule(&htt->txrx_compl_task);
  1916. break;
  1917. case HTT_T2H_MSG_TYPE_SEC_IND: {
  1918. struct ath10k *ar = htt->ar;
  1919. struct htt_security_indication *ev = &resp->security_indication;
  1920. ath10k_dbg(ar, ATH10K_DBG_HTT,
  1921. "sec ind peer_id %d unicast %d type %d\n",
  1922. __le16_to_cpu(ev->peer_id),
  1923. !!(ev->flags & HTT_SECURITY_IS_UNICAST),
  1924. MS(ev->flags, HTT_SECURITY_TYPE));
  1925. complete(&ar->install_key_done);
  1926. break;
  1927. }
  1928. case HTT_T2H_MSG_TYPE_RX_FRAG_IND: {
  1929. ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt event: ",
  1930. skb->data, skb->len);
  1931. ath10k_htt_rx_frag_handler(htt);
  1932. break;
  1933. }
  1934. case HTT_T2H_MSG_TYPE_TEST:
  1935. break;
  1936. case HTT_T2H_MSG_TYPE_STATS_CONF:
  1937. trace_ath10k_htt_stats(ar, skb->data, skb->len);
  1938. break;
  1939. case HTT_T2H_MSG_TYPE_TX_INSPECT_IND:
  1940. /* Firmware can return tx frames if it's unable to fully
  1941. * process them and suspects host may be able to fix it. ath10k
  1942. * sends all tx frames as already inspected so this shouldn't
  1943. * happen unless fw has a bug.
  1944. */
  1945. ath10k_warn(ar, "received an unexpected htt tx inspect event\n");
  1946. break;
  1947. case HTT_T2H_MSG_TYPE_RX_ADDBA:
  1948. ath10k_htt_rx_addba(ar, resp);
  1949. break;
  1950. case HTT_T2H_MSG_TYPE_RX_DELBA:
  1951. ath10k_htt_rx_delba(ar, resp);
  1952. break;
  1953. case HTT_T2H_MSG_TYPE_PKTLOG: {
  1954. struct ath10k_pktlog_hdr *hdr =
  1955. (struct ath10k_pktlog_hdr *)resp->pktlog_msg.payload;
  1956. trace_ath10k_htt_pktlog(ar, resp->pktlog_msg.payload,
  1957. sizeof(*hdr) +
  1958. __le16_to_cpu(hdr->size));
  1959. break;
  1960. }
  1961. case HTT_T2H_MSG_TYPE_RX_FLUSH: {
  1962. /* Ignore this event because mac80211 takes care of Rx
  1963. * aggregation reordering.
  1964. */
  1965. break;
  1966. }
  1967. case HTT_T2H_MSG_TYPE_RX_IN_ORD_PADDR_IND: {
  1968. skb_queue_tail(&htt->rx_in_ord_compl_q, skb);
  1969. tasklet_schedule(&htt->txrx_compl_task);
  1970. return false;
  1971. }
  1972. case HTT_T2H_MSG_TYPE_TX_CREDIT_UPDATE_IND:
  1973. break;
  1974. case HTT_T2H_MSG_TYPE_CHAN_CHANGE: {
  1975. u32 phymode = __le32_to_cpu(resp->chan_change.phymode);
  1976. u32 freq = __le32_to_cpu(resp->chan_change.freq);
  1977. ar->tgt_oper_chan =
  1978. __ieee80211_get_channel(ar->hw->wiphy, freq);
  1979. ath10k_dbg(ar, ATH10K_DBG_HTT,
  1980. "htt chan change freq %u phymode %s\n",
  1981. freq, ath10k_wmi_phymode_str(phymode));
  1982. break;
  1983. }
  1984. case HTT_T2H_MSG_TYPE_AGGR_CONF:
  1985. break;
  1986. case HTT_T2H_MSG_TYPE_TX_FETCH_IND: {
  1987. struct sk_buff *tx_fetch_ind = skb_copy(skb, GFP_ATOMIC);
  1988. if (!tx_fetch_ind) {
  1989. ath10k_warn(ar, "failed to copy htt tx fetch ind\n");
  1990. break;
  1991. }
  1992. skb_queue_tail(&htt->tx_fetch_ind_q, tx_fetch_ind);
  1993. tasklet_schedule(&htt->txrx_compl_task);
  1994. break;
  1995. }
  1996. case HTT_T2H_MSG_TYPE_TX_FETCH_CONFIRM:
  1997. ath10k_htt_rx_tx_fetch_confirm(ar, skb);
  1998. break;
  1999. case HTT_T2H_MSG_TYPE_TX_MODE_SWITCH_IND:
  2000. ath10k_htt_rx_tx_mode_switch_ind(ar, skb);
  2001. break;
  2002. case HTT_T2H_MSG_TYPE_EN_STATS:
  2003. default:
  2004. ath10k_warn(ar, "htt event (%d) not handled\n",
  2005. resp->hdr.msg_type);
  2006. ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt event: ",
  2007. skb->data, skb->len);
  2008. break;
  2009. };
  2010. return true;
  2011. }
  2012. EXPORT_SYMBOL(ath10k_htt_t2h_msg_handler);
  2013. void ath10k_htt_rx_pktlog_completion_handler(struct ath10k *ar,
  2014. struct sk_buff *skb)
  2015. {
  2016. trace_ath10k_htt_pktlog(ar, skb->data, skb->len);
  2017. dev_kfree_skb_any(skb);
  2018. }
  2019. EXPORT_SYMBOL(ath10k_htt_rx_pktlog_completion_handler);
  2020. static void ath10k_htt_txrx_compl_task(unsigned long ptr)
  2021. {
  2022. struct ath10k_htt *htt = (struct ath10k_htt *)ptr;
  2023. struct ath10k *ar = htt->ar;
  2024. struct htt_tx_done tx_done = {};
  2025. struct sk_buff_head rx_q;
  2026. struct sk_buff_head rx_ind_q;
  2027. struct sk_buff_head tx_ind_q;
  2028. struct sk_buff *skb;
  2029. unsigned long flags;
  2030. int num_mpdus;
  2031. __skb_queue_head_init(&rx_q);
  2032. __skb_queue_head_init(&rx_ind_q);
  2033. __skb_queue_head_init(&tx_ind_q);
  2034. spin_lock_irqsave(&htt->rx_in_ord_compl_q.lock, flags);
  2035. skb_queue_splice_init(&htt->rx_in_ord_compl_q, &rx_ind_q);
  2036. spin_unlock_irqrestore(&htt->rx_in_ord_compl_q.lock, flags);
  2037. spin_lock_irqsave(&htt->tx_fetch_ind_q.lock, flags);
  2038. skb_queue_splice_init(&htt->tx_fetch_ind_q, &tx_ind_q);
  2039. spin_unlock_irqrestore(&htt->tx_fetch_ind_q.lock, flags);
  2040. /* kfifo_get: called only within txrx_tasklet so it's neatly serialized.
  2041. * From kfifo_get() documentation:
  2042. * Note that with only one concurrent reader and one concurrent writer,
  2043. * you don't need extra locking to use these macro.
  2044. */
  2045. while (kfifo_get(&htt->txdone_fifo, &tx_done))
  2046. ath10k_txrx_tx_unref(htt, &tx_done);
  2047. while ((skb = __skb_dequeue(&tx_ind_q))) {
  2048. ath10k_htt_rx_tx_fetch_ind(ar, skb);
  2049. dev_kfree_skb_any(skb);
  2050. }
  2051. ath10k_mac_tx_push_pending(ar);
  2052. num_mpdus = atomic_read(&htt->num_mpdus_ready);
  2053. atomic_sub(num_mpdus, &htt->num_mpdus_ready);
  2054. while (num_mpdus--) {
  2055. if (ath10k_htt_rx_handle_amsdu(htt))
  2056. break;
  2057. }
  2058. while ((skb = __skb_dequeue(&rx_ind_q))) {
  2059. spin_lock_bh(&htt->rx_ring.lock);
  2060. ath10k_htt_rx_in_ord_ind(ar, skb);
  2061. spin_unlock_bh(&htt->rx_ring.lock);
  2062. dev_kfree_skb_any(skb);
  2063. }
  2064. tasklet_schedule(&htt->rx_replenish_task);
  2065. }