intel_bios.c 36 KB

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  1. /*
  2. * Copyright © 2006 Intel Corporation
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8. * and/or sell copies of the Software, and to permit persons to whom the
  9. * Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice (including the next
  12. * paragraph) shall be included in all copies or substantial portions of the
  13. * Software.
  14. *
  15. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  18. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  20. * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  21. * SOFTWARE.
  22. *
  23. * Authors:
  24. * Eric Anholt <eric@anholt.net>
  25. *
  26. */
  27. #include <linux/dmi.h>
  28. #include <drm/drm_dp_helper.h>
  29. #include <drm/drmP.h>
  30. #include <drm/i915_drm.h>
  31. #include "i915_drv.h"
  32. #include "intel_bios.h"
  33. #define SLAVE_ADDR1 0x70
  34. #define SLAVE_ADDR2 0x72
  35. static int panel_type;
  36. static void *
  37. find_section(struct bdb_header *bdb, int section_id)
  38. {
  39. u8 *base = (u8 *)bdb;
  40. int index = 0;
  41. u16 total, current_size;
  42. u8 current_id;
  43. /* skip to first section */
  44. index += bdb->header_size;
  45. total = bdb->bdb_size;
  46. /* walk the sections looking for section_id */
  47. while (index + 3 < total) {
  48. current_id = *(base + index);
  49. index++;
  50. current_size = *((u16 *)(base + index));
  51. index += 2;
  52. if (index + current_size > total)
  53. return NULL;
  54. if (current_id == section_id)
  55. return base + index;
  56. index += current_size;
  57. }
  58. return NULL;
  59. }
  60. static u16
  61. get_blocksize(void *p)
  62. {
  63. u16 *block_ptr, block_size;
  64. block_ptr = (u16 *)((char *)p - 2);
  65. block_size = *block_ptr;
  66. return block_size;
  67. }
  68. static void
  69. fill_detail_timing_data(struct drm_display_mode *panel_fixed_mode,
  70. const struct lvds_dvo_timing *dvo_timing)
  71. {
  72. panel_fixed_mode->hdisplay = (dvo_timing->hactive_hi << 8) |
  73. dvo_timing->hactive_lo;
  74. panel_fixed_mode->hsync_start = panel_fixed_mode->hdisplay +
  75. ((dvo_timing->hsync_off_hi << 8) | dvo_timing->hsync_off_lo);
  76. panel_fixed_mode->hsync_end = panel_fixed_mode->hsync_start +
  77. dvo_timing->hsync_pulse_width;
  78. panel_fixed_mode->htotal = panel_fixed_mode->hdisplay +
  79. ((dvo_timing->hblank_hi << 8) | dvo_timing->hblank_lo);
  80. panel_fixed_mode->vdisplay = (dvo_timing->vactive_hi << 8) |
  81. dvo_timing->vactive_lo;
  82. panel_fixed_mode->vsync_start = panel_fixed_mode->vdisplay +
  83. dvo_timing->vsync_off;
  84. panel_fixed_mode->vsync_end = panel_fixed_mode->vsync_start +
  85. dvo_timing->vsync_pulse_width;
  86. panel_fixed_mode->vtotal = panel_fixed_mode->vdisplay +
  87. ((dvo_timing->vblank_hi << 8) | dvo_timing->vblank_lo);
  88. panel_fixed_mode->clock = dvo_timing->clock * 10;
  89. panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED;
  90. if (dvo_timing->hsync_positive)
  91. panel_fixed_mode->flags |= DRM_MODE_FLAG_PHSYNC;
  92. else
  93. panel_fixed_mode->flags |= DRM_MODE_FLAG_NHSYNC;
  94. if (dvo_timing->vsync_positive)
  95. panel_fixed_mode->flags |= DRM_MODE_FLAG_PVSYNC;
  96. else
  97. panel_fixed_mode->flags |= DRM_MODE_FLAG_NVSYNC;
  98. /* Some VBTs have bogus h/vtotal values */
  99. if (panel_fixed_mode->hsync_end > panel_fixed_mode->htotal)
  100. panel_fixed_mode->htotal = panel_fixed_mode->hsync_end + 1;
  101. if (panel_fixed_mode->vsync_end > panel_fixed_mode->vtotal)
  102. panel_fixed_mode->vtotal = panel_fixed_mode->vsync_end + 1;
  103. drm_mode_set_name(panel_fixed_mode);
  104. }
  105. static bool
  106. lvds_dvo_timing_equal_size(const struct lvds_dvo_timing *a,
  107. const struct lvds_dvo_timing *b)
  108. {
  109. if (a->hactive_hi != b->hactive_hi ||
  110. a->hactive_lo != b->hactive_lo)
  111. return false;
  112. if (a->hsync_off_hi != b->hsync_off_hi ||
  113. a->hsync_off_lo != b->hsync_off_lo)
  114. return false;
  115. if (a->hsync_pulse_width != b->hsync_pulse_width)
  116. return false;
  117. if (a->hblank_hi != b->hblank_hi ||
  118. a->hblank_lo != b->hblank_lo)
  119. return false;
  120. if (a->vactive_hi != b->vactive_hi ||
  121. a->vactive_lo != b->vactive_lo)
  122. return false;
  123. if (a->vsync_off != b->vsync_off)
  124. return false;
  125. if (a->vsync_pulse_width != b->vsync_pulse_width)
  126. return false;
  127. if (a->vblank_hi != b->vblank_hi ||
  128. a->vblank_lo != b->vblank_lo)
  129. return false;
  130. return true;
  131. }
  132. static const struct lvds_dvo_timing *
  133. get_lvds_dvo_timing(const struct bdb_lvds_lfp_data *lvds_lfp_data,
  134. const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs,
  135. int index)
  136. {
  137. /*
  138. * the size of fp_timing varies on the different platform.
  139. * So calculate the DVO timing relative offset in LVDS data
  140. * entry to get the DVO timing entry
  141. */
  142. int lfp_data_size =
  143. lvds_lfp_data_ptrs->ptr[1].dvo_timing_offset -
  144. lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset;
  145. int dvo_timing_offset =
  146. lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset -
  147. lvds_lfp_data_ptrs->ptr[0].fp_timing_offset;
  148. char *entry = (char *)lvds_lfp_data->data + lfp_data_size * index;
  149. return (struct lvds_dvo_timing *)(entry + dvo_timing_offset);
  150. }
  151. /* get lvds_fp_timing entry
  152. * this function may return NULL if the corresponding entry is invalid
  153. */
  154. static const struct lvds_fp_timing *
  155. get_lvds_fp_timing(const struct bdb_header *bdb,
  156. const struct bdb_lvds_lfp_data *data,
  157. const struct bdb_lvds_lfp_data_ptrs *ptrs,
  158. int index)
  159. {
  160. size_t data_ofs = (const u8 *)data - (const u8 *)bdb;
  161. u16 data_size = ((const u16 *)data)[-1]; /* stored in header */
  162. size_t ofs;
  163. if (index >= ARRAY_SIZE(ptrs->ptr))
  164. return NULL;
  165. ofs = ptrs->ptr[index].fp_timing_offset;
  166. if (ofs < data_ofs ||
  167. ofs + sizeof(struct lvds_fp_timing) > data_ofs + data_size)
  168. return NULL;
  169. return (const struct lvds_fp_timing *)((const u8 *)bdb + ofs);
  170. }
  171. /* Try to find integrated panel data */
  172. static void
  173. parse_lfp_panel_data(struct drm_i915_private *dev_priv,
  174. struct bdb_header *bdb)
  175. {
  176. const struct bdb_lvds_options *lvds_options;
  177. const struct bdb_lvds_lfp_data *lvds_lfp_data;
  178. const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs;
  179. const struct lvds_dvo_timing *panel_dvo_timing;
  180. const struct lvds_fp_timing *fp_timing;
  181. struct drm_display_mode *panel_fixed_mode;
  182. int i, downclock, drrs_mode;
  183. lvds_options = find_section(bdb, BDB_LVDS_OPTIONS);
  184. if (!lvds_options)
  185. return;
  186. dev_priv->vbt.lvds_dither = lvds_options->pixel_dither;
  187. if (lvds_options->panel_type == 0xff)
  188. return;
  189. panel_type = lvds_options->panel_type;
  190. drrs_mode = (lvds_options->dps_panel_type_bits
  191. >> (panel_type * 2)) & MODE_MASK;
  192. /*
  193. * VBT has static DRRS = 0 and seamless DRRS = 2.
  194. * The below piece of code is required to adjust vbt.drrs_type
  195. * to match the enum drrs_support_type.
  196. */
  197. switch (drrs_mode) {
  198. case 0:
  199. dev_priv->vbt.drrs_type = STATIC_DRRS_SUPPORT;
  200. DRM_DEBUG_KMS("DRRS supported mode is static\n");
  201. break;
  202. case 2:
  203. dev_priv->vbt.drrs_type = SEAMLESS_DRRS_SUPPORT;
  204. DRM_DEBUG_KMS("DRRS supported mode is seamless\n");
  205. break;
  206. default:
  207. dev_priv->vbt.drrs_type = DRRS_NOT_SUPPORTED;
  208. DRM_DEBUG_KMS("DRRS not supported (VBT input)\n");
  209. break;
  210. }
  211. lvds_lfp_data = find_section(bdb, BDB_LVDS_LFP_DATA);
  212. if (!lvds_lfp_data)
  213. return;
  214. lvds_lfp_data_ptrs = find_section(bdb, BDB_LVDS_LFP_DATA_PTRS);
  215. if (!lvds_lfp_data_ptrs)
  216. return;
  217. dev_priv->vbt.lvds_vbt = 1;
  218. panel_dvo_timing = get_lvds_dvo_timing(lvds_lfp_data,
  219. lvds_lfp_data_ptrs,
  220. lvds_options->panel_type);
  221. panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
  222. if (!panel_fixed_mode)
  223. return;
  224. fill_detail_timing_data(panel_fixed_mode, panel_dvo_timing);
  225. dev_priv->vbt.lfp_lvds_vbt_mode = panel_fixed_mode;
  226. DRM_DEBUG_KMS("Found panel mode in BIOS VBT tables:\n");
  227. drm_mode_debug_printmodeline(panel_fixed_mode);
  228. /*
  229. * Iterate over the LVDS panel timing info to find the lowest clock
  230. * for the native resolution.
  231. */
  232. downclock = panel_dvo_timing->clock;
  233. for (i = 0; i < 16; i++) {
  234. const struct lvds_dvo_timing *dvo_timing;
  235. dvo_timing = get_lvds_dvo_timing(lvds_lfp_data,
  236. lvds_lfp_data_ptrs,
  237. i);
  238. if (lvds_dvo_timing_equal_size(dvo_timing, panel_dvo_timing) &&
  239. dvo_timing->clock < downclock)
  240. downclock = dvo_timing->clock;
  241. }
  242. if (downclock < panel_dvo_timing->clock && i915.lvds_downclock) {
  243. dev_priv->lvds_downclock_avail = 1;
  244. dev_priv->lvds_downclock = downclock * 10;
  245. DRM_DEBUG_KMS("LVDS downclock is found in VBT. "
  246. "Normal Clock %dKHz, downclock %dKHz\n",
  247. panel_fixed_mode->clock, 10*downclock);
  248. }
  249. fp_timing = get_lvds_fp_timing(bdb, lvds_lfp_data,
  250. lvds_lfp_data_ptrs,
  251. lvds_options->panel_type);
  252. if (fp_timing) {
  253. /* check the resolution, just to be sure */
  254. if (fp_timing->x_res == panel_fixed_mode->hdisplay &&
  255. fp_timing->y_res == panel_fixed_mode->vdisplay) {
  256. dev_priv->vbt.bios_lvds_val = fp_timing->lvds_reg_val;
  257. DRM_DEBUG_KMS("VBT initial LVDS value %x\n",
  258. dev_priv->vbt.bios_lvds_val);
  259. }
  260. }
  261. }
  262. static void
  263. parse_lfp_backlight(struct drm_i915_private *dev_priv, struct bdb_header *bdb)
  264. {
  265. const struct bdb_lfp_backlight_data *backlight_data;
  266. const struct bdb_lfp_backlight_data_entry *entry;
  267. backlight_data = find_section(bdb, BDB_LVDS_BACKLIGHT);
  268. if (!backlight_data)
  269. return;
  270. if (backlight_data->entry_size != sizeof(backlight_data->data[0])) {
  271. DRM_DEBUG_KMS("Unsupported backlight data entry size %u\n",
  272. backlight_data->entry_size);
  273. return;
  274. }
  275. entry = &backlight_data->data[panel_type];
  276. dev_priv->vbt.backlight.present = entry->type == BDB_BACKLIGHT_TYPE_PWM;
  277. if (!dev_priv->vbt.backlight.present) {
  278. DRM_DEBUG_KMS("PWM backlight not present in VBT (type %u)\n",
  279. entry->type);
  280. return;
  281. }
  282. dev_priv->vbt.backlight.pwm_freq_hz = entry->pwm_freq_hz;
  283. dev_priv->vbt.backlight.active_low_pwm = entry->active_low_pwm;
  284. dev_priv->vbt.backlight.min_brightness = entry->min_brightness;
  285. DRM_DEBUG_KMS("VBT backlight PWM modulation frequency %u Hz, "
  286. "active %s, min brightness %u, level %u\n",
  287. dev_priv->vbt.backlight.pwm_freq_hz,
  288. dev_priv->vbt.backlight.active_low_pwm ? "low" : "high",
  289. dev_priv->vbt.backlight.min_brightness,
  290. backlight_data->level[panel_type]);
  291. }
  292. /* Try to find sdvo panel data */
  293. static void
  294. parse_sdvo_panel_data(struct drm_i915_private *dev_priv,
  295. struct bdb_header *bdb)
  296. {
  297. struct lvds_dvo_timing *dvo_timing;
  298. struct drm_display_mode *panel_fixed_mode;
  299. int index;
  300. index = i915.vbt_sdvo_panel_type;
  301. if (index == -2) {
  302. DRM_DEBUG_KMS("Ignore SDVO panel mode from BIOS VBT tables.\n");
  303. return;
  304. }
  305. if (index == -1) {
  306. struct bdb_sdvo_lvds_options *sdvo_lvds_options;
  307. sdvo_lvds_options = find_section(bdb, BDB_SDVO_LVDS_OPTIONS);
  308. if (!sdvo_lvds_options)
  309. return;
  310. index = sdvo_lvds_options->panel_type;
  311. }
  312. dvo_timing = find_section(bdb, BDB_SDVO_PANEL_DTDS);
  313. if (!dvo_timing)
  314. return;
  315. panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
  316. if (!panel_fixed_mode)
  317. return;
  318. fill_detail_timing_data(panel_fixed_mode, dvo_timing + index);
  319. dev_priv->vbt.sdvo_lvds_vbt_mode = panel_fixed_mode;
  320. DRM_DEBUG_KMS("Found SDVO panel mode in BIOS VBT tables:\n");
  321. drm_mode_debug_printmodeline(panel_fixed_mode);
  322. }
  323. static int intel_bios_ssc_frequency(struct drm_device *dev,
  324. bool alternate)
  325. {
  326. switch (INTEL_INFO(dev)->gen) {
  327. case 2:
  328. return alternate ? 66667 : 48000;
  329. case 3:
  330. case 4:
  331. return alternate ? 100000 : 96000;
  332. default:
  333. return alternate ? 100000 : 120000;
  334. }
  335. }
  336. static void
  337. parse_general_features(struct drm_i915_private *dev_priv,
  338. struct bdb_header *bdb)
  339. {
  340. struct drm_device *dev = dev_priv->dev;
  341. struct bdb_general_features *general;
  342. general = find_section(bdb, BDB_GENERAL_FEATURES);
  343. if (general) {
  344. dev_priv->vbt.int_tv_support = general->int_tv_support;
  345. dev_priv->vbt.int_crt_support = general->int_crt_support;
  346. dev_priv->vbt.lvds_use_ssc = general->enable_ssc;
  347. dev_priv->vbt.lvds_ssc_freq =
  348. intel_bios_ssc_frequency(dev, general->ssc_freq);
  349. dev_priv->vbt.display_clock_mode = general->display_clock_mode;
  350. dev_priv->vbt.fdi_rx_polarity_inverted = general->fdi_rx_polarity_inverted;
  351. DRM_DEBUG_KMS("BDB_GENERAL_FEATURES int_tv_support %d int_crt_support %d lvds_use_ssc %d lvds_ssc_freq %d display_clock_mode %d fdi_rx_polarity_inverted %d\n",
  352. dev_priv->vbt.int_tv_support,
  353. dev_priv->vbt.int_crt_support,
  354. dev_priv->vbt.lvds_use_ssc,
  355. dev_priv->vbt.lvds_ssc_freq,
  356. dev_priv->vbt.display_clock_mode,
  357. dev_priv->vbt.fdi_rx_polarity_inverted);
  358. }
  359. }
  360. static void
  361. parse_general_definitions(struct drm_i915_private *dev_priv,
  362. struct bdb_header *bdb)
  363. {
  364. struct bdb_general_definitions *general;
  365. general = find_section(bdb, BDB_GENERAL_DEFINITIONS);
  366. if (general) {
  367. u16 block_size = get_blocksize(general);
  368. if (block_size >= sizeof(*general)) {
  369. int bus_pin = general->crt_ddc_gmbus_pin;
  370. DRM_DEBUG_KMS("crt_ddc_bus_pin: %d\n", bus_pin);
  371. if (intel_gmbus_is_valid_pin(dev_priv, bus_pin))
  372. dev_priv->vbt.crt_ddc_pin = bus_pin;
  373. } else {
  374. DRM_DEBUG_KMS("BDB_GD too small (%d). Invalid.\n",
  375. block_size);
  376. }
  377. }
  378. }
  379. static union child_device_config *
  380. child_device_ptr(struct bdb_general_definitions *p_defs, int i)
  381. {
  382. return (void *) &p_defs->devices[i * p_defs->child_dev_size];
  383. }
  384. static void
  385. parse_sdvo_device_mapping(struct drm_i915_private *dev_priv,
  386. struct bdb_header *bdb)
  387. {
  388. struct sdvo_device_mapping *p_mapping;
  389. struct bdb_general_definitions *p_defs;
  390. union child_device_config *p_child;
  391. int i, child_device_num, count;
  392. u16 block_size;
  393. p_defs = find_section(bdb, BDB_GENERAL_DEFINITIONS);
  394. if (!p_defs) {
  395. DRM_DEBUG_KMS("No general definition block is found, unable to construct sdvo mapping.\n");
  396. return;
  397. }
  398. /* judge whether the size of child device meets the requirements.
  399. * If the child device size obtained from general definition block
  400. * is different with sizeof(struct child_device_config), skip the
  401. * parsing of sdvo device info
  402. */
  403. if (p_defs->child_dev_size != sizeof(*p_child)) {
  404. /* different child dev size . Ignore it */
  405. DRM_DEBUG_KMS("different child size is found. Invalid.\n");
  406. return;
  407. }
  408. /* get the block size of general definitions */
  409. block_size = get_blocksize(p_defs);
  410. /* get the number of child device */
  411. child_device_num = (block_size - sizeof(*p_defs)) /
  412. p_defs->child_dev_size;
  413. count = 0;
  414. for (i = 0; i < child_device_num; i++) {
  415. p_child = child_device_ptr(p_defs, i);
  416. if (!p_child->old.device_type) {
  417. /* skip the device block if device type is invalid */
  418. continue;
  419. }
  420. if (p_child->old.slave_addr != SLAVE_ADDR1 &&
  421. p_child->old.slave_addr != SLAVE_ADDR2) {
  422. /*
  423. * If the slave address is neither 0x70 nor 0x72,
  424. * it is not a SDVO device. Skip it.
  425. */
  426. continue;
  427. }
  428. if (p_child->old.dvo_port != DEVICE_PORT_DVOB &&
  429. p_child->old.dvo_port != DEVICE_PORT_DVOC) {
  430. /* skip the incorrect SDVO port */
  431. DRM_DEBUG_KMS("Incorrect SDVO port. Skip it\n");
  432. continue;
  433. }
  434. DRM_DEBUG_KMS("the SDVO device with slave addr %2x is found on"
  435. " %s port\n",
  436. p_child->old.slave_addr,
  437. (p_child->old.dvo_port == DEVICE_PORT_DVOB) ?
  438. "SDVOB" : "SDVOC");
  439. p_mapping = &(dev_priv->sdvo_mappings[p_child->old.dvo_port - 1]);
  440. if (!p_mapping->initialized) {
  441. p_mapping->dvo_port = p_child->old.dvo_port;
  442. p_mapping->slave_addr = p_child->old.slave_addr;
  443. p_mapping->dvo_wiring = p_child->old.dvo_wiring;
  444. p_mapping->ddc_pin = p_child->old.ddc_pin;
  445. p_mapping->i2c_pin = p_child->old.i2c_pin;
  446. p_mapping->initialized = 1;
  447. DRM_DEBUG_KMS("SDVO device: dvo=%x, addr=%x, wiring=%d, ddc_pin=%d, i2c_pin=%d\n",
  448. p_mapping->dvo_port,
  449. p_mapping->slave_addr,
  450. p_mapping->dvo_wiring,
  451. p_mapping->ddc_pin,
  452. p_mapping->i2c_pin);
  453. } else {
  454. DRM_DEBUG_KMS("Maybe one SDVO port is shared by "
  455. "two SDVO device.\n");
  456. }
  457. if (p_child->old.slave2_addr) {
  458. /* Maybe this is a SDVO device with multiple inputs */
  459. /* And the mapping info is not added */
  460. DRM_DEBUG_KMS("there exists the slave2_addr. Maybe this"
  461. " is a SDVO device with multiple inputs.\n");
  462. }
  463. count++;
  464. }
  465. if (!count) {
  466. /* No SDVO device info is found */
  467. DRM_DEBUG_KMS("No SDVO device info is found in VBT\n");
  468. }
  469. return;
  470. }
  471. static void
  472. parse_driver_features(struct drm_i915_private *dev_priv,
  473. struct bdb_header *bdb)
  474. {
  475. struct bdb_driver_features *driver;
  476. driver = find_section(bdb, BDB_DRIVER_FEATURES);
  477. if (!driver)
  478. return;
  479. if (driver->lvds_config == BDB_DRIVER_FEATURE_EDP)
  480. dev_priv->vbt.edp_support = 1;
  481. if (driver->dual_frequency)
  482. dev_priv->render_reclock_avail = true;
  483. DRM_DEBUG_KMS("DRRS State Enabled:%d\n", driver->drrs_enabled);
  484. /*
  485. * If DRRS is not supported, drrs_type has to be set to 0.
  486. * This is because, VBT is configured in such a way that
  487. * static DRRS is 0 and DRRS not supported is represented by
  488. * driver->drrs_enabled=false
  489. */
  490. if (!driver->drrs_enabled)
  491. dev_priv->vbt.drrs_type = DRRS_NOT_SUPPORTED;
  492. }
  493. static void
  494. parse_edp(struct drm_i915_private *dev_priv, struct bdb_header *bdb)
  495. {
  496. struct bdb_edp *edp;
  497. struct edp_power_seq *edp_pps;
  498. struct edp_link_params *edp_link_params;
  499. edp = find_section(bdb, BDB_EDP);
  500. if (!edp) {
  501. if (dev_priv->vbt.edp_support)
  502. DRM_DEBUG_KMS("No eDP BDB found but eDP panel supported.\n");
  503. return;
  504. }
  505. switch ((edp->color_depth >> (panel_type * 2)) & 3) {
  506. case EDP_18BPP:
  507. dev_priv->vbt.edp_bpp = 18;
  508. break;
  509. case EDP_24BPP:
  510. dev_priv->vbt.edp_bpp = 24;
  511. break;
  512. case EDP_30BPP:
  513. dev_priv->vbt.edp_bpp = 30;
  514. break;
  515. }
  516. /* Get the eDP sequencing and link info */
  517. edp_pps = &edp->power_seqs[panel_type];
  518. edp_link_params = &edp->link_params[panel_type];
  519. dev_priv->vbt.edp_pps = *edp_pps;
  520. switch (edp_link_params->rate) {
  521. case EDP_RATE_1_62:
  522. dev_priv->vbt.edp_rate = DP_LINK_BW_1_62;
  523. break;
  524. case EDP_RATE_2_7:
  525. dev_priv->vbt.edp_rate = DP_LINK_BW_2_7;
  526. break;
  527. default:
  528. DRM_DEBUG_KMS("VBT has unknown eDP link rate value %u\n",
  529. edp_link_params->rate);
  530. break;
  531. }
  532. switch (edp_link_params->lanes) {
  533. case EDP_LANE_1:
  534. dev_priv->vbt.edp_lanes = 1;
  535. break;
  536. case EDP_LANE_2:
  537. dev_priv->vbt.edp_lanes = 2;
  538. break;
  539. case EDP_LANE_4:
  540. dev_priv->vbt.edp_lanes = 4;
  541. break;
  542. default:
  543. DRM_DEBUG_KMS("VBT has unknown eDP lane count value %u\n",
  544. edp_link_params->lanes);
  545. break;
  546. }
  547. switch (edp_link_params->preemphasis) {
  548. case EDP_PREEMPHASIS_NONE:
  549. dev_priv->vbt.edp_preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_0;
  550. break;
  551. case EDP_PREEMPHASIS_3_5dB:
  552. dev_priv->vbt.edp_preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_1;
  553. break;
  554. case EDP_PREEMPHASIS_6dB:
  555. dev_priv->vbt.edp_preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_2;
  556. break;
  557. case EDP_PREEMPHASIS_9_5dB:
  558. dev_priv->vbt.edp_preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_3;
  559. break;
  560. default:
  561. DRM_DEBUG_KMS("VBT has unknown eDP pre-emphasis value %u\n",
  562. edp_link_params->preemphasis);
  563. break;
  564. }
  565. switch (edp_link_params->vswing) {
  566. case EDP_VSWING_0_4V:
  567. dev_priv->vbt.edp_vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_0;
  568. break;
  569. case EDP_VSWING_0_6V:
  570. dev_priv->vbt.edp_vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_1;
  571. break;
  572. case EDP_VSWING_0_8V:
  573. dev_priv->vbt.edp_vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_2;
  574. break;
  575. case EDP_VSWING_1_2V:
  576. dev_priv->vbt.edp_vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_3;
  577. break;
  578. default:
  579. DRM_DEBUG_KMS("VBT has unknown eDP voltage swing value %u\n",
  580. edp_link_params->vswing);
  581. break;
  582. }
  583. if (bdb->version >= 173) {
  584. uint8_t vswing;
  585. vswing = (edp->edp_vswing_preemph >> (panel_type * 4)) & 0xF;
  586. dev_priv->vbt.edp_low_vswing = vswing == 0;
  587. }
  588. }
  589. static void
  590. parse_psr(struct drm_i915_private *dev_priv, struct bdb_header *bdb)
  591. {
  592. struct bdb_psr *psr;
  593. struct psr_table *psr_table;
  594. psr = find_section(bdb, BDB_PSR);
  595. if (!psr) {
  596. DRM_DEBUG_KMS("No PSR BDB found.\n");
  597. return;
  598. }
  599. psr_table = &psr->psr_table[panel_type];
  600. dev_priv->vbt.psr.full_link = psr_table->full_link;
  601. dev_priv->vbt.psr.require_aux_wakeup = psr_table->require_aux_to_wakeup;
  602. /* Allowed VBT values goes from 0 to 15 */
  603. dev_priv->vbt.psr.idle_frames = psr_table->idle_frames < 0 ? 0 :
  604. psr_table->idle_frames > 15 ? 15 : psr_table->idle_frames;
  605. switch (psr_table->lines_to_wait) {
  606. case 0:
  607. dev_priv->vbt.psr.lines_to_wait = PSR_0_LINES_TO_WAIT;
  608. break;
  609. case 1:
  610. dev_priv->vbt.psr.lines_to_wait = PSR_1_LINE_TO_WAIT;
  611. break;
  612. case 2:
  613. dev_priv->vbt.psr.lines_to_wait = PSR_4_LINES_TO_WAIT;
  614. break;
  615. case 3:
  616. dev_priv->vbt.psr.lines_to_wait = PSR_8_LINES_TO_WAIT;
  617. break;
  618. default:
  619. DRM_DEBUG_KMS("VBT has unknown PSR lines to wait %u\n",
  620. psr_table->lines_to_wait);
  621. break;
  622. }
  623. dev_priv->vbt.psr.tp1_wakeup_time = psr_table->tp1_wakeup_time;
  624. dev_priv->vbt.psr.tp2_tp3_wakeup_time = psr_table->tp2_tp3_wakeup_time;
  625. }
  626. static u8 *goto_next_sequence(u8 *data, int *size)
  627. {
  628. u16 len;
  629. int tmp = *size;
  630. if (--tmp < 0)
  631. return NULL;
  632. /* goto first element */
  633. data++;
  634. while (1) {
  635. switch (*data) {
  636. case MIPI_SEQ_ELEM_SEND_PKT:
  637. /*
  638. * skip by this element payload size
  639. * skip elem id, command flag and data type
  640. */
  641. tmp -= 5;
  642. if (tmp < 0)
  643. return NULL;
  644. data += 3;
  645. len = *((u16 *)data);
  646. tmp -= len;
  647. if (tmp < 0)
  648. return NULL;
  649. /* skip by len */
  650. data = data + 2 + len;
  651. break;
  652. case MIPI_SEQ_ELEM_DELAY:
  653. /* skip by elem id, and delay is 4 bytes */
  654. tmp -= 5;
  655. if (tmp < 0)
  656. return NULL;
  657. data += 5;
  658. break;
  659. case MIPI_SEQ_ELEM_GPIO:
  660. tmp -= 3;
  661. if (tmp < 0)
  662. return NULL;
  663. data += 3;
  664. break;
  665. default:
  666. DRM_ERROR("Unknown element\n");
  667. return NULL;
  668. }
  669. /* end of sequence ? */
  670. if (*data == 0)
  671. break;
  672. }
  673. /* goto next sequence or end of block byte */
  674. if (--tmp < 0)
  675. return NULL;
  676. data++;
  677. /* update amount of data left for the sequence block to be parsed */
  678. *size = tmp;
  679. return data;
  680. }
  681. static void
  682. parse_mipi(struct drm_i915_private *dev_priv, struct bdb_header *bdb)
  683. {
  684. struct bdb_mipi_config *start;
  685. struct bdb_mipi_sequence *sequence;
  686. struct mipi_config *config;
  687. struct mipi_pps_data *pps;
  688. u8 *data, *seq_data;
  689. int i, panel_id, seq_size;
  690. u16 block_size;
  691. /* parse MIPI blocks only if LFP type is MIPI */
  692. if (!dev_priv->vbt.has_mipi)
  693. return;
  694. /* Initialize this to undefined indicating no generic MIPI support */
  695. dev_priv->vbt.dsi.panel_id = MIPI_DSI_UNDEFINED_PANEL_ID;
  696. /* Block #40 is already parsed and panel_fixed_mode is
  697. * stored in dev_priv->lfp_lvds_vbt_mode
  698. * resuse this when needed
  699. */
  700. /* Parse #52 for panel index used from panel_type already
  701. * parsed
  702. */
  703. start = find_section(bdb, BDB_MIPI_CONFIG);
  704. if (!start) {
  705. DRM_DEBUG_KMS("No MIPI config BDB found");
  706. return;
  707. }
  708. DRM_DEBUG_DRIVER("Found MIPI Config block, panel index = %d\n",
  709. panel_type);
  710. /*
  711. * get hold of the correct configuration block and pps data as per
  712. * the panel_type as index
  713. */
  714. config = &start->config[panel_type];
  715. pps = &start->pps[panel_type];
  716. /* store as of now full data. Trim when we realise all is not needed */
  717. dev_priv->vbt.dsi.config = kmemdup(config, sizeof(struct mipi_config), GFP_KERNEL);
  718. if (!dev_priv->vbt.dsi.config)
  719. return;
  720. dev_priv->vbt.dsi.pps = kmemdup(pps, sizeof(struct mipi_pps_data), GFP_KERNEL);
  721. if (!dev_priv->vbt.dsi.pps) {
  722. kfree(dev_priv->vbt.dsi.config);
  723. return;
  724. }
  725. /* We have mandatory mipi config blocks. Initialize as generic panel */
  726. dev_priv->vbt.dsi.panel_id = MIPI_DSI_GENERIC_PANEL_ID;
  727. /* Check if we have sequence block as well */
  728. sequence = find_section(bdb, BDB_MIPI_SEQUENCE);
  729. if (!sequence) {
  730. DRM_DEBUG_KMS("No MIPI Sequence found, parsing complete\n");
  731. return;
  732. }
  733. DRM_DEBUG_DRIVER("Found MIPI sequence block\n");
  734. block_size = get_blocksize(sequence);
  735. /*
  736. * parse the sequence block for individual sequences
  737. */
  738. dev_priv->vbt.dsi.seq_version = sequence->version;
  739. seq_data = &sequence->data[0];
  740. /*
  741. * sequence block is variable length and hence we need to parse and
  742. * get the sequence data for specific panel id
  743. */
  744. for (i = 0; i < MAX_MIPI_CONFIGURATIONS; i++) {
  745. panel_id = *seq_data;
  746. seq_size = *((u16 *) (seq_data + 1));
  747. if (panel_id == panel_type)
  748. break;
  749. /* skip the sequence including seq header of 3 bytes */
  750. seq_data = seq_data + 3 + seq_size;
  751. if ((seq_data - &sequence->data[0]) > block_size) {
  752. DRM_ERROR("Sequence start is beyond sequence block size, corrupted sequence block\n");
  753. return;
  754. }
  755. }
  756. if (i == MAX_MIPI_CONFIGURATIONS) {
  757. DRM_ERROR("Sequence block detected but no valid configuration\n");
  758. return;
  759. }
  760. /* check if found sequence is completely within the sequence block
  761. * just being paranoid */
  762. if (seq_size > block_size) {
  763. DRM_ERROR("Corrupted sequence/size, bailing out\n");
  764. return;
  765. }
  766. /* skip the panel id(1 byte) and seq size(2 bytes) */
  767. dev_priv->vbt.dsi.data = kmemdup(seq_data + 3, seq_size, GFP_KERNEL);
  768. if (!dev_priv->vbt.dsi.data)
  769. return;
  770. /*
  771. * loop into the sequence data and split into multiple sequneces
  772. * There are only 5 types of sequences as of now
  773. */
  774. data = dev_priv->vbt.dsi.data;
  775. dev_priv->vbt.dsi.size = seq_size;
  776. /* two consecutive 0x00 indicate end of all sequences */
  777. while (1) {
  778. int seq_id = *data;
  779. if (MIPI_SEQ_MAX > seq_id && seq_id > MIPI_SEQ_UNDEFINED) {
  780. dev_priv->vbt.dsi.sequence[seq_id] = data;
  781. DRM_DEBUG_DRIVER("Found mipi sequence - %d\n", seq_id);
  782. } else {
  783. DRM_ERROR("undefined sequence\n");
  784. goto err;
  785. }
  786. /* partial parsing to skip elements */
  787. data = goto_next_sequence(data, &seq_size);
  788. if (data == NULL) {
  789. DRM_ERROR("Sequence elements going beyond block itself. Sequence block parsing failed\n");
  790. goto err;
  791. }
  792. if (*data == 0)
  793. break; /* end of sequence reached */
  794. }
  795. DRM_DEBUG_DRIVER("MIPI related vbt parsing complete\n");
  796. return;
  797. err:
  798. kfree(dev_priv->vbt.dsi.data);
  799. dev_priv->vbt.dsi.data = NULL;
  800. /* error during parsing so set all pointers to null
  801. * because of partial parsing */
  802. memset(dev_priv->vbt.dsi.sequence, 0, sizeof(dev_priv->vbt.dsi.sequence));
  803. }
  804. static void parse_ddi_port(struct drm_i915_private *dev_priv, enum port port,
  805. struct bdb_header *bdb)
  806. {
  807. union child_device_config *it, *child = NULL;
  808. struct ddi_vbt_port_info *info = &dev_priv->vbt.ddi_port_info[port];
  809. uint8_t hdmi_level_shift;
  810. int i, j;
  811. bool is_dvi, is_hdmi, is_dp, is_edp, is_crt;
  812. uint8_t aux_channel;
  813. /* Each DDI port can have more than one value on the "DVO Port" field,
  814. * so look for all the possible values for each port and abort if more
  815. * than one is found. */
  816. int dvo_ports[][2] = {
  817. {DVO_PORT_HDMIA, DVO_PORT_DPA},
  818. {DVO_PORT_HDMIB, DVO_PORT_DPB},
  819. {DVO_PORT_HDMIC, DVO_PORT_DPC},
  820. {DVO_PORT_HDMID, DVO_PORT_DPD},
  821. {DVO_PORT_CRT, -1 /* Port E can only be DVO_PORT_CRT */ },
  822. };
  823. /* Find the child device to use, abort if more than one found. */
  824. for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
  825. it = dev_priv->vbt.child_dev + i;
  826. for (j = 0; j < 2; j++) {
  827. if (dvo_ports[port][j] == -1)
  828. break;
  829. if (it->common.dvo_port == dvo_ports[port][j]) {
  830. if (child) {
  831. DRM_DEBUG_KMS("More than one child device for port %c in VBT.\n",
  832. port_name(port));
  833. return;
  834. }
  835. child = it;
  836. }
  837. }
  838. }
  839. if (!child)
  840. return;
  841. aux_channel = child->raw[25];
  842. is_dvi = child->common.device_type & DEVICE_TYPE_TMDS_DVI_SIGNALING;
  843. is_dp = child->common.device_type & DEVICE_TYPE_DISPLAYPORT_OUTPUT;
  844. is_crt = child->common.device_type & DEVICE_TYPE_ANALOG_OUTPUT;
  845. is_hdmi = is_dvi && (child->common.device_type & DEVICE_TYPE_NOT_HDMI_OUTPUT) == 0;
  846. is_edp = is_dp && (child->common.device_type & DEVICE_TYPE_INTERNAL_CONNECTOR);
  847. info->supports_dvi = is_dvi;
  848. info->supports_hdmi = is_hdmi;
  849. info->supports_dp = is_dp;
  850. DRM_DEBUG_KMS("Port %c VBT info: DP:%d HDMI:%d DVI:%d EDP:%d CRT:%d\n",
  851. port_name(port), is_dp, is_hdmi, is_dvi, is_edp, is_crt);
  852. if (is_edp && is_dvi)
  853. DRM_DEBUG_KMS("Internal DP port %c is TMDS compatible\n",
  854. port_name(port));
  855. if (is_crt && port != PORT_E)
  856. DRM_DEBUG_KMS("Port %c is analog\n", port_name(port));
  857. if (is_crt && (is_dvi || is_dp))
  858. DRM_DEBUG_KMS("Analog port %c is also DP or TMDS compatible\n",
  859. port_name(port));
  860. if (is_dvi && (port == PORT_A || port == PORT_E))
  861. DRM_DEBUG_KMS("Port %c is TMDS compatible\n", port_name(port));
  862. if (!is_dvi && !is_dp && !is_crt)
  863. DRM_DEBUG_KMS("Port %c is not DP/TMDS/CRT compatible\n",
  864. port_name(port));
  865. if (is_edp && (port == PORT_B || port == PORT_C || port == PORT_E))
  866. DRM_DEBUG_KMS("Port %c is internal DP\n", port_name(port));
  867. if (is_dvi) {
  868. if (child->common.ddc_pin == 0x05 && port != PORT_B)
  869. DRM_DEBUG_KMS("Unexpected DDC pin for port B\n");
  870. if (child->common.ddc_pin == 0x04 && port != PORT_C)
  871. DRM_DEBUG_KMS("Unexpected DDC pin for port C\n");
  872. if (child->common.ddc_pin == 0x06 && port != PORT_D)
  873. DRM_DEBUG_KMS("Unexpected DDC pin for port D\n");
  874. }
  875. if (is_dp) {
  876. if (aux_channel == 0x40 && port != PORT_A)
  877. DRM_DEBUG_KMS("Unexpected AUX channel for port A\n");
  878. if (aux_channel == 0x10 && port != PORT_B)
  879. DRM_DEBUG_KMS("Unexpected AUX channel for port B\n");
  880. if (aux_channel == 0x20 && port != PORT_C)
  881. DRM_DEBUG_KMS("Unexpected AUX channel for port C\n");
  882. if (aux_channel == 0x30 && port != PORT_D)
  883. DRM_DEBUG_KMS("Unexpected AUX channel for port D\n");
  884. }
  885. if (bdb->version >= 158) {
  886. /* The VBT HDMI level shift values match the table we have. */
  887. hdmi_level_shift = child->raw[7] & 0xF;
  888. DRM_DEBUG_KMS("VBT HDMI level shift for port %c: %d\n",
  889. port_name(port),
  890. hdmi_level_shift);
  891. info->hdmi_level_shift = hdmi_level_shift;
  892. }
  893. }
  894. static void parse_ddi_ports(struct drm_i915_private *dev_priv,
  895. struct bdb_header *bdb)
  896. {
  897. struct drm_device *dev = dev_priv->dev;
  898. enum port port;
  899. if (!HAS_DDI(dev))
  900. return;
  901. if (!dev_priv->vbt.child_dev_num)
  902. return;
  903. if (bdb->version < 155)
  904. return;
  905. for (port = PORT_A; port < I915_MAX_PORTS; port++)
  906. parse_ddi_port(dev_priv, port, bdb);
  907. }
  908. static void
  909. parse_device_mapping(struct drm_i915_private *dev_priv,
  910. struct bdb_header *bdb)
  911. {
  912. struct bdb_general_definitions *p_defs;
  913. union child_device_config *p_child, *child_dev_ptr;
  914. int i, child_device_num, count;
  915. u16 block_size;
  916. p_defs = find_section(bdb, BDB_GENERAL_DEFINITIONS);
  917. if (!p_defs) {
  918. DRM_DEBUG_KMS("No general definition block is found, no devices defined.\n");
  919. return;
  920. }
  921. if (p_defs->child_dev_size < sizeof(*p_child)) {
  922. DRM_ERROR("General definiton block child device size is too small.\n");
  923. return;
  924. }
  925. /* get the block size of general definitions */
  926. block_size = get_blocksize(p_defs);
  927. /* get the number of child device */
  928. child_device_num = (block_size - sizeof(*p_defs)) /
  929. p_defs->child_dev_size;
  930. count = 0;
  931. /* get the number of child device that is present */
  932. for (i = 0; i < child_device_num; i++) {
  933. p_child = child_device_ptr(p_defs, i);
  934. if (!p_child->common.device_type) {
  935. /* skip the device block if device type is invalid */
  936. continue;
  937. }
  938. count++;
  939. }
  940. if (!count) {
  941. DRM_DEBUG_KMS("no child dev is parsed from VBT\n");
  942. return;
  943. }
  944. dev_priv->vbt.child_dev = kcalloc(count, sizeof(*p_child), GFP_KERNEL);
  945. if (!dev_priv->vbt.child_dev) {
  946. DRM_DEBUG_KMS("No memory space for child device\n");
  947. return;
  948. }
  949. dev_priv->vbt.child_dev_num = count;
  950. count = 0;
  951. for (i = 0; i < child_device_num; i++) {
  952. p_child = child_device_ptr(p_defs, i);
  953. if (!p_child->common.device_type) {
  954. /* skip the device block if device type is invalid */
  955. continue;
  956. }
  957. if (p_child->common.dvo_port >= DVO_PORT_MIPIA
  958. && p_child->common.dvo_port <= DVO_PORT_MIPID
  959. &&p_child->common.device_type & DEVICE_TYPE_MIPI_OUTPUT) {
  960. DRM_DEBUG_KMS("Found MIPI as LFP\n");
  961. dev_priv->vbt.has_mipi = 1;
  962. dev_priv->vbt.dsi.port = p_child->common.dvo_port;
  963. }
  964. child_dev_ptr = dev_priv->vbt.child_dev + count;
  965. count++;
  966. memcpy((void *)child_dev_ptr, (void *)p_child,
  967. sizeof(*p_child));
  968. }
  969. return;
  970. }
  971. static void
  972. init_vbt_defaults(struct drm_i915_private *dev_priv)
  973. {
  974. struct drm_device *dev = dev_priv->dev;
  975. enum port port;
  976. dev_priv->vbt.crt_ddc_pin = GMBUS_PIN_VGADDC;
  977. /* Default to having backlight */
  978. dev_priv->vbt.backlight.present = true;
  979. /* LFP panel data */
  980. dev_priv->vbt.lvds_dither = 1;
  981. dev_priv->vbt.lvds_vbt = 0;
  982. /* SDVO panel data */
  983. dev_priv->vbt.sdvo_lvds_vbt_mode = NULL;
  984. /* general features */
  985. dev_priv->vbt.int_tv_support = 1;
  986. dev_priv->vbt.int_crt_support = 1;
  987. /* Default to using SSC */
  988. dev_priv->vbt.lvds_use_ssc = 1;
  989. /*
  990. * Core/SandyBridge/IvyBridge use alternative (120MHz) reference
  991. * clock for LVDS.
  992. */
  993. dev_priv->vbt.lvds_ssc_freq = intel_bios_ssc_frequency(dev,
  994. !HAS_PCH_SPLIT(dev));
  995. DRM_DEBUG_KMS("Set default to SSC at %d kHz\n", dev_priv->vbt.lvds_ssc_freq);
  996. for (port = PORT_A; port < I915_MAX_PORTS; port++) {
  997. struct ddi_vbt_port_info *info =
  998. &dev_priv->vbt.ddi_port_info[port];
  999. info->hdmi_level_shift = HDMI_LEVEL_SHIFT_UNKNOWN;
  1000. info->supports_dvi = (port != PORT_A && port != PORT_E);
  1001. info->supports_hdmi = info->supports_dvi;
  1002. info->supports_dp = (port != PORT_E);
  1003. }
  1004. }
  1005. static int intel_no_opregion_vbt_callback(const struct dmi_system_id *id)
  1006. {
  1007. DRM_DEBUG_KMS("Falling back to manually reading VBT from "
  1008. "VBIOS ROM for %s\n",
  1009. id->ident);
  1010. return 1;
  1011. }
  1012. static const struct dmi_system_id intel_no_opregion_vbt[] = {
  1013. {
  1014. .callback = intel_no_opregion_vbt_callback,
  1015. .ident = "ThinkCentre A57",
  1016. .matches = {
  1017. DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"),
  1018. DMI_MATCH(DMI_PRODUCT_NAME, "97027RG"),
  1019. },
  1020. },
  1021. { }
  1022. };
  1023. static struct bdb_header *validate_vbt(char *base, size_t size,
  1024. struct vbt_header *vbt,
  1025. const char *source)
  1026. {
  1027. size_t offset;
  1028. struct bdb_header *bdb;
  1029. if (vbt == NULL) {
  1030. DRM_DEBUG_DRIVER("VBT signature missing\n");
  1031. return NULL;
  1032. }
  1033. offset = (char *)vbt - base;
  1034. if (offset + sizeof(struct vbt_header) > size) {
  1035. DRM_DEBUG_DRIVER("VBT header incomplete\n");
  1036. return NULL;
  1037. }
  1038. if (memcmp(vbt->signature, "$VBT", 4)) {
  1039. DRM_DEBUG_DRIVER("VBT invalid signature\n");
  1040. return NULL;
  1041. }
  1042. offset += vbt->bdb_offset;
  1043. if (offset + sizeof(struct bdb_header) > size) {
  1044. DRM_DEBUG_DRIVER("BDB header incomplete\n");
  1045. return NULL;
  1046. }
  1047. bdb = (struct bdb_header *)(base + offset);
  1048. if (offset + bdb->bdb_size > size) {
  1049. DRM_DEBUG_DRIVER("BDB incomplete\n");
  1050. return NULL;
  1051. }
  1052. DRM_DEBUG_KMS("Using VBT from %s: %20s\n",
  1053. source, vbt->signature);
  1054. return bdb;
  1055. }
  1056. /**
  1057. * intel_parse_bios - find VBT and initialize settings from the BIOS
  1058. * @dev: DRM device
  1059. *
  1060. * Loads the Video BIOS and checks that the VBT exists. Sets scratch registers
  1061. * to appropriate values.
  1062. *
  1063. * Returns 0 on success, nonzero on failure.
  1064. */
  1065. int
  1066. intel_parse_bios(struct drm_device *dev)
  1067. {
  1068. struct drm_i915_private *dev_priv = dev->dev_private;
  1069. struct pci_dev *pdev = dev->pdev;
  1070. struct bdb_header *bdb = NULL;
  1071. u8 __iomem *bios = NULL;
  1072. if (HAS_PCH_NOP(dev))
  1073. return -ENODEV;
  1074. init_vbt_defaults(dev_priv);
  1075. /* XXX Should this validation be moved to intel_opregion.c? */
  1076. if (!dmi_check_system(intel_no_opregion_vbt) && dev_priv->opregion.vbt)
  1077. bdb = validate_vbt((char *)dev_priv->opregion.header, OPREGION_SIZE,
  1078. (struct vbt_header *)dev_priv->opregion.vbt,
  1079. "OpRegion");
  1080. if (bdb == NULL) {
  1081. size_t i, size;
  1082. bios = pci_map_rom(pdev, &size);
  1083. if (!bios)
  1084. return -1;
  1085. /* Scour memory looking for the VBT signature */
  1086. for (i = 0; i + 4 < size; i++) {
  1087. if (memcmp(bios + i, "$VBT", 4) == 0) {
  1088. bdb = validate_vbt(bios, size,
  1089. (struct vbt_header *)(bios + i),
  1090. "PCI ROM");
  1091. break;
  1092. }
  1093. }
  1094. if (!bdb) {
  1095. pci_unmap_rom(pdev, bios);
  1096. return -1;
  1097. }
  1098. }
  1099. /* Grab useful general definitions */
  1100. parse_general_features(dev_priv, bdb);
  1101. parse_general_definitions(dev_priv, bdb);
  1102. parse_lfp_panel_data(dev_priv, bdb);
  1103. parse_lfp_backlight(dev_priv, bdb);
  1104. parse_sdvo_panel_data(dev_priv, bdb);
  1105. parse_sdvo_device_mapping(dev_priv, bdb);
  1106. parse_device_mapping(dev_priv, bdb);
  1107. parse_driver_features(dev_priv, bdb);
  1108. parse_edp(dev_priv, bdb);
  1109. parse_psr(dev_priv, bdb);
  1110. parse_mipi(dev_priv, bdb);
  1111. parse_ddi_ports(dev_priv, bdb);
  1112. if (bios)
  1113. pci_unmap_rom(pdev, bios);
  1114. return 0;
  1115. }
  1116. /* Ensure that vital registers have been initialised, even if the BIOS
  1117. * is absent or just failing to do its job.
  1118. */
  1119. void intel_setup_bios(struct drm_device *dev)
  1120. {
  1121. struct drm_i915_private *dev_priv = dev->dev_private;
  1122. /* Set the Panel Power On/Off timings if uninitialized. */
  1123. if (!HAS_PCH_SPLIT(dev) &&
  1124. I915_READ(PP_ON_DELAYS) == 0 && I915_READ(PP_OFF_DELAYS) == 0) {
  1125. /* Set T2 to 40ms and T5 to 200ms */
  1126. I915_WRITE(PP_ON_DELAYS, 0x019007d0);
  1127. /* Set T3 to 35ms and Tx to 200ms */
  1128. I915_WRITE(PP_OFF_DELAYS, 0x015e07d0);
  1129. }
  1130. }