intel_dp_mst.c 17 KB

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  1. /*
  2. * Copyright © 2008 Intel Corporation
  3. * 2014 Red Hat Inc.
  4. *
  5. * Permission is hereby granted, free of charge, to any person obtaining a
  6. * copy of this software and associated documentation files (the "Software"),
  7. * to deal in the Software without restriction, including without limitation
  8. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  9. * and/or sell copies of the Software, and to permit persons to whom the
  10. * Software is furnished to do so, subject to the following conditions:
  11. *
  12. * The above copyright notice and this permission notice (including the next
  13. * paragraph) shall be included in all copies or substantial portions of the
  14. * Software.
  15. *
  16. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  22. * IN THE SOFTWARE.
  23. *
  24. */
  25. #include <drm/drmP.h>
  26. #include "i915_drv.h"
  27. #include "intel_drv.h"
  28. #include <drm/drm_atomic_helper.h>
  29. #include <drm/drm_crtc_helper.h>
  30. #include <drm/drm_edid.h>
  31. static bool intel_dp_mst_compute_config(struct intel_encoder *encoder,
  32. struct intel_crtc_state *pipe_config,
  33. struct drm_connector_state *conn_state)
  34. {
  35. struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
  36. struct intel_digital_port *intel_dig_port = intel_mst->primary;
  37. struct intel_dp *intel_dp = &intel_dig_port->dp;
  38. struct drm_atomic_state *state;
  39. int bpp;
  40. int lane_count, slots;
  41. const struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
  42. int mst_pbn;
  43. pipe_config->dp_encoder_is_mst = true;
  44. pipe_config->has_pch_encoder = false;
  45. bpp = 24;
  46. /*
  47. * for MST we always configure max link bw - the spec doesn't
  48. * seem to suggest we should do otherwise.
  49. */
  50. lane_count = drm_dp_max_lane_count(intel_dp->dpcd);
  51. pipe_config->lane_count = lane_count;
  52. pipe_config->pipe_bpp = 24;
  53. pipe_config->port_clock = intel_dp_max_link_rate(intel_dp);
  54. state = pipe_config->base.state;
  55. mst_pbn = drm_dp_calc_pbn_mode(adjusted_mode->crtc_clock, bpp);
  56. pipe_config->pbn = mst_pbn;
  57. slots = drm_dp_find_vcpi_slots(&intel_dp->mst_mgr, mst_pbn);
  58. intel_link_compute_m_n(bpp, lane_count,
  59. adjusted_mode->crtc_clock,
  60. pipe_config->port_clock,
  61. &pipe_config->dp_m_n);
  62. pipe_config->dp_m_n.tu = slots;
  63. return true;
  64. }
  65. static void intel_mst_disable_dp(struct intel_encoder *encoder,
  66. struct intel_crtc_state *old_crtc_state,
  67. struct drm_connector_state *old_conn_state)
  68. {
  69. struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
  70. struct intel_digital_port *intel_dig_port = intel_mst->primary;
  71. struct intel_dp *intel_dp = &intel_dig_port->dp;
  72. struct intel_connector *connector =
  73. to_intel_connector(old_conn_state->connector);
  74. int ret;
  75. DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links);
  76. drm_dp_mst_reset_vcpi_slots(&intel_dp->mst_mgr, connector->port);
  77. ret = drm_dp_update_payload_part1(&intel_dp->mst_mgr);
  78. if (ret) {
  79. DRM_ERROR("failed to update payload %d\n", ret);
  80. }
  81. }
  82. static void intel_mst_post_disable_dp(struct intel_encoder *encoder,
  83. struct intel_crtc_state *old_crtc_state,
  84. struct drm_connector_state *old_conn_state)
  85. {
  86. struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
  87. struct intel_digital_port *intel_dig_port = intel_mst->primary;
  88. struct intel_dp *intel_dp = &intel_dig_port->dp;
  89. struct intel_connector *connector =
  90. to_intel_connector(old_conn_state->connector);
  91. DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links);
  92. /* this can fail */
  93. drm_dp_check_act_status(&intel_dp->mst_mgr);
  94. /* and this can also fail */
  95. drm_dp_update_payload_part2(&intel_dp->mst_mgr);
  96. drm_dp_mst_deallocate_vcpi(&intel_dp->mst_mgr, connector->port);
  97. intel_dp->active_mst_links--;
  98. intel_mst->connector = NULL;
  99. if (intel_dp->active_mst_links == 0) {
  100. intel_dig_port->base.post_disable(&intel_dig_port->base,
  101. NULL, NULL);
  102. intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_OFF);
  103. }
  104. }
  105. static void intel_mst_pre_enable_dp(struct intel_encoder *encoder,
  106. struct intel_crtc_state *pipe_config,
  107. struct drm_connector_state *conn_state)
  108. {
  109. struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
  110. struct intel_digital_port *intel_dig_port = intel_mst->primary;
  111. struct intel_dp *intel_dp = &intel_dig_port->dp;
  112. struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
  113. enum port port = intel_dig_port->port;
  114. struct intel_connector *connector =
  115. to_intel_connector(conn_state->connector);
  116. int ret;
  117. uint32_t temp;
  118. int slots;
  119. /* MST encoders are bound to a crtc, not to a connector,
  120. * force the mapping here for get_hw_state.
  121. */
  122. connector->encoder = encoder;
  123. intel_mst->connector = connector;
  124. DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links);
  125. if (intel_dp->active_mst_links == 0) {
  126. intel_ddi_clk_select(&intel_dig_port->base, pipe_config);
  127. intel_prepare_dp_ddi_buffers(&intel_dig_port->base);
  128. intel_dp_set_link_params(intel_dp,
  129. pipe_config->port_clock,
  130. pipe_config->lane_count,
  131. true);
  132. intel_ddi_init_dp_buf_reg(&intel_dig_port->base);
  133. intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_ON);
  134. intel_dp_start_link_train(intel_dp);
  135. intel_dp_stop_link_train(intel_dp);
  136. }
  137. ret = drm_dp_mst_allocate_vcpi(&intel_dp->mst_mgr,
  138. connector->port,
  139. pipe_config->pbn, &slots);
  140. if (ret == false) {
  141. DRM_ERROR("failed to allocate vcpi\n");
  142. return;
  143. }
  144. intel_dp->active_mst_links++;
  145. temp = I915_READ(DP_TP_STATUS(port));
  146. I915_WRITE(DP_TP_STATUS(port), temp);
  147. ret = drm_dp_update_payload_part1(&intel_dp->mst_mgr);
  148. }
  149. static void intel_mst_enable_dp(struct intel_encoder *encoder,
  150. struct intel_crtc_state *pipe_config,
  151. struct drm_connector_state *conn_state)
  152. {
  153. struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
  154. struct intel_digital_port *intel_dig_port = intel_mst->primary;
  155. struct intel_dp *intel_dp = &intel_dig_port->dp;
  156. struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
  157. enum port port = intel_dig_port->port;
  158. int ret;
  159. DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links);
  160. if (intel_wait_for_register(dev_priv,
  161. DP_TP_STATUS(port),
  162. DP_TP_STATUS_ACT_SENT,
  163. DP_TP_STATUS_ACT_SENT,
  164. 1))
  165. DRM_ERROR("Timed out waiting for ACT sent\n");
  166. ret = drm_dp_check_act_status(&intel_dp->mst_mgr);
  167. ret = drm_dp_update_payload_part2(&intel_dp->mst_mgr);
  168. }
  169. static bool intel_dp_mst_enc_get_hw_state(struct intel_encoder *encoder,
  170. enum pipe *pipe)
  171. {
  172. struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
  173. *pipe = intel_mst->pipe;
  174. if (intel_mst->connector)
  175. return true;
  176. return false;
  177. }
  178. static void intel_dp_mst_enc_get_config(struct intel_encoder *encoder,
  179. struct intel_crtc_state *pipe_config)
  180. {
  181. struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
  182. struct intel_digital_port *intel_dig_port = intel_mst->primary;
  183. struct intel_crtc *crtc = to_intel_crtc(pipe_config->base.crtc);
  184. struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
  185. enum transcoder cpu_transcoder = pipe_config->cpu_transcoder;
  186. u32 temp, flags = 0;
  187. temp = I915_READ(TRANS_DDI_FUNC_CTL(cpu_transcoder));
  188. if (temp & TRANS_DDI_PHSYNC)
  189. flags |= DRM_MODE_FLAG_PHSYNC;
  190. else
  191. flags |= DRM_MODE_FLAG_NHSYNC;
  192. if (temp & TRANS_DDI_PVSYNC)
  193. flags |= DRM_MODE_FLAG_PVSYNC;
  194. else
  195. flags |= DRM_MODE_FLAG_NVSYNC;
  196. switch (temp & TRANS_DDI_BPC_MASK) {
  197. case TRANS_DDI_BPC_6:
  198. pipe_config->pipe_bpp = 18;
  199. break;
  200. case TRANS_DDI_BPC_8:
  201. pipe_config->pipe_bpp = 24;
  202. break;
  203. case TRANS_DDI_BPC_10:
  204. pipe_config->pipe_bpp = 30;
  205. break;
  206. case TRANS_DDI_BPC_12:
  207. pipe_config->pipe_bpp = 36;
  208. break;
  209. default:
  210. break;
  211. }
  212. pipe_config->base.adjusted_mode.flags |= flags;
  213. pipe_config->lane_count =
  214. ((temp & DDI_PORT_WIDTH_MASK) >> DDI_PORT_WIDTH_SHIFT) + 1;
  215. intel_dp_get_m_n(crtc, pipe_config);
  216. intel_ddi_clock_get(&intel_dig_port->base, pipe_config);
  217. }
  218. static int intel_dp_mst_get_ddc_modes(struct drm_connector *connector)
  219. {
  220. struct intel_connector *intel_connector = to_intel_connector(connector);
  221. struct intel_dp *intel_dp = intel_connector->mst_port;
  222. struct edid *edid;
  223. int ret;
  224. if (!intel_dp) {
  225. return intel_connector_update_modes(connector, NULL);
  226. }
  227. edid = drm_dp_mst_get_edid(connector, &intel_dp->mst_mgr, intel_connector->port);
  228. ret = intel_connector_update_modes(connector, edid);
  229. kfree(edid);
  230. return ret;
  231. }
  232. static enum drm_connector_status
  233. intel_dp_mst_detect(struct drm_connector *connector, bool force)
  234. {
  235. struct intel_connector *intel_connector = to_intel_connector(connector);
  236. struct intel_dp *intel_dp = intel_connector->mst_port;
  237. if (!intel_dp)
  238. return connector_status_disconnected;
  239. return drm_dp_mst_detect_port(connector, &intel_dp->mst_mgr, intel_connector->port);
  240. }
  241. static int
  242. intel_dp_mst_set_property(struct drm_connector *connector,
  243. struct drm_property *property,
  244. uint64_t val)
  245. {
  246. return 0;
  247. }
  248. static void
  249. intel_dp_mst_connector_destroy(struct drm_connector *connector)
  250. {
  251. struct intel_connector *intel_connector = to_intel_connector(connector);
  252. if (!IS_ERR_OR_NULL(intel_connector->edid))
  253. kfree(intel_connector->edid);
  254. drm_connector_cleanup(connector);
  255. kfree(connector);
  256. }
  257. static const struct drm_connector_funcs intel_dp_mst_connector_funcs = {
  258. .dpms = drm_atomic_helper_connector_dpms,
  259. .detect = intel_dp_mst_detect,
  260. .fill_modes = drm_helper_probe_single_connector_modes,
  261. .set_property = intel_dp_mst_set_property,
  262. .atomic_get_property = intel_connector_atomic_get_property,
  263. .late_register = intel_connector_register,
  264. .early_unregister = intel_connector_unregister,
  265. .destroy = intel_dp_mst_connector_destroy,
  266. .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
  267. .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
  268. };
  269. static int intel_dp_mst_get_modes(struct drm_connector *connector)
  270. {
  271. return intel_dp_mst_get_ddc_modes(connector);
  272. }
  273. static enum drm_mode_status
  274. intel_dp_mst_mode_valid(struct drm_connector *connector,
  275. struct drm_display_mode *mode)
  276. {
  277. int max_dotclk = to_i915(connector->dev)->max_dotclk_freq;
  278. /* TODO - validate mode against available PBN for link */
  279. if (mode->clock < 10000)
  280. return MODE_CLOCK_LOW;
  281. if (mode->flags & DRM_MODE_FLAG_DBLCLK)
  282. return MODE_H_ILLEGAL;
  283. if (mode->clock > max_dotclk)
  284. return MODE_CLOCK_HIGH;
  285. return MODE_OK;
  286. }
  287. static struct drm_encoder *intel_mst_atomic_best_encoder(struct drm_connector *connector,
  288. struct drm_connector_state *state)
  289. {
  290. struct intel_connector *intel_connector = to_intel_connector(connector);
  291. struct intel_dp *intel_dp = intel_connector->mst_port;
  292. struct intel_crtc *crtc = to_intel_crtc(state->crtc);
  293. if (!intel_dp)
  294. return NULL;
  295. return &intel_dp->mst_encoders[crtc->pipe]->base.base;
  296. }
  297. static struct drm_encoder *intel_mst_best_encoder(struct drm_connector *connector)
  298. {
  299. struct intel_connector *intel_connector = to_intel_connector(connector);
  300. struct intel_dp *intel_dp = intel_connector->mst_port;
  301. if (!intel_dp)
  302. return NULL;
  303. return &intel_dp->mst_encoders[0]->base.base;
  304. }
  305. static const struct drm_connector_helper_funcs intel_dp_mst_connector_helper_funcs = {
  306. .get_modes = intel_dp_mst_get_modes,
  307. .mode_valid = intel_dp_mst_mode_valid,
  308. .atomic_best_encoder = intel_mst_atomic_best_encoder,
  309. .best_encoder = intel_mst_best_encoder,
  310. };
  311. static void intel_dp_mst_encoder_destroy(struct drm_encoder *encoder)
  312. {
  313. struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
  314. drm_encoder_cleanup(encoder);
  315. kfree(intel_mst);
  316. }
  317. static const struct drm_encoder_funcs intel_dp_mst_enc_funcs = {
  318. .destroy = intel_dp_mst_encoder_destroy,
  319. };
  320. static bool intel_dp_mst_get_hw_state(struct intel_connector *connector)
  321. {
  322. if (connector->encoder && connector->base.state->crtc) {
  323. enum pipe pipe;
  324. if (!connector->encoder->get_hw_state(connector->encoder, &pipe))
  325. return false;
  326. return true;
  327. }
  328. return false;
  329. }
  330. static void intel_connector_add_to_fbdev(struct intel_connector *connector)
  331. {
  332. #ifdef CONFIG_DRM_FBDEV_EMULATION
  333. struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  334. if (dev_priv->fbdev)
  335. drm_fb_helper_add_one_connector(&dev_priv->fbdev->helper,
  336. &connector->base);
  337. #endif
  338. }
  339. static void intel_connector_remove_from_fbdev(struct intel_connector *connector)
  340. {
  341. #ifdef CONFIG_DRM_FBDEV_EMULATION
  342. struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  343. if (dev_priv->fbdev)
  344. drm_fb_helper_remove_one_connector(&dev_priv->fbdev->helper,
  345. &connector->base);
  346. #endif
  347. }
  348. static struct drm_connector *intel_dp_add_mst_connector(struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port, const char *pathprop)
  349. {
  350. struct intel_dp *intel_dp = container_of(mgr, struct intel_dp, mst_mgr);
  351. struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
  352. struct drm_device *dev = intel_dig_port->base.base.dev;
  353. struct intel_connector *intel_connector;
  354. struct drm_connector *connector;
  355. int i;
  356. intel_connector = intel_connector_alloc();
  357. if (!intel_connector)
  358. return NULL;
  359. connector = &intel_connector->base;
  360. drm_connector_init(dev, connector, &intel_dp_mst_connector_funcs, DRM_MODE_CONNECTOR_DisplayPort);
  361. drm_connector_helper_add(connector, &intel_dp_mst_connector_helper_funcs);
  362. intel_connector->get_hw_state = intel_dp_mst_get_hw_state;
  363. intel_connector->mst_port = intel_dp;
  364. intel_connector->port = port;
  365. for (i = PIPE_A; i <= PIPE_C; i++) {
  366. drm_mode_connector_attach_encoder(&intel_connector->base,
  367. &intel_dp->mst_encoders[i]->base.base);
  368. }
  369. intel_dp_add_properties(intel_dp, connector);
  370. drm_object_attach_property(&connector->base, dev->mode_config.path_property, 0);
  371. drm_object_attach_property(&connector->base, dev->mode_config.tile_property, 0);
  372. drm_mode_connector_set_path_property(connector, pathprop);
  373. return connector;
  374. }
  375. static void intel_dp_register_mst_connector(struct drm_connector *connector)
  376. {
  377. struct intel_connector *intel_connector = to_intel_connector(connector);
  378. struct drm_device *dev = connector->dev;
  379. drm_modeset_lock_all(dev);
  380. intel_connector_add_to_fbdev(intel_connector);
  381. drm_modeset_unlock_all(dev);
  382. drm_connector_register(&intel_connector->base);
  383. }
  384. static void intel_dp_destroy_mst_connector(struct drm_dp_mst_topology_mgr *mgr,
  385. struct drm_connector *connector)
  386. {
  387. struct intel_connector *intel_connector = to_intel_connector(connector);
  388. struct drm_device *dev = connector->dev;
  389. drm_connector_unregister(connector);
  390. /* need to nuke the connector */
  391. drm_modeset_lock_all(dev);
  392. intel_connector_remove_from_fbdev(intel_connector);
  393. intel_connector->mst_port = NULL;
  394. drm_modeset_unlock_all(dev);
  395. drm_connector_unreference(&intel_connector->base);
  396. DRM_DEBUG_KMS("\n");
  397. }
  398. static void intel_dp_mst_hotplug(struct drm_dp_mst_topology_mgr *mgr)
  399. {
  400. struct intel_dp *intel_dp = container_of(mgr, struct intel_dp, mst_mgr);
  401. struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
  402. struct drm_device *dev = intel_dig_port->base.base.dev;
  403. drm_kms_helper_hotplug_event(dev);
  404. }
  405. static const struct drm_dp_mst_topology_cbs mst_cbs = {
  406. .add_connector = intel_dp_add_mst_connector,
  407. .register_connector = intel_dp_register_mst_connector,
  408. .destroy_connector = intel_dp_destroy_mst_connector,
  409. .hotplug = intel_dp_mst_hotplug,
  410. };
  411. static struct intel_dp_mst_encoder *
  412. intel_dp_create_fake_mst_encoder(struct intel_digital_port *intel_dig_port, enum pipe pipe)
  413. {
  414. struct intel_dp_mst_encoder *intel_mst;
  415. struct intel_encoder *intel_encoder;
  416. struct drm_device *dev = intel_dig_port->base.base.dev;
  417. intel_mst = kzalloc(sizeof(*intel_mst), GFP_KERNEL);
  418. if (!intel_mst)
  419. return NULL;
  420. intel_mst->pipe = pipe;
  421. intel_encoder = &intel_mst->base;
  422. intel_mst->primary = intel_dig_port;
  423. drm_encoder_init(dev, &intel_encoder->base, &intel_dp_mst_enc_funcs,
  424. DRM_MODE_ENCODER_DPMST, "DP-MST %c", pipe_name(pipe));
  425. intel_encoder->type = INTEL_OUTPUT_DP_MST;
  426. intel_encoder->crtc_mask = 0x7;
  427. intel_encoder->cloneable = 0;
  428. intel_encoder->compute_config = intel_dp_mst_compute_config;
  429. intel_encoder->disable = intel_mst_disable_dp;
  430. intel_encoder->post_disable = intel_mst_post_disable_dp;
  431. intel_encoder->pre_enable = intel_mst_pre_enable_dp;
  432. intel_encoder->enable = intel_mst_enable_dp;
  433. intel_encoder->get_hw_state = intel_dp_mst_enc_get_hw_state;
  434. intel_encoder->get_config = intel_dp_mst_enc_get_config;
  435. return intel_mst;
  436. }
  437. static bool
  438. intel_dp_create_fake_mst_encoders(struct intel_digital_port *intel_dig_port)
  439. {
  440. int i;
  441. struct intel_dp *intel_dp = &intel_dig_port->dp;
  442. for (i = PIPE_A; i <= PIPE_C; i++)
  443. intel_dp->mst_encoders[i] = intel_dp_create_fake_mst_encoder(intel_dig_port, i);
  444. return true;
  445. }
  446. int
  447. intel_dp_mst_encoder_init(struct intel_digital_port *intel_dig_port, int conn_base_id)
  448. {
  449. struct intel_dp *intel_dp = &intel_dig_port->dp;
  450. struct drm_device *dev = intel_dig_port->base.base.dev;
  451. int ret;
  452. intel_dp->can_mst = true;
  453. intel_dp->mst_mgr.cbs = &mst_cbs;
  454. /* create encoders */
  455. intel_dp_create_fake_mst_encoders(intel_dig_port);
  456. ret = drm_dp_mst_topology_mgr_init(&intel_dp->mst_mgr, dev->dev, &intel_dp->aux, 16, 3, conn_base_id);
  457. if (ret) {
  458. intel_dp->can_mst = false;
  459. return ret;
  460. }
  461. return 0;
  462. }
  463. void
  464. intel_dp_mst_encoder_cleanup(struct intel_digital_port *intel_dig_port)
  465. {
  466. struct intel_dp *intel_dp = &intel_dig_port->dp;
  467. if (!intel_dp->can_mst)
  468. return;
  469. drm_dp_mst_topology_mgr_destroy(&intel_dp->mst_mgr);
  470. /* encoders will get killed by normal cleanup */
  471. }