fpsimd.c 34 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195119611971198119912001201120212031204120512061207120812091210121112121213121412151216121712181219122012211222122312241225122612271228122912301231123212331234123512361237123812391240124112421243124412451246124712481249125012511252125312541255125612571258125912601261126212631264126512661267126812691270127112721273127412751276127712781279128012811282128312841285128612871288128912901291129212931294129512961297129812991300
  1. /*
  2. * FP/SIMD context switching and fault handling
  3. *
  4. * Copyright (C) 2012 ARM Ltd.
  5. * Author: Catalin Marinas <catalin.marinas@arm.com>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program. If not, see <http://www.gnu.org/licenses/>.
  18. */
  19. #include <linux/bitmap.h>
  20. #include <linux/bottom_half.h>
  21. #include <linux/bug.h>
  22. #include <linux/cache.h>
  23. #include <linux/compat.h>
  24. #include <linux/cpu.h>
  25. #include <linux/cpu_pm.h>
  26. #include <linux/kernel.h>
  27. #include <linux/linkage.h>
  28. #include <linux/irqflags.h>
  29. #include <linux/init.h>
  30. #include <linux/percpu.h>
  31. #include <linux/prctl.h>
  32. #include <linux/preempt.h>
  33. #include <linux/prctl.h>
  34. #include <linux/ptrace.h>
  35. #include <linux/sched/signal.h>
  36. #include <linux/sched/task_stack.h>
  37. #include <linux/signal.h>
  38. #include <linux/slab.h>
  39. #include <linux/sysctl.h>
  40. #include <asm/esr.h>
  41. #include <asm/fpsimd.h>
  42. #include <asm/cpufeature.h>
  43. #include <asm/cputype.h>
  44. #include <asm/simd.h>
  45. #include <asm/sigcontext.h>
  46. #include <asm/sysreg.h>
  47. #include <asm/traps.h>
  48. #define FPEXC_IOF (1 << 0)
  49. #define FPEXC_DZF (1 << 1)
  50. #define FPEXC_OFF (1 << 2)
  51. #define FPEXC_UFF (1 << 3)
  52. #define FPEXC_IXF (1 << 4)
  53. #define FPEXC_IDF (1 << 7)
  54. /*
  55. * (Note: in this discussion, statements about FPSIMD apply equally to SVE.)
  56. *
  57. * In order to reduce the number of times the FPSIMD state is needlessly saved
  58. * and restored, we need to keep track of two things:
  59. * (a) for each task, we need to remember which CPU was the last one to have
  60. * the task's FPSIMD state loaded into its FPSIMD registers;
  61. * (b) for each CPU, we need to remember which task's userland FPSIMD state has
  62. * been loaded into its FPSIMD registers most recently, or whether it has
  63. * been used to perform kernel mode NEON in the meantime.
  64. *
  65. * For (a), we add a fpsimd_cpu field to thread_struct, which gets updated to
  66. * the id of the current CPU every time the state is loaded onto a CPU. For (b),
  67. * we add the per-cpu variable 'fpsimd_last_state' (below), which contains the
  68. * address of the userland FPSIMD state of the task that was loaded onto the CPU
  69. * the most recently, or NULL if kernel mode NEON has been performed after that.
  70. *
  71. * With this in place, we no longer have to restore the next FPSIMD state right
  72. * when switching between tasks. Instead, we can defer this check to userland
  73. * resume, at which time we verify whether the CPU's fpsimd_last_state and the
  74. * task's fpsimd_cpu are still mutually in sync. If this is the case, we
  75. * can omit the FPSIMD restore.
  76. *
  77. * As an optimization, we use the thread_info flag TIF_FOREIGN_FPSTATE to
  78. * indicate whether or not the userland FPSIMD state of the current task is
  79. * present in the registers. The flag is set unless the FPSIMD registers of this
  80. * CPU currently contain the most recent userland FPSIMD state of the current
  81. * task.
  82. *
  83. * In order to allow softirq handlers to use FPSIMD, kernel_neon_begin() may
  84. * save the task's FPSIMD context back to task_struct from softirq context.
  85. * To prevent this from racing with the manipulation of the task's FPSIMD state
  86. * from task context and thereby corrupting the state, it is necessary to
  87. * protect any manipulation of a task's fpsimd_state or TIF_FOREIGN_FPSTATE
  88. * flag with local_bh_disable() unless softirqs are already masked.
  89. *
  90. * For a certain task, the sequence may look something like this:
  91. * - the task gets scheduled in; if both the task's fpsimd_cpu field
  92. * contains the id of the current CPU, and the CPU's fpsimd_last_state per-cpu
  93. * variable points to the task's fpsimd_state, the TIF_FOREIGN_FPSTATE flag is
  94. * cleared, otherwise it is set;
  95. *
  96. * - the task returns to userland; if TIF_FOREIGN_FPSTATE is set, the task's
  97. * userland FPSIMD state is copied from memory to the registers, the task's
  98. * fpsimd_cpu field is set to the id of the current CPU, the current
  99. * CPU's fpsimd_last_state pointer is set to this task's fpsimd_state and the
  100. * TIF_FOREIGN_FPSTATE flag is cleared;
  101. *
  102. * - the task executes an ordinary syscall; upon return to userland, the
  103. * TIF_FOREIGN_FPSTATE flag will still be cleared, so no FPSIMD state is
  104. * restored;
  105. *
  106. * - the task executes a syscall which executes some NEON instructions; this is
  107. * preceded by a call to kernel_neon_begin(), which copies the task's FPSIMD
  108. * register contents to memory, clears the fpsimd_last_state per-cpu variable
  109. * and sets the TIF_FOREIGN_FPSTATE flag;
  110. *
  111. * - the task gets preempted after kernel_neon_end() is called; as we have not
  112. * returned from the 2nd syscall yet, TIF_FOREIGN_FPSTATE is still set so
  113. * whatever is in the FPSIMD registers is not saved to memory, but discarded.
  114. */
  115. struct fpsimd_last_state_struct {
  116. struct user_fpsimd_state *st;
  117. bool sve_in_use;
  118. };
  119. static DEFINE_PER_CPU(struct fpsimd_last_state_struct, fpsimd_last_state);
  120. /* Default VL for tasks that don't set it explicitly: */
  121. static int sve_default_vl = -1;
  122. #ifdef CONFIG_ARM64_SVE
  123. /* Maximum supported vector length across all CPUs (initially poisoned) */
  124. int __ro_after_init sve_max_vl = -1;
  125. /* Set of available vector lengths, as vq_to_bit(vq): */
  126. static __ro_after_init DECLARE_BITMAP(sve_vq_map, SVE_VQ_MAX);
  127. static void __percpu *efi_sve_state;
  128. #else /* ! CONFIG_ARM64_SVE */
  129. /* Dummy declaration for code that will be optimised out: */
  130. extern __ro_after_init DECLARE_BITMAP(sve_vq_map, SVE_VQ_MAX);
  131. extern void __percpu *efi_sve_state;
  132. #endif /* ! CONFIG_ARM64_SVE */
  133. /*
  134. * Call __sve_free() directly only if you know task can't be scheduled
  135. * or preempted.
  136. */
  137. static void __sve_free(struct task_struct *task)
  138. {
  139. kfree(task->thread.sve_state);
  140. task->thread.sve_state = NULL;
  141. }
  142. static void sve_free(struct task_struct *task)
  143. {
  144. WARN_ON(test_tsk_thread_flag(task, TIF_SVE));
  145. __sve_free(task);
  146. }
  147. /* Offset of FFR in the SVE register dump */
  148. static size_t sve_ffr_offset(int vl)
  149. {
  150. return SVE_SIG_FFR_OFFSET(sve_vq_from_vl(vl)) - SVE_SIG_REGS_OFFSET;
  151. }
  152. static void *sve_pffr(struct task_struct *task)
  153. {
  154. return (char *)task->thread.sve_state +
  155. sve_ffr_offset(task->thread.sve_vl);
  156. }
  157. static void change_cpacr(u64 val, u64 mask)
  158. {
  159. u64 cpacr = read_sysreg(CPACR_EL1);
  160. u64 new = (cpacr & ~mask) | val;
  161. if (new != cpacr)
  162. write_sysreg(new, CPACR_EL1);
  163. }
  164. static void sve_user_disable(void)
  165. {
  166. change_cpacr(0, CPACR_EL1_ZEN_EL0EN);
  167. }
  168. static void sve_user_enable(void)
  169. {
  170. change_cpacr(CPACR_EL1_ZEN_EL0EN, CPACR_EL1_ZEN_EL0EN);
  171. }
  172. /*
  173. * TIF_SVE controls whether a task can use SVE without trapping while
  174. * in userspace, and also the way a task's FPSIMD/SVE state is stored
  175. * in thread_struct.
  176. *
  177. * The kernel uses this flag to track whether a user task is actively
  178. * using SVE, and therefore whether full SVE register state needs to
  179. * be tracked. If not, the cheaper FPSIMD context handling code can
  180. * be used instead of the more costly SVE equivalents.
  181. *
  182. * * TIF_SVE set:
  183. *
  184. * The task can execute SVE instructions while in userspace without
  185. * trapping to the kernel.
  186. *
  187. * When stored, Z0-Z31 (incorporating Vn in bits[127:0] or the
  188. * corresponding Zn), P0-P15 and FFR are encoded in in
  189. * task->thread.sve_state, formatted appropriately for vector
  190. * length task->thread.sve_vl.
  191. *
  192. * task->thread.sve_state must point to a valid buffer at least
  193. * sve_state_size(task) bytes in size.
  194. *
  195. * During any syscall, the kernel may optionally clear TIF_SVE and
  196. * discard the vector state except for the FPSIMD subset.
  197. *
  198. * * TIF_SVE clear:
  199. *
  200. * An attempt by the user task to execute an SVE instruction causes
  201. * do_sve_acc() to be called, which does some preparation and then
  202. * sets TIF_SVE.
  203. *
  204. * When stored, FPSIMD registers V0-V31 are encoded in
  205. * task->thread.uw.fpsimd_state; bits [max : 128] for each of Z0-Z31 are
  206. * logically zero but not stored anywhere; P0-P15 and FFR are not
  207. * stored and have unspecified values from userspace's point of
  208. * view. For hygiene purposes, the kernel zeroes them on next use,
  209. * but userspace is discouraged from relying on this.
  210. *
  211. * task->thread.sve_state does not need to be non-NULL, valid or any
  212. * particular size: it must not be dereferenced.
  213. *
  214. * * FPSR and FPCR are always stored in task->thread.uw.fpsimd_state
  215. * irrespective of whether TIF_SVE is clear or set, since these are
  216. * not vector length dependent.
  217. */
  218. /*
  219. * Update current's FPSIMD/SVE registers from thread_struct.
  220. *
  221. * This function should be called only when the FPSIMD/SVE state in
  222. * thread_struct is known to be up to date, when preparing to enter
  223. * userspace.
  224. *
  225. * Softirqs (and preemption) must be disabled.
  226. */
  227. static void task_fpsimd_load(void)
  228. {
  229. WARN_ON(!in_softirq() && !irqs_disabled());
  230. if (system_supports_sve() && test_thread_flag(TIF_SVE))
  231. sve_load_state(sve_pffr(current),
  232. &current->thread.uw.fpsimd_state.fpsr,
  233. sve_vq_from_vl(current->thread.sve_vl) - 1);
  234. else
  235. fpsimd_load_state(&current->thread.uw.fpsimd_state);
  236. if (system_supports_sve()) {
  237. /* Toggle SVE trapping for userspace if needed */
  238. if (test_thread_flag(TIF_SVE))
  239. sve_user_enable();
  240. else
  241. sve_user_disable();
  242. /* Serialised by exception return to user */
  243. }
  244. }
  245. /*
  246. * Ensure FPSIMD/SVE storage in memory for the loaded context is up to
  247. * date with respect to the CPU registers.
  248. *
  249. * Softirqs (and preemption) must be disabled.
  250. */
  251. static void fpsimd_save(void)
  252. {
  253. struct user_fpsimd_state *st = __this_cpu_read(fpsimd_last_state.st);
  254. /* set by fpsimd_bind_to_cpu() */
  255. WARN_ON(!in_softirq() && !irqs_disabled());
  256. if (!test_thread_flag(TIF_FOREIGN_FPSTATE)) {
  257. if (system_supports_sve() && test_thread_flag(TIF_SVE)) {
  258. if (WARN_ON(sve_get_vl() != current->thread.sve_vl)) {
  259. /*
  260. * Can't save the user regs, so current would
  261. * re-enter user with corrupt state.
  262. * There's no way to recover, so kill it:
  263. */
  264. force_signal_inject(SIGKILL, SI_KERNEL, 0);
  265. return;
  266. }
  267. sve_save_state(sve_pffr(current), &st->fpsr);
  268. } else
  269. fpsimd_save_state(st);
  270. }
  271. }
  272. /*
  273. * Helpers to translate bit indices in sve_vq_map to VQ values (and
  274. * vice versa). This allows find_next_bit() to be used to find the
  275. * _maximum_ VQ not exceeding a certain value.
  276. */
  277. static unsigned int vq_to_bit(unsigned int vq)
  278. {
  279. return SVE_VQ_MAX - vq;
  280. }
  281. static unsigned int bit_to_vq(unsigned int bit)
  282. {
  283. if (WARN_ON(bit >= SVE_VQ_MAX))
  284. bit = SVE_VQ_MAX - 1;
  285. return SVE_VQ_MAX - bit;
  286. }
  287. /*
  288. * All vector length selection from userspace comes through here.
  289. * We're on a slow path, so some sanity-checks are included.
  290. * If things go wrong there's a bug somewhere, but try to fall back to a
  291. * safe choice.
  292. */
  293. static unsigned int find_supported_vector_length(unsigned int vl)
  294. {
  295. int bit;
  296. int max_vl = sve_max_vl;
  297. if (WARN_ON(!sve_vl_valid(vl)))
  298. vl = SVE_VL_MIN;
  299. if (WARN_ON(!sve_vl_valid(max_vl)))
  300. max_vl = SVE_VL_MIN;
  301. if (vl > max_vl)
  302. vl = max_vl;
  303. bit = find_next_bit(sve_vq_map, SVE_VQ_MAX,
  304. vq_to_bit(sve_vq_from_vl(vl)));
  305. return sve_vl_from_vq(bit_to_vq(bit));
  306. }
  307. #ifdef CONFIG_SYSCTL
  308. static int sve_proc_do_default_vl(struct ctl_table *table, int write,
  309. void __user *buffer, size_t *lenp,
  310. loff_t *ppos)
  311. {
  312. int ret;
  313. int vl = sve_default_vl;
  314. struct ctl_table tmp_table = {
  315. .data = &vl,
  316. .maxlen = sizeof(vl),
  317. };
  318. ret = proc_dointvec(&tmp_table, write, buffer, lenp, ppos);
  319. if (ret || !write)
  320. return ret;
  321. /* Writing -1 has the special meaning "set to max": */
  322. if (vl == -1) {
  323. /* Fail safe if sve_max_vl wasn't initialised */
  324. if (WARN_ON(!sve_vl_valid(sve_max_vl)))
  325. vl = SVE_VL_MIN;
  326. else
  327. vl = sve_max_vl;
  328. goto chosen;
  329. }
  330. if (!sve_vl_valid(vl))
  331. return -EINVAL;
  332. vl = find_supported_vector_length(vl);
  333. chosen:
  334. sve_default_vl = vl;
  335. return 0;
  336. }
  337. static struct ctl_table sve_default_vl_table[] = {
  338. {
  339. .procname = "sve_default_vector_length",
  340. .mode = 0644,
  341. .proc_handler = sve_proc_do_default_vl,
  342. },
  343. { }
  344. };
  345. static int __init sve_sysctl_init(void)
  346. {
  347. if (system_supports_sve())
  348. if (!register_sysctl("abi", sve_default_vl_table))
  349. return -EINVAL;
  350. return 0;
  351. }
  352. #else /* ! CONFIG_SYSCTL */
  353. static int __init sve_sysctl_init(void) { return 0; }
  354. #endif /* ! CONFIG_SYSCTL */
  355. #define ZREG(sve_state, vq, n) ((char *)(sve_state) + \
  356. (SVE_SIG_ZREG_OFFSET(vq, n) - SVE_SIG_REGS_OFFSET))
  357. /*
  358. * Transfer the FPSIMD state in task->thread.uw.fpsimd_state to
  359. * task->thread.sve_state.
  360. *
  361. * Task can be a non-runnable task, or current. In the latter case,
  362. * softirqs (and preemption) must be disabled.
  363. * task->thread.sve_state must point to at least sve_state_size(task)
  364. * bytes of allocated kernel memory.
  365. * task->thread.uw.fpsimd_state must be up to date before calling this
  366. * function.
  367. */
  368. static void fpsimd_to_sve(struct task_struct *task)
  369. {
  370. unsigned int vq;
  371. void *sst = task->thread.sve_state;
  372. struct user_fpsimd_state const *fst = &task->thread.uw.fpsimd_state;
  373. unsigned int i;
  374. if (!system_supports_sve())
  375. return;
  376. vq = sve_vq_from_vl(task->thread.sve_vl);
  377. for (i = 0; i < 32; ++i)
  378. memcpy(ZREG(sst, vq, i), &fst->vregs[i],
  379. sizeof(fst->vregs[i]));
  380. }
  381. /*
  382. * Transfer the SVE state in task->thread.sve_state to
  383. * task->thread.uw.fpsimd_state.
  384. *
  385. * Task can be a non-runnable task, or current. In the latter case,
  386. * softirqs (and preemption) must be disabled.
  387. * task->thread.sve_state must point to at least sve_state_size(task)
  388. * bytes of allocated kernel memory.
  389. * task->thread.sve_state must be up to date before calling this function.
  390. */
  391. static void sve_to_fpsimd(struct task_struct *task)
  392. {
  393. unsigned int vq;
  394. void const *sst = task->thread.sve_state;
  395. struct user_fpsimd_state *fst = &task->thread.uw.fpsimd_state;
  396. unsigned int i;
  397. if (!system_supports_sve())
  398. return;
  399. vq = sve_vq_from_vl(task->thread.sve_vl);
  400. for (i = 0; i < 32; ++i)
  401. memcpy(&fst->vregs[i], ZREG(sst, vq, i),
  402. sizeof(fst->vregs[i]));
  403. }
  404. #ifdef CONFIG_ARM64_SVE
  405. /*
  406. * Return how many bytes of memory are required to store the full SVE
  407. * state for task, given task's currently configured vector length.
  408. */
  409. size_t sve_state_size(struct task_struct const *task)
  410. {
  411. return SVE_SIG_REGS_SIZE(sve_vq_from_vl(task->thread.sve_vl));
  412. }
  413. /*
  414. * Ensure that task->thread.sve_state is allocated and sufficiently large.
  415. *
  416. * This function should be used only in preparation for replacing
  417. * task->thread.sve_state with new data. The memory is always zeroed
  418. * here to prevent stale data from showing through: this is done in
  419. * the interest of testability and predictability: except in the
  420. * do_sve_acc() case, there is no ABI requirement to hide stale data
  421. * written previously be task.
  422. */
  423. void sve_alloc(struct task_struct *task)
  424. {
  425. if (task->thread.sve_state) {
  426. memset(task->thread.sve_state, 0, sve_state_size(current));
  427. return;
  428. }
  429. /* This is a small allocation (maximum ~8KB) and Should Not Fail. */
  430. task->thread.sve_state =
  431. kzalloc(sve_state_size(task), GFP_KERNEL);
  432. /*
  433. * If future SVE revisions can have larger vectors though,
  434. * this may cease to be true:
  435. */
  436. BUG_ON(!task->thread.sve_state);
  437. }
  438. /*
  439. * Ensure that task->thread.sve_state is up to date with respect to
  440. * the user task, irrespective of when SVE is in use or not.
  441. *
  442. * This should only be called by ptrace. task must be non-runnable.
  443. * task->thread.sve_state must point to at least sve_state_size(task)
  444. * bytes of allocated kernel memory.
  445. */
  446. void fpsimd_sync_to_sve(struct task_struct *task)
  447. {
  448. if (!test_tsk_thread_flag(task, TIF_SVE))
  449. fpsimd_to_sve(task);
  450. }
  451. /*
  452. * Ensure that task->thread.uw.fpsimd_state is up to date with respect to
  453. * the user task, irrespective of whether SVE is in use or not.
  454. *
  455. * This should only be called by ptrace. task must be non-runnable.
  456. * task->thread.sve_state must point to at least sve_state_size(task)
  457. * bytes of allocated kernel memory.
  458. */
  459. void sve_sync_to_fpsimd(struct task_struct *task)
  460. {
  461. if (test_tsk_thread_flag(task, TIF_SVE))
  462. sve_to_fpsimd(task);
  463. }
  464. /*
  465. * Ensure that task->thread.sve_state is up to date with respect to
  466. * the task->thread.uw.fpsimd_state.
  467. *
  468. * This should only be called by ptrace to merge new FPSIMD register
  469. * values into a task for which SVE is currently active.
  470. * task must be non-runnable.
  471. * task->thread.sve_state must point to at least sve_state_size(task)
  472. * bytes of allocated kernel memory.
  473. * task->thread.uw.fpsimd_state must already have been initialised with
  474. * the new FPSIMD register values to be merged in.
  475. */
  476. void sve_sync_from_fpsimd_zeropad(struct task_struct *task)
  477. {
  478. unsigned int vq;
  479. void *sst = task->thread.sve_state;
  480. struct user_fpsimd_state const *fst = &task->thread.uw.fpsimd_state;
  481. unsigned int i;
  482. if (!test_tsk_thread_flag(task, TIF_SVE))
  483. return;
  484. vq = sve_vq_from_vl(task->thread.sve_vl);
  485. memset(sst, 0, SVE_SIG_REGS_SIZE(vq));
  486. for (i = 0; i < 32; ++i)
  487. memcpy(ZREG(sst, vq, i), &fst->vregs[i],
  488. sizeof(fst->vregs[i]));
  489. }
  490. int sve_set_vector_length(struct task_struct *task,
  491. unsigned long vl, unsigned long flags)
  492. {
  493. if (flags & ~(unsigned long)(PR_SVE_VL_INHERIT |
  494. PR_SVE_SET_VL_ONEXEC))
  495. return -EINVAL;
  496. if (!sve_vl_valid(vl))
  497. return -EINVAL;
  498. /*
  499. * Clamp to the maximum vector length that VL-agnostic SVE code can
  500. * work with. A flag may be assigned in the future to allow setting
  501. * of larger vector lengths without confusing older software.
  502. */
  503. if (vl > SVE_VL_ARCH_MAX)
  504. vl = SVE_VL_ARCH_MAX;
  505. vl = find_supported_vector_length(vl);
  506. if (flags & (PR_SVE_VL_INHERIT |
  507. PR_SVE_SET_VL_ONEXEC))
  508. task->thread.sve_vl_onexec = vl;
  509. else
  510. /* Reset VL to system default on next exec: */
  511. task->thread.sve_vl_onexec = 0;
  512. /* Only actually set the VL if not deferred: */
  513. if (flags & PR_SVE_SET_VL_ONEXEC)
  514. goto out;
  515. if (vl == task->thread.sve_vl)
  516. goto out;
  517. /*
  518. * To ensure the FPSIMD bits of the SVE vector registers are preserved,
  519. * write any live register state back to task_struct, and convert to a
  520. * non-SVE thread.
  521. */
  522. if (task == current) {
  523. local_bh_disable();
  524. fpsimd_save();
  525. set_thread_flag(TIF_FOREIGN_FPSTATE);
  526. }
  527. fpsimd_flush_task_state(task);
  528. if (test_and_clear_tsk_thread_flag(task, TIF_SVE))
  529. sve_to_fpsimd(task);
  530. if (task == current)
  531. local_bh_enable();
  532. /*
  533. * Force reallocation of task SVE state to the correct size
  534. * on next use:
  535. */
  536. sve_free(task);
  537. task->thread.sve_vl = vl;
  538. out:
  539. update_tsk_thread_flag(task, TIF_SVE_VL_INHERIT,
  540. flags & PR_SVE_VL_INHERIT);
  541. return 0;
  542. }
  543. /*
  544. * Encode the current vector length and flags for return.
  545. * This is only required for prctl(): ptrace has separate fields
  546. *
  547. * flags are as for sve_set_vector_length().
  548. */
  549. static int sve_prctl_status(unsigned long flags)
  550. {
  551. int ret;
  552. if (flags & PR_SVE_SET_VL_ONEXEC)
  553. ret = current->thread.sve_vl_onexec;
  554. else
  555. ret = current->thread.sve_vl;
  556. if (test_thread_flag(TIF_SVE_VL_INHERIT))
  557. ret |= PR_SVE_VL_INHERIT;
  558. return ret;
  559. }
  560. /* PR_SVE_SET_VL */
  561. int sve_set_current_vl(unsigned long arg)
  562. {
  563. unsigned long vl, flags;
  564. int ret;
  565. vl = arg & PR_SVE_VL_LEN_MASK;
  566. flags = arg & ~vl;
  567. if (!system_supports_sve())
  568. return -EINVAL;
  569. ret = sve_set_vector_length(current, vl, flags);
  570. if (ret)
  571. return ret;
  572. return sve_prctl_status(flags);
  573. }
  574. /* PR_SVE_GET_VL */
  575. int sve_get_current_vl(void)
  576. {
  577. if (!system_supports_sve())
  578. return -EINVAL;
  579. return sve_prctl_status(0);
  580. }
  581. /*
  582. * Bitmap for temporary storage of the per-CPU set of supported vector lengths
  583. * during secondary boot.
  584. */
  585. static DECLARE_BITMAP(sve_secondary_vq_map, SVE_VQ_MAX);
  586. static void sve_probe_vqs(DECLARE_BITMAP(map, SVE_VQ_MAX))
  587. {
  588. unsigned int vq, vl;
  589. unsigned long zcr;
  590. bitmap_zero(map, SVE_VQ_MAX);
  591. zcr = ZCR_ELx_LEN_MASK;
  592. zcr = read_sysreg_s(SYS_ZCR_EL1) & ~zcr;
  593. for (vq = SVE_VQ_MAX; vq >= SVE_VQ_MIN; --vq) {
  594. write_sysreg_s(zcr | (vq - 1), SYS_ZCR_EL1); /* self-syncing */
  595. vl = sve_get_vl();
  596. vq = sve_vq_from_vl(vl); /* skip intervening lengths */
  597. set_bit(vq_to_bit(vq), map);
  598. }
  599. }
  600. void __init sve_init_vq_map(void)
  601. {
  602. sve_probe_vqs(sve_vq_map);
  603. }
  604. /*
  605. * If we haven't committed to the set of supported VQs yet, filter out
  606. * those not supported by the current CPU.
  607. */
  608. void sve_update_vq_map(void)
  609. {
  610. sve_probe_vqs(sve_secondary_vq_map);
  611. bitmap_and(sve_vq_map, sve_vq_map, sve_secondary_vq_map, SVE_VQ_MAX);
  612. }
  613. /* Check whether the current CPU supports all VQs in the committed set */
  614. int sve_verify_vq_map(void)
  615. {
  616. int ret = 0;
  617. sve_probe_vqs(sve_secondary_vq_map);
  618. bitmap_andnot(sve_secondary_vq_map, sve_vq_map, sve_secondary_vq_map,
  619. SVE_VQ_MAX);
  620. if (!bitmap_empty(sve_secondary_vq_map, SVE_VQ_MAX)) {
  621. pr_warn("SVE: cpu%d: Required vector length(s) missing\n",
  622. smp_processor_id());
  623. ret = -EINVAL;
  624. }
  625. return ret;
  626. }
  627. static void __init sve_efi_setup(void)
  628. {
  629. if (!IS_ENABLED(CONFIG_EFI))
  630. return;
  631. /*
  632. * alloc_percpu() warns and prints a backtrace if this goes wrong.
  633. * This is evidence of a crippled system and we are returning void,
  634. * so no attempt is made to handle this situation here.
  635. */
  636. if (!sve_vl_valid(sve_max_vl))
  637. goto fail;
  638. efi_sve_state = __alloc_percpu(
  639. SVE_SIG_REGS_SIZE(sve_vq_from_vl(sve_max_vl)), SVE_VQ_BYTES);
  640. if (!efi_sve_state)
  641. goto fail;
  642. return;
  643. fail:
  644. panic("Cannot allocate percpu memory for EFI SVE save/restore");
  645. }
  646. /*
  647. * Enable SVE for EL1.
  648. * Intended for use by the cpufeatures code during CPU boot.
  649. */
  650. void sve_kernel_enable(const struct arm64_cpu_capabilities *__always_unused p)
  651. {
  652. write_sysreg(read_sysreg(CPACR_EL1) | CPACR_EL1_ZEN_EL1EN, CPACR_EL1);
  653. isb();
  654. }
  655. void __init sve_setup(void)
  656. {
  657. u64 zcr;
  658. if (!system_supports_sve())
  659. return;
  660. /*
  661. * The SVE architecture mandates support for 128-bit vectors,
  662. * so sve_vq_map must have at least SVE_VQ_MIN set.
  663. * If something went wrong, at least try to patch it up:
  664. */
  665. if (WARN_ON(!test_bit(vq_to_bit(SVE_VQ_MIN), sve_vq_map)))
  666. set_bit(vq_to_bit(SVE_VQ_MIN), sve_vq_map);
  667. zcr = read_sanitised_ftr_reg(SYS_ZCR_EL1);
  668. sve_max_vl = sve_vl_from_vq((zcr & ZCR_ELx_LEN_MASK) + 1);
  669. /*
  670. * Sanity-check that the max VL we determined through CPU features
  671. * corresponds properly to sve_vq_map. If not, do our best:
  672. */
  673. if (WARN_ON(sve_max_vl != find_supported_vector_length(sve_max_vl)))
  674. sve_max_vl = find_supported_vector_length(sve_max_vl);
  675. /*
  676. * For the default VL, pick the maximum supported value <= 64.
  677. * VL == 64 is guaranteed not to grow the signal frame.
  678. */
  679. sve_default_vl = find_supported_vector_length(64);
  680. pr_info("SVE: maximum available vector length %u bytes per vector\n",
  681. sve_max_vl);
  682. pr_info("SVE: default vector length %u bytes per vector\n",
  683. sve_default_vl);
  684. sve_efi_setup();
  685. }
  686. /*
  687. * Called from the put_task_struct() path, which cannot get here
  688. * unless dead_task is really dead and not schedulable.
  689. */
  690. void fpsimd_release_task(struct task_struct *dead_task)
  691. {
  692. __sve_free(dead_task);
  693. }
  694. #endif /* CONFIG_ARM64_SVE */
  695. /*
  696. * Trapped SVE access
  697. *
  698. * Storage is allocated for the full SVE state, the current FPSIMD
  699. * register contents are migrated across, and TIF_SVE is set so that
  700. * the SVE access trap will be disabled the next time this task
  701. * reaches ret_to_user.
  702. *
  703. * TIF_SVE should be clear on entry: otherwise, task_fpsimd_load()
  704. * would have disabled the SVE access trap for userspace during
  705. * ret_to_user, making an SVE access trap impossible in that case.
  706. */
  707. asmlinkage void do_sve_acc(unsigned int esr, struct pt_regs *regs)
  708. {
  709. /* Even if we chose not to use SVE, the hardware could still trap: */
  710. if (unlikely(!system_supports_sve()) || WARN_ON(is_compat_task())) {
  711. force_signal_inject(SIGILL, ILL_ILLOPC, regs->pc);
  712. return;
  713. }
  714. sve_alloc(current);
  715. local_bh_disable();
  716. fpsimd_save();
  717. fpsimd_to_sve(current);
  718. /* Force ret_to_user to reload the registers: */
  719. fpsimd_flush_task_state(current);
  720. set_thread_flag(TIF_FOREIGN_FPSTATE);
  721. if (test_and_set_thread_flag(TIF_SVE))
  722. WARN_ON(1); /* SVE access shouldn't have trapped */
  723. local_bh_enable();
  724. }
  725. /*
  726. * Trapped FP/ASIMD access.
  727. */
  728. asmlinkage void do_fpsimd_acc(unsigned int esr, struct pt_regs *regs)
  729. {
  730. /* TODO: implement lazy context saving/restoring */
  731. WARN_ON(1);
  732. }
  733. /*
  734. * Raise a SIGFPE for the current process.
  735. */
  736. asmlinkage void do_fpsimd_exc(unsigned int esr, struct pt_regs *regs)
  737. {
  738. siginfo_t info;
  739. unsigned int si_code = FPE_FLTUNK;
  740. if (esr & ESR_ELx_FP_EXC_TFV) {
  741. if (esr & FPEXC_IOF)
  742. si_code = FPE_FLTINV;
  743. else if (esr & FPEXC_DZF)
  744. si_code = FPE_FLTDIV;
  745. else if (esr & FPEXC_OFF)
  746. si_code = FPE_FLTOVF;
  747. else if (esr & FPEXC_UFF)
  748. si_code = FPE_FLTUND;
  749. else if (esr & FPEXC_IXF)
  750. si_code = FPE_FLTRES;
  751. }
  752. memset(&info, 0, sizeof(info));
  753. info.si_signo = SIGFPE;
  754. info.si_code = si_code;
  755. info.si_addr = (void __user *)instruction_pointer(regs);
  756. send_sig_info(SIGFPE, &info, current);
  757. }
  758. void fpsimd_thread_switch(struct task_struct *next)
  759. {
  760. bool wrong_task, wrong_cpu;
  761. if (!system_supports_fpsimd())
  762. return;
  763. /* Save unsaved fpsimd state, if any: */
  764. fpsimd_save();
  765. /*
  766. * Fix up TIF_FOREIGN_FPSTATE to correctly describe next's
  767. * state. For kernel threads, FPSIMD registers are never loaded
  768. * and wrong_task and wrong_cpu will always be true.
  769. */
  770. wrong_task = __this_cpu_read(fpsimd_last_state.st) !=
  771. &next->thread.uw.fpsimd_state;
  772. wrong_cpu = next->thread.fpsimd_cpu != smp_processor_id();
  773. update_tsk_thread_flag(next, TIF_FOREIGN_FPSTATE,
  774. wrong_task || wrong_cpu);
  775. }
  776. void fpsimd_flush_thread(void)
  777. {
  778. int vl, supported_vl;
  779. if (!system_supports_fpsimd())
  780. return;
  781. local_bh_disable();
  782. memset(&current->thread.uw.fpsimd_state, 0,
  783. sizeof(current->thread.uw.fpsimd_state));
  784. fpsimd_flush_task_state(current);
  785. if (system_supports_sve()) {
  786. clear_thread_flag(TIF_SVE);
  787. sve_free(current);
  788. /*
  789. * Reset the task vector length as required.
  790. * This is where we ensure that all user tasks have a valid
  791. * vector length configured: no kernel task can become a user
  792. * task without an exec and hence a call to this function.
  793. * By the time the first call to this function is made, all
  794. * early hardware probing is complete, so sve_default_vl
  795. * should be valid.
  796. * If a bug causes this to go wrong, we make some noise and
  797. * try to fudge thread.sve_vl to a safe value here.
  798. */
  799. vl = current->thread.sve_vl_onexec ?
  800. current->thread.sve_vl_onexec : sve_default_vl;
  801. if (WARN_ON(!sve_vl_valid(vl)))
  802. vl = SVE_VL_MIN;
  803. supported_vl = find_supported_vector_length(vl);
  804. if (WARN_ON(supported_vl != vl))
  805. vl = supported_vl;
  806. current->thread.sve_vl = vl;
  807. /*
  808. * If the task is not set to inherit, ensure that the vector
  809. * length will be reset by a subsequent exec:
  810. */
  811. if (!test_thread_flag(TIF_SVE_VL_INHERIT))
  812. current->thread.sve_vl_onexec = 0;
  813. }
  814. set_thread_flag(TIF_FOREIGN_FPSTATE);
  815. local_bh_enable();
  816. }
  817. /*
  818. * Save the userland FPSIMD state of 'current' to memory, but only if the state
  819. * currently held in the registers does in fact belong to 'current'
  820. */
  821. void fpsimd_preserve_current_state(void)
  822. {
  823. if (!system_supports_fpsimd())
  824. return;
  825. local_bh_disable();
  826. fpsimd_save();
  827. local_bh_enable();
  828. }
  829. /*
  830. * Like fpsimd_preserve_current_state(), but ensure that
  831. * current->thread.uw.fpsimd_state is updated so that it can be copied to
  832. * the signal frame.
  833. */
  834. void fpsimd_signal_preserve_current_state(void)
  835. {
  836. fpsimd_preserve_current_state();
  837. if (system_supports_sve() && test_thread_flag(TIF_SVE))
  838. sve_to_fpsimd(current);
  839. }
  840. /*
  841. * Associate current's FPSIMD context with this cpu
  842. * Preemption must be disabled when calling this function.
  843. */
  844. static void fpsimd_bind_to_cpu(void)
  845. {
  846. struct fpsimd_last_state_struct *last =
  847. this_cpu_ptr(&fpsimd_last_state);
  848. last->st = &current->thread.uw.fpsimd_state;
  849. last->sve_in_use = test_thread_flag(TIF_SVE);
  850. current->thread.fpsimd_cpu = smp_processor_id();
  851. }
  852. /*
  853. * Load the userland FPSIMD state of 'current' from memory, but only if the
  854. * FPSIMD state already held in the registers is /not/ the most recent FPSIMD
  855. * state of 'current'
  856. */
  857. void fpsimd_restore_current_state(void)
  858. {
  859. if (!system_supports_fpsimd())
  860. return;
  861. local_bh_disable();
  862. if (test_and_clear_thread_flag(TIF_FOREIGN_FPSTATE)) {
  863. task_fpsimd_load();
  864. fpsimd_bind_to_cpu();
  865. }
  866. local_bh_enable();
  867. }
  868. /*
  869. * Load an updated userland FPSIMD state for 'current' from memory and set the
  870. * flag that indicates that the FPSIMD register contents are the most recent
  871. * FPSIMD state of 'current'
  872. */
  873. void fpsimd_update_current_state(struct user_fpsimd_state const *state)
  874. {
  875. if (!system_supports_fpsimd())
  876. return;
  877. local_bh_disable();
  878. current->thread.uw.fpsimd_state = *state;
  879. if (system_supports_sve() && test_thread_flag(TIF_SVE))
  880. fpsimd_to_sve(current);
  881. task_fpsimd_load();
  882. if (test_and_clear_thread_flag(TIF_FOREIGN_FPSTATE))
  883. fpsimd_bind_to_cpu();
  884. local_bh_enable();
  885. }
  886. /*
  887. * Invalidate live CPU copies of task t's FPSIMD state
  888. */
  889. void fpsimd_flush_task_state(struct task_struct *t)
  890. {
  891. t->thread.fpsimd_cpu = NR_CPUS;
  892. }
  893. static inline void fpsimd_flush_cpu_state(void)
  894. {
  895. __this_cpu_write(fpsimd_last_state.st, NULL);
  896. set_thread_flag(TIF_FOREIGN_FPSTATE);
  897. }
  898. /*
  899. * Invalidate any task SVE state currently held in this CPU's regs.
  900. *
  901. * This is used to prevent the kernel from trying to reuse SVE register data
  902. * that is detroyed by KVM guest enter/exit. This function should go away when
  903. * KVM SVE support is implemented. Don't use it for anything else.
  904. */
  905. #ifdef CONFIG_ARM64_SVE
  906. void sve_flush_cpu_state(void)
  907. {
  908. struct fpsimd_last_state_struct const *last =
  909. this_cpu_ptr(&fpsimd_last_state);
  910. if (last->st && last->sve_in_use)
  911. fpsimd_flush_cpu_state();
  912. }
  913. #endif /* CONFIG_ARM64_SVE */
  914. #ifdef CONFIG_KERNEL_MODE_NEON
  915. DEFINE_PER_CPU(bool, kernel_neon_busy);
  916. EXPORT_PER_CPU_SYMBOL(kernel_neon_busy);
  917. /*
  918. * Kernel-side NEON support functions
  919. */
  920. /*
  921. * kernel_neon_begin(): obtain the CPU FPSIMD registers for use by the calling
  922. * context
  923. *
  924. * Must not be called unless may_use_simd() returns true.
  925. * Task context in the FPSIMD registers is saved back to memory as necessary.
  926. *
  927. * A matching call to kernel_neon_end() must be made before returning from the
  928. * calling context.
  929. *
  930. * The caller may freely use the FPSIMD registers until kernel_neon_end() is
  931. * called.
  932. */
  933. void kernel_neon_begin(void)
  934. {
  935. if (WARN_ON(!system_supports_fpsimd()))
  936. return;
  937. BUG_ON(!may_use_simd());
  938. local_bh_disable();
  939. __this_cpu_write(kernel_neon_busy, true);
  940. /* Save unsaved fpsimd state, if any: */
  941. fpsimd_save();
  942. /* Invalidate any task state remaining in the fpsimd regs: */
  943. fpsimd_flush_cpu_state();
  944. preempt_disable();
  945. local_bh_enable();
  946. }
  947. EXPORT_SYMBOL(kernel_neon_begin);
  948. /*
  949. * kernel_neon_end(): give the CPU FPSIMD registers back to the current task
  950. *
  951. * Must be called from a context in which kernel_neon_begin() was previously
  952. * called, with no call to kernel_neon_end() in the meantime.
  953. *
  954. * The caller must not use the FPSIMD registers after this function is called,
  955. * unless kernel_neon_begin() is called again in the meantime.
  956. */
  957. void kernel_neon_end(void)
  958. {
  959. bool busy;
  960. if (!system_supports_fpsimd())
  961. return;
  962. busy = __this_cpu_xchg(kernel_neon_busy, false);
  963. WARN_ON(!busy); /* No matching kernel_neon_begin()? */
  964. preempt_enable();
  965. }
  966. EXPORT_SYMBOL(kernel_neon_end);
  967. #ifdef CONFIG_EFI
  968. static DEFINE_PER_CPU(struct user_fpsimd_state, efi_fpsimd_state);
  969. static DEFINE_PER_CPU(bool, efi_fpsimd_state_used);
  970. static DEFINE_PER_CPU(bool, efi_sve_state_used);
  971. /*
  972. * EFI runtime services support functions
  973. *
  974. * The ABI for EFI runtime services allows EFI to use FPSIMD during the call.
  975. * This means that for EFI (and only for EFI), we have to assume that FPSIMD
  976. * is always used rather than being an optional accelerator.
  977. *
  978. * These functions provide the necessary support for ensuring FPSIMD
  979. * save/restore in the contexts from which EFI is used.
  980. *
  981. * Do not use them for any other purpose -- if tempted to do so, you are
  982. * either doing something wrong or you need to propose some refactoring.
  983. */
  984. /*
  985. * __efi_fpsimd_begin(): prepare FPSIMD for making an EFI runtime services call
  986. */
  987. void __efi_fpsimd_begin(void)
  988. {
  989. if (!system_supports_fpsimd())
  990. return;
  991. WARN_ON(preemptible());
  992. if (may_use_simd()) {
  993. kernel_neon_begin();
  994. } else {
  995. /*
  996. * If !efi_sve_state, SVE can't be in use yet and doesn't need
  997. * preserving:
  998. */
  999. if (system_supports_sve() && likely(efi_sve_state)) {
  1000. char *sve_state = this_cpu_ptr(efi_sve_state);
  1001. __this_cpu_write(efi_sve_state_used, true);
  1002. sve_save_state(sve_state + sve_ffr_offset(sve_max_vl),
  1003. &this_cpu_ptr(&efi_fpsimd_state)->fpsr);
  1004. } else {
  1005. fpsimd_save_state(this_cpu_ptr(&efi_fpsimd_state));
  1006. }
  1007. __this_cpu_write(efi_fpsimd_state_used, true);
  1008. }
  1009. }
  1010. /*
  1011. * __efi_fpsimd_end(): clean up FPSIMD after an EFI runtime services call
  1012. */
  1013. void __efi_fpsimd_end(void)
  1014. {
  1015. if (!system_supports_fpsimd())
  1016. return;
  1017. if (!__this_cpu_xchg(efi_fpsimd_state_used, false)) {
  1018. kernel_neon_end();
  1019. } else {
  1020. if (system_supports_sve() &&
  1021. likely(__this_cpu_read(efi_sve_state_used))) {
  1022. char const *sve_state = this_cpu_ptr(efi_sve_state);
  1023. sve_load_state(sve_state + sve_ffr_offset(sve_max_vl),
  1024. &this_cpu_ptr(&efi_fpsimd_state)->fpsr,
  1025. sve_vq_from_vl(sve_get_vl()) - 1);
  1026. __this_cpu_write(efi_sve_state_used, false);
  1027. } else {
  1028. fpsimd_load_state(this_cpu_ptr(&efi_fpsimd_state));
  1029. }
  1030. }
  1031. }
  1032. #endif /* CONFIG_EFI */
  1033. #endif /* CONFIG_KERNEL_MODE_NEON */
  1034. #ifdef CONFIG_CPU_PM
  1035. static int fpsimd_cpu_pm_notifier(struct notifier_block *self,
  1036. unsigned long cmd, void *v)
  1037. {
  1038. switch (cmd) {
  1039. case CPU_PM_ENTER:
  1040. fpsimd_save();
  1041. fpsimd_flush_cpu_state();
  1042. break;
  1043. case CPU_PM_EXIT:
  1044. break;
  1045. case CPU_PM_ENTER_FAILED:
  1046. default:
  1047. return NOTIFY_DONE;
  1048. }
  1049. return NOTIFY_OK;
  1050. }
  1051. static struct notifier_block fpsimd_cpu_pm_notifier_block = {
  1052. .notifier_call = fpsimd_cpu_pm_notifier,
  1053. };
  1054. static void __init fpsimd_pm_init(void)
  1055. {
  1056. cpu_pm_register_notifier(&fpsimd_cpu_pm_notifier_block);
  1057. }
  1058. #else
  1059. static inline void fpsimd_pm_init(void) { }
  1060. #endif /* CONFIG_CPU_PM */
  1061. #ifdef CONFIG_HOTPLUG_CPU
  1062. static int fpsimd_cpu_dead(unsigned int cpu)
  1063. {
  1064. per_cpu(fpsimd_last_state.st, cpu) = NULL;
  1065. return 0;
  1066. }
  1067. static inline void fpsimd_hotplug_init(void)
  1068. {
  1069. cpuhp_setup_state_nocalls(CPUHP_ARM64_FPSIMD_DEAD, "arm64/fpsimd:dead",
  1070. NULL, fpsimd_cpu_dead);
  1071. }
  1072. #else
  1073. static inline void fpsimd_hotplug_init(void) { }
  1074. #endif
  1075. /*
  1076. * FP/SIMD support code initialisation.
  1077. */
  1078. static int __init fpsimd_init(void)
  1079. {
  1080. if (elf_hwcap & HWCAP_FP) {
  1081. fpsimd_pm_init();
  1082. fpsimd_hotplug_init();
  1083. } else {
  1084. pr_notice("Floating-point is not implemented\n");
  1085. }
  1086. if (!(elf_hwcap & HWCAP_ASIMD))
  1087. pr_notice("Advanced SIMD is not implemented\n");
  1088. return sve_sysctl_init();
  1089. }
  1090. core_initcall(fpsimd_init);