clk-sun6i-apb0-gates.c 2.5 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899
  1. /*
  2. * Copyright (C) 2014 Free Electrons
  3. *
  4. * License Terms: GNU General Public License v2
  5. * Author: Boris BREZILLON <boris.brezillon@free-electrons.com>
  6. *
  7. * Allwinner A31 APB0 clock gates driver
  8. *
  9. */
  10. #include <linux/clk-provider.h>
  11. #include <linux/module.h>
  12. #include <linux/of.h>
  13. #include <linux/platform_device.h>
  14. #define SUN6I_APB0_GATES_MAX_SIZE 32
  15. static int sun6i_a31_apb0_gates_clk_probe(struct platform_device *pdev)
  16. {
  17. struct device_node *np = pdev->dev.of_node;
  18. struct clk_onecell_data *clk_data;
  19. const char *clk_parent;
  20. const char *clk_name;
  21. struct resource *r;
  22. void __iomem *reg;
  23. int gate_id;
  24. int ngates;
  25. int i;
  26. r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  27. reg = devm_ioremap_resource(&pdev->dev, r);
  28. if (!reg)
  29. return PTR_ERR(reg);
  30. clk_parent = of_clk_get_parent_name(np, 0);
  31. if (!clk_parent)
  32. return -EINVAL;
  33. ngates = of_property_count_strings(np, "clock-output-names");
  34. if (ngates < 0)
  35. return ngates;
  36. if (!ngates || ngates > SUN6I_APB0_GATES_MAX_SIZE)
  37. return -EINVAL;
  38. clk_data = devm_kzalloc(&pdev->dev, sizeof(struct clk_onecell_data),
  39. GFP_KERNEL);
  40. if (!clk_data)
  41. return -ENOMEM;
  42. clk_data->clks = devm_kzalloc(&pdev->dev,
  43. SUN6I_APB0_GATES_MAX_SIZE *
  44. sizeof(struct clk *),
  45. GFP_KERNEL);
  46. if (!clk_data->clks)
  47. return -ENOMEM;
  48. for (i = 0; i < ngates; i++) {
  49. of_property_read_string_index(np, "clock-output-names",
  50. i, &clk_name);
  51. gate_id = i;
  52. of_property_read_u32_index(np, "clock-indices", i, &gate_id);
  53. WARN_ON(gate_id >= SUN6I_APB0_GATES_MAX_SIZE);
  54. if (gate_id >= SUN6I_APB0_GATES_MAX_SIZE)
  55. continue;
  56. clk_data->clks[gate_id] = clk_register_gate(&pdev->dev,
  57. clk_name,
  58. clk_parent, 0,
  59. reg, gate_id,
  60. 0, NULL);
  61. WARN_ON(IS_ERR(clk_data->clks[gate_id]));
  62. }
  63. clk_data->clk_num = ngates;
  64. return of_clk_add_provider(np, of_clk_src_onecell_get, clk_data);
  65. }
  66. const struct of_device_id sun6i_a31_apb0_gates_clk_dt_ids[] = {
  67. { .compatible = "allwinner,sun6i-a31-apb0-gates-clk" },
  68. { /* sentinel */ }
  69. };
  70. static struct platform_driver sun6i_a31_apb0_gates_clk_driver = {
  71. .driver = {
  72. .name = "sun6i-a31-apb0-gates-clk",
  73. .owner = THIS_MODULE,
  74. .of_match_table = sun6i_a31_apb0_gates_clk_dt_ids,
  75. },
  76. .probe = sun6i_a31_apb0_gates_clk_probe,
  77. };
  78. module_platform_driver(sun6i_a31_apb0_gates_clk_driver);
  79. MODULE_AUTHOR("Boris BREZILLON <boris.brezillon@free-electrons.com>");
  80. MODULE_DESCRIPTION("Allwinner A31 APB0 gate clocks driver");
  81. MODULE_LICENSE("GPL v2");