platform.c 7.8 KB

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  1. /*
  2. * platform.c - DesignWare HS OTG Controller platform driver
  3. *
  4. * Copyright (C) Matthijs Kooijman <matthijs@stdin.nl>
  5. *
  6. * Redistribution and use in source and binary forms, with or without
  7. * modification, are permitted provided that the following conditions
  8. * are met:
  9. * 1. Redistributions of source code must retain the above copyright
  10. * notice, this list of conditions, and the following disclaimer,
  11. * without modification.
  12. * 2. Redistributions in binary form must reproduce the above copyright
  13. * notice, this list of conditions and the following disclaimer in the
  14. * documentation and/or other materials provided with the distribution.
  15. * 3. The names of the above-listed copyright holders may not be used
  16. * to endorse or promote products derived from this software without
  17. * specific prior written permission.
  18. *
  19. * ALTERNATIVELY, this software may be distributed under the terms of the
  20. * GNU General Public License ("GPL") as published by the Free Software
  21. * Foundation; either version 2 of the License, or (at your option) any
  22. * later version.
  23. *
  24. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
  25. * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
  26. * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  27. * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
  28. * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
  29. * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
  30. * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
  31. * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
  32. * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
  33. * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  34. * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  35. */
  36. #include <linux/kernel.h>
  37. #include <linux/module.h>
  38. #include <linux/slab.h>
  39. #include <linux/device.h>
  40. #include <linux/dma-mapping.h>
  41. #include <linux/of_device.h>
  42. #include <linux/platform_device.h>
  43. #include <linux/usb/of.h>
  44. #include "core.h"
  45. #include "hcd.h"
  46. static const char dwc2_driver_name[] = "dwc2";
  47. static const struct dwc2_core_params params_bcm2835 = {
  48. .otg_cap = 0, /* HNP/SRP capable */
  49. .otg_ver = 0, /* 1.3 */
  50. .dma_enable = 1,
  51. .dma_desc_enable = 0,
  52. .speed = 0, /* High Speed */
  53. .enable_dynamic_fifo = 1,
  54. .en_multiple_tx_fifo = 1,
  55. .host_rx_fifo_size = 774, /* 774 DWORDs */
  56. .host_nperio_tx_fifo_size = 256, /* 256 DWORDs */
  57. .host_perio_tx_fifo_size = 512, /* 512 DWORDs */
  58. .max_transfer_size = 65535,
  59. .max_packet_count = 511,
  60. .host_channels = 8,
  61. .phy_type = 1, /* UTMI */
  62. .phy_utmi_width = 8, /* 8 bits */
  63. .phy_ulpi_ddr = 0, /* Single */
  64. .phy_ulpi_ext_vbus = 0,
  65. .i2c_enable = 0,
  66. .ulpi_fs_ls = 0,
  67. .host_support_fs_ls_low_power = 0,
  68. .host_ls_low_power_phy_clk = 0, /* 48 MHz */
  69. .ts_dline = 0,
  70. .reload_ctl = 0,
  71. .ahbcfg = 0x10,
  72. .uframe_sched = 0,
  73. };
  74. static const struct dwc2_core_params params_rk3066 = {
  75. .otg_cap = 2, /* non-HNP/non-SRP */
  76. .otg_ver = -1,
  77. .dma_enable = -1,
  78. .dma_desc_enable = 0,
  79. .speed = -1,
  80. .enable_dynamic_fifo = 1,
  81. .en_multiple_tx_fifo = -1,
  82. .host_rx_fifo_size = 520, /* 520 DWORDs */
  83. .host_nperio_tx_fifo_size = 128, /* 128 DWORDs */
  84. .host_perio_tx_fifo_size = 256, /* 256 DWORDs */
  85. .max_transfer_size = 65535,
  86. .max_packet_count = -1,
  87. .host_channels = -1,
  88. .phy_type = -1,
  89. .phy_utmi_width = -1,
  90. .phy_ulpi_ddr = -1,
  91. .phy_ulpi_ext_vbus = -1,
  92. .i2c_enable = -1,
  93. .ulpi_fs_ls = -1,
  94. .host_support_fs_ls_low_power = -1,
  95. .host_ls_low_power_phy_clk = -1,
  96. .ts_dline = -1,
  97. .reload_ctl = -1,
  98. .ahbcfg = 0x7, /* INCR16 */
  99. .uframe_sched = -1,
  100. };
  101. /**
  102. * dwc2_driver_remove() - Called when the DWC_otg core is unregistered with the
  103. * DWC_otg driver
  104. *
  105. * @dev: Platform device
  106. *
  107. * This routine is called, for example, when the rmmod command is executed. The
  108. * device may or may not be electrically present. If it is present, the driver
  109. * stops device processing. Any resources used on behalf of this device are
  110. * freed.
  111. */
  112. static int dwc2_driver_remove(struct platform_device *dev)
  113. {
  114. struct dwc2_hsotg *hsotg = platform_get_drvdata(dev);
  115. dwc2_hcd_remove(hsotg);
  116. s3c_hsotg_remove(hsotg);
  117. return 0;
  118. }
  119. static const struct of_device_id dwc2_of_match_table[] = {
  120. { .compatible = "brcm,bcm2835-usb", .data = &params_bcm2835 },
  121. { .compatible = "rockchip,rk3066-usb", .data = &params_rk3066 },
  122. { .compatible = "snps,dwc2", .data = NULL },
  123. { .compatible = "samsung,s3c6400-hsotg", .data = NULL},
  124. {},
  125. };
  126. MODULE_DEVICE_TABLE(of, dwc2_of_match_table);
  127. /**
  128. * dwc2_driver_probe() - Called when the DWC_otg core is bound to the DWC_otg
  129. * driver
  130. *
  131. * @dev: Platform device
  132. *
  133. * This routine creates the driver components required to control the device
  134. * (core, HCD, and PCD) and initializes the device. The driver components are
  135. * stored in a dwc2_hsotg structure. A reference to the dwc2_hsotg is saved
  136. * in the device private data. This allows the driver to access the dwc2_hsotg
  137. * structure on subsequent calls to driver methods for this device.
  138. */
  139. static int dwc2_driver_probe(struct platform_device *dev)
  140. {
  141. const struct of_device_id *match;
  142. const struct dwc2_core_params *params;
  143. struct dwc2_core_params defparams;
  144. struct dwc2_hsotg *hsotg;
  145. struct resource *res;
  146. int retval;
  147. int irq;
  148. if (usb_disabled())
  149. return -ENODEV;
  150. match = of_match_device(dwc2_of_match_table, &dev->dev);
  151. if (match && match->data) {
  152. params = match->data;
  153. } else {
  154. /* Default all params to autodetect */
  155. dwc2_set_all_params(&defparams, -1);
  156. params = &defparams;
  157. /*
  158. * Disable descriptor dma mode by default as the HW can support
  159. * it, but does not support it for SPLIT transactions.
  160. */
  161. defparams.dma_desc_enable = 0;
  162. }
  163. hsotg = devm_kzalloc(&dev->dev, sizeof(*hsotg), GFP_KERNEL);
  164. if (!hsotg)
  165. return -ENOMEM;
  166. hsotg->dev = &dev->dev;
  167. /*
  168. * Use reasonable defaults so platforms don't have to provide these.
  169. */
  170. if (!dev->dev.dma_mask)
  171. dev->dev.dma_mask = &dev->dev.coherent_dma_mask;
  172. retval = dma_set_coherent_mask(&dev->dev, DMA_BIT_MASK(32));
  173. if (retval)
  174. return retval;
  175. irq = platform_get_irq(dev, 0);
  176. if (irq < 0) {
  177. dev_err(&dev->dev, "missing IRQ resource\n");
  178. return irq;
  179. }
  180. dev_dbg(hsotg->dev, "registering common handler for irq%d\n",
  181. irq);
  182. retval = devm_request_irq(hsotg->dev, irq,
  183. dwc2_handle_common_intr, IRQF_SHARED,
  184. dev_name(hsotg->dev), hsotg);
  185. if (retval)
  186. return retval;
  187. res = platform_get_resource(dev, IORESOURCE_MEM, 0);
  188. hsotg->regs = devm_ioremap_resource(&dev->dev, res);
  189. if (IS_ERR(hsotg->regs))
  190. return PTR_ERR(hsotg->regs);
  191. dev_dbg(&dev->dev, "mapped PA %08lx to VA %p\n",
  192. (unsigned long)res->start, hsotg->regs);
  193. hsotg->dr_mode = of_usb_get_dr_mode(dev->dev.of_node);
  194. spin_lock_init(&hsotg->lock);
  195. retval = dwc2_gadget_init(hsotg, irq);
  196. if (retval)
  197. return retval;
  198. retval = dwc2_hcd_init(hsotg, irq, params);
  199. if (retval)
  200. return retval;
  201. platform_set_drvdata(dev, hsotg);
  202. return retval;
  203. }
  204. static int dwc2_suspend(struct device *dev)
  205. {
  206. struct dwc2_hsotg *dwc2 = dev_get_drvdata(dev);
  207. int ret = 0;
  208. if (dwc2_is_device_mode(dwc2))
  209. ret = s3c_hsotg_suspend(dwc2);
  210. return ret;
  211. }
  212. static int dwc2_resume(struct device *dev)
  213. {
  214. struct dwc2_hsotg *dwc2 = dev_get_drvdata(dev);
  215. int ret = 0;
  216. if (dwc2_is_device_mode(dwc2))
  217. ret = s3c_hsotg_resume(dwc2);
  218. return ret;
  219. }
  220. static const struct dev_pm_ops dwc2_dev_pm_ops = {
  221. SET_SYSTEM_SLEEP_PM_OPS(dwc2_suspend, dwc2_resume)
  222. };
  223. static struct platform_driver dwc2_platform_driver = {
  224. .driver = {
  225. .name = dwc2_driver_name,
  226. .of_match_table = dwc2_of_match_table,
  227. .pm = &dwc2_dev_pm_ops,
  228. },
  229. .probe = dwc2_driver_probe,
  230. .remove = dwc2_driver_remove,
  231. };
  232. module_platform_driver(dwc2_platform_driver);
  233. MODULE_DESCRIPTION("DESIGNWARE HS OTG Platform Glue");
  234. MODULE_AUTHOR("Matthijs Kooijman <matthijs@stdin.nl>");
  235. MODULE_LICENSE("Dual BSD/GPL");