pwm-sti.c 10 KB

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  1. /*
  2. * PWM device driver for ST SoCs.
  3. * Author: Ajit Pal Singh <ajitpal.singh@st.com>
  4. *
  5. * Copyright (C) 2013-2014 STMicroelectronics (R&D) Limited
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; either version 2 of the License, or
  10. * (at your option) any later version.
  11. */
  12. #include <linux/clk.h>
  13. #include <linux/math64.h>
  14. #include <linux/mfd/syscon.h>
  15. #include <linux/module.h>
  16. #include <linux/of.h>
  17. #include <linux/platform_device.h>
  18. #include <linux/pwm.h>
  19. #include <linux/regmap.h>
  20. #include <linux/slab.h>
  21. #include <linux/time.h>
  22. #define PWM_OUT_VAL(x) (0x00 + (4 * (x))) /* Device's Duty Cycle register */
  23. #define STI_PWM_CTRL 0x50 /* Control/Config register */
  24. #define STI_INT_EN 0x54 /* Interrupt Enable/Disable register */
  25. #define PWM_PRESCALE_LOW_MASK 0x0f
  26. #define PWM_PRESCALE_HIGH_MASK 0xf0
  27. /* Regfield IDs */
  28. enum {
  29. /* Bits in PWM_CTRL*/
  30. PWMCLK_PRESCALE_LOW,
  31. PWMCLK_PRESCALE_HIGH,
  32. PWM_OUT_EN,
  33. PWM_CPT_INT_EN,
  34. /* Keep last */
  35. MAX_REGFIELDS
  36. };
  37. struct sti_pwm_compat_data {
  38. const struct reg_field *reg_fields;
  39. unsigned int num_devs;
  40. unsigned int max_pwm_cnt;
  41. unsigned int max_prescale;
  42. };
  43. struct sti_pwm_chip {
  44. struct device *dev;
  45. struct clk *pwm_clk;
  46. struct regmap *regmap;
  47. struct sti_pwm_compat_data *cdata;
  48. struct regmap_field *prescale_low;
  49. struct regmap_field *prescale_high;
  50. struct regmap_field *pwm_out_en;
  51. struct regmap_field *pwm_cpt_int_en;
  52. struct pwm_chip chip;
  53. struct pwm_device *cur;
  54. unsigned long configured;
  55. unsigned int en_count;
  56. struct mutex sti_pwm_lock; /* To sync between enable/disable calls */
  57. void __iomem *mmio;
  58. };
  59. static const struct reg_field sti_pwm_regfields[MAX_REGFIELDS] = {
  60. [PWMCLK_PRESCALE_LOW] = REG_FIELD(STI_PWM_CTRL, 0, 3),
  61. [PWMCLK_PRESCALE_HIGH] = REG_FIELD(STI_PWM_CTRL, 11, 14),
  62. [PWM_OUT_EN] = REG_FIELD(STI_PWM_CTRL, 9, 9),
  63. [PWM_CPT_INT_EN] = REG_FIELD(STI_INT_EN, 1, 4),
  64. };
  65. static inline struct sti_pwm_chip *to_sti_pwmchip(struct pwm_chip *chip)
  66. {
  67. return container_of(chip, struct sti_pwm_chip, chip);
  68. }
  69. /*
  70. * Calculate the prescaler value corresponding to the period.
  71. */
  72. static int sti_pwm_get_prescale(struct sti_pwm_chip *pc, unsigned long period,
  73. unsigned int *prescale)
  74. {
  75. struct sti_pwm_compat_data *cdata = pc->cdata;
  76. unsigned long clk_rate;
  77. unsigned long val;
  78. unsigned int ps;
  79. clk_rate = clk_get_rate(pc->pwm_clk);
  80. if (!clk_rate) {
  81. dev_err(pc->dev, "failed to get clock rate\n");
  82. return -EINVAL;
  83. }
  84. /*
  85. * prescale = ((period_ns * clk_rate) / (10^9 * (max_pwm_count + 1)) - 1
  86. */
  87. val = NSEC_PER_SEC / clk_rate;
  88. val *= cdata->max_pwm_cnt + 1;
  89. if (period % val) {
  90. return -EINVAL;
  91. } else {
  92. ps = period / val - 1;
  93. if (ps > cdata->max_prescale)
  94. return -EINVAL;
  95. }
  96. *prescale = ps;
  97. return 0;
  98. }
  99. /*
  100. * For STiH4xx PWM IP, the PWM period is fixed to 256 local clock cycles.
  101. * The only way to change the period (apart from changing the PWM input clock)
  102. * is to change the PWM clock prescaler.
  103. * The prescaler is of 8 bits, so 256 prescaler values and hence
  104. * 256 possible period values are supported (for a particular clock rate).
  105. * The requested period will be applied only if it matches one of these
  106. * 256 values.
  107. */
  108. static int sti_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
  109. int duty_ns, int period_ns)
  110. {
  111. struct sti_pwm_chip *pc = to_sti_pwmchip(chip);
  112. struct sti_pwm_compat_data *cdata = pc->cdata;
  113. struct pwm_device *cur = pc->cur;
  114. struct device *dev = pc->dev;
  115. unsigned int prescale = 0, pwmvalx;
  116. int ret;
  117. unsigned int ncfg;
  118. bool period_same = false;
  119. ncfg = hweight_long(pc->configured);
  120. if (ncfg)
  121. period_same = (period_ns == pwm_get_period(cur));
  122. /* Allow configuration changes if one of the
  123. * following conditions satisfy.
  124. * 1. No devices have been configured.
  125. * 2. Only one device has been configured and the new request
  126. * is for the same device.
  127. * 3. Only one device has been configured and the new request is
  128. * for a new device and period of the new device is same as
  129. * the current configured period.
  130. * 4. More than one devices are configured and period of the new
  131. * requestis the same as the current period.
  132. */
  133. if (!ncfg ||
  134. ((ncfg == 1) && (pwm->hwpwm == cur->hwpwm)) ||
  135. ((ncfg == 1) && (pwm->hwpwm != cur->hwpwm) && period_same) ||
  136. ((ncfg > 1) && period_same)) {
  137. /* Enable clock before writing to PWM registers. */
  138. ret = clk_enable(pc->pwm_clk);
  139. if (ret)
  140. return ret;
  141. if (!period_same) {
  142. ret = sti_pwm_get_prescale(pc, period_ns, &prescale);
  143. if (ret)
  144. goto clk_dis;
  145. ret =
  146. regmap_field_write(pc->prescale_low,
  147. prescale & PWM_PRESCALE_LOW_MASK);
  148. if (ret)
  149. goto clk_dis;
  150. ret =
  151. regmap_field_write(pc->prescale_high,
  152. (prescale & PWM_PRESCALE_HIGH_MASK) >> 4);
  153. if (ret)
  154. goto clk_dis;
  155. }
  156. /*
  157. * When PWMVal == 0, PWM pulse = 1 local clock cycle.
  158. * When PWMVal == max_pwm_count,
  159. * PWM pulse = (max_pwm_count + 1) local cycles,
  160. * that is continuous pulse: signal never goes low.
  161. */
  162. pwmvalx = cdata->max_pwm_cnt * duty_ns / period_ns;
  163. ret = regmap_write(pc->regmap,
  164. PWM_OUT_VAL(pwm->hwpwm), pwmvalx);
  165. if (ret)
  166. goto clk_dis;
  167. ret = regmap_field_write(pc->pwm_cpt_int_en, 0);
  168. set_bit(pwm->hwpwm, &pc->configured);
  169. pc->cur = pwm;
  170. dev_dbg(dev, "prescale:%u, period:%i, duty:%i, pwmvalx:%u\n",
  171. prescale, period_ns, duty_ns, pwmvalx);
  172. } else {
  173. return -EINVAL;
  174. }
  175. clk_dis:
  176. clk_disable(pc->pwm_clk);
  177. return ret;
  178. }
  179. static int sti_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm)
  180. {
  181. struct sti_pwm_chip *pc = to_sti_pwmchip(chip);
  182. struct device *dev = pc->dev;
  183. int ret = 0;
  184. /*
  185. * Since we have a common enable for all PWM devices,
  186. * do not enable if already enabled.
  187. */
  188. mutex_lock(&pc->sti_pwm_lock);
  189. if (!pc->en_count) {
  190. ret = clk_enable(pc->pwm_clk);
  191. if (ret)
  192. goto out;
  193. ret = regmap_field_write(pc->pwm_out_en, 1);
  194. if (ret) {
  195. dev_err(dev, "failed to enable PWM device:%d\n",
  196. pwm->hwpwm);
  197. goto out;
  198. }
  199. }
  200. pc->en_count++;
  201. out:
  202. mutex_unlock(&pc->sti_pwm_lock);
  203. return ret;
  204. }
  205. static void sti_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm)
  206. {
  207. struct sti_pwm_chip *pc = to_sti_pwmchip(chip);
  208. mutex_lock(&pc->sti_pwm_lock);
  209. if (--pc->en_count) {
  210. mutex_unlock(&pc->sti_pwm_lock);
  211. return;
  212. }
  213. regmap_field_write(pc->pwm_out_en, 0);
  214. clk_disable(pc->pwm_clk);
  215. mutex_unlock(&pc->sti_pwm_lock);
  216. }
  217. static void sti_pwm_free(struct pwm_chip *chip, struct pwm_device *pwm)
  218. {
  219. struct sti_pwm_chip *pc = to_sti_pwmchip(chip);
  220. clear_bit(pwm->hwpwm, &pc->configured);
  221. }
  222. static const struct pwm_ops sti_pwm_ops = {
  223. .config = sti_pwm_config,
  224. .enable = sti_pwm_enable,
  225. .disable = sti_pwm_disable,
  226. .free = sti_pwm_free,
  227. .owner = THIS_MODULE,
  228. };
  229. static int sti_pwm_probe_dt(struct sti_pwm_chip *pc)
  230. {
  231. struct device *dev = pc->dev;
  232. const struct reg_field *reg_fields;
  233. struct device_node *np = dev->of_node;
  234. struct sti_pwm_compat_data *cdata = pc->cdata;
  235. u32 num_devs;
  236. of_property_read_u32(np, "st,pwm-num-chan", &num_devs);
  237. if (num_devs)
  238. cdata->num_devs = num_devs;
  239. reg_fields = cdata->reg_fields;
  240. pc->prescale_low = devm_regmap_field_alloc(dev, pc->regmap,
  241. reg_fields[PWMCLK_PRESCALE_LOW]);
  242. if (IS_ERR(pc->prescale_low))
  243. return PTR_ERR(pc->prescale_low);
  244. pc->prescale_high = devm_regmap_field_alloc(dev, pc->regmap,
  245. reg_fields[PWMCLK_PRESCALE_HIGH]);
  246. if (IS_ERR(pc->prescale_high))
  247. return PTR_ERR(pc->prescale_high);
  248. pc->pwm_out_en = devm_regmap_field_alloc(dev, pc->regmap,
  249. reg_fields[PWM_OUT_EN]);
  250. if (IS_ERR(pc->pwm_out_en))
  251. return PTR_ERR(pc->pwm_out_en);
  252. pc->pwm_cpt_int_en = devm_regmap_field_alloc(dev, pc->regmap,
  253. reg_fields[PWM_CPT_INT_EN]);
  254. if (IS_ERR(pc->pwm_cpt_int_en))
  255. return PTR_ERR(pc->pwm_cpt_int_en);
  256. return 0;
  257. }
  258. static const struct regmap_config sti_pwm_regmap_config = {
  259. .reg_bits = 32,
  260. .val_bits = 32,
  261. .reg_stride = 4,
  262. };
  263. static int sti_pwm_probe(struct platform_device *pdev)
  264. {
  265. struct device *dev = &pdev->dev;
  266. struct sti_pwm_compat_data *cdata;
  267. struct sti_pwm_chip *pc;
  268. struct resource *res;
  269. int ret;
  270. pc = devm_kzalloc(dev, sizeof(*pc), GFP_KERNEL);
  271. if (!pc)
  272. return -ENOMEM;
  273. cdata = devm_kzalloc(dev, sizeof(*cdata), GFP_KERNEL);
  274. if (!cdata)
  275. return -ENOMEM;
  276. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  277. pc->mmio = devm_ioremap_resource(dev, res);
  278. if (IS_ERR(pc->mmio))
  279. return PTR_ERR(pc->mmio);
  280. pc->regmap = devm_regmap_init_mmio(dev, pc->mmio,
  281. &sti_pwm_regmap_config);
  282. if (IS_ERR(pc->regmap))
  283. return PTR_ERR(pc->regmap);
  284. /*
  285. * Setup PWM data with default values: some values could be replaced
  286. * with specific ones provided from Device Tree.
  287. */
  288. cdata->reg_fields = &sti_pwm_regfields[0];
  289. cdata->max_prescale = 0xff;
  290. cdata->max_pwm_cnt = 255;
  291. cdata->num_devs = 1;
  292. pc->cdata = cdata;
  293. pc->dev = dev;
  294. pc->en_count = 0;
  295. mutex_init(&pc->sti_pwm_lock);
  296. ret = sti_pwm_probe_dt(pc);
  297. if (ret)
  298. return ret;
  299. pc->pwm_clk = of_clk_get_by_name(dev->of_node, "pwm");
  300. if (IS_ERR(pc->pwm_clk)) {
  301. dev_err(dev, "failed to get PWM clock\n");
  302. return PTR_ERR(pc->pwm_clk);
  303. }
  304. ret = clk_prepare(pc->pwm_clk);
  305. if (ret) {
  306. dev_err(dev, "failed to prepare clock\n");
  307. return ret;
  308. }
  309. pc->chip.dev = dev;
  310. pc->chip.ops = &sti_pwm_ops;
  311. pc->chip.base = -1;
  312. pc->chip.npwm = pc->cdata->num_devs;
  313. pc->chip.can_sleep = true;
  314. ret = pwmchip_add(&pc->chip);
  315. if (ret < 0) {
  316. clk_unprepare(pc->pwm_clk);
  317. return ret;
  318. }
  319. platform_set_drvdata(pdev, pc);
  320. return 0;
  321. }
  322. static int sti_pwm_remove(struct platform_device *pdev)
  323. {
  324. struct sti_pwm_chip *pc = platform_get_drvdata(pdev);
  325. unsigned int i;
  326. for (i = 0; i < pc->cdata->num_devs; i++)
  327. pwm_disable(&pc->chip.pwms[i]);
  328. clk_unprepare(pc->pwm_clk);
  329. return pwmchip_remove(&pc->chip);
  330. }
  331. static const struct of_device_id sti_pwm_of_match[] = {
  332. { .compatible = "st,sti-pwm", },
  333. { /* sentinel */ }
  334. };
  335. MODULE_DEVICE_TABLE(of, sti_pwm_of_match);
  336. static struct platform_driver sti_pwm_driver = {
  337. .driver = {
  338. .name = "sti-pwm",
  339. .of_match_table = sti_pwm_of_match,
  340. },
  341. .probe = sti_pwm_probe,
  342. .remove = sti_pwm_remove,
  343. };
  344. module_platform_driver(sti_pwm_driver);
  345. MODULE_AUTHOR("Ajit Pal Singh <ajitpal.singh@st.com>");
  346. MODULE_DESCRIPTION("STMicroelectronics ST PWM driver");
  347. MODULE_LICENSE("GPL");