panel-simple.c 21 KB

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  1. /*
  2. * Copyright (C) 2013, NVIDIA Corporation. All rights reserved.
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * the rights to use, copy, modify, merge, publish, distribute, sub license,
  8. * and/or sell copies of the Software, and to permit persons to whom the
  9. * Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice (including the
  12. * next paragraph) shall be included in all copies or substantial portions
  13. * of the Software.
  14. *
  15. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17. * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  18. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  21. * DEALINGS IN THE SOFTWARE.
  22. */
  23. #include <linux/backlight.h>
  24. #include <linux/gpio/consumer.h>
  25. #include <linux/module.h>
  26. #include <linux/of_platform.h>
  27. #include <linux/platform_device.h>
  28. #include <linux/regulator/consumer.h>
  29. #include <drm/drmP.h>
  30. #include <drm/drm_crtc.h>
  31. #include <drm/drm_mipi_dsi.h>
  32. #include <drm/drm_panel.h>
  33. struct panel_desc {
  34. const struct drm_display_mode *modes;
  35. unsigned int num_modes;
  36. unsigned int bpc;
  37. struct {
  38. unsigned int width;
  39. unsigned int height;
  40. } size;
  41. /**
  42. * @prepare: the time (in milliseconds) that it takes for the panel to
  43. * become ready and start receiving video data
  44. * @enable: the time (in milliseconds) that it takes for the panel to
  45. * display the first valid frame after starting to receive
  46. * video data
  47. * @disable: the time (in milliseconds) that it takes for the panel to
  48. * turn the display off (no content is visible)
  49. * @unprepare: the time (in milliseconds) that it takes for the panel
  50. * to power itself down completely
  51. */
  52. struct {
  53. unsigned int prepare;
  54. unsigned int enable;
  55. unsigned int disable;
  56. unsigned int unprepare;
  57. } delay;
  58. };
  59. struct panel_simple {
  60. struct drm_panel base;
  61. bool prepared;
  62. bool enabled;
  63. const struct panel_desc *desc;
  64. struct backlight_device *backlight;
  65. struct regulator *supply;
  66. struct i2c_adapter *ddc;
  67. struct gpio_desc *enable_gpio;
  68. };
  69. static inline struct panel_simple *to_panel_simple(struct drm_panel *panel)
  70. {
  71. return container_of(panel, struct panel_simple, base);
  72. }
  73. static int panel_simple_get_fixed_modes(struct panel_simple *panel)
  74. {
  75. struct drm_connector *connector = panel->base.connector;
  76. struct drm_device *drm = panel->base.drm;
  77. struct drm_display_mode *mode;
  78. unsigned int i, num = 0;
  79. if (!panel->desc)
  80. return 0;
  81. for (i = 0; i < panel->desc->num_modes; i++) {
  82. const struct drm_display_mode *m = &panel->desc->modes[i];
  83. mode = drm_mode_duplicate(drm, m);
  84. if (!mode) {
  85. dev_err(drm->dev, "failed to add mode %ux%u@%u\n",
  86. m->hdisplay, m->vdisplay, m->vrefresh);
  87. continue;
  88. }
  89. drm_mode_set_name(mode);
  90. drm_mode_probed_add(connector, mode);
  91. num++;
  92. }
  93. connector->display_info.bpc = panel->desc->bpc;
  94. connector->display_info.width_mm = panel->desc->size.width;
  95. connector->display_info.height_mm = panel->desc->size.height;
  96. return num;
  97. }
  98. static int panel_simple_disable(struct drm_panel *panel)
  99. {
  100. struct panel_simple *p = to_panel_simple(panel);
  101. if (!p->enabled)
  102. return 0;
  103. if (p->backlight) {
  104. p->backlight->props.power = FB_BLANK_POWERDOWN;
  105. backlight_update_status(p->backlight);
  106. }
  107. if (p->desc->delay.disable)
  108. msleep(p->desc->delay.disable);
  109. p->enabled = false;
  110. return 0;
  111. }
  112. static int panel_simple_unprepare(struct drm_panel *panel)
  113. {
  114. struct panel_simple *p = to_panel_simple(panel);
  115. if (!p->prepared)
  116. return 0;
  117. if (p->enable_gpio)
  118. gpiod_set_value_cansleep(p->enable_gpio, 0);
  119. regulator_disable(p->supply);
  120. if (p->desc->delay.unprepare)
  121. msleep(p->desc->delay.unprepare);
  122. p->prepared = false;
  123. return 0;
  124. }
  125. static int panel_simple_prepare(struct drm_panel *panel)
  126. {
  127. struct panel_simple *p = to_panel_simple(panel);
  128. int err;
  129. if (p->prepared)
  130. return 0;
  131. err = regulator_enable(p->supply);
  132. if (err < 0) {
  133. dev_err(panel->dev, "failed to enable supply: %d\n", err);
  134. return err;
  135. }
  136. if (p->enable_gpio)
  137. gpiod_set_value_cansleep(p->enable_gpio, 1);
  138. if (p->desc->delay.prepare)
  139. msleep(p->desc->delay.prepare);
  140. p->prepared = true;
  141. return 0;
  142. }
  143. static int panel_simple_enable(struct drm_panel *panel)
  144. {
  145. struct panel_simple *p = to_panel_simple(panel);
  146. if (p->enabled)
  147. return 0;
  148. if (p->desc->delay.enable)
  149. msleep(p->desc->delay.enable);
  150. if (p->backlight) {
  151. p->backlight->props.power = FB_BLANK_UNBLANK;
  152. backlight_update_status(p->backlight);
  153. }
  154. p->enabled = true;
  155. return 0;
  156. }
  157. static int panel_simple_get_modes(struct drm_panel *panel)
  158. {
  159. struct panel_simple *p = to_panel_simple(panel);
  160. int num = 0;
  161. /* probe EDID if a DDC bus is available */
  162. if (p->ddc) {
  163. struct edid *edid = drm_get_edid(panel->connector, p->ddc);
  164. drm_mode_connector_update_edid_property(panel->connector, edid);
  165. if (edid) {
  166. num += drm_add_edid_modes(panel->connector, edid);
  167. kfree(edid);
  168. }
  169. }
  170. /* add hard-coded panel modes */
  171. num += panel_simple_get_fixed_modes(p);
  172. return num;
  173. }
  174. static const struct drm_panel_funcs panel_simple_funcs = {
  175. .disable = panel_simple_disable,
  176. .unprepare = panel_simple_unprepare,
  177. .prepare = panel_simple_prepare,
  178. .enable = panel_simple_enable,
  179. .get_modes = panel_simple_get_modes,
  180. };
  181. static int panel_simple_probe(struct device *dev, const struct panel_desc *desc)
  182. {
  183. struct device_node *backlight, *ddc;
  184. struct panel_simple *panel;
  185. int err;
  186. panel = devm_kzalloc(dev, sizeof(*panel), GFP_KERNEL);
  187. if (!panel)
  188. return -ENOMEM;
  189. panel->enabled = false;
  190. panel->prepared = false;
  191. panel->desc = desc;
  192. panel->supply = devm_regulator_get(dev, "power");
  193. if (IS_ERR(panel->supply))
  194. return PTR_ERR(panel->supply);
  195. panel->enable_gpio = devm_gpiod_get_optional(dev, "enable",
  196. GPIOD_OUT_LOW);
  197. if (IS_ERR(panel->enable_gpio)) {
  198. err = PTR_ERR(panel->enable_gpio);
  199. dev_err(dev, "failed to request GPIO: %d\n", err);
  200. return err;
  201. }
  202. backlight = of_parse_phandle(dev->of_node, "backlight", 0);
  203. if (backlight) {
  204. panel->backlight = of_find_backlight_by_node(backlight);
  205. of_node_put(backlight);
  206. if (!panel->backlight)
  207. return -EPROBE_DEFER;
  208. }
  209. ddc = of_parse_phandle(dev->of_node, "ddc-i2c-bus", 0);
  210. if (ddc) {
  211. panel->ddc = of_find_i2c_adapter_by_node(ddc);
  212. of_node_put(ddc);
  213. if (!panel->ddc) {
  214. err = -EPROBE_DEFER;
  215. goto free_backlight;
  216. }
  217. }
  218. drm_panel_init(&panel->base);
  219. panel->base.dev = dev;
  220. panel->base.funcs = &panel_simple_funcs;
  221. err = drm_panel_add(&panel->base);
  222. if (err < 0)
  223. goto free_ddc;
  224. dev_set_drvdata(dev, panel);
  225. return 0;
  226. free_ddc:
  227. if (panel->ddc)
  228. put_device(&panel->ddc->dev);
  229. free_backlight:
  230. if (panel->backlight)
  231. put_device(&panel->backlight->dev);
  232. return err;
  233. }
  234. static int panel_simple_remove(struct device *dev)
  235. {
  236. struct panel_simple *panel = dev_get_drvdata(dev);
  237. drm_panel_detach(&panel->base);
  238. drm_panel_remove(&panel->base);
  239. panel_simple_disable(&panel->base);
  240. if (panel->ddc)
  241. put_device(&panel->ddc->dev);
  242. if (panel->backlight)
  243. put_device(&panel->backlight->dev);
  244. return 0;
  245. }
  246. static void panel_simple_shutdown(struct device *dev)
  247. {
  248. struct panel_simple *panel = dev_get_drvdata(dev);
  249. panel_simple_disable(&panel->base);
  250. }
  251. static const struct drm_display_mode auo_b101aw03_mode = {
  252. .clock = 51450,
  253. .hdisplay = 1024,
  254. .hsync_start = 1024 + 156,
  255. .hsync_end = 1024 + 156 + 8,
  256. .htotal = 1024 + 156 + 8 + 156,
  257. .vdisplay = 600,
  258. .vsync_start = 600 + 16,
  259. .vsync_end = 600 + 16 + 6,
  260. .vtotal = 600 + 16 + 6 + 16,
  261. .vrefresh = 60,
  262. };
  263. static const struct panel_desc auo_b101aw03 = {
  264. .modes = &auo_b101aw03_mode,
  265. .num_modes = 1,
  266. .bpc = 6,
  267. .size = {
  268. .width = 223,
  269. .height = 125,
  270. },
  271. };
  272. static const struct drm_display_mode auo_b101xtn01_mode = {
  273. .clock = 72000,
  274. .hdisplay = 1366,
  275. .hsync_start = 1366 + 20,
  276. .hsync_end = 1366 + 20 + 70,
  277. .htotal = 1366 + 20 + 70,
  278. .vdisplay = 768,
  279. .vsync_start = 768 + 14,
  280. .vsync_end = 768 + 14 + 42,
  281. .vtotal = 768 + 14 + 42,
  282. .vrefresh = 60,
  283. .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
  284. };
  285. static const struct panel_desc auo_b101xtn01 = {
  286. .modes = &auo_b101xtn01_mode,
  287. .num_modes = 1,
  288. .bpc = 6,
  289. .size = {
  290. .width = 223,
  291. .height = 125,
  292. },
  293. };
  294. static const struct drm_display_mode auo_b116xw03_mode = {
  295. .clock = 70589,
  296. .hdisplay = 1366,
  297. .hsync_start = 1366 + 40,
  298. .hsync_end = 1366 + 40 + 40,
  299. .htotal = 1366 + 40 + 40 + 32,
  300. .vdisplay = 768,
  301. .vsync_start = 768 + 10,
  302. .vsync_end = 768 + 10 + 12,
  303. .vtotal = 768 + 10 + 12 + 6,
  304. .vrefresh = 60,
  305. };
  306. static const struct panel_desc auo_b116xw03 = {
  307. .modes = &auo_b116xw03_mode,
  308. .num_modes = 1,
  309. .bpc = 6,
  310. .size = {
  311. .width = 256,
  312. .height = 144,
  313. },
  314. };
  315. static const struct drm_display_mode auo_b133xtn01_mode = {
  316. .clock = 69500,
  317. .hdisplay = 1366,
  318. .hsync_start = 1366 + 48,
  319. .hsync_end = 1366 + 48 + 32,
  320. .htotal = 1366 + 48 + 32 + 20,
  321. .vdisplay = 768,
  322. .vsync_start = 768 + 3,
  323. .vsync_end = 768 + 3 + 6,
  324. .vtotal = 768 + 3 + 6 + 13,
  325. .vrefresh = 60,
  326. };
  327. static const struct panel_desc auo_b133xtn01 = {
  328. .modes = &auo_b133xtn01_mode,
  329. .num_modes = 1,
  330. .bpc = 6,
  331. .size = {
  332. .width = 293,
  333. .height = 165,
  334. },
  335. };
  336. static const struct drm_display_mode auo_b133htn01_mode = {
  337. .clock = 150660,
  338. .hdisplay = 1920,
  339. .hsync_start = 1920 + 172,
  340. .hsync_end = 1920 + 172 + 80,
  341. .htotal = 1920 + 172 + 80 + 60,
  342. .vdisplay = 1080,
  343. .vsync_start = 1080 + 25,
  344. .vsync_end = 1080 + 25 + 10,
  345. .vtotal = 1080 + 25 + 10 + 10,
  346. .vrefresh = 60,
  347. };
  348. static const struct panel_desc auo_b133htn01 = {
  349. .modes = &auo_b133htn01_mode,
  350. .num_modes = 1,
  351. .bpc = 6,
  352. .size = {
  353. .width = 293,
  354. .height = 165,
  355. },
  356. .delay = {
  357. .prepare = 105,
  358. .enable = 20,
  359. .unprepare = 50,
  360. },
  361. };
  362. static const struct drm_display_mode chunghwa_claa101wa01a_mode = {
  363. .clock = 72070,
  364. .hdisplay = 1366,
  365. .hsync_start = 1366 + 58,
  366. .hsync_end = 1366 + 58 + 58,
  367. .htotal = 1366 + 58 + 58 + 58,
  368. .vdisplay = 768,
  369. .vsync_start = 768 + 4,
  370. .vsync_end = 768 + 4 + 4,
  371. .vtotal = 768 + 4 + 4 + 4,
  372. .vrefresh = 60,
  373. };
  374. static const struct panel_desc chunghwa_claa101wa01a = {
  375. .modes = &chunghwa_claa101wa01a_mode,
  376. .num_modes = 1,
  377. .bpc = 6,
  378. .size = {
  379. .width = 220,
  380. .height = 120,
  381. },
  382. };
  383. static const struct drm_display_mode chunghwa_claa101wb01_mode = {
  384. .clock = 69300,
  385. .hdisplay = 1366,
  386. .hsync_start = 1366 + 48,
  387. .hsync_end = 1366 + 48 + 32,
  388. .htotal = 1366 + 48 + 32 + 20,
  389. .vdisplay = 768,
  390. .vsync_start = 768 + 16,
  391. .vsync_end = 768 + 16 + 8,
  392. .vtotal = 768 + 16 + 8 + 16,
  393. .vrefresh = 60,
  394. };
  395. static const struct panel_desc chunghwa_claa101wb01 = {
  396. .modes = &chunghwa_claa101wb01_mode,
  397. .num_modes = 1,
  398. .bpc = 6,
  399. .size = {
  400. .width = 223,
  401. .height = 125,
  402. },
  403. };
  404. static const struct drm_display_mode edt_et057090dhu_mode = {
  405. .clock = 25175,
  406. .hdisplay = 640,
  407. .hsync_start = 640 + 16,
  408. .hsync_end = 640 + 16 + 30,
  409. .htotal = 640 + 16 + 30 + 114,
  410. .vdisplay = 480,
  411. .vsync_start = 480 + 10,
  412. .vsync_end = 480 + 10 + 3,
  413. .vtotal = 480 + 10 + 3 + 32,
  414. .vrefresh = 60,
  415. .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
  416. };
  417. static const struct panel_desc edt_et057090dhu = {
  418. .modes = &edt_et057090dhu_mode,
  419. .num_modes = 1,
  420. .bpc = 6,
  421. .size = {
  422. .width = 115,
  423. .height = 86,
  424. },
  425. };
  426. static const struct drm_display_mode edt_etm0700g0dh6_mode = {
  427. .clock = 33260,
  428. .hdisplay = 800,
  429. .hsync_start = 800 + 40,
  430. .hsync_end = 800 + 40 + 128,
  431. .htotal = 800 + 40 + 128 + 88,
  432. .vdisplay = 480,
  433. .vsync_start = 480 + 10,
  434. .vsync_end = 480 + 10 + 2,
  435. .vtotal = 480 + 10 + 2 + 33,
  436. .vrefresh = 60,
  437. .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC,
  438. };
  439. static const struct panel_desc edt_etm0700g0dh6 = {
  440. .modes = &edt_etm0700g0dh6_mode,
  441. .num_modes = 1,
  442. .bpc = 6,
  443. .size = {
  444. .width = 152,
  445. .height = 91,
  446. },
  447. };
  448. static const struct drm_display_mode foxlink_fl500wvr00_a0t_mode = {
  449. .clock = 32260,
  450. .hdisplay = 800,
  451. .hsync_start = 800 + 168,
  452. .hsync_end = 800 + 168 + 64,
  453. .htotal = 800 + 168 + 64 + 88,
  454. .vdisplay = 480,
  455. .vsync_start = 480 + 37,
  456. .vsync_end = 480 + 37 + 2,
  457. .vtotal = 480 + 37 + 2 + 8,
  458. .vrefresh = 60,
  459. };
  460. static const struct panel_desc foxlink_fl500wvr00_a0t = {
  461. .modes = &foxlink_fl500wvr00_a0t_mode,
  462. .num_modes = 1,
  463. .bpc = 8,
  464. .size = {
  465. .width = 108,
  466. .height = 65,
  467. },
  468. };
  469. static const struct drm_display_mode hannstar_hsd070pww1_mode = {
  470. .clock = 71100,
  471. .hdisplay = 1280,
  472. .hsync_start = 1280 + 1,
  473. .hsync_end = 1280 + 1 + 158,
  474. .htotal = 1280 + 1 + 158 + 1,
  475. .vdisplay = 800,
  476. .vsync_start = 800 + 1,
  477. .vsync_end = 800 + 1 + 21,
  478. .vtotal = 800 + 1 + 21 + 1,
  479. .vrefresh = 60,
  480. };
  481. static const struct panel_desc hannstar_hsd070pww1 = {
  482. .modes = &hannstar_hsd070pww1_mode,
  483. .num_modes = 1,
  484. .bpc = 6,
  485. .size = {
  486. .width = 151,
  487. .height = 94,
  488. },
  489. };
  490. static const struct drm_display_mode innolux_n116bge_mode = {
  491. .clock = 71000,
  492. .hdisplay = 1366,
  493. .hsync_start = 1366 + 64,
  494. .hsync_end = 1366 + 64 + 6,
  495. .htotal = 1366 + 64 + 6 + 64,
  496. .vdisplay = 768,
  497. .vsync_start = 768 + 8,
  498. .vsync_end = 768 + 8 + 4,
  499. .vtotal = 768 + 8 + 4 + 8,
  500. .vrefresh = 60,
  501. .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC,
  502. };
  503. static const struct panel_desc innolux_n116bge = {
  504. .modes = &innolux_n116bge_mode,
  505. .num_modes = 1,
  506. .bpc = 6,
  507. .size = {
  508. .width = 256,
  509. .height = 144,
  510. },
  511. };
  512. static const struct drm_display_mode innolux_n156bge_l21_mode = {
  513. .clock = 69300,
  514. .hdisplay = 1366,
  515. .hsync_start = 1366 + 16,
  516. .hsync_end = 1366 + 16 + 34,
  517. .htotal = 1366 + 16 + 34 + 50,
  518. .vdisplay = 768,
  519. .vsync_start = 768 + 2,
  520. .vsync_end = 768 + 2 + 6,
  521. .vtotal = 768 + 2 + 6 + 12,
  522. .vrefresh = 60,
  523. };
  524. static const struct panel_desc innolux_n156bge_l21 = {
  525. .modes = &innolux_n156bge_l21_mode,
  526. .num_modes = 1,
  527. .bpc = 6,
  528. .size = {
  529. .width = 344,
  530. .height = 193,
  531. },
  532. };
  533. static const struct drm_display_mode lg_lp129qe_mode = {
  534. .clock = 285250,
  535. .hdisplay = 2560,
  536. .hsync_start = 2560 + 48,
  537. .hsync_end = 2560 + 48 + 32,
  538. .htotal = 2560 + 48 + 32 + 80,
  539. .vdisplay = 1700,
  540. .vsync_start = 1700 + 3,
  541. .vsync_end = 1700 + 3 + 10,
  542. .vtotal = 1700 + 3 + 10 + 36,
  543. .vrefresh = 60,
  544. };
  545. static const struct panel_desc lg_lp129qe = {
  546. .modes = &lg_lp129qe_mode,
  547. .num_modes = 1,
  548. .bpc = 8,
  549. .size = {
  550. .width = 272,
  551. .height = 181,
  552. },
  553. };
  554. static const struct drm_display_mode samsung_ltn101nt05_mode = {
  555. .clock = 54030,
  556. .hdisplay = 1024,
  557. .hsync_start = 1024 + 24,
  558. .hsync_end = 1024 + 24 + 136,
  559. .htotal = 1024 + 24 + 136 + 160,
  560. .vdisplay = 600,
  561. .vsync_start = 600 + 3,
  562. .vsync_end = 600 + 3 + 6,
  563. .vtotal = 600 + 3 + 6 + 61,
  564. .vrefresh = 60,
  565. };
  566. static const struct panel_desc samsung_ltn101nt05 = {
  567. .modes = &samsung_ltn101nt05_mode,
  568. .num_modes = 1,
  569. .bpc = 6,
  570. .size = {
  571. .width = 1024,
  572. .height = 600,
  573. },
  574. };
  575. static const struct of_device_id platform_of_match[] = {
  576. {
  577. .compatible = "auo,b101aw03",
  578. .data = &auo_b101aw03,
  579. }, {
  580. .compatible = "auo,b101xtn01",
  581. .data = &auo_b101xtn01,
  582. }, {
  583. .compatible = "auo,b116xw03",
  584. .data = &auo_b116xw03,
  585. }, {
  586. .compatible = "auo,b133htn01",
  587. .data = &auo_b133htn01,
  588. }, {
  589. .compatible = "auo,b133xtn01",
  590. .data = &auo_b133xtn01,
  591. }, {
  592. .compatible = "chunghwa,claa101wa01a",
  593. .data = &chunghwa_claa101wa01a
  594. }, {
  595. .compatible = "chunghwa,claa101wb01",
  596. .data = &chunghwa_claa101wb01
  597. }, {
  598. .compatible = "edt,et057090dhu",
  599. .data = &edt_et057090dhu,
  600. }, {
  601. .compatible = "edt,et070080dh6",
  602. .data = &edt_etm0700g0dh6,
  603. }, {
  604. .compatible = "edt,etm0700g0dh6",
  605. .data = &edt_etm0700g0dh6,
  606. }, {
  607. .compatible = "foxlink,fl500wvr00-a0t",
  608. .data = &foxlink_fl500wvr00_a0t,
  609. }, {
  610. .compatible = "hannstar,hsd070pww1",
  611. .data = &hannstar_hsd070pww1,
  612. }, {
  613. .compatible = "innolux,n116bge",
  614. .data = &innolux_n116bge,
  615. }, {
  616. .compatible = "innolux,n156bge-l21",
  617. .data = &innolux_n156bge_l21,
  618. }, {
  619. .compatible = "lg,lp129qe",
  620. .data = &lg_lp129qe,
  621. }, {
  622. .compatible = "samsung,ltn101nt05",
  623. .data = &samsung_ltn101nt05,
  624. }, {
  625. /* sentinel */
  626. }
  627. };
  628. MODULE_DEVICE_TABLE(of, platform_of_match);
  629. static int panel_simple_platform_probe(struct platform_device *pdev)
  630. {
  631. const struct of_device_id *id;
  632. id = of_match_node(platform_of_match, pdev->dev.of_node);
  633. if (!id)
  634. return -ENODEV;
  635. return panel_simple_probe(&pdev->dev, id->data);
  636. }
  637. static int panel_simple_platform_remove(struct platform_device *pdev)
  638. {
  639. return panel_simple_remove(&pdev->dev);
  640. }
  641. static void panel_simple_platform_shutdown(struct platform_device *pdev)
  642. {
  643. panel_simple_shutdown(&pdev->dev);
  644. }
  645. static struct platform_driver panel_simple_platform_driver = {
  646. .driver = {
  647. .name = "panel-simple",
  648. .owner = THIS_MODULE,
  649. .of_match_table = platform_of_match,
  650. },
  651. .probe = panel_simple_platform_probe,
  652. .remove = panel_simple_platform_remove,
  653. .shutdown = panel_simple_platform_shutdown,
  654. };
  655. struct panel_desc_dsi {
  656. struct panel_desc desc;
  657. unsigned long flags;
  658. enum mipi_dsi_pixel_format format;
  659. unsigned int lanes;
  660. };
  661. static const struct drm_display_mode lg_ld070wx3_sl01_mode = {
  662. .clock = 71000,
  663. .hdisplay = 800,
  664. .hsync_start = 800 + 32,
  665. .hsync_end = 800 + 32 + 1,
  666. .htotal = 800 + 32 + 1 + 57,
  667. .vdisplay = 1280,
  668. .vsync_start = 1280 + 28,
  669. .vsync_end = 1280 + 28 + 1,
  670. .vtotal = 1280 + 28 + 1 + 14,
  671. .vrefresh = 60,
  672. };
  673. static const struct panel_desc_dsi lg_ld070wx3_sl01 = {
  674. .desc = {
  675. .modes = &lg_ld070wx3_sl01_mode,
  676. .num_modes = 1,
  677. .bpc = 8,
  678. .size = {
  679. .width = 94,
  680. .height = 151,
  681. },
  682. },
  683. .flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_CLOCK_NON_CONTINUOUS,
  684. .format = MIPI_DSI_FMT_RGB888,
  685. .lanes = 4,
  686. };
  687. static const struct drm_display_mode lg_lh500wx1_sd03_mode = {
  688. .clock = 67000,
  689. .hdisplay = 720,
  690. .hsync_start = 720 + 12,
  691. .hsync_end = 720 + 12 + 4,
  692. .htotal = 720 + 12 + 4 + 112,
  693. .vdisplay = 1280,
  694. .vsync_start = 1280 + 8,
  695. .vsync_end = 1280 + 8 + 4,
  696. .vtotal = 1280 + 8 + 4 + 12,
  697. .vrefresh = 60,
  698. };
  699. static const struct panel_desc_dsi lg_lh500wx1_sd03 = {
  700. .desc = {
  701. .modes = &lg_lh500wx1_sd03_mode,
  702. .num_modes = 1,
  703. .bpc = 8,
  704. .size = {
  705. .width = 62,
  706. .height = 110,
  707. },
  708. },
  709. .flags = MIPI_DSI_MODE_VIDEO,
  710. .format = MIPI_DSI_FMT_RGB888,
  711. .lanes = 4,
  712. };
  713. static const struct drm_display_mode panasonic_vvx10f004b00_mode = {
  714. .clock = 157200,
  715. .hdisplay = 1920,
  716. .hsync_start = 1920 + 154,
  717. .hsync_end = 1920 + 154 + 16,
  718. .htotal = 1920 + 154 + 16 + 32,
  719. .vdisplay = 1200,
  720. .vsync_start = 1200 + 17,
  721. .vsync_end = 1200 + 17 + 2,
  722. .vtotal = 1200 + 17 + 2 + 16,
  723. .vrefresh = 60,
  724. };
  725. static const struct panel_desc_dsi panasonic_vvx10f004b00 = {
  726. .desc = {
  727. .modes = &panasonic_vvx10f004b00_mode,
  728. .num_modes = 1,
  729. .bpc = 8,
  730. .size = {
  731. .width = 217,
  732. .height = 136,
  733. },
  734. },
  735. .flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE |
  736. MIPI_DSI_CLOCK_NON_CONTINUOUS,
  737. .format = MIPI_DSI_FMT_RGB888,
  738. .lanes = 4,
  739. };
  740. static const struct of_device_id dsi_of_match[] = {
  741. {
  742. .compatible = "lg,ld070wx3-sl01",
  743. .data = &lg_ld070wx3_sl01
  744. }, {
  745. .compatible = "lg,lh500wx1-sd03",
  746. .data = &lg_lh500wx1_sd03
  747. }, {
  748. .compatible = "panasonic,vvx10f004b00",
  749. .data = &panasonic_vvx10f004b00
  750. }, {
  751. /* sentinel */
  752. }
  753. };
  754. MODULE_DEVICE_TABLE(of, dsi_of_match);
  755. static int panel_simple_dsi_probe(struct mipi_dsi_device *dsi)
  756. {
  757. const struct panel_desc_dsi *desc;
  758. const struct of_device_id *id;
  759. int err;
  760. id = of_match_node(dsi_of_match, dsi->dev.of_node);
  761. if (!id)
  762. return -ENODEV;
  763. desc = id->data;
  764. err = panel_simple_probe(&dsi->dev, &desc->desc);
  765. if (err < 0)
  766. return err;
  767. dsi->mode_flags = desc->flags;
  768. dsi->format = desc->format;
  769. dsi->lanes = desc->lanes;
  770. return mipi_dsi_attach(dsi);
  771. }
  772. static int panel_simple_dsi_remove(struct mipi_dsi_device *dsi)
  773. {
  774. int err;
  775. err = mipi_dsi_detach(dsi);
  776. if (err < 0)
  777. dev_err(&dsi->dev, "failed to detach from DSI host: %d\n", err);
  778. return panel_simple_remove(&dsi->dev);
  779. }
  780. static void panel_simple_dsi_shutdown(struct mipi_dsi_device *dsi)
  781. {
  782. panel_simple_shutdown(&dsi->dev);
  783. }
  784. static struct mipi_dsi_driver panel_simple_dsi_driver = {
  785. .driver = {
  786. .name = "panel-simple-dsi",
  787. .owner = THIS_MODULE,
  788. .of_match_table = dsi_of_match,
  789. },
  790. .probe = panel_simple_dsi_probe,
  791. .remove = panel_simple_dsi_remove,
  792. .shutdown = panel_simple_dsi_shutdown,
  793. };
  794. static int __init panel_simple_init(void)
  795. {
  796. int err;
  797. err = platform_driver_register(&panel_simple_platform_driver);
  798. if (err < 0)
  799. return err;
  800. if (IS_ENABLED(CONFIG_DRM_MIPI_DSI)) {
  801. err = mipi_dsi_driver_register(&panel_simple_dsi_driver);
  802. if (err < 0)
  803. return err;
  804. }
  805. return 0;
  806. }
  807. module_init(panel_simple_init);
  808. static void __exit panel_simple_exit(void)
  809. {
  810. if (IS_ENABLED(CONFIG_DRM_MIPI_DSI))
  811. mipi_dsi_driver_unregister(&panel_simple_dsi_driver);
  812. platform_driver_unregister(&panel_simple_platform_driver);
  813. }
  814. module_exit(panel_simple_exit);
  815. MODULE_AUTHOR("Thierry Reding <treding@nvidia.com>");
  816. MODULE_DESCRIPTION("DRM Driver for Simple Panels");
  817. MODULE_LICENSE("GPL and additional rights");