vmwgfx_execbuf.c 76 KB

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  1. /**************************************************************************
  2. *
  3. * Copyright © 2009 VMware, Inc., Palo Alto, CA., USA
  4. * All Rights Reserved.
  5. *
  6. * Permission is hereby granted, free of charge, to any person obtaining a
  7. * copy of this software and associated documentation files (the
  8. * "Software"), to deal in the Software without restriction, including
  9. * without limitation the rights to use, copy, modify, merge, publish,
  10. * distribute, sub license, and/or sell copies of the Software, and to
  11. * permit persons to whom the Software is furnished to do so, subject to
  12. * the following conditions:
  13. *
  14. * The above copyright notice and this permission notice (including the
  15. * next paragraph) shall be included in all copies or substantial portions
  16. * of the Software.
  17. *
  18. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  19. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  20. * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  21. * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
  22. * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  23. * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  24. * USE OR OTHER DEALINGS IN THE SOFTWARE.
  25. *
  26. **************************************************************************/
  27. #include "vmwgfx_drv.h"
  28. #include "vmwgfx_reg.h"
  29. #include <drm/ttm/ttm_bo_api.h>
  30. #include <drm/ttm/ttm_placement.h>
  31. #define VMW_RES_HT_ORDER 12
  32. /**
  33. * struct vmw_resource_relocation - Relocation info for resources
  34. *
  35. * @head: List head for the software context's relocation list.
  36. * @res: Non-ref-counted pointer to the resource.
  37. * @offset: Offset of 4 byte entries into the command buffer where the
  38. * id that needs fixup is located.
  39. */
  40. struct vmw_resource_relocation {
  41. struct list_head head;
  42. const struct vmw_resource *res;
  43. unsigned long offset;
  44. };
  45. /**
  46. * struct vmw_resource_val_node - Validation info for resources
  47. *
  48. * @head: List head for the software context's resource list.
  49. * @hash: Hash entry for quick resouce to val_node lookup.
  50. * @res: Ref-counted pointer to the resource.
  51. * @switch_backup: Boolean whether to switch backup buffer on unreserve.
  52. * @new_backup: Refcounted pointer to the new backup buffer.
  53. * @staged_bindings: If @res is a context, tracks bindings set up during
  54. * the command batch. Otherwise NULL.
  55. * @new_backup_offset: New backup buffer offset if @new_backup is non-NUll.
  56. * @first_usage: Set to true the first time the resource is referenced in
  57. * the command stream.
  58. * @no_buffer_needed: Resources do not need to allocate buffer backup on
  59. * reservation. The command stream will provide one.
  60. */
  61. struct vmw_resource_val_node {
  62. struct list_head head;
  63. struct drm_hash_item hash;
  64. struct vmw_resource *res;
  65. struct vmw_dma_buffer *new_backup;
  66. struct vmw_ctx_binding_state *staged_bindings;
  67. unsigned long new_backup_offset;
  68. bool first_usage;
  69. bool no_buffer_needed;
  70. };
  71. /**
  72. * struct vmw_cmd_entry - Describe a command for the verifier
  73. *
  74. * @user_allow: Whether allowed from the execbuf ioctl.
  75. * @gb_disable: Whether disabled if guest-backed objects are available.
  76. * @gb_enable: Whether enabled iff guest-backed objects are available.
  77. */
  78. struct vmw_cmd_entry {
  79. int (*func) (struct vmw_private *, struct vmw_sw_context *,
  80. SVGA3dCmdHeader *);
  81. bool user_allow;
  82. bool gb_disable;
  83. bool gb_enable;
  84. };
  85. #define VMW_CMD_DEF(_cmd, _func, _user_allow, _gb_disable, _gb_enable) \
  86. [(_cmd) - SVGA_3D_CMD_BASE] = {(_func), (_user_allow),\
  87. (_gb_disable), (_gb_enable)}
  88. /**
  89. * vmw_resource_unreserve - unreserve resources previously reserved for
  90. * command submission.
  91. *
  92. * @list_head: list of resources to unreserve.
  93. * @backoff: Whether command submission failed.
  94. */
  95. static void vmw_resource_list_unreserve(struct list_head *list,
  96. bool backoff)
  97. {
  98. struct vmw_resource_val_node *val;
  99. list_for_each_entry(val, list, head) {
  100. struct vmw_resource *res = val->res;
  101. struct vmw_dma_buffer *new_backup =
  102. backoff ? NULL : val->new_backup;
  103. /*
  104. * Transfer staged context bindings to the
  105. * persistent context binding tracker.
  106. */
  107. if (unlikely(val->staged_bindings)) {
  108. if (!backoff) {
  109. vmw_context_binding_state_transfer
  110. (val->res, val->staged_bindings);
  111. }
  112. kfree(val->staged_bindings);
  113. val->staged_bindings = NULL;
  114. }
  115. vmw_resource_unreserve(res, new_backup,
  116. val->new_backup_offset);
  117. vmw_dmabuf_unreference(&val->new_backup);
  118. }
  119. }
  120. /**
  121. * vmw_resource_val_add - Add a resource to the software context's
  122. * resource list if it's not already on it.
  123. *
  124. * @sw_context: Pointer to the software context.
  125. * @res: Pointer to the resource.
  126. * @p_node On successful return points to a valid pointer to a
  127. * struct vmw_resource_val_node, if non-NULL on entry.
  128. */
  129. static int vmw_resource_val_add(struct vmw_sw_context *sw_context,
  130. struct vmw_resource *res,
  131. struct vmw_resource_val_node **p_node)
  132. {
  133. struct vmw_resource_val_node *node;
  134. struct drm_hash_item *hash;
  135. int ret;
  136. if (likely(drm_ht_find_item(&sw_context->res_ht, (unsigned long) res,
  137. &hash) == 0)) {
  138. node = container_of(hash, struct vmw_resource_val_node, hash);
  139. node->first_usage = false;
  140. if (unlikely(p_node != NULL))
  141. *p_node = node;
  142. return 0;
  143. }
  144. node = kzalloc(sizeof(*node), GFP_KERNEL);
  145. if (unlikely(node == NULL)) {
  146. DRM_ERROR("Failed to allocate a resource validation "
  147. "entry.\n");
  148. return -ENOMEM;
  149. }
  150. node->hash.key = (unsigned long) res;
  151. ret = drm_ht_insert_item(&sw_context->res_ht, &node->hash);
  152. if (unlikely(ret != 0)) {
  153. DRM_ERROR("Failed to initialize a resource validation "
  154. "entry.\n");
  155. kfree(node);
  156. return ret;
  157. }
  158. list_add_tail(&node->head, &sw_context->resource_list);
  159. node->res = vmw_resource_reference(res);
  160. node->first_usage = true;
  161. if (unlikely(p_node != NULL))
  162. *p_node = node;
  163. return 0;
  164. }
  165. /**
  166. * vmw_resource_relocation_add - Add a relocation to the relocation list
  167. *
  168. * @list: Pointer to head of relocation list.
  169. * @res: The resource.
  170. * @offset: Offset into the command buffer currently being parsed where the
  171. * id that needs fixup is located. Granularity is 4 bytes.
  172. */
  173. static int vmw_resource_relocation_add(struct list_head *list,
  174. const struct vmw_resource *res,
  175. unsigned long offset)
  176. {
  177. struct vmw_resource_relocation *rel;
  178. rel = kmalloc(sizeof(*rel), GFP_KERNEL);
  179. if (unlikely(rel == NULL)) {
  180. DRM_ERROR("Failed to allocate a resource relocation.\n");
  181. return -ENOMEM;
  182. }
  183. rel->res = res;
  184. rel->offset = offset;
  185. list_add_tail(&rel->head, list);
  186. return 0;
  187. }
  188. /**
  189. * vmw_resource_relocations_free - Free all relocations on a list
  190. *
  191. * @list: Pointer to the head of the relocation list.
  192. */
  193. static void vmw_resource_relocations_free(struct list_head *list)
  194. {
  195. struct vmw_resource_relocation *rel, *n;
  196. list_for_each_entry_safe(rel, n, list, head) {
  197. list_del(&rel->head);
  198. kfree(rel);
  199. }
  200. }
  201. /**
  202. * vmw_resource_relocations_apply - Apply all relocations on a list
  203. *
  204. * @cb: Pointer to the start of the command buffer bein patch. This need
  205. * not be the same buffer as the one being parsed when the relocation
  206. * list was built, but the contents must be the same modulo the
  207. * resource ids.
  208. * @list: Pointer to the head of the relocation list.
  209. */
  210. static void vmw_resource_relocations_apply(uint32_t *cb,
  211. struct list_head *list)
  212. {
  213. struct vmw_resource_relocation *rel;
  214. list_for_each_entry(rel, list, head) {
  215. if (likely(rel->res != NULL))
  216. cb[rel->offset] = rel->res->id;
  217. else
  218. cb[rel->offset] = SVGA_3D_CMD_NOP;
  219. }
  220. }
  221. static int vmw_cmd_invalid(struct vmw_private *dev_priv,
  222. struct vmw_sw_context *sw_context,
  223. SVGA3dCmdHeader *header)
  224. {
  225. return capable(CAP_SYS_ADMIN) ? : -EINVAL;
  226. }
  227. static int vmw_cmd_ok(struct vmw_private *dev_priv,
  228. struct vmw_sw_context *sw_context,
  229. SVGA3dCmdHeader *header)
  230. {
  231. return 0;
  232. }
  233. /**
  234. * vmw_bo_to_validate_list - add a bo to a validate list
  235. *
  236. * @sw_context: The software context used for this command submission batch.
  237. * @bo: The buffer object to add.
  238. * @validate_as_mob: Validate this buffer as a MOB.
  239. * @p_val_node: If non-NULL Will be updated with the validate node number
  240. * on return.
  241. *
  242. * Returns -EINVAL if the limit of number of buffer objects per command
  243. * submission is reached.
  244. */
  245. static int vmw_bo_to_validate_list(struct vmw_sw_context *sw_context,
  246. struct ttm_buffer_object *bo,
  247. bool validate_as_mob,
  248. uint32_t *p_val_node)
  249. {
  250. uint32_t val_node;
  251. struct vmw_validate_buffer *vval_buf;
  252. struct ttm_validate_buffer *val_buf;
  253. struct drm_hash_item *hash;
  254. int ret;
  255. if (likely(drm_ht_find_item(&sw_context->res_ht, (unsigned long) bo,
  256. &hash) == 0)) {
  257. vval_buf = container_of(hash, struct vmw_validate_buffer,
  258. hash);
  259. if (unlikely(vval_buf->validate_as_mob != validate_as_mob)) {
  260. DRM_ERROR("Inconsistent buffer usage.\n");
  261. return -EINVAL;
  262. }
  263. val_buf = &vval_buf->base;
  264. val_node = vval_buf - sw_context->val_bufs;
  265. } else {
  266. val_node = sw_context->cur_val_buf;
  267. if (unlikely(val_node >= VMWGFX_MAX_VALIDATIONS)) {
  268. DRM_ERROR("Max number of DMA buffers per submission "
  269. "exceeded.\n");
  270. return -EINVAL;
  271. }
  272. vval_buf = &sw_context->val_bufs[val_node];
  273. vval_buf->hash.key = (unsigned long) bo;
  274. ret = drm_ht_insert_item(&sw_context->res_ht, &vval_buf->hash);
  275. if (unlikely(ret != 0)) {
  276. DRM_ERROR("Failed to initialize a buffer validation "
  277. "entry.\n");
  278. return ret;
  279. }
  280. ++sw_context->cur_val_buf;
  281. val_buf = &vval_buf->base;
  282. val_buf->bo = ttm_bo_reference(bo);
  283. val_buf->reserved = false;
  284. list_add_tail(&val_buf->head, &sw_context->validate_nodes);
  285. vval_buf->validate_as_mob = validate_as_mob;
  286. }
  287. sw_context->fence_flags |= DRM_VMW_FENCE_FLAG_EXEC;
  288. if (p_val_node)
  289. *p_val_node = val_node;
  290. return 0;
  291. }
  292. /**
  293. * vmw_resources_reserve - Reserve all resources on the sw_context's
  294. * resource list.
  295. *
  296. * @sw_context: Pointer to the software context.
  297. *
  298. * Note that since vmware's command submission currently is protected by
  299. * the cmdbuf mutex, no fancy deadlock avoidance is required for resources,
  300. * since only a single thread at once will attempt this.
  301. */
  302. static int vmw_resources_reserve(struct vmw_sw_context *sw_context)
  303. {
  304. struct vmw_resource_val_node *val;
  305. int ret;
  306. list_for_each_entry(val, &sw_context->resource_list, head) {
  307. struct vmw_resource *res = val->res;
  308. ret = vmw_resource_reserve(res, val->no_buffer_needed);
  309. if (unlikely(ret != 0))
  310. return ret;
  311. if (res->backup) {
  312. struct ttm_buffer_object *bo = &res->backup->base;
  313. ret = vmw_bo_to_validate_list
  314. (sw_context, bo,
  315. vmw_resource_needs_backup(res), NULL);
  316. if (unlikely(ret != 0))
  317. return ret;
  318. }
  319. }
  320. return 0;
  321. }
  322. /**
  323. * vmw_resources_validate - Validate all resources on the sw_context's
  324. * resource list.
  325. *
  326. * @sw_context: Pointer to the software context.
  327. *
  328. * Before this function is called, all resource backup buffers must have
  329. * been validated.
  330. */
  331. static int vmw_resources_validate(struct vmw_sw_context *sw_context)
  332. {
  333. struct vmw_resource_val_node *val;
  334. int ret;
  335. list_for_each_entry(val, &sw_context->resource_list, head) {
  336. struct vmw_resource *res = val->res;
  337. ret = vmw_resource_validate(res);
  338. if (unlikely(ret != 0)) {
  339. if (ret != -ERESTARTSYS)
  340. DRM_ERROR("Failed to validate resource.\n");
  341. return ret;
  342. }
  343. }
  344. return 0;
  345. }
  346. /**
  347. * vmw_cmd_compat_res_check - Check that a resource is present and if so, put it
  348. * on the resource validate list unless it's already there.
  349. *
  350. * @dev_priv: Pointer to a device private structure.
  351. * @sw_context: Pointer to the software context.
  352. * @res_type: Resource type.
  353. * @converter: User-space visisble type specific information.
  354. * @id: user-space resource id handle.
  355. * @id_loc: Pointer to the location in the command buffer currently being
  356. * parsed from where the user-space resource id handle is located.
  357. * @p_val: Pointer to pointer to resource validalidation node. Populated
  358. * on exit.
  359. */
  360. static int
  361. vmw_cmd_compat_res_check(struct vmw_private *dev_priv,
  362. struct vmw_sw_context *sw_context,
  363. enum vmw_res_type res_type,
  364. const struct vmw_user_resource_conv *converter,
  365. uint32_t id,
  366. uint32_t *id_loc,
  367. struct vmw_resource_val_node **p_val)
  368. {
  369. struct vmw_res_cache_entry *rcache =
  370. &sw_context->res_cache[res_type];
  371. struct vmw_resource *res;
  372. struct vmw_resource_val_node *node;
  373. int ret;
  374. if (id == SVGA3D_INVALID_ID) {
  375. if (p_val)
  376. *p_val = NULL;
  377. if (res_type == vmw_res_context) {
  378. DRM_ERROR("Illegal context invalid id.\n");
  379. return -EINVAL;
  380. }
  381. return 0;
  382. }
  383. /*
  384. * Fastpath in case of repeated commands referencing the same
  385. * resource
  386. */
  387. if (likely(rcache->valid && id == rcache->handle)) {
  388. const struct vmw_resource *res = rcache->res;
  389. rcache->node->first_usage = false;
  390. if (p_val)
  391. *p_val = rcache->node;
  392. return vmw_resource_relocation_add
  393. (&sw_context->res_relocations, res,
  394. id_loc - sw_context->buf_start);
  395. }
  396. ret = vmw_user_resource_lookup_handle(dev_priv,
  397. sw_context->fp->tfile,
  398. id,
  399. converter,
  400. &res);
  401. if (unlikely(ret != 0)) {
  402. DRM_ERROR("Could not find or use resource 0x%08x.\n",
  403. (unsigned) id);
  404. dump_stack();
  405. return ret;
  406. }
  407. rcache->valid = true;
  408. rcache->res = res;
  409. rcache->handle = id;
  410. ret = vmw_resource_relocation_add(&sw_context->res_relocations,
  411. res,
  412. id_loc - sw_context->buf_start);
  413. if (unlikely(ret != 0))
  414. goto out_no_reloc;
  415. ret = vmw_resource_val_add(sw_context, res, &node);
  416. if (unlikely(ret != 0))
  417. goto out_no_reloc;
  418. rcache->node = node;
  419. if (p_val)
  420. *p_val = node;
  421. if (node->first_usage && res_type == vmw_res_context) {
  422. node->staged_bindings =
  423. kzalloc(sizeof(*node->staged_bindings), GFP_KERNEL);
  424. if (node->staged_bindings == NULL) {
  425. DRM_ERROR("Failed to allocate context binding "
  426. "information.\n");
  427. goto out_no_reloc;
  428. }
  429. INIT_LIST_HEAD(&node->staged_bindings->list);
  430. }
  431. vmw_resource_unreference(&res);
  432. return 0;
  433. out_no_reloc:
  434. BUG_ON(sw_context->error_resource != NULL);
  435. sw_context->error_resource = res;
  436. return ret;
  437. }
  438. /**
  439. * vmw_cmd_res_check - Check that a resource is present and if so, put it
  440. * on the resource validate list unless it's already there.
  441. *
  442. * @dev_priv: Pointer to a device private structure.
  443. * @sw_context: Pointer to the software context.
  444. * @res_type: Resource type.
  445. * @converter: User-space visisble type specific information.
  446. * @id_loc: Pointer to the location in the command buffer currently being
  447. * parsed from where the user-space resource id handle is located.
  448. * @p_val: Pointer to pointer to resource validalidation node. Populated
  449. * on exit.
  450. */
  451. static int
  452. vmw_cmd_res_check(struct vmw_private *dev_priv,
  453. struct vmw_sw_context *sw_context,
  454. enum vmw_res_type res_type,
  455. const struct vmw_user_resource_conv *converter,
  456. uint32_t *id_loc,
  457. struct vmw_resource_val_node **p_val)
  458. {
  459. return vmw_cmd_compat_res_check(dev_priv, sw_context, res_type,
  460. converter, *id_loc, id_loc, p_val);
  461. }
  462. /**
  463. * vmw_cmd_cid_check - Check a command header for valid context information.
  464. *
  465. * @dev_priv: Pointer to a device private structure.
  466. * @sw_context: Pointer to the software context.
  467. * @header: A command header with an embedded user-space context handle.
  468. *
  469. * Convenience function: Call vmw_cmd_res_check with the user-space context
  470. * handle embedded in @header.
  471. */
  472. static int vmw_cmd_cid_check(struct vmw_private *dev_priv,
  473. struct vmw_sw_context *sw_context,
  474. SVGA3dCmdHeader *header)
  475. {
  476. struct vmw_cid_cmd {
  477. SVGA3dCmdHeader header;
  478. __le32 cid;
  479. } *cmd;
  480. cmd = container_of(header, struct vmw_cid_cmd, header);
  481. return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_context,
  482. user_context_converter, &cmd->cid, NULL);
  483. }
  484. static int vmw_cmd_set_render_target_check(struct vmw_private *dev_priv,
  485. struct vmw_sw_context *sw_context,
  486. SVGA3dCmdHeader *header)
  487. {
  488. struct vmw_sid_cmd {
  489. SVGA3dCmdHeader header;
  490. SVGA3dCmdSetRenderTarget body;
  491. } *cmd;
  492. struct vmw_resource_val_node *ctx_node;
  493. struct vmw_resource_val_node *res_node;
  494. int ret;
  495. cmd = container_of(header, struct vmw_sid_cmd, header);
  496. ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_context,
  497. user_context_converter, &cmd->body.cid,
  498. &ctx_node);
  499. if (unlikely(ret != 0))
  500. return ret;
  501. ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  502. user_surface_converter,
  503. &cmd->body.target.sid, &res_node);
  504. if (unlikely(ret != 0))
  505. return ret;
  506. if (dev_priv->has_mob) {
  507. struct vmw_ctx_bindinfo bi;
  508. bi.ctx = ctx_node->res;
  509. bi.res = res_node ? res_node->res : NULL;
  510. bi.bt = vmw_ctx_binding_rt;
  511. bi.i1.rt_type = cmd->body.type;
  512. return vmw_context_binding_add(ctx_node->staged_bindings, &bi);
  513. }
  514. return 0;
  515. }
  516. static int vmw_cmd_surface_copy_check(struct vmw_private *dev_priv,
  517. struct vmw_sw_context *sw_context,
  518. SVGA3dCmdHeader *header)
  519. {
  520. struct vmw_sid_cmd {
  521. SVGA3dCmdHeader header;
  522. SVGA3dCmdSurfaceCopy body;
  523. } *cmd;
  524. int ret;
  525. cmd = container_of(header, struct vmw_sid_cmd, header);
  526. ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  527. user_surface_converter,
  528. &cmd->body.src.sid, NULL);
  529. if (unlikely(ret != 0))
  530. return ret;
  531. return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  532. user_surface_converter,
  533. &cmd->body.dest.sid, NULL);
  534. }
  535. static int vmw_cmd_stretch_blt_check(struct vmw_private *dev_priv,
  536. struct vmw_sw_context *sw_context,
  537. SVGA3dCmdHeader *header)
  538. {
  539. struct vmw_sid_cmd {
  540. SVGA3dCmdHeader header;
  541. SVGA3dCmdSurfaceStretchBlt body;
  542. } *cmd;
  543. int ret;
  544. cmd = container_of(header, struct vmw_sid_cmd, header);
  545. ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  546. user_surface_converter,
  547. &cmd->body.src.sid, NULL);
  548. if (unlikely(ret != 0))
  549. return ret;
  550. return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  551. user_surface_converter,
  552. &cmd->body.dest.sid, NULL);
  553. }
  554. static int vmw_cmd_blt_surf_screen_check(struct vmw_private *dev_priv,
  555. struct vmw_sw_context *sw_context,
  556. SVGA3dCmdHeader *header)
  557. {
  558. struct vmw_sid_cmd {
  559. SVGA3dCmdHeader header;
  560. SVGA3dCmdBlitSurfaceToScreen body;
  561. } *cmd;
  562. cmd = container_of(header, struct vmw_sid_cmd, header);
  563. return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  564. user_surface_converter,
  565. &cmd->body.srcImage.sid, NULL);
  566. }
  567. static int vmw_cmd_present_check(struct vmw_private *dev_priv,
  568. struct vmw_sw_context *sw_context,
  569. SVGA3dCmdHeader *header)
  570. {
  571. struct vmw_sid_cmd {
  572. SVGA3dCmdHeader header;
  573. SVGA3dCmdPresent body;
  574. } *cmd;
  575. cmd = container_of(header, struct vmw_sid_cmd, header);
  576. return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  577. user_surface_converter, &cmd->body.sid,
  578. NULL);
  579. }
  580. /**
  581. * vmw_query_bo_switch_prepare - Prepare to switch pinned buffer for queries.
  582. *
  583. * @dev_priv: The device private structure.
  584. * @new_query_bo: The new buffer holding query results.
  585. * @sw_context: The software context used for this command submission.
  586. *
  587. * This function checks whether @new_query_bo is suitable for holding
  588. * query results, and if another buffer currently is pinned for query
  589. * results. If so, the function prepares the state of @sw_context for
  590. * switching pinned buffers after successful submission of the current
  591. * command batch.
  592. */
  593. static int vmw_query_bo_switch_prepare(struct vmw_private *dev_priv,
  594. struct ttm_buffer_object *new_query_bo,
  595. struct vmw_sw_context *sw_context)
  596. {
  597. struct vmw_res_cache_entry *ctx_entry =
  598. &sw_context->res_cache[vmw_res_context];
  599. int ret;
  600. BUG_ON(!ctx_entry->valid);
  601. sw_context->last_query_ctx = ctx_entry->res;
  602. if (unlikely(new_query_bo != sw_context->cur_query_bo)) {
  603. if (unlikely(new_query_bo->num_pages > 4)) {
  604. DRM_ERROR("Query buffer too large.\n");
  605. return -EINVAL;
  606. }
  607. if (unlikely(sw_context->cur_query_bo != NULL)) {
  608. sw_context->needs_post_query_barrier = true;
  609. ret = vmw_bo_to_validate_list(sw_context,
  610. sw_context->cur_query_bo,
  611. dev_priv->has_mob, NULL);
  612. if (unlikely(ret != 0))
  613. return ret;
  614. }
  615. sw_context->cur_query_bo = new_query_bo;
  616. ret = vmw_bo_to_validate_list(sw_context,
  617. dev_priv->dummy_query_bo,
  618. dev_priv->has_mob, NULL);
  619. if (unlikely(ret != 0))
  620. return ret;
  621. }
  622. return 0;
  623. }
  624. /**
  625. * vmw_query_bo_switch_commit - Finalize switching pinned query buffer
  626. *
  627. * @dev_priv: The device private structure.
  628. * @sw_context: The software context used for this command submission batch.
  629. *
  630. * This function will check if we're switching query buffers, and will then,
  631. * issue a dummy occlusion query wait used as a query barrier. When the fence
  632. * object following that query wait has signaled, we are sure that all
  633. * preceding queries have finished, and the old query buffer can be unpinned.
  634. * However, since both the new query buffer and the old one are fenced with
  635. * that fence, we can do an asynchronus unpin now, and be sure that the
  636. * old query buffer won't be moved until the fence has signaled.
  637. *
  638. * As mentioned above, both the new - and old query buffers need to be fenced
  639. * using a sequence emitted *after* calling this function.
  640. */
  641. static void vmw_query_bo_switch_commit(struct vmw_private *dev_priv,
  642. struct vmw_sw_context *sw_context)
  643. {
  644. /*
  645. * The validate list should still hold references to all
  646. * contexts here.
  647. */
  648. if (sw_context->needs_post_query_barrier) {
  649. struct vmw_res_cache_entry *ctx_entry =
  650. &sw_context->res_cache[vmw_res_context];
  651. struct vmw_resource *ctx;
  652. int ret;
  653. BUG_ON(!ctx_entry->valid);
  654. ctx = ctx_entry->res;
  655. ret = vmw_fifo_emit_dummy_query(dev_priv, ctx->id);
  656. if (unlikely(ret != 0))
  657. DRM_ERROR("Out of fifo space for dummy query.\n");
  658. }
  659. if (dev_priv->pinned_bo != sw_context->cur_query_bo) {
  660. if (dev_priv->pinned_bo) {
  661. vmw_bo_pin(dev_priv->pinned_bo, false);
  662. ttm_bo_unref(&dev_priv->pinned_bo);
  663. }
  664. if (!sw_context->needs_post_query_barrier) {
  665. vmw_bo_pin(sw_context->cur_query_bo, true);
  666. /*
  667. * We pin also the dummy_query_bo buffer so that we
  668. * don't need to validate it when emitting
  669. * dummy queries in context destroy paths.
  670. */
  671. vmw_bo_pin(dev_priv->dummy_query_bo, true);
  672. dev_priv->dummy_query_bo_pinned = true;
  673. BUG_ON(sw_context->last_query_ctx == NULL);
  674. dev_priv->query_cid = sw_context->last_query_ctx->id;
  675. dev_priv->query_cid_valid = true;
  676. dev_priv->pinned_bo =
  677. ttm_bo_reference(sw_context->cur_query_bo);
  678. }
  679. }
  680. }
  681. /**
  682. * vmw_translate_mob_pointer - Prepare to translate a user-space buffer
  683. * handle to a MOB id.
  684. *
  685. * @dev_priv: Pointer to a device private structure.
  686. * @sw_context: The software context used for this command batch validation.
  687. * @id: Pointer to the user-space handle to be translated.
  688. * @vmw_bo_p: Points to a location that, on successful return will carry
  689. * a reference-counted pointer to the DMA buffer identified by the
  690. * user-space handle in @id.
  691. *
  692. * This function saves information needed to translate a user-space buffer
  693. * handle to a MOB id. The translation does not take place immediately, but
  694. * during a call to vmw_apply_relocations(). This function builds a relocation
  695. * list and a list of buffers to validate. The former needs to be freed using
  696. * either vmw_apply_relocations() or vmw_free_relocations(). The latter
  697. * needs to be freed using vmw_clear_validations.
  698. */
  699. static int vmw_translate_mob_ptr(struct vmw_private *dev_priv,
  700. struct vmw_sw_context *sw_context,
  701. SVGAMobId *id,
  702. struct vmw_dma_buffer **vmw_bo_p)
  703. {
  704. struct vmw_dma_buffer *vmw_bo = NULL;
  705. struct ttm_buffer_object *bo;
  706. uint32_t handle = *id;
  707. struct vmw_relocation *reloc;
  708. int ret;
  709. ret = vmw_user_dmabuf_lookup(sw_context->fp->tfile, handle, &vmw_bo);
  710. if (unlikely(ret != 0)) {
  711. DRM_ERROR("Could not find or use MOB buffer.\n");
  712. return -EINVAL;
  713. }
  714. bo = &vmw_bo->base;
  715. if (unlikely(sw_context->cur_reloc >= VMWGFX_MAX_RELOCATIONS)) {
  716. DRM_ERROR("Max number relocations per submission"
  717. " exceeded\n");
  718. ret = -EINVAL;
  719. goto out_no_reloc;
  720. }
  721. reloc = &sw_context->relocs[sw_context->cur_reloc++];
  722. reloc->mob_loc = id;
  723. reloc->location = NULL;
  724. ret = vmw_bo_to_validate_list(sw_context, bo, true, &reloc->index);
  725. if (unlikely(ret != 0))
  726. goto out_no_reloc;
  727. *vmw_bo_p = vmw_bo;
  728. return 0;
  729. out_no_reloc:
  730. vmw_dmabuf_unreference(&vmw_bo);
  731. vmw_bo_p = NULL;
  732. return ret;
  733. }
  734. /**
  735. * vmw_translate_guest_pointer - Prepare to translate a user-space buffer
  736. * handle to a valid SVGAGuestPtr
  737. *
  738. * @dev_priv: Pointer to a device private structure.
  739. * @sw_context: The software context used for this command batch validation.
  740. * @ptr: Pointer to the user-space handle to be translated.
  741. * @vmw_bo_p: Points to a location that, on successful return will carry
  742. * a reference-counted pointer to the DMA buffer identified by the
  743. * user-space handle in @id.
  744. *
  745. * This function saves information needed to translate a user-space buffer
  746. * handle to a valid SVGAGuestPtr. The translation does not take place
  747. * immediately, but during a call to vmw_apply_relocations().
  748. * This function builds a relocation list and a list of buffers to validate.
  749. * The former needs to be freed using either vmw_apply_relocations() or
  750. * vmw_free_relocations(). The latter needs to be freed using
  751. * vmw_clear_validations.
  752. */
  753. static int vmw_translate_guest_ptr(struct vmw_private *dev_priv,
  754. struct vmw_sw_context *sw_context,
  755. SVGAGuestPtr *ptr,
  756. struct vmw_dma_buffer **vmw_bo_p)
  757. {
  758. struct vmw_dma_buffer *vmw_bo = NULL;
  759. struct ttm_buffer_object *bo;
  760. uint32_t handle = ptr->gmrId;
  761. struct vmw_relocation *reloc;
  762. int ret;
  763. ret = vmw_user_dmabuf_lookup(sw_context->fp->tfile, handle, &vmw_bo);
  764. if (unlikely(ret != 0)) {
  765. DRM_ERROR("Could not find or use GMR region.\n");
  766. return -EINVAL;
  767. }
  768. bo = &vmw_bo->base;
  769. if (unlikely(sw_context->cur_reloc >= VMWGFX_MAX_RELOCATIONS)) {
  770. DRM_ERROR("Max number relocations per submission"
  771. " exceeded\n");
  772. ret = -EINVAL;
  773. goto out_no_reloc;
  774. }
  775. reloc = &sw_context->relocs[sw_context->cur_reloc++];
  776. reloc->location = ptr;
  777. ret = vmw_bo_to_validate_list(sw_context, bo, false, &reloc->index);
  778. if (unlikely(ret != 0))
  779. goto out_no_reloc;
  780. *vmw_bo_p = vmw_bo;
  781. return 0;
  782. out_no_reloc:
  783. vmw_dmabuf_unreference(&vmw_bo);
  784. vmw_bo_p = NULL;
  785. return ret;
  786. }
  787. /**
  788. * vmw_cmd_begin_gb_query - validate a SVGA_3D_CMD_BEGIN_GB_QUERY command.
  789. *
  790. * @dev_priv: Pointer to a device private struct.
  791. * @sw_context: The software context used for this command submission.
  792. * @header: Pointer to the command header in the command stream.
  793. */
  794. static int vmw_cmd_begin_gb_query(struct vmw_private *dev_priv,
  795. struct vmw_sw_context *sw_context,
  796. SVGA3dCmdHeader *header)
  797. {
  798. struct vmw_begin_gb_query_cmd {
  799. SVGA3dCmdHeader header;
  800. SVGA3dCmdBeginGBQuery q;
  801. } *cmd;
  802. cmd = container_of(header, struct vmw_begin_gb_query_cmd,
  803. header);
  804. return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_context,
  805. user_context_converter, &cmd->q.cid,
  806. NULL);
  807. }
  808. /**
  809. * vmw_cmd_begin_query - validate a SVGA_3D_CMD_BEGIN_QUERY command.
  810. *
  811. * @dev_priv: Pointer to a device private struct.
  812. * @sw_context: The software context used for this command submission.
  813. * @header: Pointer to the command header in the command stream.
  814. */
  815. static int vmw_cmd_begin_query(struct vmw_private *dev_priv,
  816. struct vmw_sw_context *sw_context,
  817. SVGA3dCmdHeader *header)
  818. {
  819. struct vmw_begin_query_cmd {
  820. SVGA3dCmdHeader header;
  821. SVGA3dCmdBeginQuery q;
  822. } *cmd;
  823. cmd = container_of(header, struct vmw_begin_query_cmd,
  824. header);
  825. if (unlikely(dev_priv->has_mob)) {
  826. struct {
  827. SVGA3dCmdHeader header;
  828. SVGA3dCmdBeginGBQuery q;
  829. } gb_cmd;
  830. BUG_ON(sizeof(gb_cmd) != sizeof(*cmd));
  831. gb_cmd.header.id = SVGA_3D_CMD_BEGIN_GB_QUERY;
  832. gb_cmd.header.size = cmd->header.size;
  833. gb_cmd.q.cid = cmd->q.cid;
  834. gb_cmd.q.type = cmd->q.type;
  835. memcpy(cmd, &gb_cmd, sizeof(*cmd));
  836. return vmw_cmd_begin_gb_query(dev_priv, sw_context, header);
  837. }
  838. return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_context,
  839. user_context_converter, &cmd->q.cid,
  840. NULL);
  841. }
  842. /**
  843. * vmw_cmd_end_gb_query - validate a SVGA_3D_CMD_END_GB_QUERY command.
  844. *
  845. * @dev_priv: Pointer to a device private struct.
  846. * @sw_context: The software context used for this command submission.
  847. * @header: Pointer to the command header in the command stream.
  848. */
  849. static int vmw_cmd_end_gb_query(struct vmw_private *dev_priv,
  850. struct vmw_sw_context *sw_context,
  851. SVGA3dCmdHeader *header)
  852. {
  853. struct vmw_dma_buffer *vmw_bo;
  854. struct vmw_query_cmd {
  855. SVGA3dCmdHeader header;
  856. SVGA3dCmdEndGBQuery q;
  857. } *cmd;
  858. int ret;
  859. cmd = container_of(header, struct vmw_query_cmd, header);
  860. ret = vmw_cmd_cid_check(dev_priv, sw_context, header);
  861. if (unlikely(ret != 0))
  862. return ret;
  863. ret = vmw_translate_mob_ptr(dev_priv, sw_context,
  864. &cmd->q.mobid,
  865. &vmw_bo);
  866. if (unlikely(ret != 0))
  867. return ret;
  868. ret = vmw_query_bo_switch_prepare(dev_priv, &vmw_bo->base, sw_context);
  869. vmw_dmabuf_unreference(&vmw_bo);
  870. return ret;
  871. }
  872. /**
  873. * vmw_cmd_end_query - validate a SVGA_3D_CMD_END_QUERY command.
  874. *
  875. * @dev_priv: Pointer to a device private struct.
  876. * @sw_context: The software context used for this command submission.
  877. * @header: Pointer to the command header in the command stream.
  878. */
  879. static int vmw_cmd_end_query(struct vmw_private *dev_priv,
  880. struct vmw_sw_context *sw_context,
  881. SVGA3dCmdHeader *header)
  882. {
  883. struct vmw_dma_buffer *vmw_bo;
  884. struct vmw_query_cmd {
  885. SVGA3dCmdHeader header;
  886. SVGA3dCmdEndQuery q;
  887. } *cmd;
  888. int ret;
  889. cmd = container_of(header, struct vmw_query_cmd, header);
  890. if (dev_priv->has_mob) {
  891. struct {
  892. SVGA3dCmdHeader header;
  893. SVGA3dCmdEndGBQuery q;
  894. } gb_cmd;
  895. BUG_ON(sizeof(gb_cmd) != sizeof(*cmd));
  896. gb_cmd.header.id = SVGA_3D_CMD_END_GB_QUERY;
  897. gb_cmd.header.size = cmd->header.size;
  898. gb_cmd.q.cid = cmd->q.cid;
  899. gb_cmd.q.type = cmd->q.type;
  900. gb_cmd.q.mobid = cmd->q.guestResult.gmrId;
  901. gb_cmd.q.offset = cmd->q.guestResult.offset;
  902. memcpy(cmd, &gb_cmd, sizeof(*cmd));
  903. return vmw_cmd_end_gb_query(dev_priv, sw_context, header);
  904. }
  905. ret = vmw_cmd_cid_check(dev_priv, sw_context, header);
  906. if (unlikely(ret != 0))
  907. return ret;
  908. ret = vmw_translate_guest_ptr(dev_priv, sw_context,
  909. &cmd->q.guestResult,
  910. &vmw_bo);
  911. if (unlikely(ret != 0))
  912. return ret;
  913. ret = vmw_query_bo_switch_prepare(dev_priv, &vmw_bo->base, sw_context);
  914. vmw_dmabuf_unreference(&vmw_bo);
  915. return ret;
  916. }
  917. /**
  918. * vmw_cmd_wait_gb_query - validate a SVGA_3D_CMD_WAIT_GB_QUERY command.
  919. *
  920. * @dev_priv: Pointer to a device private struct.
  921. * @sw_context: The software context used for this command submission.
  922. * @header: Pointer to the command header in the command stream.
  923. */
  924. static int vmw_cmd_wait_gb_query(struct vmw_private *dev_priv,
  925. struct vmw_sw_context *sw_context,
  926. SVGA3dCmdHeader *header)
  927. {
  928. struct vmw_dma_buffer *vmw_bo;
  929. struct vmw_query_cmd {
  930. SVGA3dCmdHeader header;
  931. SVGA3dCmdWaitForGBQuery q;
  932. } *cmd;
  933. int ret;
  934. cmd = container_of(header, struct vmw_query_cmd, header);
  935. ret = vmw_cmd_cid_check(dev_priv, sw_context, header);
  936. if (unlikely(ret != 0))
  937. return ret;
  938. ret = vmw_translate_mob_ptr(dev_priv, sw_context,
  939. &cmd->q.mobid,
  940. &vmw_bo);
  941. if (unlikely(ret != 0))
  942. return ret;
  943. vmw_dmabuf_unreference(&vmw_bo);
  944. return 0;
  945. }
  946. /**
  947. * vmw_cmd_wait_query - validate a SVGA_3D_CMD_WAIT_QUERY command.
  948. *
  949. * @dev_priv: Pointer to a device private struct.
  950. * @sw_context: The software context used for this command submission.
  951. * @header: Pointer to the command header in the command stream.
  952. */
  953. static int vmw_cmd_wait_query(struct vmw_private *dev_priv,
  954. struct vmw_sw_context *sw_context,
  955. SVGA3dCmdHeader *header)
  956. {
  957. struct vmw_dma_buffer *vmw_bo;
  958. struct vmw_query_cmd {
  959. SVGA3dCmdHeader header;
  960. SVGA3dCmdWaitForQuery q;
  961. } *cmd;
  962. int ret;
  963. cmd = container_of(header, struct vmw_query_cmd, header);
  964. if (dev_priv->has_mob) {
  965. struct {
  966. SVGA3dCmdHeader header;
  967. SVGA3dCmdWaitForGBQuery q;
  968. } gb_cmd;
  969. BUG_ON(sizeof(gb_cmd) != sizeof(*cmd));
  970. gb_cmd.header.id = SVGA_3D_CMD_WAIT_FOR_GB_QUERY;
  971. gb_cmd.header.size = cmd->header.size;
  972. gb_cmd.q.cid = cmd->q.cid;
  973. gb_cmd.q.type = cmd->q.type;
  974. gb_cmd.q.mobid = cmd->q.guestResult.gmrId;
  975. gb_cmd.q.offset = cmd->q.guestResult.offset;
  976. memcpy(cmd, &gb_cmd, sizeof(*cmd));
  977. return vmw_cmd_wait_gb_query(dev_priv, sw_context, header);
  978. }
  979. ret = vmw_cmd_cid_check(dev_priv, sw_context, header);
  980. if (unlikely(ret != 0))
  981. return ret;
  982. ret = vmw_translate_guest_ptr(dev_priv, sw_context,
  983. &cmd->q.guestResult,
  984. &vmw_bo);
  985. if (unlikely(ret != 0))
  986. return ret;
  987. vmw_dmabuf_unreference(&vmw_bo);
  988. return 0;
  989. }
  990. static int vmw_cmd_dma(struct vmw_private *dev_priv,
  991. struct vmw_sw_context *sw_context,
  992. SVGA3dCmdHeader *header)
  993. {
  994. struct vmw_dma_buffer *vmw_bo = NULL;
  995. struct vmw_surface *srf = NULL;
  996. struct vmw_dma_cmd {
  997. SVGA3dCmdHeader header;
  998. SVGA3dCmdSurfaceDMA dma;
  999. } *cmd;
  1000. int ret;
  1001. cmd = container_of(header, struct vmw_dma_cmd, header);
  1002. ret = vmw_translate_guest_ptr(dev_priv, sw_context,
  1003. &cmd->dma.guest.ptr,
  1004. &vmw_bo);
  1005. if (unlikely(ret != 0))
  1006. return ret;
  1007. ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  1008. user_surface_converter, &cmd->dma.host.sid,
  1009. NULL);
  1010. if (unlikely(ret != 0)) {
  1011. if (unlikely(ret != -ERESTARTSYS))
  1012. DRM_ERROR("could not find surface for DMA.\n");
  1013. goto out_no_surface;
  1014. }
  1015. srf = vmw_res_to_srf(sw_context->res_cache[vmw_res_surface].res);
  1016. vmw_kms_cursor_snoop(srf, sw_context->fp->tfile, &vmw_bo->base,
  1017. header);
  1018. out_no_surface:
  1019. vmw_dmabuf_unreference(&vmw_bo);
  1020. return ret;
  1021. }
  1022. static int vmw_cmd_draw(struct vmw_private *dev_priv,
  1023. struct vmw_sw_context *sw_context,
  1024. SVGA3dCmdHeader *header)
  1025. {
  1026. struct vmw_draw_cmd {
  1027. SVGA3dCmdHeader header;
  1028. SVGA3dCmdDrawPrimitives body;
  1029. } *cmd;
  1030. SVGA3dVertexDecl *decl = (SVGA3dVertexDecl *)(
  1031. (unsigned long)header + sizeof(*cmd));
  1032. SVGA3dPrimitiveRange *range;
  1033. uint32_t i;
  1034. uint32_t maxnum;
  1035. int ret;
  1036. ret = vmw_cmd_cid_check(dev_priv, sw_context, header);
  1037. if (unlikely(ret != 0))
  1038. return ret;
  1039. cmd = container_of(header, struct vmw_draw_cmd, header);
  1040. maxnum = (header->size - sizeof(cmd->body)) / sizeof(*decl);
  1041. if (unlikely(cmd->body.numVertexDecls > maxnum)) {
  1042. DRM_ERROR("Illegal number of vertex declarations.\n");
  1043. return -EINVAL;
  1044. }
  1045. for (i = 0; i < cmd->body.numVertexDecls; ++i, ++decl) {
  1046. ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  1047. user_surface_converter,
  1048. &decl->array.surfaceId, NULL);
  1049. if (unlikely(ret != 0))
  1050. return ret;
  1051. }
  1052. maxnum = (header->size - sizeof(cmd->body) -
  1053. cmd->body.numVertexDecls * sizeof(*decl)) / sizeof(*range);
  1054. if (unlikely(cmd->body.numRanges > maxnum)) {
  1055. DRM_ERROR("Illegal number of index ranges.\n");
  1056. return -EINVAL;
  1057. }
  1058. range = (SVGA3dPrimitiveRange *) decl;
  1059. for (i = 0; i < cmd->body.numRanges; ++i, ++range) {
  1060. ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  1061. user_surface_converter,
  1062. &range->indexArray.surfaceId, NULL);
  1063. if (unlikely(ret != 0))
  1064. return ret;
  1065. }
  1066. return 0;
  1067. }
  1068. static int vmw_cmd_tex_state(struct vmw_private *dev_priv,
  1069. struct vmw_sw_context *sw_context,
  1070. SVGA3dCmdHeader *header)
  1071. {
  1072. struct vmw_tex_state_cmd {
  1073. SVGA3dCmdHeader header;
  1074. SVGA3dCmdSetTextureState state;
  1075. } *cmd;
  1076. SVGA3dTextureState *last_state = (SVGA3dTextureState *)
  1077. ((unsigned long) header + header->size + sizeof(header));
  1078. SVGA3dTextureState *cur_state = (SVGA3dTextureState *)
  1079. ((unsigned long) header + sizeof(struct vmw_tex_state_cmd));
  1080. struct vmw_resource_val_node *ctx_node;
  1081. struct vmw_resource_val_node *res_node;
  1082. int ret;
  1083. cmd = container_of(header, struct vmw_tex_state_cmd,
  1084. header);
  1085. ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_context,
  1086. user_context_converter, &cmd->state.cid,
  1087. &ctx_node);
  1088. if (unlikely(ret != 0))
  1089. return ret;
  1090. for (; cur_state < last_state; ++cur_state) {
  1091. if (likely(cur_state->name != SVGA3D_TS_BIND_TEXTURE))
  1092. continue;
  1093. ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  1094. user_surface_converter,
  1095. &cur_state->value, &res_node);
  1096. if (unlikely(ret != 0))
  1097. return ret;
  1098. if (dev_priv->has_mob) {
  1099. struct vmw_ctx_bindinfo bi;
  1100. bi.ctx = ctx_node->res;
  1101. bi.res = res_node ? res_node->res : NULL;
  1102. bi.bt = vmw_ctx_binding_tex;
  1103. bi.i1.texture_stage = cur_state->stage;
  1104. vmw_context_binding_add(ctx_node->staged_bindings,
  1105. &bi);
  1106. }
  1107. }
  1108. return 0;
  1109. }
  1110. static int vmw_cmd_check_define_gmrfb(struct vmw_private *dev_priv,
  1111. struct vmw_sw_context *sw_context,
  1112. void *buf)
  1113. {
  1114. struct vmw_dma_buffer *vmw_bo;
  1115. int ret;
  1116. struct {
  1117. uint32_t header;
  1118. SVGAFifoCmdDefineGMRFB body;
  1119. } *cmd = buf;
  1120. ret = vmw_translate_guest_ptr(dev_priv, sw_context,
  1121. &cmd->body.ptr,
  1122. &vmw_bo);
  1123. if (unlikely(ret != 0))
  1124. return ret;
  1125. vmw_dmabuf_unreference(&vmw_bo);
  1126. return ret;
  1127. }
  1128. /**
  1129. * vmw_cmd_switch_backup - Utility function to handle backup buffer switching
  1130. *
  1131. * @dev_priv: Pointer to a device private struct.
  1132. * @sw_context: The software context being used for this batch.
  1133. * @res_type: The resource type.
  1134. * @converter: Information about user-space binding for this resource type.
  1135. * @res_id: Pointer to the user-space resource handle in the command stream.
  1136. * @buf_id: Pointer to the user-space backup buffer handle in the command
  1137. * stream.
  1138. * @backup_offset: Offset of backup into MOB.
  1139. *
  1140. * This function prepares for registering a switch of backup buffers
  1141. * in the resource metadata just prior to unreserving.
  1142. */
  1143. static int vmw_cmd_switch_backup(struct vmw_private *dev_priv,
  1144. struct vmw_sw_context *sw_context,
  1145. enum vmw_res_type res_type,
  1146. const struct vmw_user_resource_conv
  1147. *converter,
  1148. uint32_t *res_id,
  1149. uint32_t *buf_id,
  1150. unsigned long backup_offset)
  1151. {
  1152. int ret;
  1153. struct vmw_dma_buffer *dma_buf;
  1154. struct vmw_resource_val_node *val_node;
  1155. ret = vmw_cmd_res_check(dev_priv, sw_context, res_type,
  1156. converter, res_id, &val_node);
  1157. if (unlikely(ret != 0))
  1158. return ret;
  1159. ret = vmw_translate_mob_ptr(dev_priv, sw_context, buf_id, &dma_buf);
  1160. if (unlikely(ret != 0))
  1161. return ret;
  1162. if (val_node->first_usage)
  1163. val_node->no_buffer_needed = true;
  1164. vmw_dmabuf_unreference(&val_node->new_backup);
  1165. val_node->new_backup = dma_buf;
  1166. val_node->new_backup_offset = backup_offset;
  1167. return 0;
  1168. }
  1169. /**
  1170. * vmw_cmd_bind_gb_surface - Validate an SVGA_3D_CMD_BIND_GB_SURFACE
  1171. * command
  1172. *
  1173. * @dev_priv: Pointer to a device private struct.
  1174. * @sw_context: The software context being used for this batch.
  1175. * @header: Pointer to the command header in the command stream.
  1176. */
  1177. static int vmw_cmd_bind_gb_surface(struct vmw_private *dev_priv,
  1178. struct vmw_sw_context *sw_context,
  1179. SVGA3dCmdHeader *header)
  1180. {
  1181. struct vmw_bind_gb_surface_cmd {
  1182. SVGA3dCmdHeader header;
  1183. SVGA3dCmdBindGBSurface body;
  1184. } *cmd;
  1185. cmd = container_of(header, struct vmw_bind_gb_surface_cmd, header);
  1186. return vmw_cmd_switch_backup(dev_priv, sw_context, vmw_res_surface,
  1187. user_surface_converter,
  1188. &cmd->body.sid, &cmd->body.mobid,
  1189. 0);
  1190. }
  1191. /**
  1192. * vmw_cmd_update_gb_image - Validate an SVGA_3D_CMD_UPDATE_GB_IMAGE
  1193. * command
  1194. *
  1195. * @dev_priv: Pointer to a device private struct.
  1196. * @sw_context: The software context being used for this batch.
  1197. * @header: Pointer to the command header in the command stream.
  1198. */
  1199. static int vmw_cmd_update_gb_image(struct vmw_private *dev_priv,
  1200. struct vmw_sw_context *sw_context,
  1201. SVGA3dCmdHeader *header)
  1202. {
  1203. struct vmw_gb_surface_cmd {
  1204. SVGA3dCmdHeader header;
  1205. SVGA3dCmdUpdateGBImage body;
  1206. } *cmd;
  1207. cmd = container_of(header, struct vmw_gb_surface_cmd, header);
  1208. return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  1209. user_surface_converter,
  1210. &cmd->body.image.sid, NULL);
  1211. }
  1212. /**
  1213. * vmw_cmd_update_gb_surface - Validate an SVGA_3D_CMD_UPDATE_GB_SURFACE
  1214. * command
  1215. *
  1216. * @dev_priv: Pointer to a device private struct.
  1217. * @sw_context: The software context being used for this batch.
  1218. * @header: Pointer to the command header in the command stream.
  1219. */
  1220. static int vmw_cmd_update_gb_surface(struct vmw_private *dev_priv,
  1221. struct vmw_sw_context *sw_context,
  1222. SVGA3dCmdHeader *header)
  1223. {
  1224. struct vmw_gb_surface_cmd {
  1225. SVGA3dCmdHeader header;
  1226. SVGA3dCmdUpdateGBSurface body;
  1227. } *cmd;
  1228. cmd = container_of(header, struct vmw_gb_surface_cmd, header);
  1229. return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  1230. user_surface_converter,
  1231. &cmd->body.sid, NULL);
  1232. }
  1233. /**
  1234. * vmw_cmd_readback_gb_image - Validate an SVGA_3D_CMD_READBACK_GB_IMAGE
  1235. * command
  1236. *
  1237. * @dev_priv: Pointer to a device private struct.
  1238. * @sw_context: The software context being used for this batch.
  1239. * @header: Pointer to the command header in the command stream.
  1240. */
  1241. static int vmw_cmd_readback_gb_image(struct vmw_private *dev_priv,
  1242. struct vmw_sw_context *sw_context,
  1243. SVGA3dCmdHeader *header)
  1244. {
  1245. struct vmw_gb_surface_cmd {
  1246. SVGA3dCmdHeader header;
  1247. SVGA3dCmdReadbackGBImage body;
  1248. } *cmd;
  1249. cmd = container_of(header, struct vmw_gb_surface_cmd, header);
  1250. return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  1251. user_surface_converter,
  1252. &cmd->body.image.sid, NULL);
  1253. }
  1254. /**
  1255. * vmw_cmd_readback_gb_surface - Validate an SVGA_3D_CMD_READBACK_GB_SURFACE
  1256. * command
  1257. *
  1258. * @dev_priv: Pointer to a device private struct.
  1259. * @sw_context: The software context being used for this batch.
  1260. * @header: Pointer to the command header in the command stream.
  1261. */
  1262. static int vmw_cmd_readback_gb_surface(struct vmw_private *dev_priv,
  1263. struct vmw_sw_context *sw_context,
  1264. SVGA3dCmdHeader *header)
  1265. {
  1266. struct vmw_gb_surface_cmd {
  1267. SVGA3dCmdHeader header;
  1268. SVGA3dCmdReadbackGBSurface body;
  1269. } *cmd;
  1270. cmd = container_of(header, struct vmw_gb_surface_cmd, header);
  1271. return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  1272. user_surface_converter,
  1273. &cmd->body.sid, NULL);
  1274. }
  1275. /**
  1276. * vmw_cmd_invalidate_gb_image - Validate an SVGA_3D_CMD_INVALIDATE_GB_IMAGE
  1277. * command
  1278. *
  1279. * @dev_priv: Pointer to a device private struct.
  1280. * @sw_context: The software context being used for this batch.
  1281. * @header: Pointer to the command header in the command stream.
  1282. */
  1283. static int vmw_cmd_invalidate_gb_image(struct vmw_private *dev_priv,
  1284. struct vmw_sw_context *sw_context,
  1285. SVGA3dCmdHeader *header)
  1286. {
  1287. struct vmw_gb_surface_cmd {
  1288. SVGA3dCmdHeader header;
  1289. SVGA3dCmdInvalidateGBImage body;
  1290. } *cmd;
  1291. cmd = container_of(header, struct vmw_gb_surface_cmd, header);
  1292. return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  1293. user_surface_converter,
  1294. &cmd->body.image.sid, NULL);
  1295. }
  1296. /**
  1297. * vmw_cmd_invalidate_gb_surface - Validate an
  1298. * SVGA_3D_CMD_INVALIDATE_GB_SURFACE command
  1299. *
  1300. * @dev_priv: Pointer to a device private struct.
  1301. * @sw_context: The software context being used for this batch.
  1302. * @header: Pointer to the command header in the command stream.
  1303. */
  1304. static int vmw_cmd_invalidate_gb_surface(struct vmw_private *dev_priv,
  1305. struct vmw_sw_context *sw_context,
  1306. SVGA3dCmdHeader *header)
  1307. {
  1308. struct vmw_gb_surface_cmd {
  1309. SVGA3dCmdHeader header;
  1310. SVGA3dCmdInvalidateGBSurface body;
  1311. } *cmd;
  1312. cmd = container_of(header, struct vmw_gb_surface_cmd, header);
  1313. return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  1314. user_surface_converter,
  1315. &cmd->body.sid, NULL);
  1316. }
  1317. /**
  1318. * vmw_cmd_shader_define - Validate an SVGA_3D_CMD_SHADER_DEFINE
  1319. * command
  1320. *
  1321. * @dev_priv: Pointer to a device private struct.
  1322. * @sw_context: The software context being used for this batch.
  1323. * @header: Pointer to the command header in the command stream.
  1324. */
  1325. static int vmw_cmd_shader_define(struct vmw_private *dev_priv,
  1326. struct vmw_sw_context *sw_context,
  1327. SVGA3dCmdHeader *header)
  1328. {
  1329. struct vmw_shader_define_cmd {
  1330. SVGA3dCmdHeader header;
  1331. SVGA3dCmdDefineShader body;
  1332. } *cmd;
  1333. int ret;
  1334. size_t size;
  1335. cmd = container_of(header, struct vmw_shader_define_cmd,
  1336. header);
  1337. ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_context,
  1338. user_context_converter, &cmd->body.cid,
  1339. NULL);
  1340. if (unlikely(ret != 0))
  1341. return ret;
  1342. if (unlikely(!dev_priv->has_mob))
  1343. return 0;
  1344. size = cmd->header.size - sizeof(cmd->body);
  1345. ret = vmw_compat_shader_add(sw_context->fp->shman,
  1346. cmd->body.shid, cmd + 1,
  1347. cmd->body.type, size,
  1348. sw_context->fp->tfile,
  1349. &sw_context->staged_shaders);
  1350. if (unlikely(ret != 0))
  1351. return ret;
  1352. return vmw_resource_relocation_add(&sw_context->res_relocations,
  1353. NULL, &cmd->header.id -
  1354. sw_context->buf_start);
  1355. return 0;
  1356. }
  1357. /**
  1358. * vmw_cmd_shader_destroy - Validate an SVGA_3D_CMD_SHADER_DESTROY
  1359. * command
  1360. *
  1361. * @dev_priv: Pointer to a device private struct.
  1362. * @sw_context: The software context being used for this batch.
  1363. * @header: Pointer to the command header in the command stream.
  1364. */
  1365. static int vmw_cmd_shader_destroy(struct vmw_private *dev_priv,
  1366. struct vmw_sw_context *sw_context,
  1367. SVGA3dCmdHeader *header)
  1368. {
  1369. struct vmw_shader_destroy_cmd {
  1370. SVGA3dCmdHeader header;
  1371. SVGA3dCmdDestroyShader body;
  1372. } *cmd;
  1373. int ret;
  1374. cmd = container_of(header, struct vmw_shader_destroy_cmd,
  1375. header);
  1376. ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_context,
  1377. user_context_converter, &cmd->body.cid,
  1378. NULL);
  1379. if (unlikely(ret != 0))
  1380. return ret;
  1381. if (unlikely(!dev_priv->has_mob))
  1382. return 0;
  1383. ret = vmw_compat_shader_remove(sw_context->fp->shman,
  1384. cmd->body.shid,
  1385. cmd->body.type,
  1386. &sw_context->staged_shaders);
  1387. if (unlikely(ret != 0))
  1388. return ret;
  1389. return vmw_resource_relocation_add(&sw_context->res_relocations,
  1390. NULL, &cmd->header.id -
  1391. sw_context->buf_start);
  1392. return 0;
  1393. }
  1394. /**
  1395. * vmw_cmd_set_shader - Validate an SVGA_3D_CMD_SET_SHADER
  1396. * command
  1397. *
  1398. * @dev_priv: Pointer to a device private struct.
  1399. * @sw_context: The software context being used for this batch.
  1400. * @header: Pointer to the command header in the command stream.
  1401. */
  1402. static int vmw_cmd_set_shader(struct vmw_private *dev_priv,
  1403. struct vmw_sw_context *sw_context,
  1404. SVGA3dCmdHeader *header)
  1405. {
  1406. struct vmw_set_shader_cmd {
  1407. SVGA3dCmdHeader header;
  1408. SVGA3dCmdSetShader body;
  1409. } *cmd;
  1410. struct vmw_resource_val_node *ctx_node;
  1411. int ret;
  1412. cmd = container_of(header, struct vmw_set_shader_cmd,
  1413. header);
  1414. ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_context,
  1415. user_context_converter, &cmd->body.cid,
  1416. &ctx_node);
  1417. if (unlikely(ret != 0))
  1418. return ret;
  1419. if (dev_priv->has_mob) {
  1420. struct vmw_ctx_bindinfo bi;
  1421. struct vmw_resource_val_node *res_node;
  1422. u32 shid = cmd->body.shid;
  1423. (void) vmw_compat_shader_lookup(sw_context->fp->shman,
  1424. cmd->body.type,
  1425. &shid);
  1426. ret = vmw_cmd_compat_res_check(dev_priv, sw_context,
  1427. vmw_res_shader,
  1428. user_shader_converter,
  1429. shid,
  1430. &cmd->body.shid, &res_node);
  1431. if (unlikely(ret != 0))
  1432. return ret;
  1433. bi.ctx = ctx_node->res;
  1434. bi.res = res_node ? res_node->res : NULL;
  1435. bi.bt = vmw_ctx_binding_shader;
  1436. bi.i1.shader_type = cmd->body.type;
  1437. return vmw_context_binding_add(ctx_node->staged_bindings, &bi);
  1438. }
  1439. return 0;
  1440. }
  1441. /**
  1442. * vmw_cmd_set_shader_const - Validate an SVGA_3D_CMD_SET_SHADER_CONST
  1443. * command
  1444. *
  1445. * @dev_priv: Pointer to a device private struct.
  1446. * @sw_context: The software context being used for this batch.
  1447. * @header: Pointer to the command header in the command stream.
  1448. */
  1449. static int vmw_cmd_set_shader_const(struct vmw_private *dev_priv,
  1450. struct vmw_sw_context *sw_context,
  1451. SVGA3dCmdHeader *header)
  1452. {
  1453. struct vmw_set_shader_const_cmd {
  1454. SVGA3dCmdHeader header;
  1455. SVGA3dCmdSetShaderConst body;
  1456. } *cmd;
  1457. int ret;
  1458. cmd = container_of(header, struct vmw_set_shader_const_cmd,
  1459. header);
  1460. ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_context,
  1461. user_context_converter, &cmd->body.cid,
  1462. NULL);
  1463. if (unlikely(ret != 0))
  1464. return ret;
  1465. if (dev_priv->has_mob)
  1466. header->id = SVGA_3D_CMD_SET_GB_SHADERCONSTS_INLINE;
  1467. return 0;
  1468. }
  1469. /**
  1470. * vmw_cmd_bind_gb_shader - Validate an SVGA_3D_CMD_BIND_GB_SHADER
  1471. * command
  1472. *
  1473. * @dev_priv: Pointer to a device private struct.
  1474. * @sw_context: The software context being used for this batch.
  1475. * @header: Pointer to the command header in the command stream.
  1476. */
  1477. static int vmw_cmd_bind_gb_shader(struct vmw_private *dev_priv,
  1478. struct vmw_sw_context *sw_context,
  1479. SVGA3dCmdHeader *header)
  1480. {
  1481. struct vmw_bind_gb_shader_cmd {
  1482. SVGA3dCmdHeader header;
  1483. SVGA3dCmdBindGBShader body;
  1484. } *cmd;
  1485. cmd = container_of(header, struct vmw_bind_gb_shader_cmd,
  1486. header);
  1487. return vmw_cmd_switch_backup(dev_priv, sw_context, vmw_res_shader,
  1488. user_shader_converter,
  1489. &cmd->body.shid, &cmd->body.mobid,
  1490. cmd->body.offsetInBytes);
  1491. }
  1492. static int vmw_cmd_check_not_3d(struct vmw_private *dev_priv,
  1493. struct vmw_sw_context *sw_context,
  1494. void *buf, uint32_t *size)
  1495. {
  1496. uint32_t size_remaining = *size;
  1497. uint32_t cmd_id;
  1498. cmd_id = le32_to_cpu(((uint32_t *)buf)[0]);
  1499. switch (cmd_id) {
  1500. case SVGA_CMD_UPDATE:
  1501. *size = sizeof(uint32_t) + sizeof(SVGAFifoCmdUpdate);
  1502. break;
  1503. case SVGA_CMD_DEFINE_GMRFB:
  1504. *size = sizeof(uint32_t) + sizeof(SVGAFifoCmdDefineGMRFB);
  1505. break;
  1506. case SVGA_CMD_BLIT_GMRFB_TO_SCREEN:
  1507. *size = sizeof(uint32_t) + sizeof(SVGAFifoCmdBlitGMRFBToScreen);
  1508. break;
  1509. case SVGA_CMD_BLIT_SCREEN_TO_GMRFB:
  1510. *size = sizeof(uint32_t) + sizeof(SVGAFifoCmdBlitGMRFBToScreen);
  1511. break;
  1512. default:
  1513. DRM_ERROR("Unsupported SVGA command: %u.\n", cmd_id);
  1514. return -EINVAL;
  1515. }
  1516. if (*size > size_remaining) {
  1517. DRM_ERROR("Invalid SVGA command (size mismatch):"
  1518. " %u.\n", cmd_id);
  1519. return -EINVAL;
  1520. }
  1521. if (unlikely(!sw_context->kernel)) {
  1522. DRM_ERROR("Kernel only SVGA command: %u.\n", cmd_id);
  1523. return -EPERM;
  1524. }
  1525. if (cmd_id == SVGA_CMD_DEFINE_GMRFB)
  1526. return vmw_cmd_check_define_gmrfb(dev_priv, sw_context, buf);
  1527. return 0;
  1528. }
  1529. static const struct vmw_cmd_entry const vmw_cmd_entries[SVGA_3D_CMD_MAX] = {
  1530. VMW_CMD_DEF(SVGA_3D_CMD_SURFACE_DEFINE, &vmw_cmd_invalid,
  1531. false, false, false),
  1532. VMW_CMD_DEF(SVGA_3D_CMD_SURFACE_DESTROY, &vmw_cmd_invalid,
  1533. false, false, false),
  1534. VMW_CMD_DEF(SVGA_3D_CMD_SURFACE_COPY, &vmw_cmd_surface_copy_check,
  1535. true, false, false),
  1536. VMW_CMD_DEF(SVGA_3D_CMD_SURFACE_STRETCHBLT, &vmw_cmd_stretch_blt_check,
  1537. true, false, false),
  1538. VMW_CMD_DEF(SVGA_3D_CMD_SURFACE_DMA, &vmw_cmd_dma,
  1539. true, false, false),
  1540. VMW_CMD_DEF(SVGA_3D_CMD_CONTEXT_DEFINE, &vmw_cmd_invalid,
  1541. false, false, false),
  1542. VMW_CMD_DEF(SVGA_3D_CMD_CONTEXT_DESTROY, &vmw_cmd_invalid,
  1543. false, false, false),
  1544. VMW_CMD_DEF(SVGA_3D_CMD_SETTRANSFORM, &vmw_cmd_cid_check,
  1545. true, false, false),
  1546. VMW_CMD_DEF(SVGA_3D_CMD_SETZRANGE, &vmw_cmd_cid_check,
  1547. true, false, false),
  1548. VMW_CMD_DEF(SVGA_3D_CMD_SETRENDERSTATE, &vmw_cmd_cid_check,
  1549. true, false, false),
  1550. VMW_CMD_DEF(SVGA_3D_CMD_SETRENDERTARGET,
  1551. &vmw_cmd_set_render_target_check, true, false, false),
  1552. VMW_CMD_DEF(SVGA_3D_CMD_SETTEXTURESTATE, &vmw_cmd_tex_state,
  1553. true, false, false),
  1554. VMW_CMD_DEF(SVGA_3D_CMD_SETMATERIAL, &vmw_cmd_cid_check,
  1555. true, false, false),
  1556. VMW_CMD_DEF(SVGA_3D_CMD_SETLIGHTDATA, &vmw_cmd_cid_check,
  1557. true, false, false),
  1558. VMW_CMD_DEF(SVGA_3D_CMD_SETLIGHTENABLED, &vmw_cmd_cid_check,
  1559. true, false, false),
  1560. VMW_CMD_DEF(SVGA_3D_CMD_SETVIEWPORT, &vmw_cmd_cid_check,
  1561. true, false, false),
  1562. VMW_CMD_DEF(SVGA_3D_CMD_SETCLIPPLANE, &vmw_cmd_cid_check,
  1563. true, false, false),
  1564. VMW_CMD_DEF(SVGA_3D_CMD_CLEAR, &vmw_cmd_cid_check,
  1565. true, false, false),
  1566. VMW_CMD_DEF(SVGA_3D_CMD_PRESENT, &vmw_cmd_present_check,
  1567. false, false, false),
  1568. VMW_CMD_DEF(SVGA_3D_CMD_SHADER_DEFINE, &vmw_cmd_shader_define,
  1569. true, false, false),
  1570. VMW_CMD_DEF(SVGA_3D_CMD_SHADER_DESTROY, &vmw_cmd_shader_destroy,
  1571. true, false, false),
  1572. VMW_CMD_DEF(SVGA_3D_CMD_SET_SHADER, &vmw_cmd_set_shader,
  1573. true, false, false),
  1574. VMW_CMD_DEF(SVGA_3D_CMD_SET_SHADER_CONST, &vmw_cmd_set_shader_const,
  1575. true, false, false),
  1576. VMW_CMD_DEF(SVGA_3D_CMD_DRAW_PRIMITIVES, &vmw_cmd_draw,
  1577. true, false, false),
  1578. VMW_CMD_DEF(SVGA_3D_CMD_SETSCISSORRECT, &vmw_cmd_cid_check,
  1579. true, false, false),
  1580. VMW_CMD_DEF(SVGA_3D_CMD_BEGIN_QUERY, &vmw_cmd_begin_query,
  1581. true, false, false),
  1582. VMW_CMD_DEF(SVGA_3D_CMD_END_QUERY, &vmw_cmd_end_query,
  1583. true, false, false),
  1584. VMW_CMD_DEF(SVGA_3D_CMD_WAIT_FOR_QUERY, &vmw_cmd_wait_query,
  1585. true, false, false),
  1586. VMW_CMD_DEF(SVGA_3D_CMD_PRESENT_READBACK, &vmw_cmd_ok,
  1587. true, false, false),
  1588. VMW_CMD_DEF(SVGA_3D_CMD_BLIT_SURFACE_TO_SCREEN,
  1589. &vmw_cmd_blt_surf_screen_check, false, false, false),
  1590. VMW_CMD_DEF(SVGA_3D_CMD_SURFACE_DEFINE_V2, &vmw_cmd_invalid,
  1591. false, false, false),
  1592. VMW_CMD_DEF(SVGA_3D_CMD_GENERATE_MIPMAPS, &vmw_cmd_invalid,
  1593. false, false, false),
  1594. VMW_CMD_DEF(SVGA_3D_CMD_ACTIVATE_SURFACE, &vmw_cmd_invalid,
  1595. false, false, false),
  1596. VMW_CMD_DEF(SVGA_3D_CMD_DEACTIVATE_SURFACE, &vmw_cmd_invalid,
  1597. false, false, false),
  1598. VMW_CMD_DEF(SVGA_3D_CMD_SCREEN_DMA, &vmw_cmd_invalid,
  1599. false, false, false),
  1600. VMW_CMD_DEF(SVGA_3D_CMD_SET_UNITY_SURFACE_COOKIE, &vmw_cmd_invalid,
  1601. false, false, false),
  1602. VMW_CMD_DEF(SVGA_3D_CMD_OPEN_CONTEXT_SURFACE, &vmw_cmd_invalid,
  1603. false, false, false),
  1604. VMW_CMD_DEF(SVGA_3D_CMD_LOGICOPS_BITBLT, &vmw_cmd_invalid,
  1605. false, false, false),
  1606. VMW_CMD_DEF(SVGA_3D_CMD_LOGICOPS_TRANSBLT, &vmw_cmd_invalid,
  1607. false, false, false),
  1608. VMW_CMD_DEF(SVGA_3D_CMD_LOGICOPS_STRETCHBLT, &vmw_cmd_invalid,
  1609. false, false, false),
  1610. VMW_CMD_DEF(SVGA_3D_CMD_LOGICOPS_COLORFILL, &vmw_cmd_invalid,
  1611. false, false, false),
  1612. VMW_CMD_DEF(SVGA_3D_CMD_LOGICOPS_ALPHABLEND, &vmw_cmd_invalid,
  1613. false, false, false),
  1614. VMW_CMD_DEF(SVGA_3D_CMD_LOGICOPS_CLEARTYPEBLEND, &vmw_cmd_invalid,
  1615. false, false, false),
  1616. VMW_CMD_DEF(SVGA_3D_CMD_SET_OTABLE_BASE, &vmw_cmd_invalid,
  1617. false, false, true),
  1618. VMW_CMD_DEF(SVGA_3D_CMD_READBACK_OTABLE, &vmw_cmd_invalid,
  1619. false, false, true),
  1620. VMW_CMD_DEF(SVGA_3D_CMD_DEFINE_GB_MOB, &vmw_cmd_invalid,
  1621. false, false, true),
  1622. VMW_CMD_DEF(SVGA_3D_CMD_DESTROY_GB_MOB, &vmw_cmd_invalid,
  1623. false, false, true),
  1624. VMW_CMD_DEF(SVGA_3D_CMD_REDEFINE_GB_MOB, &vmw_cmd_invalid,
  1625. false, false, true),
  1626. VMW_CMD_DEF(SVGA_3D_CMD_UPDATE_GB_MOB_MAPPING, &vmw_cmd_invalid,
  1627. false, false, true),
  1628. VMW_CMD_DEF(SVGA_3D_CMD_DEFINE_GB_SURFACE, &vmw_cmd_invalid,
  1629. false, false, true),
  1630. VMW_CMD_DEF(SVGA_3D_CMD_DESTROY_GB_SURFACE, &vmw_cmd_invalid,
  1631. false, false, true),
  1632. VMW_CMD_DEF(SVGA_3D_CMD_BIND_GB_SURFACE, &vmw_cmd_bind_gb_surface,
  1633. true, false, true),
  1634. VMW_CMD_DEF(SVGA_3D_CMD_COND_BIND_GB_SURFACE, &vmw_cmd_invalid,
  1635. false, false, true),
  1636. VMW_CMD_DEF(SVGA_3D_CMD_UPDATE_GB_IMAGE, &vmw_cmd_update_gb_image,
  1637. true, false, true),
  1638. VMW_CMD_DEF(SVGA_3D_CMD_UPDATE_GB_SURFACE,
  1639. &vmw_cmd_update_gb_surface, true, false, true),
  1640. VMW_CMD_DEF(SVGA_3D_CMD_READBACK_GB_IMAGE,
  1641. &vmw_cmd_readback_gb_image, true, false, true),
  1642. VMW_CMD_DEF(SVGA_3D_CMD_READBACK_GB_SURFACE,
  1643. &vmw_cmd_readback_gb_surface, true, false, true),
  1644. VMW_CMD_DEF(SVGA_3D_CMD_INVALIDATE_GB_IMAGE,
  1645. &vmw_cmd_invalidate_gb_image, true, false, true),
  1646. VMW_CMD_DEF(SVGA_3D_CMD_INVALIDATE_GB_SURFACE,
  1647. &vmw_cmd_invalidate_gb_surface, true, false, true),
  1648. VMW_CMD_DEF(SVGA_3D_CMD_DEFINE_GB_CONTEXT, &vmw_cmd_invalid,
  1649. false, false, true),
  1650. VMW_CMD_DEF(SVGA_3D_CMD_DESTROY_GB_CONTEXT, &vmw_cmd_invalid,
  1651. false, false, true),
  1652. VMW_CMD_DEF(SVGA_3D_CMD_BIND_GB_CONTEXT, &vmw_cmd_invalid,
  1653. false, false, true),
  1654. VMW_CMD_DEF(SVGA_3D_CMD_READBACK_GB_CONTEXT, &vmw_cmd_invalid,
  1655. false, false, true),
  1656. VMW_CMD_DEF(SVGA_3D_CMD_INVALIDATE_GB_CONTEXT, &vmw_cmd_invalid,
  1657. false, false, true),
  1658. VMW_CMD_DEF(SVGA_3D_CMD_DEFINE_GB_SHADER, &vmw_cmd_invalid,
  1659. false, false, true),
  1660. VMW_CMD_DEF(SVGA_3D_CMD_BIND_GB_SHADER, &vmw_cmd_bind_gb_shader,
  1661. true, false, true),
  1662. VMW_CMD_DEF(SVGA_3D_CMD_DESTROY_GB_SHADER, &vmw_cmd_invalid,
  1663. false, false, true),
  1664. VMW_CMD_DEF(SVGA_3D_CMD_SET_OTABLE_BASE64, &vmw_cmd_invalid,
  1665. false, false, false),
  1666. VMW_CMD_DEF(SVGA_3D_CMD_BEGIN_GB_QUERY, &vmw_cmd_begin_gb_query,
  1667. true, false, true),
  1668. VMW_CMD_DEF(SVGA_3D_CMD_END_GB_QUERY, &vmw_cmd_end_gb_query,
  1669. true, false, true),
  1670. VMW_CMD_DEF(SVGA_3D_CMD_WAIT_FOR_GB_QUERY, &vmw_cmd_wait_gb_query,
  1671. true, false, true),
  1672. VMW_CMD_DEF(SVGA_3D_CMD_NOP, &vmw_cmd_ok,
  1673. true, false, true),
  1674. VMW_CMD_DEF(SVGA_3D_CMD_ENABLE_GART, &vmw_cmd_invalid,
  1675. false, false, true),
  1676. VMW_CMD_DEF(SVGA_3D_CMD_DISABLE_GART, &vmw_cmd_invalid,
  1677. false, false, true),
  1678. VMW_CMD_DEF(SVGA_3D_CMD_MAP_MOB_INTO_GART, &vmw_cmd_invalid,
  1679. false, false, true),
  1680. VMW_CMD_DEF(SVGA_3D_CMD_UNMAP_GART_RANGE, &vmw_cmd_invalid,
  1681. false, false, true),
  1682. VMW_CMD_DEF(SVGA_3D_CMD_DEFINE_GB_SCREENTARGET, &vmw_cmd_invalid,
  1683. false, false, true),
  1684. VMW_CMD_DEF(SVGA_3D_CMD_DESTROY_GB_SCREENTARGET, &vmw_cmd_invalid,
  1685. false, false, true),
  1686. VMW_CMD_DEF(SVGA_3D_CMD_BIND_GB_SCREENTARGET, &vmw_cmd_invalid,
  1687. false, false, true),
  1688. VMW_CMD_DEF(SVGA_3D_CMD_UPDATE_GB_SCREENTARGET, &vmw_cmd_invalid,
  1689. false, false, true),
  1690. VMW_CMD_DEF(SVGA_3D_CMD_READBACK_GB_IMAGE_PARTIAL, &vmw_cmd_invalid,
  1691. false, false, true),
  1692. VMW_CMD_DEF(SVGA_3D_CMD_INVALIDATE_GB_IMAGE_PARTIAL, &vmw_cmd_invalid,
  1693. false, false, true),
  1694. VMW_CMD_DEF(SVGA_3D_CMD_SET_GB_SHADERCONSTS_INLINE, &vmw_cmd_cid_check,
  1695. true, false, true)
  1696. };
  1697. static int vmw_cmd_check(struct vmw_private *dev_priv,
  1698. struct vmw_sw_context *sw_context,
  1699. void *buf, uint32_t *size)
  1700. {
  1701. uint32_t cmd_id;
  1702. uint32_t size_remaining = *size;
  1703. SVGA3dCmdHeader *header = (SVGA3dCmdHeader *) buf;
  1704. int ret;
  1705. const struct vmw_cmd_entry *entry;
  1706. bool gb = dev_priv->capabilities & SVGA_CAP_GBOBJECTS;
  1707. cmd_id = le32_to_cpu(((uint32_t *)buf)[0]);
  1708. /* Handle any none 3D commands */
  1709. if (unlikely(cmd_id < SVGA_CMD_MAX))
  1710. return vmw_cmd_check_not_3d(dev_priv, sw_context, buf, size);
  1711. cmd_id = le32_to_cpu(header->id);
  1712. *size = le32_to_cpu(header->size) + sizeof(SVGA3dCmdHeader);
  1713. cmd_id -= SVGA_3D_CMD_BASE;
  1714. if (unlikely(*size > size_remaining))
  1715. goto out_invalid;
  1716. if (unlikely(cmd_id >= SVGA_3D_CMD_MAX - SVGA_3D_CMD_BASE))
  1717. goto out_invalid;
  1718. entry = &vmw_cmd_entries[cmd_id];
  1719. if (unlikely(!entry->user_allow && !sw_context->kernel))
  1720. goto out_privileged;
  1721. if (unlikely(entry->gb_disable && gb))
  1722. goto out_old;
  1723. if (unlikely(entry->gb_enable && !gb))
  1724. goto out_new;
  1725. ret = entry->func(dev_priv, sw_context, header);
  1726. if (unlikely(ret != 0))
  1727. goto out_invalid;
  1728. return 0;
  1729. out_invalid:
  1730. DRM_ERROR("Invalid SVGA3D command: %d\n",
  1731. cmd_id + SVGA_3D_CMD_BASE);
  1732. return -EINVAL;
  1733. out_privileged:
  1734. DRM_ERROR("Privileged SVGA3D command: %d\n",
  1735. cmd_id + SVGA_3D_CMD_BASE);
  1736. return -EPERM;
  1737. out_old:
  1738. DRM_ERROR("Deprecated (disallowed) SVGA3D command: %d\n",
  1739. cmd_id + SVGA_3D_CMD_BASE);
  1740. return -EINVAL;
  1741. out_new:
  1742. DRM_ERROR("SVGA3D command: %d not supported by virtual hardware.\n",
  1743. cmd_id + SVGA_3D_CMD_BASE);
  1744. return -EINVAL;
  1745. }
  1746. static int vmw_cmd_check_all(struct vmw_private *dev_priv,
  1747. struct vmw_sw_context *sw_context,
  1748. void *buf,
  1749. uint32_t size)
  1750. {
  1751. int32_t cur_size = size;
  1752. int ret;
  1753. sw_context->buf_start = buf;
  1754. while (cur_size > 0) {
  1755. size = cur_size;
  1756. ret = vmw_cmd_check(dev_priv, sw_context, buf, &size);
  1757. if (unlikely(ret != 0))
  1758. return ret;
  1759. buf = (void *)((unsigned long) buf + size);
  1760. cur_size -= size;
  1761. }
  1762. if (unlikely(cur_size != 0)) {
  1763. DRM_ERROR("Command verifier out of sync.\n");
  1764. return -EINVAL;
  1765. }
  1766. return 0;
  1767. }
  1768. static void vmw_free_relocations(struct vmw_sw_context *sw_context)
  1769. {
  1770. sw_context->cur_reloc = 0;
  1771. }
  1772. static void vmw_apply_relocations(struct vmw_sw_context *sw_context)
  1773. {
  1774. uint32_t i;
  1775. struct vmw_relocation *reloc;
  1776. struct ttm_validate_buffer *validate;
  1777. struct ttm_buffer_object *bo;
  1778. for (i = 0; i < sw_context->cur_reloc; ++i) {
  1779. reloc = &sw_context->relocs[i];
  1780. validate = &sw_context->val_bufs[reloc->index].base;
  1781. bo = validate->bo;
  1782. switch (bo->mem.mem_type) {
  1783. case TTM_PL_VRAM:
  1784. reloc->location->offset += bo->offset;
  1785. reloc->location->gmrId = SVGA_GMR_FRAMEBUFFER;
  1786. break;
  1787. case VMW_PL_GMR:
  1788. reloc->location->gmrId = bo->mem.start;
  1789. break;
  1790. case VMW_PL_MOB:
  1791. *reloc->mob_loc = bo->mem.start;
  1792. break;
  1793. default:
  1794. BUG();
  1795. }
  1796. }
  1797. vmw_free_relocations(sw_context);
  1798. }
  1799. /**
  1800. * vmw_resource_list_unrefererence - Free up a resource list and unreference
  1801. * all resources referenced by it.
  1802. *
  1803. * @list: The resource list.
  1804. */
  1805. static void vmw_resource_list_unreference(struct list_head *list)
  1806. {
  1807. struct vmw_resource_val_node *val, *val_next;
  1808. /*
  1809. * Drop references to resources held during command submission.
  1810. */
  1811. list_for_each_entry_safe(val, val_next, list, head) {
  1812. list_del_init(&val->head);
  1813. vmw_resource_unreference(&val->res);
  1814. if (unlikely(val->staged_bindings))
  1815. kfree(val->staged_bindings);
  1816. kfree(val);
  1817. }
  1818. }
  1819. static void vmw_clear_validations(struct vmw_sw_context *sw_context)
  1820. {
  1821. struct vmw_validate_buffer *entry, *next;
  1822. struct vmw_resource_val_node *val;
  1823. /*
  1824. * Drop references to DMA buffers held during command submission.
  1825. */
  1826. list_for_each_entry_safe(entry, next, &sw_context->validate_nodes,
  1827. base.head) {
  1828. list_del(&entry->base.head);
  1829. ttm_bo_unref(&entry->base.bo);
  1830. (void) drm_ht_remove_item(&sw_context->res_ht, &entry->hash);
  1831. sw_context->cur_val_buf--;
  1832. }
  1833. BUG_ON(sw_context->cur_val_buf != 0);
  1834. list_for_each_entry(val, &sw_context->resource_list, head)
  1835. (void) drm_ht_remove_item(&sw_context->res_ht, &val->hash);
  1836. }
  1837. static int vmw_validate_single_buffer(struct vmw_private *dev_priv,
  1838. struct ttm_buffer_object *bo,
  1839. bool validate_as_mob)
  1840. {
  1841. int ret;
  1842. /*
  1843. * Don't validate pinned buffers.
  1844. */
  1845. if (bo == dev_priv->pinned_bo ||
  1846. (bo == dev_priv->dummy_query_bo &&
  1847. dev_priv->dummy_query_bo_pinned))
  1848. return 0;
  1849. if (validate_as_mob)
  1850. return ttm_bo_validate(bo, &vmw_mob_placement, true, false);
  1851. /**
  1852. * Put BO in VRAM if there is space, otherwise as a GMR.
  1853. * If there is no space in VRAM and GMR ids are all used up,
  1854. * start evicting GMRs to make room. If the DMA buffer can't be
  1855. * used as a GMR, this will return -ENOMEM.
  1856. */
  1857. ret = ttm_bo_validate(bo, &vmw_vram_gmr_placement, true, false);
  1858. if (likely(ret == 0 || ret == -ERESTARTSYS))
  1859. return ret;
  1860. /**
  1861. * If that failed, try VRAM again, this time evicting
  1862. * previous contents.
  1863. */
  1864. DRM_INFO("Falling through to VRAM.\n");
  1865. ret = ttm_bo_validate(bo, &vmw_vram_placement, true, false);
  1866. return ret;
  1867. }
  1868. static int vmw_validate_buffers(struct vmw_private *dev_priv,
  1869. struct vmw_sw_context *sw_context)
  1870. {
  1871. struct vmw_validate_buffer *entry;
  1872. int ret;
  1873. list_for_each_entry(entry, &sw_context->validate_nodes, base.head) {
  1874. ret = vmw_validate_single_buffer(dev_priv, entry->base.bo,
  1875. entry->validate_as_mob);
  1876. if (unlikely(ret != 0))
  1877. return ret;
  1878. }
  1879. return 0;
  1880. }
  1881. static int vmw_resize_cmd_bounce(struct vmw_sw_context *sw_context,
  1882. uint32_t size)
  1883. {
  1884. if (likely(sw_context->cmd_bounce_size >= size))
  1885. return 0;
  1886. if (sw_context->cmd_bounce_size == 0)
  1887. sw_context->cmd_bounce_size = VMWGFX_CMD_BOUNCE_INIT_SIZE;
  1888. while (sw_context->cmd_bounce_size < size) {
  1889. sw_context->cmd_bounce_size =
  1890. PAGE_ALIGN(sw_context->cmd_bounce_size +
  1891. (sw_context->cmd_bounce_size >> 1));
  1892. }
  1893. if (sw_context->cmd_bounce != NULL)
  1894. vfree(sw_context->cmd_bounce);
  1895. sw_context->cmd_bounce = vmalloc(sw_context->cmd_bounce_size);
  1896. if (sw_context->cmd_bounce == NULL) {
  1897. DRM_ERROR("Failed to allocate command bounce buffer.\n");
  1898. sw_context->cmd_bounce_size = 0;
  1899. return -ENOMEM;
  1900. }
  1901. return 0;
  1902. }
  1903. /**
  1904. * vmw_execbuf_fence_commands - create and submit a command stream fence
  1905. *
  1906. * Creates a fence object and submits a command stream marker.
  1907. * If this fails for some reason, We sync the fifo and return NULL.
  1908. * It is then safe to fence buffers with a NULL pointer.
  1909. *
  1910. * If @p_handle is not NULL @file_priv must also not be NULL. Creates
  1911. * a userspace handle if @p_handle is not NULL, otherwise not.
  1912. */
  1913. int vmw_execbuf_fence_commands(struct drm_file *file_priv,
  1914. struct vmw_private *dev_priv,
  1915. struct vmw_fence_obj **p_fence,
  1916. uint32_t *p_handle)
  1917. {
  1918. uint32_t sequence;
  1919. int ret;
  1920. bool synced = false;
  1921. /* p_handle implies file_priv. */
  1922. BUG_ON(p_handle != NULL && file_priv == NULL);
  1923. ret = vmw_fifo_send_fence(dev_priv, &sequence);
  1924. if (unlikely(ret != 0)) {
  1925. DRM_ERROR("Fence submission error. Syncing.\n");
  1926. synced = true;
  1927. }
  1928. if (p_handle != NULL)
  1929. ret = vmw_user_fence_create(file_priv, dev_priv->fman,
  1930. sequence,
  1931. DRM_VMW_FENCE_FLAG_EXEC,
  1932. p_fence, p_handle);
  1933. else
  1934. ret = vmw_fence_create(dev_priv->fman, sequence,
  1935. DRM_VMW_FENCE_FLAG_EXEC,
  1936. p_fence);
  1937. if (unlikely(ret != 0 && !synced)) {
  1938. (void) vmw_fallback_wait(dev_priv, false, false,
  1939. sequence, false,
  1940. VMW_FENCE_WAIT_TIMEOUT);
  1941. *p_fence = NULL;
  1942. }
  1943. return 0;
  1944. }
  1945. /**
  1946. * vmw_execbuf_copy_fence_user - copy fence object information to
  1947. * user-space.
  1948. *
  1949. * @dev_priv: Pointer to a vmw_private struct.
  1950. * @vmw_fp: Pointer to the struct vmw_fpriv representing the calling file.
  1951. * @ret: Return value from fence object creation.
  1952. * @user_fence_rep: User space address of a struct drm_vmw_fence_rep to
  1953. * which the information should be copied.
  1954. * @fence: Pointer to the fenc object.
  1955. * @fence_handle: User-space fence handle.
  1956. *
  1957. * This function copies fence information to user-space. If copying fails,
  1958. * The user-space struct drm_vmw_fence_rep::error member is hopefully
  1959. * left untouched, and if it's preloaded with an -EFAULT by user-space,
  1960. * the error will hopefully be detected.
  1961. * Also if copying fails, user-space will be unable to signal the fence
  1962. * object so we wait for it immediately, and then unreference the
  1963. * user-space reference.
  1964. */
  1965. void
  1966. vmw_execbuf_copy_fence_user(struct vmw_private *dev_priv,
  1967. struct vmw_fpriv *vmw_fp,
  1968. int ret,
  1969. struct drm_vmw_fence_rep __user *user_fence_rep,
  1970. struct vmw_fence_obj *fence,
  1971. uint32_t fence_handle)
  1972. {
  1973. struct drm_vmw_fence_rep fence_rep;
  1974. if (user_fence_rep == NULL)
  1975. return;
  1976. memset(&fence_rep, 0, sizeof(fence_rep));
  1977. fence_rep.error = ret;
  1978. if (ret == 0) {
  1979. BUG_ON(fence == NULL);
  1980. fence_rep.handle = fence_handle;
  1981. fence_rep.seqno = fence->seqno;
  1982. vmw_update_seqno(dev_priv, &dev_priv->fifo);
  1983. fence_rep.passed_seqno = dev_priv->last_read_seqno;
  1984. }
  1985. /*
  1986. * copy_to_user errors will be detected by user space not
  1987. * seeing fence_rep::error filled in. Typically
  1988. * user-space would have pre-set that member to -EFAULT.
  1989. */
  1990. ret = copy_to_user(user_fence_rep, &fence_rep,
  1991. sizeof(fence_rep));
  1992. /*
  1993. * User-space lost the fence object. We need to sync
  1994. * and unreference the handle.
  1995. */
  1996. if (unlikely(ret != 0) && (fence_rep.error == 0)) {
  1997. ttm_ref_object_base_unref(vmw_fp->tfile,
  1998. fence_handle, TTM_REF_USAGE);
  1999. DRM_ERROR("Fence copy error. Syncing.\n");
  2000. (void) vmw_fence_obj_wait(fence, fence->signal_mask,
  2001. false, false,
  2002. VMW_FENCE_WAIT_TIMEOUT);
  2003. }
  2004. }
  2005. int vmw_execbuf_process(struct drm_file *file_priv,
  2006. struct vmw_private *dev_priv,
  2007. void __user *user_commands,
  2008. void *kernel_commands,
  2009. uint32_t command_size,
  2010. uint64_t throttle_us,
  2011. struct drm_vmw_fence_rep __user *user_fence_rep,
  2012. struct vmw_fence_obj **out_fence)
  2013. {
  2014. struct vmw_sw_context *sw_context = &dev_priv->ctx;
  2015. struct vmw_fence_obj *fence = NULL;
  2016. struct vmw_resource *error_resource;
  2017. struct list_head resource_list;
  2018. struct ww_acquire_ctx ticket;
  2019. uint32_t handle;
  2020. void *cmd;
  2021. int ret;
  2022. ret = mutex_lock_interruptible(&dev_priv->cmdbuf_mutex);
  2023. if (unlikely(ret != 0))
  2024. return -ERESTARTSYS;
  2025. if (kernel_commands == NULL) {
  2026. sw_context->kernel = false;
  2027. ret = vmw_resize_cmd_bounce(sw_context, command_size);
  2028. if (unlikely(ret != 0))
  2029. goto out_unlock;
  2030. ret = copy_from_user(sw_context->cmd_bounce,
  2031. user_commands, command_size);
  2032. if (unlikely(ret != 0)) {
  2033. ret = -EFAULT;
  2034. DRM_ERROR("Failed copying commands.\n");
  2035. goto out_unlock;
  2036. }
  2037. kernel_commands = sw_context->cmd_bounce;
  2038. } else
  2039. sw_context->kernel = true;
  2040. sw_context->fp = vmw_fpriv(file_priv);
  2041. sw_context->cur_reloc = 0;
  2042. sw_context->cur_val_buf = 0;
  2043. sw_context->fence_flags = 0;
  2044. INIT_LIST_HEAD(&sw_context->resource_list);
  2045. sw_context->cur_query_bo = dev_priv->pinned_bo;
  2046. sw_context->last_query_ctx = NULL;
  2047. sw_context->needs_post_query_barrier = false;
  2048. memset(sw_context->res_cache, 0, sizeof(sw_context->res_cache));
  2049. INIT_LIST_HEAD(&sw_context->validate_nodes);
  2050. INIT_LIST_HEAD(&sw_context->res_relocations);
  2051. if (!sw_context->res_ht_initialized) {
  2052. ret = drm_ht_create(&sw_context->res_ht, VMW_RES_HT_ORDER);
  2053. if (unlikely(ret != 0))
  2054. goto out_unlock;
  2055. sw_context->res_ht_initialized = true;
  2056. }
  2057. INIT_LIST_HEAD(&sw_context->staged_shaders);
  2058. INIT_LIST_HEAD(&resource_list);
  2059. ret = vmw_cmd_check_all(dev_priv, sw_context, kernel_commands,
  2060. command_size);
  2061. if (unlikely(ret != 0))
  2062. goto out_err_nores;
  2063. ret = vmw_resources_reserve(sw_context);
  2064. if (unlikely(ret != 0))
  2065. goto out_err_nores;
  2066. ret = ttm_eu_reserve_buffers(&ticket, &sw_context->validate_nodes);
  2067. if (unlikely(ret != 0))
  2068. goto out_err;
  2069. ret = vmw_validate_buffers(dev_priv, sw_context);
  2070. if (unlikely(ret != 0))
  2071. goto out_err;
  2072. ret = vmw_resources_validate(sw_context);
  2073. if (unlikely(ret != 0))
  2074. goto out_err;
  2075. if (throttle_us) {
  2076. ret = vmw_wait_lag(dev_priv, &dev_priv->fifo.marker_queue,
  2077. throttle_us);
  2078. if (unlikely(ret != 0))
  2079. goto out_err;
  2080. }
  2081. ret = mutex_lock_interruptible(&dev_priv->binding_mutex);
  2082. if (unlikely(ret != 0)) {
  2083. ret = -ERESTARTSYS;
  2084. goto out_err;
  2085. }
  2086. cmd = vmw_fifo_reserve(dev_priv, command_size);
  2087. if (unlikely(cmd == NULL)) {
  2088. DRM_ERROR("Failed reserving fifo space for commands.\n");
  2089. ret = -ENOMEM;
  2090. goto out_unlock_binding;
  2091. }
  2092. vmw_apply_relocations(sw_context);
  2093. memcpy(cmd, kernel_commands, command_size);
  2094. vmw_resource_relocations_apply(cmd, &sw_context->res_relocations);
  2095. vmw_resource_relocations_free(&sw_context->res_relocations);
  2096. vmw_fifo_commit(dev_priv, command_size);
  2097. vmw_query_bo_switch_commit(dev_priv, sw_context);
  2098. ret = vmw_execbuf_fence_commands(file_priv, dev_priv,
  2099. &fence,
  2100. (user_fence_rep) ? &handle : NULL);
  2101. /*
  2102. * This error is harmless, because if fence submission fails,
  2103. * vmw_fifo_send_fence will sync. The error will be propagated to
  2104. * user-space in @fence_rep
  2105. */
  2106. if (ret != 0)
  2107. DRM_ERROR("Fence submission error. Syncing.\n");
  2108. vmw_resource_list_unreserve(&sw_context->resource_list, false);
  2109. mutex_unlock(&dev_priv->binding_mutex);
  2110. ttm_eu_fence_buffer_objects(&ticket, &sw_context->validate_nodes,
  2111. (void *) fence);
  2112. if (unlikely(dev_priv->pinned_bo != NULL &&
  2113. !dev_priv->query_cid_valid))
  2114. __vmw_execbuf_release_pinned_bo(dev_priv, fence);
  2115. vmw_clear_validations(sw_context);
  2116. vmw_execbuf_copy_fence_user(dev_priv, vmw_fpriv(file_priv), ret,
  2117. user_fence_rep, fence, handle);
  2118. /* Don't unreference when handing fence out */
  2119. if (unlikely(out_fence != NULL)) {
  2120. *out_fence = fence;
  2121. fence = NULL;
  2122. } else if (likely(fence != NULL)) {
  2123. vmw_fence_obj_unreference(&fence);
  2124. }
  2125. list_splice_init(&sw_context->resource_list, &resource_list);
  2126. vmw_compat_shaders_commit(sw_context->fp->shman,
  2127. &sw_context->staged_shaders);
  2128. mutex_unlock(&dev_priv->cmdbuf_mutex);
  2129. /*
  2130. * Unreference resources outside of the cmdbuf_mutex to
  2131. * avoid deadlocks in resource destruction paths.
  2132. */
  2133. vmw_resource_list_unreference(&resource_list);
  2134. return 0;
  2135. out_unlock_binding:
  2136. mutex_unlock(&dev_priv->binding_mutex);
  2137. out_err:
  2138. ttm_eu_backoff_reservation(&ticket, &sw_context->validate_nodes);
  2139. out_err_nores:
  2140. vmw_resource_list_unreserve(&sw_context->resource_list, true);
  2141. vmw_resource_relocations_free(&sw_context->res_relocations);
  2142. vmw_free_relocations(sw_context);
  2143. vmw_clear_validations(sw_context);
  2144. if (unlikely(dev_priv->pinned_bo != NULL &&
  2145. !dev_priv->query_cid_valid))
  2146. __vmw_execbuf_release_pinned_bo(dev_priv, NULL);
  2147. out_unlock:
  2148. list_splice_init(&sw_context->resource_list, &resource_list);
  2149. error_resource = sw_context->error_resource;
  2150. sw_context->error_resource = NULL;
  2151. vmw_compat_shaders_revert(sw_context->fp->shman,
  2152. &sw_context->staged_shaders);
  2153. mutex_unlock(&dev_priv->cmdbuf_mutex);
  2154. /*
  2155. * Unreference resources outside of the cmdbuf_mutex to
  2156. * avoid deadlocks in resource destruction paths.
  2157. */
  2158. vmw_resource_list_unreference(&resource_list);
  2159. if (unlikely(error_resource != NULL))
  2160. vmw_resource_unreference(&error_resource);
  2161. return ret;
  2162. }
  2163. /**
  2164. * vmw_execbuf_unpin_panic - Idle the fifo and unpin the query buffer.
  2165. *
  2166. * @dev_priv: The device private structure.
  2167. *
  2168. * This function is called to idle the fifo and unpin the query buffer
  2169. * if the normal way to do this hits an error, which should typically be
  2170. * extremely rare.
  2171. */
  2172. static void vmw_execbuf_unpin_panic(struct vmw_private *dev_priv)
  2173. {
  2174. DRM_ERROR("Can't unpin query buffer. Trying to recover.\n");
  2175. (void) vmw_fallback_wait(dev_priv, false, true, 0, false, 10*HZ);
  2176. vmw_bo_pin(dev_priv->pinned_bo, false);
  2177. vmw_bo_pin(dev_priv->dummy_query_bo, false);
  2178. dev_priv->dummy_query_bo_pinned = false;
  2179. }
  2180. /**
  2181. * __vmw_execbuf_release_pinned_bo - Flush queries and unpin the pinned
  2182. * query bo.
  2183. *
  2184. * @dev_priv: The device private structure.
  2185. * @fence: If non-NULL should point to a struct vmw_fence_obj issued
  2186. * _after_ a query barrier that flushes all queries touching the current
  2187. * buffer pointed to by @dev_priv->pinned_bo
  2188. *
  2189. * This function should be used to unpin the pinned query bo, or
  2190. * as a query barrier when we need to make sure that all queries have
  2191. * finished before the next fifo command. (For example on hardware
  2192. * context destructions where the hardware may otherwise leak unfinished
  2193. * queries).
  2194. *
  2195. * This function does not return any failure codes, but make attempts
  2196. * to do safe unpinning in case of errors.
  2197. *
  2198. * The function will synchronize on the previous query barrier, and will
  2199. * thus not finish until that barrier has executed.
  2200. *
  2201. * the @dev_priv->cmdbuf_mutex needs to be held by the current thread
  2202. * before calling this function.
  2203. */
  2204. void __vmw_execbuf_release_pinned_bo(struct vmw_private *dev_priv,
  2205. struct vmw_fence_obj *fence)
  2206. {
  2207. int ret = 0;
  2208. struct list_head validate_list;
  2209. struct ttm_validate_buffer pinned_val, query_val;
  2210. struct vmw_fence_obj *lfence = NULL;
  2211. struct ww_acquire_ctx ticket;
  2212. if (dev_priv->pinned_bo == NULL)
  2213. goto out_unlock;
  2214. INIT_LIST_HEAD(&validate_list);
  2215. pinned_val.bo = ttm_bo_reference(dev_priv->pinned_bo);
  2216. list_add_tail(&pinned_val.head, &validate_list);
  2217. query_val.bo = ttm_bo_reference(dev_priv->dummy_query_bo);
  2218. list_add_tail(&query_val.head, &validate_list);
  2219. do {
  2220. ret = ttm_eu_reserve_buffers(&ticket, &validate_list);
  2221. } while (ret == -ERESTARTSYS);
  2222. if (unlikely(ret != 0)) {
  2223. vmw_execbuf_unpin_panic(dev_priv);
  2224. goto out_no_reserve;
  2225. }
  2226. if (dev_priv->query_cid_valid) {
  2227. BUG_ON(fence != NULL);
  2228. ret = vmw_fifo_emit_dummy_query(dev_priv, dev_priv->query_cid);
  2229. if (unlikely(ret != 0)) {
  2230. vmw_execbuf_unpin_panic(dev_priv);
  2231. goto out_no_emit;
  2232. }
  2233. dev_priv->query_cid_valid = false;
  2234. }
  2235. vmw_bo_pin(dev_priv->pinned_bo, false);
  2236. vmw_bo_pin(dev_priv->dummy_query_bo, false);
  2237. dev_priv->dummy_query_bo_pinned = false;
  2238. if (fence == NULL) {
  2239. (void) vmw_execbuf_fence_commands(NULL, dev_priv, &lfence,
  2240. NULL);
  2241. fence = lfence;
  2242. }
  2243. ttm_eu_fence_buffer_objects(&ticket, &validate_list, (void *) fence);
  2244. if (lfence != NULL)
  2245. vmw_fence_obj_unreference(&lfence);
  2246. ttm_bo_unref(&query_val.bo);
  2247. ttm_bo_unref(&pinned_val.bo);
  2248. ttm_bo_unref(&dev_priv->pinned_bo);
  2249. out_unlock:
  2250. return;
  2251. out_no_emit:
  2252. ttm_eu_backoff_reservation(&ticket, &validate_list);
  2253. out_no_reserve:
  2254. ttm_bo_unref(&query_val.bo);
  2255. ttm_bo_unref(&pinned_val.bo);
  2256. ttm_bo_unref(&dev_priv->pinned_bo);
  2257. }
  2258. /**
  2259. * vmw_execbuf_release_pinned_bo - Flush queries and unpin the pinned
  2260. * query bo.
  2261. *
  2262. * @dev_priv: The device private structure.
  2263. *
  2264. * This function should be used to unpin the pinned query bo, or
  2265. * as a query barrier when we need to make sure that all queries have
  2266. * finished before the next fifo command. (For example on hardware
  2267. * context destructions where the hardware may otherwise leak unfinished
  2268. * queries).
  2269. *
  2270. * This function does not return any failure codes, but make attempts
  2271. * to do safe unpinning in case of errors.
  2272. *
  2273. * The function will synchronize on the previous query barrier, and will
  2274. * thus not finish until that barrier has executed.
  2275. */
  2276. void vmw_execbuf_release_pinned_bo(struct vmw_private *dev_priv)
  2277. {
  2278. mutex_lock(&dev_priv->cmdbuf_mutex);
  2279. if (dev_priv->query_cid_valid)
  2280. __vmw_execbuf_release_pinned_bo(dev_priv, NULL);
  2281. mutex_unlock(&dev_priv->cmdbuf_mutex);
  2282. }
  2283. int vmw_execbuf_ioctl(struct drm_device *dev, void *data,
  2284. struct drm_file *file_priv)
  2285. {
  2286. struct vmw_private *dev_priv = vmw_priv(dev);
  2287. struct drm_vmw_execbuf_arg *arg = (struct drm_vmw_execbuf_arg *)data;
  2288. struct vmw_master *vmaster = vmw_master(file_priv->master);
  2289. int ret;
  2290. /*
  2291. * This will allow us to extend the ioctl argument while
  2292. * maintaining backwards compatibility:
  2293. * We take different code paths depending on the value of
  2294. * arg->version.
  2295. */
  2296. if (unlikely(arg->version != DRM_VMW_EXECBUF_VERSION)) {
  2297. DRM_ERROR("Incorrect execbuf version.\n");
  2298. DRM_ERROR("You're running outdated experimental "
  2299. "vmwgfx user-space drivers.");
  2300. return -EINVAL;
  2301. }
  2302. ret = ttm_read_lock(&vmaster->lock, true);
  2303. if (unlikely(ret != 0))
  2304. return ret;
  2305. ret = vmw_execbuf_process(file_priv, dev_priv,
  2306. (void __user *)(unsigned long)arg->commands,
  2307. NULL, arg->command_size, arg->throttle_us,
  2308. (void __user *)(unsigned long)arg->fence_rep,
  2309. NULL);
  2310. if (unlikely(ret != 0))
  2311. goto out_unlock;
  2312. vmw_kms_cursor_post_execbuf(dev_priv);
  2313. out_unlock:
  2314. ttm_read_unlock(&vmaster->lock);
  2315. return ret;
  2316. }