rt5670.c 87 KB

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  1. /*
  2. * rt5670.c -- RT5670 ALSA SoC audio codec driver
  3. *
  4. * Copyright 2014 Realtek Semiconductor Corp.
  5. * Author: Bard Liao <bardliao@realtek.com>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. */
  11. #include <linux/module.h>
  12. #include <linux/moduleparam.h>
  13. #include <linux/init.h>
  14. #include <linux/delay.h>
  15. #include <linux/pm.h>
  16. #include <linux/pm_runtime.h>
  17. #include <linux/i2c.h>
  18. #include <linux/platform_device.h>
  19. #include <linux/acpi.h>
  20. #include <linux/spi/spi.h>
  21. #include <linux/dmi.h>
  22. #include <sound/core.h>
  23. #include <sound/pcm.h>
  24. #include <sound/pcm_params.h>
  25. #include <sound/jack.h>
  26. #include <sound/soc.h>
  27. #include <sound/soc-dapm.h>
  28. #include <sound/initval.h>
  29. #include <sound/tlv.h>
  30. #include <sound/rt5670.h>
  31. #include "rl6231.h"
  32. #include "rt5670.h"
  33. #include "rt5670-dsp.h"
  34. #define RT5670_DEVICE_ID 0x6271
  35. #define RT5670_PR_RANGE_BASE (0xff + 1)
  36. #define RT5670_PR_SPACING 0x100
  37. #define RT5670_PR_BASE (RT5670_PR_RANGE_BASE + (0 * RT5670_PR_SPACING))
  38. static const struct regmap_range_cfg rt5670_ranges[] = {
  39. { .name = "PR", .range_min = RT5670_PR_BASE,
  40. .range_max = RT5670_PR_BASE + 0xf8,
  41. .selector_reg = RT5670_PRIV_INDEX,
  42. .selector_mask = 0xff,
  43. .selector_shift = 0x0,
  44. .window_start = RT5670_PRIV_DATA,
  45. .window_len = 0x1, },
  46. };
  47. static struct reg_default init_list[] = {
  48. { RT5670_PR_BASE + 0x14, 0x9a8a },
  49. { RT5670_PR_BASE + 0x38, 0x3ba1 },
  50. { RT5670_PR_BASE + 0x3d, 0x3640 },
  51. };
  52. #define RT5670_INIT_REG_LEN ARRAY_SIZE(init_list)
  53. static const struct reg_default rt5670_reg[] = {
  54. { 0x00, 0x0000 },
  55. { 0x02, 0x8888 },
  56. { 0x03, 0x8888 },
  57. { 0x0a, 0x0001 },
  58. { 0x0b, 0x0827 },
  59. { 0x0c, 0x0000 },
  60. { 0x0d, 0x0008 },
  61. { 0x0e, 0x0000 },
  62. { 0x0f, 0x0808 },
  63. { 0x19, 0xafaf },
  64. { 0x1a, 0xafaf },
  65. { 0x1b, 0x0011 },
  66. { 0x1c, 0x2f2f },
  67. { 0x1d, 0x2f2f },
  68. { 0x1e, 0x0000 },
  69. { 0x1f, 0x2f2f },
  70. { 0x20, 0x0000 },
  71. { 0x26, 0x7860 },
  72. { 0x27, 0x7860 },
  73. { 0x28, 0x7871 },
  74. { 0x29, 0x8080 },
  75. { 0x2a, 0x5656 },
  76. { 0x2b, 0x5454 },
  77. { 0x2c, 0xaaa0 },
  78. { 0x2d, 0x0000 },
  79. { 0x2e, 0x2f2f },
  80. { 0x2f, 0x1002 },
  81. { 0x30, 0x0000 },
  82. { 0x31, 0x5f00 },
  83. { 0x32, 0x0000 },
  84. { 0x33, 0x0000 },
  85. { 0x34, 0x0000 },
  86. { 0x35, 0x0000 },
  87. { 0x36, 0x0000 },
  88. { 0x37, 0x0000 },
  89. { 0x38, 0x0000 },
  90. { 0x3b, 0x0000 },
  91. { 0x3c, 0x007f },
  92. { 0x3d, 0x0000 },
  93. { 0x3e, 0x007f },
  94. { 0x45, 0xe00f },
  95. { 0x4c, 0x5380 },
  96. { 0x4f, 0x0073 },
  97. { 0x52, 0x00d3 },
  98. { 0x53, 0xf000 },
  99. { 0x61, 0x0000 },
  100. { 0x62, 0x0001 },
  101. { 0x63, 0x00c3 },
  102. { 0x64, 0x0000 },
  103. { 0x65, 0x0001 },
  104. { 0x66, 0x0000 },
  105. { 0x6f, 0x8000 },
  106. { 0x70, 0x8000 },
  107. { 0x71, 0x8000 },
  108. { 0x72, 0x8000 },
  109. { 0x73, 0x7770 },
  110. { 0x74, 0x0e00 },
  111. { 0x75, 0x1505 },
  112. { 0x76, 0x0015 },
  113. { 0x77, 0x0c00 },
  114. { 0x78, 0x4000 },
  115. { 0x79, 0x0123 },
  116. { 0x7f, 0x1100 },
  117. { 0x80, 0x0000 },
  118. { 0x81, 0x0000 },
  119. { 0x82, 0x0000 },
  120. { 0x83, 0x0000 },
  121. { 0x84, 0x0000 },
  122. { 0x85, 0x0000 },
  123. { 0x86, 0x0004 },
  124. { 0x87, 0x0000 },
  125. { 0x88, 0x0000 },
  126. { 0x89, 0x0000 },
  127. { 0x8a, 0x0000 },
  128. { 0x8b, 0x0000 },
  129. { 0x8c, 0x0003 },
  130. { 0x8d, 0x0000 },
  131. { 0x8e, 0x0004 },
  132. { 0x8f, 0x1100 },
  133. { 0x90, 0x0646 },
  134. { 0x91, 0x0c06 },
  135. { 0x93, 0x0000 },
  136. { 0x94, 0x1270 },
  137. { 0x95, 0x1000 },
  138. { 0x97, 0x0000 },
  139. { 0x98, 0x0000 },
  140. { 0x99, 0x0000 },
  141. { 0x9a, 0x2184 },
  142. { 0x9b, 0x010a },
  143. { 0x9c, 0x0aea },
  144. { 0x9d, 0x000c },
  145. { 0x9e, 0x0400 },
  146. { 0xae, 0x7000 },
  147. { 0xaf, 0x0000 },
  148. { 0xb0, 0x7000 },
  149. { 0xb1, 0x0000 },
  150. { 0xb2, 0x0000 },
  151. { 0xb3, 0x001f },
  152. { 0xb4, 0x220c },
  153. { 0xb5, 0x1f00 },
  154. { 0xb6, 0x0000 },
  155. { 0xb7, 0x0000 },
  156. { 0xbb, 0x0000 },
  157. { 0xbc, 0x0000 },
  158. { 0xbd, 0x0000 },
  159. { 0xbe, 0x0000 },
  160. { 0xbf, 0x0000 },
  161. { 0xc0, 0x0000 },
  162. { 0xc1, 0x0000 },
  163. { 0xc2, 0x0000 },
  164. { 0xcd, 0x0000 },
  165. { 0xce, 0x0000 },
  166. { 0xcf, 0x1813 },
  167. { 0xd0, 0x0690 },
  168. { 0xd1, 0x1c17 },
  169. { 0xd3, 0xa220 },
  170. { 0xd4, 0x0000 },
  171. { 0xd6, 0x0400 },
  172. { 0xd9, 0x0809 },
  173. { 0xda, 0x0000 },
  174. { 0xdb, 0x0001 },
  175. { 0xdc, 0x0049 },
  176. { 0xdd, 0x0024 },
  177. { 0xe6, 0x8000 },
  178. { 0xe7, 0x0000 },
  179. { 0xec, 0xa200 },
  180. { 0xed, 0x0000 },
  181. { 0xee, 0xa200 },
  182. { 0xef, 0x0000 },
  183. { 0xf8, 0x0000 },
  184. { 0xf9, 0x0000 },
  185. { 0xfa, 0x8010 },
  186. { 0xfb, 0x0033 },
  187. { 0xfc, 0x0100 },
  188. };
  189. static bool rt5670_volatile_register(struct device *dev, unsigned int reg)
  190. {
  191. int i;
  192. for (i = 0; i < ARRAY_SIZE(rt5670_ranges); i++) {
  193. if ((reg >= rt5670_ranges[i].window_start &&
  194. reg <= rt5670_ranges[i].window_start +
  195. rt5670_ranges[i].window_len) ||
  196. (reg >= rt5670_ranges[i].range_min &&
  197. reg <= rt5670_ranges[i].range_max)) {
  198. return true;
  199. }
  200. }
  201. switch (reg) {
  202. case RT5670_RESET:
  203. case RT5670_PDM_DATA_CTRL1:
  204. case RT5670_PDM1_DATA_CTRL4:
  205. case RT5670_PDM2_DATA_CTRL4:
  206. case RT5670_PRIV_DATA:
  207. case RT5670_ASRC_5:
  208. case RT5670_CJ_CTRL1:
  209. case RT5670_CJ_CTRL2:
  210. case RT5670_CJ_CTRL3:
  211. case RT5670_A_JD_CTRL1:
  212. case RT5670_A_JD_CTRL2:
  213. case RT5670_VAD_CTRL5:
  214. case RT5670_ADC_EQ_CTRL1:
  215. case RT5670_EQ_CTRL1:
  216. case RT5670_ALC_CTRL_1:
  217. case RT5670_IRQ_CTRL1:
  218. case RT5670_IRQ_CTRL2:
  219. case RT5670_INT_IRQ_ST:
  220. case RT5670_IL_CMD:
  221. case RT5670_DSP_CTRL1:
  222. case RT5670_DSP_CTRL2:
  223. case RT5670_DSP_CTRL3:
  224. case RT5670_DSP_CTRL4:
  225. case RT5670_DSP_CTRL5:
  226. case RT5670_VENDOR_ID:
  227. case RT5670_VENDOR_ID1:
  228. case RT5670_VENDOR_ID2:
  229. return true;
  230. default:
  231. return false;
  232. }
  233. }
  234. static bool rt5670_readable_register(struct device *dev, unsigned int reg)
  235. {
  236. int i;
  237. for (i = 0; i < ARRAY_SIZE(rt5670_ranges); i++) {
  238. if ((reg >= rt5670_ranges[i].window_start &&
  239. reg <= rt5670_ranges[i].window_start +
  240. rt5670_ranges[i].window_len) ||
  241. (reg >= rt5670_ranges[i].range_min &&
  242. reg <= rt5670_ranges[i].range_max)) {
  243. return true;
  244. }
  245. }
  246. switch (reg) {
  247. case RT5670_RESET:
  248. case RT5670_HP_VOL:
  249. case RT5670_LOUT1:
  250. case RT5670_CJ_CTRL1:
  251. case RT5670_CJ_CTRL2:
  252. case RT5670_CJ_CTRL3:
  253. case RT5670_IN2:
  254. case RT5670_INL1_INR1_VOL:
  255. case RT5670_DAC1_DIG_VOL:
  256. case RT5670_DAC2_DIG_VOL:
  257. case RT5670_DAC_CTRL:
  258. case RT5670_STO1_ADC_DIG_VOL:
  259. case RT5670_MONO_ADC_DIG_VOL:
  260. case RT5670_STO2_ADC_DIG_VOL:
  261. case RT5670_ADC_BST_VOL1:
  262. case RT5670_ADC_BST_VOL2:
  263. case RT5670_STO2_ADC_MIXER:
  264. case RT5670_STO1_ADC_MIXER:
  265. case RT5670_MONO_ADC_MIXER:
  266. case RT5670_AD_DA_MIXER:
  267. case RT5670_STO_DAC_MIXER:
  268. case RT5670_DD_MIXER:
  269. case RT5670_DIG_MIXER:
  270. case RT5670_DSP_PATH1:
  271. case RT5670_DSP_PATH2:
  272. case RT5670_DIG_INF1_DATA:
  273. case RT5670_DIG_INF2_DATA:
  274. case RT5670_PDM_OUT_CTRL:
  275. case RT5670_PDM_DATA_CTRL1:
  276. case RT5670_PDM1_DATA_CTRL2:
  277. case RT5670_PDM1_DATA_CTRL3:
  278. case RT5670_PDM1_DATA_CTRL4:
  279. case RT5670_PDM2_DATA_CTRL2:
  280. case RT5670_PDM2_DATA_CTRL3:
  281. case RT5670_PDM2_DATA_CTRL4:
  282. case RT5670_REC_L1_MIXER:
  283. case RT5670_REC_L2_MIXER:
  284. case RT5670_REC_R1_MIXER:
  285. case RT5670_REC_R2_MIXER:
  286. case RT5670_HPO_MIXER:
  287. case RT5670_MONO_MIXER:
  288. case RT5670_OUT_L1_MIXER:
  289. case RT5670_OUT_R1_MIXER:
  290. case RT5670_LOUT_MIXER:
  291. case RT5670_PWR_DIG1:
  292. case RT5670_PWR_DIG2:
  293. case RT5670_PWR_ANLG1:
  294. case RT5670_PWR_ANLG2:
  295. case RT5670_PWR_MIXER:
  296. case RT5670_PWR_VOL:
  297. case RT5670_PRIV_INDEX:
  298. case RT5670_PRIV_DATA:
  299. case RT5670_I2S4_SDP:
  300. case RT5670_I2S1_SDP:
  301. case RT5670_I2S2_SDP:
  302. case RT5670_I2S3_SDP:
  303. case RT5670_ADDA_CLK1:
  304. case RT5670_ADDA_CLK2:
  305. case RT5670_DMIC_CTRL1:
  306. case RT5670_DMIC_CTRL2:
  307. case RT5670_TDM_CTRL_1:
  308. case RT5670_TDM_CTRL_2:
  309. case RT5670_TDM_CTRL_3:
  310. case RT5670_DSP_CLK:
  311. case RT5670_GLB_CLK:
  312. case RT5670_PLL_CTRL1:
  313. case RT5670_PLL_CTRL2:
  314. case RT5670_ASRC_1:
  315. case RT5670_ASRC_2:
  316. case RT5670_ASRC_3:
  317. case RT5670_ASRC_4:
  318. case RT5670_ASRC_5:
  319. case RT5670_ASRC_7:
  320. case RT5670_ASRC_8:
  321. case RT5670_ASRC_9:
  322. case RT5670_ASRC_10:
  323. case RT5670_ASRC_11:
  324. case RT5670_ASRC_12:
  325. case RT5670_ASRC_13:
  326. case RT5670_ASRC_14:
  327. case RT5670_DEPOP_M1:
  328. case RT5670_DEPOP_M2:
  329. case RT5670_DEPOP_M3:
  330. case RT5670_CHARGE_PUMP:
  331. case RT5670_MICBIAS:
  332. case RT5670_A_JD_CTRL1:
  333. case RT5670_A_JD_CTRL2:
  334. case RT5670_VAD_CTRL1:
  335. case RT5670_VAD_CTRL2:
  336. case RT5670_VAD_CTRL3:
  337. case RT5670_VAD_CTRL4:
  338. case RT5670_VAD_CTRL5:
  339. case RT5670_ADC_EQ_CTRL1:
  340. case RT5670_ADC_EQ_CTRL2:
  341. case RT5670_EQ_CTRL1:
  342. case RT5670_EQ_CTRL2:
  343. case RT5670_ALC_DRC_CTRL1:
  344. case RT5670_ALC_DRC_CTRL2:
  345. case RT5670_ALC_CTRL_1:
  346. case RT5670_ALC_CTRL_2:
  347. case RT5670_ALC_CTRL_3:
  348. case RT5670_JD_CTRL:
  349. case RT5670_IRQ_CTRL1:
  350. case RT5670_IRQ_CTRL2:
  351. case RT5670_INT_IRQ_ST:
  352. case RT5670_GPIO_CTRL1:
  353. case RT5670_GPIO_CTRL2:
  354. case RT5670_GPIO_CTRL3:
  355. case RT5670_SCRABBLE_FUN:
  356. case RT5670_SCRABBLE_CTRL:
  357. case RT5670_BASE_BACK:
  358. case RT5670_MP3_PLUS1:
  359. case RT5670_MP3_PLUS2:
  360. case RT5670_ADJ_HPF1:
  361. case RT5670_ADJ_HPF2:
  362. case RT5670_HP_CALIB_AMP_DET:
  363. case RT5670_SV_ZCD1:
  364. case RT5670_SV_ZCD2:
  365. case RT5670_IL_CMD:
  366. case RT5670_IL_CMD2:
  367. case RT5670_IL_CMD3:
  368. case RT5670_DRC_HL_CTRL1:
  369. case RT5670_DRC_HL_CTRL2:
  370. case RT5670_ADC_MONO_HP_CTRL1:
  371. case RT5670_ADC_MONO_HP_CTRL2:
  372. case RT5670_ADC_STO2_HP_CTRL1:
  373. case RT5670_ADC_STO2_HP_CTRL2:
  374. case RT5670_JD_CTRL3:
  375. case RT5670_JD_CTRL4:
  376. case RT5670_DIG_MISC:
  377. case RT5670_DSP_CTRL1:
  378. case RT5670_DSP_CTRL2:
  379. case RT5670_DSP_CTRL3:
  380. case RT5670_DSP_CTRL4:
  381. case RT5670_DSP_CTRL5:
  382. case RT5670_GEN_CTRL2:
  383. case RT5670_GEN_CTRL3:
  384. case RT5670_VENDOR_ID:
  385. case RT5670_VENDOR_ID1:
  386. case RT5670_VENDOR_ID2:
  387. return true;
  388. default:
  389. return false;
  390. }
  391. }
  392. static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -4650, 150, 0);
  393. static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -65625, 375, 0);
  394. static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -3450, 150, 0);
  395. static const DECLARE_TLV_DB_SCALE(adc_vol_tlv, -17625, 375, 0);
  396. static const DECLARE_TLV_DB_SCALE(adc_bst_tlv, 0, 1200, 0);
  397. /* {0, +20, +24, +30, +35, +40, +44, +50, +52} dB */
  398. static unsigned int bst_tlv[] = {
  399. TLV_DB_RANGE_HEAD(7),
  400. 0, 0, TLV_DB_SCALE_ITEM(0, 0, 0),
  401. 1, 1, TLV_DB_SCALE_ITEM(2000, 0, 0),
  402. 2, 2, TLV_DB_SCALE_ITEM(2400, 0, 0),
  403. 3, 5, TLV_DB_SCALE_ITEM(3000, 500, 0),
  404. 6, 6, TLV_DB_SCALE_ITEM(4400, 0, 0),
  405. 7, 7, TLV_DB_SCALE_ITEM(5000, 0, 0),
  406. 8, 8, TLV_DB_SCALE_ITEM(5200, 0, 0),
  407. };
  408. /* Interface data select */
  409. static const char * const rt5670_data_select[] = {
  410. "Normal", "Swap", "left copy to right", "right copy to left"
  411. };
  412. static SOC_ENUM_SINGLE_DECL(rt5670_if2_dac_enum, RT5670_DIG_INF1_DATA,
  413. RT5670_IF2_DAC_SEL_SFT, rt5670_data_select);
  414. static SOC_ENUM_SINGLE_DECL(rt5670_if2_adc_enum, RT5670_DIG_INF1_DATA,
  415. RT5670_IF2_ADC_SEL_SFT, rt5670_data_select);
  416. static const struct snd_kcontrol_new rt5670_snd_controls[] = {
  417. /* Headphone Output Volume */
  418. SOC_DOUBLE("HP Playback Switch", RT5670_HP_VOL,
  419. RT5670_L_MUTE_SFT, RT5670_R_MUTE_SFT, 1, 1),
  420. SOC_DOUBLE_TLV("HP Playback Volume", RT5670_HP_VOL,
  421. RT5670_L_VOL_SFT, RT5670_R_VOL_SFT,
  422. 39, 0, out_vol_tlv),
  423. /* OUTPUT Control */
  424. SOC_DOUBLE("OUT Channel Switch", RT5670_LOUT1,
  425. RT5670_VOL_L_SFT, RT5670_VOL_R_SFT, 1, 1),
  426. SOC_DOUBLE_TLV("OUT Playback Volume", RT5670_LOUT1,
  427. RT5670_L_VOL_SFT, RT5670_R_VOL_SFT, 39, 1, out_vol_tlv),
  428. /* DAC Digital Volume */
  429. SOC_DOUBLE("DAC2 Playback Switch", RT5670_DAC_CTRL,
  430. RT5670_M_DAC_L2_VOL_SFT, RT5670_M_DAC_R2_VOL_SFT, 1, 1),
  431. SOC_DOUBLE_TLV("DAC1 Playback Volume", RT5670_DAC1_DIG_VOL,
  432. RT5670_L_VOL_SFT, RT5670_R_VOL_SFT,
  433. 175, 0, dac_vol_tlv),
  434. SOC_DOUBLE_TLV("Mono DAC Playback Volume", RT5670_DAC2_DIG_VOL,
  435. RT5670_L_VOL_SFT, RT5670_R_VOL_SFT,
  436. 175, 0, dac_vol_tlv),
  437. /* IN1/IN2 Control */
  438. SOC_SINGLE_TLV("IN1 Boost Volume", RT5670_CJ_CTRL1,
  439. RT5670_BST_SFT1, 8, 0, bst_tlv),
  440. SOC_SINGLE_TLV("IN2 Boost Volume", RT5670_IN2,
  441. RT5670_BST_SFT1, 8, 0, bst_tlv),
  442. /* INL/INR Volume Control */
  443. SOC_DOUBLE_TLV("IN Capture Volume", RT5670_INL1_INR1_VOL,
  444. RT5670_INL_VOL_SFT, RT5670_INR_VOL_SFT,
  445. 31, 1, in_vol_tlv),
  446. /* ADC Digital Volume Control */
  447. SOC_DOUBLE("ADC Capture Switch", RT5670_STO1_ADC_DIG_VOL,
  448. RT5670_L_MUTE_SFT, RT5670_R_MUTE_SFT, 1, 1),
  449. SOC_DOUBLE_TLV("ADC Capture Volume", RT5670_STO1_ADC_DIG_VOL,
  450. RT5670_L_VOL_SFT, RT5670_R_VOL_SFT,
  451. 127, 0, adc_vol_tlv),
  452. SOC_DOUBLE_TLV("Mono ADC Capture Volume", RT5670_MONO_ADC_DIG_VOL,
  453. RT5670_L_VOL_SFT, RT5670_R_VOL_SFT,
  454. 127, 0, adc_vol_tlv),
  455. /* ADC Boost Volume Control */
  456. SOC_DOUBLE_TLV("STO1 ADC Boost Gain Volume", RT5670_ADC_BST_VOL1,
  457. RT5670_STO1_ADC_L_BST_SFT, RT5670_STO1_ADC_R_BST_SFT,
  458. 3, 0, adc_bst_tlv),
  459. SOC_DOUBLE_TLV("STO2 ADC Boost Gain Volume", RT5670_ADC_BST_VOL1,
  460. RT5670_STO2_ADC_L_BST_SFT, RT5670_STO2_ADC_R_BST_SFT,
  461. 3, 0, adc_bst_tlv),
  462. SOC_ENUM("ADC IF2 Data Switch", rt5670_if2_adc_enum),
  463. SOC_ENUM("DAC IF2 Data Switch", rt5670_if2_dac_enum),
  464. };
  465. /**
  466. * set_dmic_clk - Set parameter of dmic.
  467. *
  468. * @w: DAPM widget.
  469. * @kcontrol: The kcontrol of this widget.
  470. * @event: Event id.
  471. *
  472. * Choose dmic clock between 1MHz and 3MHz.
  473. * It is better for clock to approximate 3MHz.
  474. */
  475. static int set_dmic_clk(struct snd_soc_dapm_widget *w,
  476. struct snd_kcontrol *kcontrol, int event)
  477. {
  478. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  479. struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec);
  480. int idx = -EINVAL;
  481. idx = rl6231_calc_dmic_clk(rt5670->sysclk);
  482. if (idx < 0)
  483. dev_err(codec->dev, "Failed to set DMIC clock\n");
  484. else
  485. snd_soc_update_bits(codec, RT5670_DMIC_CTRL1,
  486. RT5670_DMIC_CLK_MASK, idx << RT5670_DMIC_CLK_SFT);
  487. return idx;
  488. }
  489. static int is_sys_clk_from_pll(struct snd_soc_dapm_widget *source,
  490. struct snd_soc_dapm_widget *sink)
  491. {
  492. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(source->dapm);
  493. unsigned int val;
  494. val = snd_soc_read(codec, RT5670_GLB_CLK);
  495. val &= RT5670_SCLK_SRC_MASK;
  496. if (val == RT5670_SCLK_SRC_PLL1)
  497. return 1;
  498. else
  499. return 0;
  500. }
  501. static int is_using_asrc(struct snd_soc_dapm_widget *source,
  502. struct snd_soc_dapm_widget *sink)
  503. {
  504. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(source->dapm);
  505. unsigned int reg, shift, val;
  506. switch (source->shift) {
  507. case 0:
  508. reg = RT5670_ASRC_3;
  509. shift = 0;
  510. break;
  511. case 1:
  512. reg = RT5670_ASRC_3;
  513. shift = 4;
  514. break;
  515. case 2:
  516. reg = RT5670_ASRC_5;
  517. shift = 12;
  518. break;
  519. case 3:
  520. reg = RT5670_ASRC_2;
  521. shift = 0;
  522. break;
  523. case 8:
  524. reg = RT5670_ASRC_2;
  525. shift = 4;
  526. break;
  527. case 9:
  528. reg = RT5670_ASRC_2;
  529. shift = 8;
  530. break;
  531. case 10:
  532. reg = RT5670_ASRC_2;
  533. shift = 12;
  534. break;
  535. default:
  536. return 0;
  537. }
  538. val = (snd_soc_read(codec, reg) >> shift) & 0xf;
  539. switch (val) {
  540. case 1:
  541. case 2:
  542. case 3:
  543. case 4:
  544. return 1;
  545. default:
  546. return 0;
  547. }
  548. }
  549. static int can_use_asrc(struct snd_soc_dapm_widget *source,
  550. struct snd_soc_dapm_widget *sink)
  551. {
  552. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(source->dapm);
  553. struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec);
  554. if (rt5670->sysclk > rt5670->lrck[RT5670_AIF1] * 384)
  555. return 1;
  556. return 0;
  557. }
  558. /**
  559. * rt5670_sel_asrc_clk_src - select ASRC clock source for a set of filters
  560. * @codec: SoC audio codec device.
  561. * @filter_mask: mask of filters.
  562. * @clk_src: clock source
  563. *
  564. * The ASRC function is for asynchronous MCLK and LRCK. Also, since RT5670 can
  565. * only support standard 32fs or 64fs i2s format, ASRC should be enabled to
  566. * support special i2s clock format such as Intel's 100fs(100 * sampling rate).
  567. * ASRC function will track i2s clock and generate a corresponding system clock
  568. * for codec. This function provides an API to select the clock source for a
  569. * set of filters specified by the mask. And the codec driver will turn on ASRC
  570. * for these filters if ASRC is selected as their clock source.
  571. */
  572. int rt5670_sel_asrc_clk_src(struct snd_soc_codec *codec,
  573. unsigned int filter_mask, unsigned int clk_src)
  574. {
  575. unsigned int asrc2_mask = 0, asrc2_value = 0;
  576. unsigned int asrc3_mask = 0, asrc3_value = 0;
  577. if (clk_src > RT5670_CLK_SEL_SYS3)
  578. return -EINVAL;
  579. if (filter_mask & RT5670_DA_STEREO_FILTER) {
  580. asrc2_mask |= RT5670_DA_STO_CLK_SEL_MASK;
  581. asrc2_value = (asrc2_value & ~RT5670_DA_STO_CLK_SEL_MASK)
  582. | (clk_src << RT5670_DA_STO_CLK_SEL_SFT);
  583. }
  584. if (filter_mask & RT5670_DA_MONO_L_FILTER) {
  585. asrc2_mask |= RT5670_DA_MONOL_CLK_SEL_MASK;
  586. asrc2_value = (asrc2_value & ~RT5670_DA_MONOL_CLK_SEL_MASK)
  587. | (clk_src << RT5670_DA_MONOL_CLK_SEL_SFT);
  588. }
  589. if (filter_mask & RT5670_DA_MONO_R_FILTER) {
  590. asrc2_mask |= RT5670_DA_MONOR_CLK_SEL_MASK;
  591. asrc2_value = (asrc2_value & ~RT5670_DA_MONOR_CLK_SEL_MASK)
  592. | (clk_src << RT5670_DA_MONOR_CLK_SEL_SFT);
  593. }
  594. if (filter_mask & RT5670_AD_STEREO_FILTER) {
  595. asrc2_mask |= RT5670_AD_STO1_CLK_SEL_MASK;
  596. asrc2_value = (asrc2_value & ~RT5670_AD_STO1_CLK_SEL_MASK)
  597. | (clk_src << RT5670_AD_STO1_CLK_SEL_SFT);
  598. }
  599. if (filter_mask & RT5670_AD_MONO_L_FILTER) {
  600. asrc3_mask |= RT5670_AD_MONOL_CLK_SEL_MASK;
  601. asrc3_value = (asrc3_value & ~RT5670_AD_MONOL_CLK_SEL_MASK)
  602. | (clk_src << RT5670_AD_MONOL_CLK_SEL_SFT);
  603. }
  604. if (filter_mask & RT5670_AD_MONO_R_FILTER) {
  605. asrc3_mask |= RT5670_AD_MONOR_CLK_SEL_MASK;
  606. asrc3_value = (asrc3_value & ~RT5670_AD_MONOR_CLK_SEL_MASK)
  607. | (clk_src << RT5670_AD_MONOR_CLK_SEL_SFT);
  608. }
  609. if (filter_mask & RT5670_UP_RATE_FILTER) {
  610. asrc3_mask |= RT5670_UP_CLK_SEL_MASK;
  611. asrc3_value = (asrc3_value & ~RT5670_UP_CLK_SEL_MASK)
  612. | (clk_src << RT5670_UP_CLK_SEL_SFT);
  613. }
  614. if (filter_mask & RT5670_DOWN_RATE_FILTER) {
  615. asrc3_mask |= RT5670_DOWN_CLK_SEL_MASK;
  616. asrc3_value = (asrc3_value & ~RT5670_DOWN_CLK_SEL_MASK)
  617. | (clk_src << RT5670_DOWN_CLK_SEL_SFT);
  618. }
  619. if (asrc2_mask)
  620. snd_soc_update_bits(codec, RT5670_ASRC_2,
  621. asrc2_mask, asrc2_value);
  622. if (asrc3_mask)
  623. snd_soc_update_bits(codec, RT5670_ASRC_3,
  624. asrc3_mask, asrc3_value);
  625. return 0;
  626. }
  627. EXPORT_SYMBOL_GPL(rt5670_sel_asrc_clk_src);
  628. /* Digital Mixer */
  629. static const struct snd_kcontrol_new rt5670_sto1_adc_l_mix[] = {
  630. SOC_DAPM_SINGLE("ADC1 Switch", RT5670_STO1_ADC_MIXER,
  631. RT5670_M_ADC_L1_SFT, 1, 1),
  632. SOC_DAPM_SINGLE("ADC2 Switch", RT5670_STO1_ADC_MIXER,
  633. RT5670_M_ADC_L2_SFT, 1, 1),
  634. };
  635. static const struct snd_kcontrol_new rt5670_sto1_adc_r_mix[] = {
  636. SOC_DAPM_SINGLE("ADC1 Switch", RT5670_STO1_ADC_MIXER,
  637. RT5670_M_ADC_R1_SFT, 1, 1),
  638. SOC_DAPM_SINGLE("ADC2 Switch", RT5670_STO1_ADC_MIXER,
  639. RT5670_M_ADC_R2_SFT, 1, 1),
  640. };
  641. static const struct snd_kcontrol_new rt5670_sto2_adc_l_mix[] = {
  642. SOC_DAPM_SINGLE("ADC1 Switch", RT5670_STO2_ADC_MIXER,
  643. RT5670_M_ADC_L1_SFT, 1, 1),
  644. SOC_DAPM_SINGLE("ADC2 Switch", RT5670_STO2_ADC_MIXER,
  645. RT5670_M_ADC_L2_SFT, 1, 1),
  646. };
  647. static const struct snd_kcontrol_new rt5670_sto2_adc_r_mix[] = {
  648. SOC_DAPM_SINGLE("ADC1 Switch", RT5670_STO2_ADC_MIXER,
  649. RT5670_M_ADC_R1_SFT, 1, 1),
  650. SOC_DAPM_SINGLE("ADC2 Switch", RT5670_STO2_ADC_MIXER,
  651. RT5670_M_ADC_R2_SFT, 1, 1),
  652. };
  653. static const struct snd_kcontrol_new rt5670_mono_adc_l_mix[] = {
  654. SOC_DAPM_SINGLE("ADC1 Switch", RT5670_MONO_ADC_MIXER,
  655. RT5670_M_MONO_ADC_L1_SFT, 1, 1),
  656. SOC_DAPM_SINGLE("ADC2 Switch", RT5670_MONO_ADC_MIXER,
  657. RT5670_M_MONO_ADC_L2_SFT, 1, 1),
  658. };
  659. static const struct snd_kcontrol_new rt5670_mono_adc_r_mix[] = {
  660. SOC_DAPM_SINGLE("ADC1 Switch", RT5670_MONO_ADC_MIXER,
  661. RT5670_M_MONO_ADC_R1_SFT, 1, 1),
  662. SOC_DAPM_SINGLE("ADC2 Switch", RT5670_MONO_ADC_MIXER,
  663. RT5670_M_MONO_ADC_R2_SFT, 1, 1),
  664. };
  665. static const struct snd_kcontrol_new rt5670_dac_l_mix[] = {
  666. SOC_DAPM_SINGLE("Stereo ADC Switch", RT5670_AD_DA_MIXER,
  667. RT5670_M_ADCMIX_L_SFT, 1, 1),
  668. SOC_DAPM_SINGLE("DAC1 Switch", RT5670_AD_DA_MIXER,
  669. RT5670_M_DAC1_L_SFT, 1, 1),
  670. };
  671. static const struct snd_kcontrol_new rt5670_dac_r_mix[] = {
  672. SOC_DAPM_SINGLE("Stereo ADC Switch", RT5670_AD_DA_MIXER,
  673. RT5670_M_ADCMIX_R_SFT, 1, 1),
  674. SOC_DAPM_SINGLE("DAC1 Switch", RT5670_AD_DA_MIXER,
  675. RT5670_M_DAC1_R_SFT, 1, 1),
  676. };
  677. static const struct snd_kcontrol_new rt5670_sto_dac_l_mix[] = {
  678. SOC_DAPM_SINGLE("DAC L1 Switch", RT5670_STO_DAC_MIXER,
  679. RT5670_M_DAC_L1_SFT, 1, 1),
  680. SOC_DAPM_SINGLE("DAC L2 Switch", RT5670_STO_DAC_MIXER,
  681. RT5670_M_DAC_L2_SFT, 1, 1),
  682. SOC_DAPM_SINGLE("DAC R1 Switch", RT5670_STO_DAC_MIXER,
  683. RT5670_M_DAC_R1_STO_L_SFT, 1, 1),
  684. };
  685. static const struct snd_kcontrol_new rt5670_sto_dac_r_mix[] = {
  686. SOC_DAPM_SINGLE("DAC R1 Switch", RT5670_STO_DAC_MIXER,
  687. RT5670_M_DAC_R1_SFT, 1, 1),
  688. SOC_DAPM_SINGLE("DAC R2 Switch", RT5670_STO_DAC_MIXER,
  689. RT5670_M_DAC_R2_SFT, 1, 1),
  690. SOC_DAPM_SINGLE("DAC L1 Switch", RT5670_STO_DAC_MIXER,
  691. RT5670_M_DAC_L1_STO_R_SFT, 1, 1),
  692. };
  693. static const struct snd_kcontrol_new rt5670_mono_dac_l_mix[] = {
  694. SOC_DAPM_SINGLE("DAC L1 Switch", RT5670_DD_MIXER,
  695. RT5670_M_DAC_L1_MONO_L_SFT, 1, 1),
  696. SOC_DAPM_SINGLE("DAC L2 Switch", RT5670_DD_MIXER,
  697. RT5670_M_DAC_L2_MONO_L_SFT, 1, 1),
  698. SOC_DAPM_SINGLE("DAC R2 Switch", RT5670_DD_MIXER,
  699. RT5670_M_DAC_R2_MONO_L_SFT, 1, 1),
  700. };
  701. static const struct snd_kcontrol_new rt5670_mono_dac_r_mix[] = {
  702. SOC_DAPM_SINGLE("DAC R1 Switch", RT5670_DD_MIXER,
  703. RT5670_M_DAC_R1_MONO_R_SFT, 1, 1),
  704. SOC_DAPM_SINGLE("DAC R2 Switch", RT5670_DD_MIXER,
  705. RT5670_M_DAC_R2_MONO_R_SFT, 1, 1),
  706. SOC_DAPM_SINGLE("DAC L2 Switch", RT5670_DD_MIXER,
  707. RT5670_M_DAC_L2_MONO_R_SFT, 1, 1),
  708. };
  709. static const struct snd_kcontrol_new rt5670_dig_l_mix[] = {
  710. SOC_DAPM_SINGLE("Sto DAC Mix L Switch", RT5670_DIG_MIXER,
  711. RT5670_M_STO_L_DAC_L_SFT, 1, 1),
  712. SOC_DAPM_SINGLE("DAC L2 Switch", RT5670_DIG_MIXER,
  713. RT5670_M_DAC_L2_DAC_L_SFT, 1, 1),
  714. SOC_DAPM_SINGLE("DAC R2 Switch", RT5670_DIG_MIXER,
  715. RT5670_M_DAC_R2_DAC_L_SFT, 1, 1),
  716. };
  717. static const struct snd_kcontrol_new rt5670_dig_r_mix[] = {
  718. SOC_DAPM_SINGLE("Sto DAC Mix R Switch", RT5670_DIG_MIXER,
  719. RT5670_M_STO_R_DAC_R_SFT, 1, 1),
  720. SOC_DAPM_SINGLE("DAC R2 Switch", RT5670_DIG_MIXER,
  721. RT5670_M_DAC_R2_DAC_R_SFT, 1, 1),
  722. SOC_DAPM_SINGLE("DAC L2 Switch", RT5670_DIG_MIXER,
  723. RT5670_M_DAC_L2_DAC_R_SFT, 1, 1),
  724. };
  725. /* Analog Input Mixer */
  726. static const struct snd_kcontrol_new rt5670_rec_l_mix[] = {
  727. SOC_DAPM_SINGLE("INL Switch", RT5670_REC_L2_MIXER,
  728. RT5670_M_IN_L_RM_L_SFT, 1, 1),
  729. SOC_DAPM_SINGLE("BST2 Switch", RT5670_REC_L2_MIXER,
  730. RT5670_M_BST2_RM_L_SFT, 1, 1),
  731. SOC_DAPM_SINGLE("BST1 Switch", RT5670_REC_L2_MIXER,
  732. RT5670_M_BST1_RM_L_SFT, 1, 1),
  733. };
  734. static const struct snd_kcontrol_new rt5670_rec_r_mix[] = {
  735. SOC_DAPM_SINGLE("INR Switch", RT5670_REC_R2_MIXER,
  736. RT5670_M_IN_R_RM_R_SFT, 1, 1),
  737. SOC_DAPM_SINGLE("BST2 Switch", RT5670_REC_R2_MIXER,
  738. RT5670_M_BST2_RM_R_SFT, 1, 1),
  739. SOC_DAPM_SINGLE("BST1 Switch", RT5670_REC_R2_MIXER,
  740. RT5670_M_BST1_RM_R_SFT, 1, 1),
  741. };
  742. static const struct snd_kcontrol_new rt5670_out_l_mix[] = {
  743. SOC_DAPM_SINGLE("BST1 Switch", RT5670_OUT_L1_MIXER,
  744. RT5670_M_BST1_OM_L_SFT, 1, 1),
  745. SOC_DAPM_SINGLE("INL Switch", RT5670_OUT_L1_MIXER,
  746. RT5670_M_IN_L_OM_L_SFT, 1, 1),
  747. SOC_DAPM_SINGLE("DAC L2 Switch", RT5670_OUT_L1_MIXER,
  748. RT5670_M_DAC_L2_OM_L_SFT, 1, 1),
  749. SOC_DAPM_SINGLE("DAC L1 Switch", RT5670_OUT_L1_MIXER,
  750. RT5670_M_DAC_L1_OM_L_SFT, 1, 1),
  751. };
  752. static const struct snd_kcontrol_new rt5670_out_r_mix[] = {
  753. SOC_DAPM_SINGLE("BST2 Switch", RT5670_OUT_R1_MIXER,
  754. RT5670_M_BST2_OM_R_SFT, 1, 1),
  755. SOC_DAPM_SINGLE("INR Switch", RT5670_OUT_R1_MIXER,
  756. RT5670_M_IN_R_OM_R_SFT, 1, 1),
  757. SOC_DAPM_SINGLE("DAC R2 Switch", RT5670_OUT_R1_MIXER,
  758. RT5670_M_DAC_R2_OM_R_SFT, 1, 1),
  759. SOC_DAPM_SINGLE("DAC R1 Switch", RT5670_OUT_R1_MIXER,
  760. RT5670_M_DAC_R1_OM_R_SFT, 1, 1),
  761. };
  762. static const struct snd_kcontrol_new rt5670_hpo_mix[] = {
  763. SOC_DAPM_SINGLE("DAC1 Switch", RT5670_HPO_MIXER,
  764. RT5670_M_DAC1_HM_SFT, 1, 1),
  765. SOC_DAPM_SINGLE("HPVOL Switch", RT5670_HPO_MIXER,
  766. RT5670_M_HPVOL_HM_SFT, 1, 1),
  767. };
  768. static const struct snd_kcontrol_new rt5670_hpvoll_mix[] = {
  769. SOC_DAPM_SINGLE("DAC1 Switch", RT5670_HPO_MIXER,
  770. RT5670_M_DACL1_HML_SFT, 1, 1),
  771. SOC_DAPM_SINGLE("INL Switch", RT5670_HPO_MIXER,
  772. RT5670_M_INL1_HML_SFT, 1, 1),
  773. };
  774. static const struct snd_kcontrol_new rt5670_hpvolr_mix[] = {
  775. SOC_DAPM_SINGLE("DAC1 Switch", RT5670_HPO_MIXER,
  776. RT5670_M_DACR1_HMR_SFT, 1, 1),
  777. SOC_DAPM_SINGLE("INR Switch", RT5670_HPO_MIXER,
  778. RT5670_M_INR1_HMR_SFT, 1, 1),
  779. };
  780. static const struct snd_kcontrol_new rt5670_lout_mix[] = {
  781. SOC_DAPM_SINGLE("DAC L1 Switch", RT5670_LOUT_MIXER,
  782. RT5670_M_DAC_L1_LM_SFT, 1, 1),
  783. SOC_DAPM_SINGLE("DAC R1 Switch", RT5670_LOUT_MIXER,
  784. RT5670_M_DAC_R1_LM_SFT, 1, 1),
  785. SOC_DAPM_SINGLE("OUTMIX L Switch", RT5670_LOUT_MIXER,
  786. RT5670_M_OV_L_LM_SFT, 1, 1),
  787. SOC_DAPM_SINGLE("OUTMIX R Switch", RT5670_LOUT_MIXER,
  788. RT5670_M_OV_R_LM_SFT, 1, 1),
  789. };
  790. static const struct snd_kcontrol_new rt5670_hpl_mix[] = {
  791. SOC_DAPM_SINGLE("DAC L1 Switch", RT5670_HPO_MIXER,
  792. RT5670_M_DACL1_HML_SFT, 1, 1),
  793. SOC_DAPM_SINGLE("INL1 Switch", RT5670_HPO_MIXER,
  794. RT5670_M_INL1_HML_SFT, 1, 1),
  795. };
  796. static const struct snd_kcontrol_new rt5670_hpr_mix[] = {
  797. SOC_DAPM_SINGLE("DAC R1 Switch", RT5670_HPO_MIXER,
  798. RT5670_M_DACR1_HMR_SFT, 1, 1),
  799. SOC_DAPM_SINGLE("INR1 Switch", RT5670_HPO_MIXER,
  800. RT5670_M_INR1_HMR_SFT, 1, 1),
  801. };
  802. static const struct snd_kcontrol_new lout_l_enable_control =
  803. SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5670_LOUT1,
  804. RT5670_L_MUTE_SFT, 1, 1);
  805. static const struct snd_kcontrol_new lout_r_enable_control =
  806. SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5670_LOUT1,
  807. RT5670_R_MUTE_SFT, 1, 1);
  808. /* DAC1 L/R source */ /* MX-29 [9:8] [11:10] */
  809. static const char * const rt5670_dac1_src[] = {
  810. "IF1 DAC", "IF2 DAC"
  811. };
  812. static SOC_ENUM_SINGLE_DECL(rt5670_dac1l_enum, RT5670_AD_DA_MIXER,
  813. RT5670_DAC1_L_SEL_SFT, rt5670_dac1_src);
  814. static const struct snd_kcontrol_new rt5670_dac1l_mux =
  815. SOC_DAPM_ENUM("DAC1 L source", rt5670_dac1l_enum);
  816. static SOC_ENUM_SINGLE_DECL(rt5670_dac1r_enum, RT5670_AD_DA_MIXER,
  817. RT5670_DAC1_R_SEL_SFT, rt5670_dac1_src);
  818. static const struct snd_kcontrol_new rt5670_dac1r_mux =
  819. SOC_DAPM_ENUM("DAC1 R source", rt5670_dac1r_enum);
  820. /*DAC2 L/R source*/ /* MX-1B [6:4] [2:0] */
  821. /* TODO Use SOC_VALUE_ENUM_SINGLE_DECL */
  822. static const char * const rt5670_dac12_src[] = {
  823. "IF1 DAC", "IF2 DAC", "IF3 DAC", "TxDC DAC",
  824. "Bass", "VAD_ADC", "IF4 DAC"
  825. };
  826. static SOC_ENUM_SINGLE_DECL(rt5670_dac2l_enum, RT5670_DAC_CTRL,
  827. RT5670_DAC2_L_SEL_SFT, rt5670_dac12_src);
  828. static const struct snd_kcontrol_new rt5670_dac_l2_mux =
  829. SOC_DAPM_ENUM("DAC2 L source", rt5670_dac2l_enum);
  830. static const char * const rt5670_dacr2_src[] = {
  831. "IF1 DAC", "IF2 DAC", "IF3 DAC", "TxDC DAC", "TxDP ADC", "IF4 DAC"
  832. };
  833. static SOC_ENUM_SINGLE_DECL(rt5670_dac2r_enum, RT5670_DAC_CTRL,
  834. RT5670_DAC2_R_SEL_SFT, rt5670_dacr2_src);
  835. static const struct snd_kcontrol_new rt5670_dac_r2_mux =
  836. SOC_DAPM_ENUM("DAC2 R source", rt5670_dac2r_enum);
  837. /*RxDP source*/ /* MX-2D [15:13] */
  838. static const char * const rt5670_rxdp_src[] = {
  839. "IF2 DAC", "IF1 DAC", "STO1 ADC Mixer", "STO2 ADC Mixer",
  840. "Mono ADC Mixer L", "Mono ADC Mixer R", "DAC1"
  841. };
  842. static SOC_ENUM_SINGLE_DECL(rt5670_rxdp_enum, RT5670_DSP_PATH1,
  843. RT5670_RXDP_SEL_SFT, rt5670_rxdp_src);
  844. static const struct snd_kcontrol_new rt5670_rxdp_mux =
  845. SOC_DAPM_ENUM("DAC2 L source", rt5670_rxdp_enum);
  846. /* MX-2D [1] [0] */
  847. static const char * const rt5670_dsp_bypass_src[] = {
  848. "DSP", "Bypass"
  849. };
  850. static SOC_ENUM_SINGLE_DECL(rt5670_dsp_ul_enum, RT5670_DSP_PATH1,
  851. RT5670_DSP_UL_SFT, rt5670_dsp_bypass_src);
  852. static const struct snd_kcontrol_new rt5670_dsp_ul_mux =
  853. SOC_DAPM_ENUM("DSP UL source", rt5670_dsp_ul_enum);
  854. static SOC_ENUM_SINGLE_DECL(rt5670_dsp_dl_enum, RT5670_DSP_PATH1,
  855. RT5670_DSP_DL_SFT, rt5670_dsp_bypass_src);
  856. static const struct snd_kcontrol_new rt5670_dsp_dl_mux =
  857. SOC_DAPM_ENUM("DSP DL source", rt5670_dsp_dl_enum);
  858. /* Stereo2 ADC source */
  859. /* MX-26 [15] */
  860. static const char * const rt5670_stereo2_adc_lr_src[] = {
  861. "L", "LR"
  862. };
  863. static SOC_ENUM_SINGLE_DECL(rt5670_stereo2_adc_lr_enum, RT5670_STO2_ADC_MIXER,
  864. RT5670_STO2_ADC_SRC_SFT, rt5670_stereo2_adc_lr_src);
  865. static const struct snd_kcontrol_new rt5670_sto2_adc_lr_mux =
  866. SOC_DAPM_ENUM("Stereo2 ADC LR source", rt5670_stereo2_adc_lr_enum);
  867. /* Stereo1 ADC source */
  868. /* MX-27 MX-26 [12] */
  869. static const char * const rt5670_stereo_adc1_src[] = {
  870. "DAC MIX", "ADC"
  871. };
  872. static SOC_ENUM_SINGLE_DECL(rt5670_stereo1_adc1_enum, RT5670_STO1_ADC_MIXER,
  873. RT5670_ADC_1_SRC_SFT, rt5670_stereo_adc1_src);
  874. static const struct snd_kcontrol_new rt5670_sto_adc_l1_mux =
  875. SOC_DAPM_ENUM("Stereo1 ADC L1 source", rt5670_stereo1_adc1_enum);
  876. static const struct snd_kcontrol_new rt5670_sto_adc_r1_mux =
  877. SOC_DAPM_ENUM("Stereo1 ADC R1 source", rt5670_stereo1_adc1_enum);
  878. static SOC_ENUM_SINGLE_DECL(rt5670_stereo2_adc1_enum, RT5670_STO2_ADC_MIXER,
  879. RT5670_ADC_1_SRC_SFT, rt5670_stereo_adc1_src);
  880. static const struct snd_kcontrol_new rt5670_sto2_adc_l1_mux =
  881. SOC_DAPM_ENUM("Stereo2 ADC L1 source", rt5670_stereo2_adc1_enum);
  882. static const struct snd_kcontrol_new rt5670_sto2_adc_r1_mux =
  883. SOC_DAPM_ENUM("Stereo2 ADC R1 source", rt5670_stereo2_adc1_enum);
  884. /* MX-27 MX-26 [11] */
  885. static const char * const rt5670_stereo_adc2_src[] = {
  886. "DAC MIX", "DMIC"
  887. };
  888. static SOC_ENUM_SINGLE_DECL(rt5670_stereo1_adc2_enum, RT5670_STO1_ADC_MIXER,
  889. RT5670_ADC_2_SRC_SFT, rt5670_stereo_adc2_src);
  890. static const struct snd_kcontrol_new rt5670_sto_adc_l2_mux =
  891. SOC_DAPM_ENUM("Stereo1 ADC L2 source", rt5670_stereo1_adc2_enum);
  892. static const struct snd_kcontrol_new rt5670_sto_adc_r2_mux =
  893. SOC_DAPM_ENUM("Stereo1 ADC R2 source", rt5670_stereo1_adc2_enum);
  894. static SOC_ENUM_SINGLE_DECL(rt5670_stereo2_adc2_enum, RT5670_STO2_ADC_MIXER,
  895. RT5670_ADC_2_SRC_SFT, rt5670_stereo_adc2_src);
  896. static const struct snd_kcontrol_new rt5670_sto2_adc_l2_mux =
  897. SOC_DAPM_ENUM("Stereo2 ADC L2 source", rt5670_stereo2_adc2_enum);
  898. static const struct snd_kcontrol_new rt5670_sto2_adc_r2_mux =
  899. SOC_DAPM_ENUM("Stereo2 ADC R2 source", rt5670_stereo2_adc2_enum);
  900. /* MX-27 MX26 [10] */
  901. static const char * const rt5670_stereo_adc_src[] = {
  902. "ADC1L ADC2R", "ADC3"
  903. };
  904. static SOC_ENUM_SINGLE_DECL(rt5670_stereo1_adc_enum, RT5670_STO1_ADC_MIXER,
  905. RT5670_ADC_SRC_SFT, rt5670_stereo_adc_src);
  906. static const struct snd_kcontrol_new rt5670_sto_adc_mux =
  907. SOC_DAPM_ENUM("Stereo1 ADC source", rt5670_stereo1_adc_enum);
  908. static SOC_ENUM_SINGLE_DECL(rt5670_stereo2_adc_enum, RT5670_STO2_ADC_MIXER,
  909. RT5670_ADC_SRC_SFT, rt5670_stereo_adc_src);
  910. static const struct snd_kcontrol_new rt5670_sto2_adc_mux =
  911. SOC_DAPM_ENUM("Stereo2 ADC source", rt5670_stereo2_adc_enum);
  912. /* MX-27 MX-26 [9:8] */
  913. static const char * const rt5670_stereo_dmic_src[] = {
  914. "DMIC1", "DMIC2", "DMIC3"
  915. };
  916. static SOC_ENUM_SINGLE_DECL(rt5670_stereo1_dmic_enum, RT5670_STO1_ADC_MIXER,
  917. RT5670_DMIC_SRC_SFT, rt5670_stereo_dmic_src);
  918. static const struct snd_kcontrol_new rt5670_sto1_dmic_mux =
  919. SOC_DAPM_ENUM("Stereo1 DMIC source", rt5670_stereo1_dmic_enum);
  920. static SOC_ENUM_SINGLE_DECL(rt5670_stereo2_dmic_enum, RT5670_STO2_ADC_MIXER,
  921. RT5670_DMIC_SRC_SFT, rt5670_stereo_dmic_src);
  922. static const struct snd_kcontrol_new rt5670_sto2_dmic_mux =
  923. SOC_DAPM_ENUM("Stereo2 DMIC source", rt5670_stereo2_dmic_enum);
  924. /* MX-27 [0] */
  925. static const char * const rt5670_stereo_dmic3_src[] = {
  926. "DMIC3", "PDM ADC"
  927. };
  928. static SOC_ENUM_SINGLE_DECL(rt5670_stereo_dmic3_enum, RT5670_STO1_ADC_MIXER,
  929. RT5670_DMIC3_SRC_SFT, rt5670_stereo_dmic3_src);
  930. static const struct snd_kcontrol_new rt5670_sto_dmic3_mux =
  931. SOC_DAPM_ENUM("Stereo DMIC3 source", rt5670_stereo_dmic3_enum);
  932. /* Mono ADC source */
  933. /* MX-28 [12] */
  934. static const char * const rt5670_mono_adc_l1_src[] = {
  935. "Mono DAC MIXL", "ADC1"
  936. };
  937. static SOC_ENUM_SINGLE_DECL(rt5670_mono_adc_l1_enum, RT5670_MONO_ADC_MIXER,
  938. RT5670_MONO_ADC_L1_SRC_SFT, rt5670_mono_adc_l1_src);
  939. static const struct snd_kcontrol_new rt5670_mono_adc_l1_mux =
  940. SOC_DAPM_ENUM("Mono ADC1 left source", rt5670_mono_adc_l1_enum);
  941. /* MX-28 [11] */
  942. static const char * const rt5670_mono_adc_l2_src[] = {
  943. "Mono DAC MIXL", "DMIC"
  944. };
  945. static SOC_ENUM_SINGLE_DECL(rt5670_mono_adc_l2_enum, RT5670_MONO_ADC_MIXER,
  946. RT5670_MONO_ADC_L2_SRC_SFT, rt5670_mono_adc_l2_src);
  947. static const struct snd_kcontrol_new rt5670_mono_adc_l2_mux =
  948. SOC_DAPM_ENUM("Mono ADC2 left source", rt5670_mono_adc_l2_enum);
  949. /* MX-28 [9:8] */
  950. static const char * const rt5670_mono_dmic_src[] = {
  951. "DMIC1", "DMIC2", "DMIC3"
  952. };
  953. static SOC_ENUM_SINGLE_DECL(rt5670_mono_dmic_l_enum, RT5670_MONO_ADC_MIXER,
  954. RT5670_MONO_DMIC_L_SRC_SFT, rt5670_mono_dmic_src);
  955. static const struct snd_kcontrol_new rt5670_mono_dmic_l_mux =
  956. SOC_DAPM_ENUM("Mono DMIC left source", rt5670_mono_dmic_l_enum);
  957. /* MX-28 [1:0] */
  958. static SOC_ENUM_SINGLE_DECL(rt5670_mono_dmic_r_enum, RT5670_MONO_ADC_MIXER,
  959. RT5670_MONO_DMIC_R_SRC_SFT, rt5670_mono_dmic_src);
  960. static const struct snd_kcontrol_new rt5670_mono_dmic_r_mux =
  961. SOC_DAPM_ENUM("Mono DMIC Right source", rt5670_mono_dmic_r_enum);
  962. /* MX-28 [4] */
  963. static const char * const rt5670_mono_adc_r1_src[] = {
  964. "Mono DAC MIXR", "ADC2"
  965. };
  966. static SOC_ENUM_SINGLE_DECL(rt5670_mono_adc_r1_enum, RT5670_MONO_ADC_MIXER,
  967. RT5670_MONO_ADC_R1_SRC_SFT, rt5670_mono_adc_r1_src);
  968. static const struct snd_kcontrol_new rt5670_mono_adc_r1_mux =
  969. SOC_DAPM_ENUM("Mono ADC1 right source", rt5670_mono_adc_r1_enum);
  970. /* MX-28 [3] */
  971. static const char * const rt5670_mono_adc_r2_src[] = {
  972. "Mono DAC MIXR", "DMIC"
  973. };
  974. static SOC_ENUM_SINGLE_DECL(rt5670_mono_adc_r2_enum, RT5670_MONO_ADC_MIXER,
  975. RT5670_MONO_ADC_R2_SRC_SFT, rt5670_mono_adc_r2_src);
  976. static const struct snd_kcontrol_new rt5670_mono_adc_r2_mux =
  977. SOC_DAPM_ENUM("Mono ADC2 right source", rt5670_mono_adc_r2_enum);
  978. /* MX-2D [3:2] */
  979. static const char * const rt5670_txdp_slot_src[] = {
  980. "Slot 0-1", "Slot 2-3", "Slot 4-5", "Slot 6-7"
  981. };
  982. static SOC_ENUM_SINGLE_DECL(rt5670_txdp_slot_enum, RT5670_DSP_PATH1,
  983. RT5670_TXDP_SLOT_SEL_SFT, rt5670_txdp_slot_src);
  984. static const struct snd_kcontrol_new rt5670_txdp_slot_mux =
  985. SOC_DAPM_ENUM("TxDP Slot source", rt5670_txdp_slot_enum);
  986. /* MX-2F [15] */
  987. static const char * const rt5670_if1_adc2_in_src[] = {
  988. "IF_ADC2", "VAD_ADC"
  989. };
  990. static SOC_ENUM_SINGLE_DECL(rt5670_if1_adc2_in_enum, RT5670_DIG_INF1_DATA,
  991. RT5670_IF1_ADC2_IN_SFT, rt5670_if1_adc2_in_src);
  992. static const struct snd_kcontrol_new rt5670_if1_adc2_in_mux =
  993. SOC_DAPM_ENUM("IF1 ADC2 IN source", rt5670_if1_adc2_in_enum);
  994. /* MX-2F [14:12] */
  995. static const char * const rt5670_if2_adc_in_src[] = {
  996. "IF_ADC1", "IF_ADC2", "IF_ADC3", "TxDC_DAC", "TxDP_ADC", "VAD_ADC"
  997. };
  998. static SOC_ENUM_SINGLE_DECL(rt5670_if2_adc_in_enum, RT5670_DIG_INF1_DATA,
  999. RT5670_IF2_ADC_IN_SFT, rt5670_if2_adc_in_src);
  1000. static const struct snd_kcontrol_new rt5670_if2_adc_in_mux =
  1001. SOC_DAPM_ENUM("IF2 ADC IN source", rt5670_if2_adc_in_enum);
  1002. /* MX-30 [5:4] */
  1003. static const char * const rt5670_if4_adc_in_src[] = {
  1004. "IF_ADC1", "IF_ADC2", "IF_ADC3"
  1005. };
  1006. static SOC_ENUM_SINGLE_DECL(rt5670_if4_adc_in_enum, RT5670_DIG_INF2_DATA,
  1007. RT5670_IF4_ADC_IN_SFT, rt5670_if4_adc_in_src);
  1008. static const struct snd_kcontrol_new rt5670_if4_adc_in_mux =
  1009. SOC_DAPM_ENUM("IF4 ADC IN source", rt5670_if4_adc_in_enum);
  1010. /* MX-31 [15] [13] [11] [9] */
  1011. static const char * const rt5670_pdm_src[] = {
  1012. "Mono DAC", "Stereo DAC"
  1013. };
  1014. static SOC_ENUM_SINGLE_DECL(rt5670_pdm1_l_enum, RT5670_PDM_OUT_CTRL,
  1015. RT5670_PDM1_L_SFT, rt5670_pdm_src);
  1016. static const struct snd_kcontrol_new rt5670_pdm1_l_mux =
  1017. SOC_DAPM_ENUM("PDM1 L source", rt5670_pdm1_l_enum);
  1018. static SOC_ENUM_SINGLE_DECL(rt5670_pdm1_r_enum, RT5670_PDM_OUT_CTRL,
  1019. RT5670_PDM1_R_SFT, rt5670_pdm_src);
  1020. static const struct snd_kcontrol_new rt5670_pdm1_r_mux =
  1021. SOC_DAPM_ENUM("PDM1 R source", rt5670_pdm1_r_enum);
  1022. static SOC_ENUM_SINGLE_DECL(rt5670_pdm2_l_enum, RT5670_PDM_OUT_CTRL,
  1023. RT5670_PDM2_L_SFT, rt5670_pdm_src);
  1024. static const struct snd_kcontrol_new rt5670_pdm2_l_mux =
  1025. SOC_DAPM_ENUM("PDM2 L source", rt5670_pdm2_l_enum);
  1026. static SOC_ENUM_SINGLE_DECL(rt5670_pdm2_r_enum, RT5670_PDM_OUT_CTRL,
  1027. RT5670_PDM2_R_SFT, rt5670_pdm_src);
  1028. static const struct snd_kcontrol_new rt5670_pdm2_r_mux =
  1029. SOC_DAPM_ENUM("PDM2 R source", rt5670_pdm2_r_enum);
  1030. /* MX-FA [12] */
  1031. static const char * const rt5670_if1_adc1_in1_src[] = {
  1032. "IF_ADC1", "IF1_ADC3"
  1033. };
  1034. static SOC_ENUM_SINGLE_DECL(rt5670_if1_adc1_in1_enum, RT5670_DIG_MISC,
  1035. RT5670_IF1_ADC1_IN1_SFT, rt5670_if1_adc1_in1_src);
  1036. static const struct snd_kcontrol_new rt5670_if1_adc1_in1_mux =
  1037. SOC_DAPM_ENUM("IF1 ADC1 IN1 source", rt5670_if1_adc1_in1_enum);
  1038. /* MX-FA [11] */
  1039. static const char * const rt5670_if1_adc1_in2_src[] = {
  1040. "IF1_ADC1_IN1", "IF1_ADC4"
  1041. };
  1042. static SOC_ENUM_SINGLE_DECL(rt5670_if1_adc1_in2_enum, RT5670_DIG_MISC,
  1043. RT5670_IF1_ADC1_IN2_SFT, rt5670_if1_adc1_in2_src);
  1044. static const struct snd_kcontrol_new rt5670_if1_adc1_in2_mux =
  1045. SOC_DAPM_ENUM("IF1 ADC1 IN2 source", rt5670_if1_adc1_in2_enum);
  1046. /* MX-FA [10] */
  1047. static const char * const rt5670_if1_adc2_in1_src[] = {
  1048. "IF1_ADC2_IN", "IF1_ADC4"
  1049. };
  1050. static SOC_ENUM_SINGLE_DECL(rt5670_if1_adc2_in1_enum, RT5670_DIG_MISC,
  1051. RT5670_IF1_ADC2_IN1_SFT, rt5670_if1_adc2_in1_src);
  1052. static const struct snd_kcontrol_new rt5670_if1_adc2_in1_mux =
  1053. SOC_DAPM_ENUM("IF1 ADC2 IN1 source", rt5670_if1_adc2_in1_enum);
  1054. /* MX-9D [9:8] */
  1055. static const char * const rt5670_vad_adc_src[] = {
  1056. "Sto1 ADC L", "Mono ADC L", "Mono ADC R", "Sto2 ADC L"
  1057. };
  1058. static SOC_ENUM_SINGLE_DECL(rt5670_vad_adc_enum, RT5670_VAD_CTRL4,
  1059. RT5670_VAD_SEL_SFT, rt5670_vad_adc_src);
  1060. static const struct snd_kcontrol_new rt5670_vad_adc_mux =
  1061. SOC_DAPM_ENUM("VAD ADC source", rt5670_vad_adc_enum);
  1062. static int rt5670_hp_power_event(struct snd_soc_dapm_widget *w,
  1063. struct snd_kcontrol *kcontrol, int event)
  1064. {
  1065. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  1066. struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec);
  1067. switch (event) {
  1068. case SND_SOC_DAPM_POST_PMU:
  1069. regmap_update_bits(rt5670->regmap, RT5670_CHARGE_PUMP,
  1070. RT5670_PM_HP_MASK, RT5670_PM_HP_HV);
  1071. regmap_update_bits(rt5670->regmap, RT5670_GEN_CTRL2,
  1072. 0x0400, 0x0400);
  1073. /* headphone amp power on */
  1074. regmap_update_bits(rt5670->regmap, RT5670_PWR_ANLG1,
  1075. RT5670_PWR_HA | RT5670_PWR_FV1 |
  1076. RT5670_PWR_FV2, RT5670_PWR_HA |
  1077. RT5670_PWR_FV1 | RT5670_PWR_FV2);
  1078. /* depop parameters */
  1079. regmap_write(rt5670->regmap, RT5670_DEPOP_M2, 0x3100);
  1080. regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x8009);
  1081. regmap_write(rt5670->regmap, RT5670_PR_BASE +
  1082. RT5670_HP_DCC_INT1, 0x9f00);
  1083. mdelay(20);
  1084. regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x8019);
  1085. break;
  1086. case SND_SOC_DAPM_PRE_PMD:
  1087. regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x0004);
  1088. msleep(30);
  1089. break;
  1090. default:
  1091. return 0;
  1092. }
  1093. return 0;
  1094. }
  1095. static int rt5670_hp_event(struct snd_soc_dapm_widget *w,
  1096. struct snd_kcontrol *kcontrol, int event)
  1097. {
  1098. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  1099. struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec);
  1100. switch (event) {
  1101. case SND_SOC_DAPM_POST_PMU:
  1102. /* headphone unmute sequence */
  1103. regmap_write(rt5670->regmap, RT5670_PR_BASE +
  1104. RT5670_MAMP_INT_REG2, 0xb400);
  1105. regmap_write(rt5670->regmap, RT5670_DEPOP_M3, 0x0772);
  1106. regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x805d);
  1107. regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x831d);
  1108. regmap_update_bits(rt5670->regmap, RT5670_GEN_CTRL2,
  1109. 0x0300, 0x0300);
  1110. regmap_update_bits(rt5670->regmap, RT5670_HP_VOL,
  1111. RT5670_L_MUTE | RT5670_R_MUTE, 0);
  1112. msleep(80);
  1113. regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x8019);
  1114. break;
  1115. case SND_SOC_DAPM_PRE_PMD:
  1116. /* headphone mute sequence */
  1117. regmap_write(rt5670->regmap, RT5670_PR_BASE +
  1118. RT5670_MAMP_INT_REG2, 0xb400);
  1119. regmap_write(rt5670->regmap, RT5670_DEPOP_M3, 0x0772);
  1120. regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x803d);
  1121. mdelay(10);
  1122. regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x831d);
  1123. mdelay(10);
  1124. regmap_update_bits(rt5670->regmap, RT5670_HP_VOL,
  1125. RT5670_L_MUTE | RT5670_R_MUTE,
  1126. RT5670_L_MUTE | RT5670_R_MUTE);
  1127. msleep(20);
  1128. regmap_update_bits(rt5670->regmap,
  1129. RT5670_GEN_CTRL2, 0x0300, 0x0);
  1130. regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x8019);
  1131. regmap_write(rt5670->regmap, RT5670_DEPOP_M3, 0x0707);
  1132. regmap_write(rt5670->regmap, RT5670_PR_BASE +
  1133. RT5670_MAMP_INT_REG2, 0xfc00);
  1134. break;
  1135. default:
  1136. return 0;
  1137. }
  1138. return 0;
  1139. }
  1140. static int rt5670_bst1_event(struct snd_soc_dapm_widget *w,
  1141. struct snd_kcontrol *kcontrol, int event)
  1142. {
  1143. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  1144. switch (event) {
  1145. case SND_SOC_DAPM_POST_PMU:
  1146. snd_soc_update_bits(codec, RT5670_PWR_ANLG2,
  1147. RT5670_PWR_BST1_P, RT5670_PWR_BST1_P);
  1148. break;
  1149. case SND_SOC_DAPM_PRE_PMD:
  1150. snd_soc_update_bits(codec, RT5670_PWR_ANLG2,
  1151. RT5670_PWR_BST1_P, 0);
  1152. break;
  1153. default:
  1154. return 0;
  1155. }
  1156. return 0;
  1157. }
  1158. static int rt5670_bst2_event(struct snd_soc_dapm_widget *w,
  1159. struct snd_kcontrol *kcontrol, int event)
  1160. {
  1161. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  1162. switch (event) {
  1163. case SND_SOC_DAPM_POST_PMU:
  1164. snd_soc_update_bits(codec, RT5670_PWR_ANLG2,
  1165. RT5670_PWR_BST2_P, RT5670_PWR_BST2_P);
  1166. break;
  1167. case SND_SOC_DAPM_PRE_PMD:
  1168. snd_soc_update_bits(codec, RT5670_PWR_ANLG2,
  1169. RT5670_PWR_BST2_P, 0);
  1170. break;
  1171. default:
  1172. return 0;
  1173. }
  1174. return 0;
  1175. }
  1176. static const struct snd_soc_dapm_widget rt5670_dapm_widgets[] = {
  1177. SND_SOC_DAPM_SUPPLY("PLL1", RT5670_PWR_ANLG2,
  1178. RT5670_PWR_PLL_BIT, 0, NULL, 0),
  1179. SND_SOC_DAPM_SUPPLY("I2S DSP", RT5670_PWR_DIG2,
  1180. RT5670_PWR_I2S_DSP_BIT, 0, NULL, 0),
  1181. SND_SOC_DAPM_SUPPLY("Mic Det Power", RT5670_PWR_VOL,
  1182. RT5670_PWR_MIC_DET_BIT, 0, NULL, 0),
  1183. /* ASRC */
  1184. SND_SOC_DAPM_SUPPLY_S("I2S1 ASRC", 1, RT5670_ASRC_1,
  1185. 11, 0, NULL, 0),
  1186. SND_SOC_DAPM_SUPPLY_S("I2S2 ASRC", 1, RT5670_ASRC_1,
  1187. 12, 0, NULL, 0),
  1188. SND_SOC_DAPM_SUPPLY_S("DAC STO ASRC", 1, RT5670_ASRC_1,
  1189. 10, 0, NULL, 0),
  1190. SND_SOC_DAPM_SUPPLY_S("DAC MONO L ASRC", 1, RT5670_ASRC_1,
  1191. 9, 0, NULL, 0),
  1192. SND_SOC_DAPM_SUPPLY_S("DAC MONO R ASRC", 1, RT5670_ASRC_1,
  1193. 8, 0, NULL, 0),
  1194. SND_SOC_DAPM_SUPPLY_S("DMIC STO1 ASRC", 1, RT5670_ASRC_1,
  1195. 7, 0, NULL, 0),
  1196. SND_SOC_DAPM_SUPPLY_S("DMIC STO2 ASRC", 1, RT5670_ASRC_1,
  1197. 6, 0, NULL, 0),
  1198. SND_SOC_DAPM_SUPPLY_S("DMIC MONO L ASRC", 1, RT5670_ASRC_1,
  1199. 5, 0, NULL, 0),
  1200. SND_SOC_DAPM_SUPPLY_S("DMIC MONO R ASRC", 1, RT5670_ASRC_1,
  1201. 4, 0, NULL, 0),
  1202. SND_SOC_DAPM_SUPPLY_S("ADC STO1 ASRC", 1, RT5670_ASRC_1,
  1203. 3, 0, NULL, 0),
  1204. SND_SOC_DAPM_SUPPLY_S("ADC STO2 ASRC", 1, RT5670_ASRC_1,
  1205. 2, 0, NULL, 0),
  1206. SND_SOC_DAPM_SUPPLY_S("ADC MONO L ASRC", 1, RT5670_ASRC_1,
  1207. 1, 0, NULL, 0),
  1208. SND_SOC_DAPM_SUPPLY_S("ADC MONO R ASRC", 1, RT5670_ASRC_1,
  1209. 0, 0, NULL, 0),
  1210. /* Input Side */
  1211. /* micbias */
  1212. SND_SOC_DAPM_SUPPLY("MICBIAS1", RT5670_PWR_ANLG2,
  1213. RT5670_PWR_MB1_BIT, 0, NULL, 0),
  1214. /* Input Lines */
  1215. SND_SOC_DAPM_INPUT("DMIC L1"),
  1216. SND_SOC_DAPM_INPUT("DMIC R1"),
  1217. SND_SOC_DAPM_INPUT("DMIC L2"),
  1218. SND_SOC_DAPM_INPUT("DMIC R2"),
  1219. SND_SOC_DAPM_INPUT("DMIC L3"),
  1220. SND_SOC_DAPM_INPUT("DMIC R3"),
  1221. SND_SOC_DAPM_INPUT("IN1P"),
  1222. SND_SOC_DAPM_INPUT("IN1N"),
  1223. SND_SOC_DAPM_INPUT("IN2P"),
  1224. SND_SOC_DAPM_INPUT("IN2N"),
  1225. SND_SOC_DAPM_PGA("DMIC1", SND_SOC_NOPM, 0, 0, NULL, 0),
  1226. SND_SOC_DAPM_PGA("DMIC2", SND_SOC_NOPM, 0, 0, NULL, 0),
  1227. SND_SOC_DAPM_PGA("DMIC3", SND_SOC_NOPM, 0, 0, NULL, 0),
  1228. SND_SOC_DAPM_SUPPLY("DMIC CLK", SND_SOC_NOPM, 0, 0,
  1229. set_dmic_clk, SND_SOC_DAPM_PRE_PMU),
  1230. SND_SOC_DAPM_SUPPLY("DMIC1 Power", RT5670_DMIC_CTRL1,
  1231. RT5670_DMIC_1_EN_SFT, 0, NULL, 0),
  1232. SND_SOC_DAPM_SUPPLY("DMIC2 Power", RT5670_DMIC_CTRL1,
  1233. RT5670_DMIC_2_EN_SFT, 0, NULL, 0),
  1234. SND_SOC_DAPM_SUPPLY("DMIC3 Power", RT5670_DMIC_CTRL1,
  1235. RT5670_DMIC_3_EN_SFT, 0, NULL, 0),
  1236. /* Boost */
  1237. SND_SOC_DAPM_PGA_E("BST1", RT5670_PWR_ANLG2, RT5670_PWR_BST1_BIT,
  1238. 0, NULL, 0, rt5670_bst1_event,
  1239. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
  1240. SND_SOC_DAPM_PGA_E("BST2", RT5670_PWR_ANLG2, RT5670_PWR_BST2_BIT,
  1241. 0, NULL, 0, rt5670_bst2_event,
  1242. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
  1243. /* Input Volume */
  1244. SND_SOC_DAPM_PGA("INL VOL", RT5670_PWR_VOL,
  1245. RT5670_PWR_IN_L_BIT, 0, NULL, 0),
  1246. SND_SOC_DAPM_PGA("INR VOL", RT5670_PWR_VOL,
  1247. RT5670_PWR_IN_R_BIT, 0, NULL, 0),
  1248. /* REC Mixer */
  1249. SND_SOC_DAPM_MIXER("RECMIXL", RT5670_PWR_MIXER, RT5670_PWR_RM_L_BIT, 0,
  1250. rt5670_rec_l_mix, ARRAY_SIZE(rt5670_rec_l_mix)),
  1251. SND_SOC_DAPM_MIXER("RECMIXR", RT5670_PWR_MIXER, RT5670_PWR_RM_R_BIT, 0,
  1252. rt5670_rec_r_mix, ARRAY_SIZE(rt5670_rec_r_mix)),
  1253. /* ADCs */
  1254. SND_SOC_DAPM_ADC("ADC 1", NULL, SND_SOC_NOPM, 0, 0),
  1255. SND_SOC_DAPM_ADC("ADC 2", NULL, SND_SOC_NOPM, 0, 0),
  1256. SND_SOC_DAPM_PGA("ADC 1_2", SND_SOC_NOPM, 0, 0, NULL, 0),
  1257. SND_SOC_DAPM_SUPPLY("ADC 1 power", RT5670_PWR_DIG1,
  1258. RT5670_PWR_ADC_L_BIT, 0, NULL, 0),
  1259. SND_SOC_DAPM_SUPPLY("ADC 2 power", RT5670_PWR_DIG1,
  1260. RT5670_PWR_ADC_R_BIT, 0, NULL, 0),
  1261. SND_SOC_DAPM_SUPPLY("ADC clock", RT5670_PR_BASE +
  1262. RT5670_CHOP_DAC_ADC, 12, 0, NULL, 0),
  1263. /* ADC Mux */
  1264. SND_SOC_DAPM_MUX("Stereo1 DMIC Mux", SND_SOC_NOPM, 0, 0,
  1265. &rt5670_sto1_dmic_mux),
  1266. SND_SOC_DAPM_MUX("Stereo1 ADC L2 Mux", SND_SOC_NOPM, 0, 0,
  1267. &rt5670_sto_adc_l2_mux),
  1268. SND_SOC_DAPM_MUX("Stereo1 ADC R2 Mux", SND_SOC_NOPM, 0, 0,
  1269. &rt5670_sto_adc_r2_mux),
  1270. SND_SOC_DAPM_MUX("Stereo1 ADC L1 Mux", SND_SOC_NOPM, 0, 0,
  1271. &rt5670_sto_adc_l1_mux),
  1272. SND_SOC_DAPM_MUX("Stereo1 ADC R1 Mux", SND_SOC_NOPM, 0, 0,
  1273. &rt5670_sto_adc_r1_mux),
  1274. SND_SOC_DAPM_MUX("Stereo2 DMIC Mux", SND_SOC_NOPM, 0, 0,
  1275. &rt5670_sto2_dmic_mux),
  1276. SND_SOC_DAPM_MUX("Stereo2 ADC L2 Mux", SND_SOC_NOPM, 0, 0,
  1277. &rt5670_sto2_adc_l2_mux),
  1278. SND_SOC_DAPM_MUX("Stereo2 ADC R2 Mux", SND_SOC_NOPM, 0, 0,
  1279. &rt5670_sto2_adc_r2_mux),
  1280. SND_SOC_DAPM_MUX("Stereo2 ADC L1 Mux", SND_SOC_NOPM, 0, 0,
  1281. &rt5670_sto2_adc_l1_mux),
  1282. SND_SOC_DAPM_MUX("Stereo2 ADC R1 Mux", SND_SOC_NOPM, 0, 0,
  1283. &rt5670_sto2_adc_r1_mux),
  1284. SND_SOC_DAPM_MUX("Stereo2 ADC LR Mux", SND_SOC_NOPM, 0, 0,
  1285. &rt5670_sto2_adc_lr_mux),
  1286. SND_SOC_DAPM_MUX("Mono DMIC L Mux", SND_SOC_NOPM, 0, 0,
  1287. &rt5670_mono_dmic_l_mux),
  1288. SND_SOC_DAPM_MUX("Mono DMIC R Mux", SND_SOC_NOPM, 0, 0,
  1289. &rt5670_mono_dmic_r_mux),
  1290. SND_SOC_DAPM_MUX("Mono ADC L2 Mux", SND_SOC_NOPM, 0, 0,
  1291. &rt5670_mono_adc_l2_mux),
  1292. SND_SOC_DAPM_MUX("Mono ADC L1 Mux", SND_SOC_NOPM, 0, 0,
  1293. &rt5670_mono_adc_l1_mux),
  1294. SND_SOC_DAPM_MUX("Mono ADC R1 Mux", SND_SOC_NOPM, 0, 0,
  1295. &rt5670_mono_adc_r1_mux),
  1296. SND_SOC_DAPM_MUX("Mono ADC R2 Mux", SND_SOC_NOPM, 0, 0,
  1297. &rt5670_mono_adc_r2_mux),
  1298. /* ADC Mixer */
  1299. SND_SOC_DAPM_SUPPLY("ADC Stereo1 Filter", RT5670_PWR_DIG2,
  1300. RT5670_PWR_ADC_S1F_BIT, 0, NULL, 0),
  1301. SND_SOC_DAPM_SUPPLY("ADC Stereo2 Filter", RT5670_PWR_DIG2,
  1302. RT5670_PWR_ADC_S2F_BIT, 0, NULL, 0),
  1303. SND_SOC_DAPM_MIXER("Sto1 ADC MIXL", RT5670_STO1_ADC_DIG_VOL,
  1304. RT5670_L_MUTE_SFT, 1, rt5670_sto1_adc_l_mix,
  1305. ARRAY_SIZE(rt5670_sto1_adc_l_mix)),
  1306. SND_SOC_DAPM_MIXER("Sto1 ADC MIXR", RT5670_STO1_ADC_DIG_VOL,
  1307. RT5670_R_MUTE_SFT, 1, rt5670_sto1_adc_r_mix,
  1308. ARRAY_SIZE(rt5670_sto1_adc_r_mix)),
  1309. SND_SOC_DAPM_MIXER("Sto2 ADC MIXL", SND_SOC_NOPM, 0, 0,
  1310. rt5670_sto2_adc_l_mix,
  1311. ARRAY_SIZE(rt5670_sto2_adc_l_mix)),
  1312. SND_SOC_DAPM_MIXER("Sto2 ADC MIXR", SND_SOC_NOPM, 0, 0,
  1313. rt5670_sto2_adc_r_mix,
  1314. ARRAY_SIZE(rt5670_sto2_adc_r_mix)),
  1315. SND_SOC_DAPM_SUPPLY("ADC Mono Left Filter", RT5670_PWR_DIG2,
  1316. RT5670_PWR_ADC_MF_L_BIT, 0, NULL, 0),
  1317. SND_SOC_DAPM_MIXER("Mono ADC MIXL", RT5670_MONO_ADC_DIG_VOL,
  1318. RT5670_L_MUTE_SFT, 1, rt5670_mono_adc_l_mix,
  1319. ARRAY_SIZE(rt5670_mono_adc_l_mix)),
  1320. SND_SOC_DAPM_SUPPLY("ADC Mono Right Filter", RT5670_PWR_DIG2,
  1321. RT5670_PWR_ADC_MF_R_BIT, 0, NULL, 0),
  1322. SND_SOC_DAPM_MIXER("Mono ADC MIXR", RT5670_MONO_ADC_DIG_VOL,
  1323. RT5670_R_MUTE_SFT, 1, rt5670_mono_adc_r_mix,
  1324. ARRAY_SIZE(rt5670_mono_adc_r_mix)),
  1325. /* ADC PGA */
  1326. SND_SOC_DAPM_PGA("Stereo1 ADC MIXL", SND_SOC_NOPM, 0, 0, NULL, 0),
  1327. SND_SOC_DAPM_PGA("Stereo1 ADC MIXR", SND_SOC_NOPM, 0, 0, NULL, 0),
  1328. SND_SOC_DAPM_PGA("Stereo2 ADC MIXL", SND_SOC_NOPM, 0, 0, NULL, 0),
  1329. SND_SOC_DAPM_PGA("Stereo2 ADC MIXR", SND_SOC_NOPM, 0, 0, NULL, 0),
  1330. SND_SOC_DAPM_PGA("Sto2 ADC LR MIX", SND_SOC_NOPM, 0, 0, NULL, 0),
  1331. SND_SOC_DAPM_PGA("Stereo1 ADC MIX", SND_SOC_NOPM, 0, 0, NULL, 0),
  1332. SND_SOC_DAPM_PGA("Stereo2 ADC MIX", SND_SOC_NOPM, 0, 0, NULL, 0),
  1333. SND_SOC_DAPM_PGA("Mono ADC MIX", SND_SOC_NOPM, 0, 0, NULL, 0),
  1334. SND_SOC_DAPM_PGA("VAD_ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
  1335. SND_SOC_DAPM_PGA("IF_ADC1", SND_SOC_NOPM, 0, 0, NULL, 0),
  1336. SND_SOC_DAPM_PGA("IF_ADC2", SND_SOC_NOPM, 0, 0, NULL, 0),
  1337. SND_SOC_DAPM_PGA("IF_ADC3", SND_SOC_NOPM, 0, 0, NULL, 0),
  1338. SND_SOC_DAPM_PGA("IF1_ADC1", SND_SOC_NOPM, 0, 0, NULL, 0),
  1339. SND_SOC_DAPM_PGA("IF1_ADC2", SND_SOC_NOPM, 0, 0, NULL, 0),
  1340. SND_SOC_DAPM_PGA("IF1_ADC3", SND_SOC_NOPM, 0, 0, NULL, 0),
  1341. SND_SOC_DAPM_PGA("IF1_ADC4", SND_SOC_NOPM, 0, 0, NULL, 0),
  1342. /* DSP */
  1343. SND_SOC_DAPM_PGA("TxDP_ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
  1344. SND_SOC_DAPM_PGA("TxDP_ADC_L", SND_SOC_NOPM, 0, 0, NULL, 0),
  1345. SND_SOC_DAPM_PGA("TxDP_ADC_R", SND_SOC_NOPM, 0, 0, NULL, 0),
  1346. SND_SOC_DAPM_PGA("TxDC_DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
  1347. SND_SOC_DAPM_MUX("TDM Data Mux", SND_SOC_NOPM, 0, 0,
  1348. &rt5670_txdp_slot_mux),
  1349. SND_SOC_DAPM_MUX("DSP UL Mux", SND_SOC_NOPM, 0, 0,
  1350. &rt5670_dsp_ul_mux),
  1351. SND_SOC_DAPM_MUX("DSP DL Mux", SND_SOC_NOPM, 0, 0,
  1352. &rt5670_dsp_dl_mux),
  1353. SND_SOC_DAPM_MUX("RxDP Mux", SND_SOC_NOPM, 0, 0,
  1354. &rt5670_rxdp_mux),
  1355. /* IF2 Mux */
  1356. SND_SOC_DAPM_MUX("IF2 ADC Mux", SND_SOC_NOPM, 0, 0,
  1357. &rt5670_if2_adc_in_mux),
  1358. /* Digital Interface */
  1359. SND_SOC_DAPM_SUPPLY("I2S1", RT5670_PWR_DIG1,
  1360. RT5670_PWR_I2S1_BIT, 0, NULL, 0),
  1361. SND_SOC_DAPM_PGA("IF1 DAC1", SND_SOC_NOPM, 0, 0, NULL, 0),
  1362. SND_SOC_DAPM_PGA("IF1 DAC2", SND_SOC_NOPM, 0, 0, NULL, 0),
  1363. SND_SOC_DAPM_PGA("IF1 DAC1 L", SND_SOC_NOPM, 0, 0, NULL, 0),
  1364. SND_SOC_DAPM_PGA("IF1 DAC1 R", SND_SOC_NOPM, 0, 0, NULL, 0),
  1365. SND_SOC_DAPM_PGA("IF1 DAC2 L", SND_SOC_NOPM, 0, 0, NULL, 0),
  1366. SND_SOC_DAPM_PGA("IF1 DAC2 R", SND_SOC_NOPM, 0, 0, NULL, 0),
  1367. SND_SOC_DAPM_PGA("IF1 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
  1368. SND_SOC_DAPM_PGA("IF1 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0),
  1369. SND_SOC_DAPM_PGA("IF1 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0),
  1370. SND_SOC_DAPM_SUPPLY("I2S2", RT5670_PWR_DIG1,
  1371. RT5670_PWR_I2S2_BIT, 0, NULL, 0),
  1372. SND_SOC_DAPM_PGA("IF2 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
  1373. SND_SOC_DAPM_PGA("IF2 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0),
  1374. SND_SOC_DAPM_PGA("IF2 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0),
  1375. SND_SOC_DAPM_PGA("IF2 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
  1376. SND_SOC_DAPM_PGA("IF2 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0),
  1377. SND_SOC_DAPM_PGA("IF2 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0),
  1378. /* Digital Interface Select */
  1379. SND_SOC_DAPM_MUX("IF1 ADC1 IN1 Mux", SND_SOC_NOPM, 0, 0,
  1380. &rt5670_if1_adc1_in1_mux),
  1381. SND_SOC_DAPM_MUX("IF1 ADC1 IN2 Mux", SND_SOC_NOPM, 0, 0,
  1382. &rt5670_if1_adc1_in2_mux),
  1383. SND_SOC_DAPM_MUX("IF1 ADC2 IN Mux", SND_SOC_NOPM, 0, 0,
  1384. &rt5670_if1_adc2_in_mux),
  1385. SND_SOC_DAPM_MUX("IF1 ADC2 IN1 Mux", SND_SOC_NOPM, 0, 0,
  1386. &rt5670_if1_adc2_in1_mux),
  1387. SND_SOC_DAPM_MUX("VAD ADC Mux", SND_SOC_NOPM, 0, 0,
  1388. &rt5670_vad_adc_mux),
  1389. /* Audio Interface */
  1390. SND_SOC_DAPM_AIF_IN("AIF1RX", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0),
  1391. SND_SOC_DAPM_AIF_OUT("AIF1TX", "AIF1 Capture", 0, SND_SOC_NOPM, 0, 0),
  1392. SND_SOC_DAPM_AIF_IN("AIF2RX", "AIF2 Playback", 0, SND_SOC_NOPM, 0, 0),
  1393. SND_SOC_DAPM_AIF_OUT("AIF2TX", "AIF2 Capture", 0,
  1394. RT5670_GPIO_CTRL1, RT5670_I2S2_PIN_SFT, 1),
  1395. /* Audio DSP */
  1396. SND_SOC_DAPM_PGA("Audio DSP", SND_SOC_NOPM, 0, 0, NULL, 0),
  1397. /* Output Side */
  1398. /* DAC mixer before sound effect */
  1399. SND_SOC_DAPM_MIXER("DAC1 MIXL", SND_SOC_NOPM, 0, 0,
  1400. rt5670_dac_l_mix, ARRAY_SIZE(rt5670_dac_l_mix)),
  1401. SND_SOC_DAPM_MIXER("DAC1 MIXR", SND_SOC_NOPM, 0, 0,
  1402. rt5670_dac_r_mix, ARRAY_SIZE(rt5670_dac_r_mix)),
  1403. SND_SOC_DAPM_PGA("DAC MIX", SND_SOC_NOPM, 0, 0, NULL, 0),
  1404. /* DAC2 channel Mux */
  1405. SND_SOC_DAPM_MUX("DAC L2 Mux", SND_SOC_NOPM, 0, 0,
  1406. &rt5670_dac_l2_mux),
  1407. SND_SOC_DAPM_MUX("DAC R2 Mux", SND_SOC_NOPM, 0, 0,
  1408. &rt5670_dac_r2_mux),
  1409. SND_SOC_DAPM_PGA("DAC L2 Volume", RT5670_PWR_DIG1,
  1410. RT5670_PWR_DAC_L2_BIT, 0, NULL, 0),
  1411. SND_SOC_DAPM_PGA("DAC R2 Volume", RT5670_PWR_DIG1,
  1412. RT5670_PWR_DAC_R2_BIT, 0, NULL, 0),
  1413. SND_SOC_DAPM_MUX("DAC1 L Mux", SND_SOC_NOPM, 0, 0, &rt5670_dac1l_mux),
  1414. SND_SOC_DAPM_MUX("DAC1 R Mux", SND_SOC_NOPM, 0, 0, &rt5670_dac1r_mux),
  1415. /* DAC Mixer */
  1416. SND_SOC_DAPM_SUPPLY("DAC Stereo1 Filter", RT5670_PWR_DIG2,
  1417. RT5670_PWR_DAC_S1F_BIT, 0, NULL, 0),
  1418. SND_SOC_DAPM_SUPPLY("DAC Mono Left Filter", RT5670_PWR_DIG2,
  1419. RT5670_PWR_DAC_MF_L_BIT, 0, NULL, 0),
  1420. SND_SOC_DAPM_SUPPLY("DAC Mono Right Filter", RT5670_PWR_DIG2,
  1421. RT5670_PWR_DAC_MF_R_BIT, 0, NULL, 0),
  1422. SND_SOC_DAPM_MIXER("Stereo DAC MIXL", SND_SOC_NOPM, 0, 0,
  1423. rt5670_sto_dac_l_mix,
  1424. ARRAY_SIZE(rt5670_sto_dac_l_mix)),
  1425. SND_SOC_DAPM_MIXER("Stereo DAC MIXR", SND_SOC_NOPM, 0, 0,
  1426. rt5670_sto_dac_r_mix,
  1427. ARRAY_SIZE(rt5670_sto_dac_r_mix)),
  1428. SND_SOC_DAPM_MIXER("Mono DAC MIXL", SND_SOC_NOPM, 0, 0,
  1429. rt5670_mono_dac_l_mix,
  1430. ARRAY_SIZE(rt5670_mono_dac_l_mix)),
  1431. SND_SOC_DAPM_MIXER("Mono DAC MIXR", SND_SOC_NOPM, 0, 0,
  1432. rt5670_mono_dac_r_mix,
  1433. ARRAY_SIZE(rt5670_mono_dac_r_mix)),
  1434. SND_SOC_DAPM_MIXER("DAC MIXL", SND_SOC_NOPM, 0, 0,
  1435. rt5670_dig_l_mix,
  1436. ARRAY_SIZE(rt5670_dig_l_mix)),
  1437. SND_SOC_DAPM_MIXER("DAC MIXR", SND_SOC_NOPM, 0, 0,
  1438. rt5670_dig_r_mix,
  1439. ARRAY_SIZE(rt5670_dig_r_mix)),
  1440. /* DACs */
  1441. SND_SOC_DAPM_SUPPLY("DAC L1 Power", RT5670_PWR_DIG1,
  1442. RT5670_PWR_DAC_L1_BIT, 0, NULL, 0),
  1443. SND_SOC_DAPM_SUPPLY("DAC R1 Power", RT5670_PWR_DIG1,
  1444. RT5670_PWR_DAC_R1_BIT, 0, NULL, 0),
  1445. SND_SOC_DAPM_DAC("DAC L1", NULL, SND_SOC_NOPM, 0, 0),
  1446. SND_SOC_DAPM_DAC("DAC R1", NULL, SND_SOC_NOPM, 0, 0),
  1447. SND_SOC_DAPM_DAC("DAC L2", NULL, RT5670_PWR_DIG1,
  1448. RT5670_PWR_DAC_L2_BIT, 0),
  1449. SND_SOC_DAPM_DAC("DAC R2", NULL, RT5670_PWR_DIG1,
  1450. RT5670_PWR_DAC_R2_BIT, 0),
  1451. /* OUT Mixer */
  1452. SND_SOC_DAPM_MIXER("OUT MIXL", RT5670_PWR_MIXER, RT5670_PWR_OM_L_BIT,
  1453. 0, rt5670_out_l_mix, ARRAY_SIZE(rt5670_out_l_mix)),
  1454. SND_SOC_DAPM_MIXER("OUT MIXR", RT5670_PWR_MIXER, RT5670_PWR_OM_R_BIT,
  1455. 0, rt5670_out_r_mix, ARRAY_SIZE(rt5670_out_r_mix)),
  1456. /* Ouput Volume */
  1457. SND_SOC_DAPM_MIXER("HPOVOL MIXL", RT5670_PWR_VOL,
  1458. RT5670_PWR_HV_L_BIT, 0,
  1459. rt5670_hpvoll_mix, ARRAY_SIZE(rt5670_hpvoll_mix)),
  1460. SND_SOC_DAPM_MIXER("HPOVOL MIXR", RT5670_PWR_VOL,
  1461. RT5670_PWR_HV_R_BIT, 0,
  1462. rt5670_hpvolr_mix, ARRAY_SIZE(rt5670_hpvolr_mix)),
  1463. SND_SOC_DAPM_PGA("DAC 1", SND_SOC_NOPM, 0, 0, NULL, 0),
  1464. SND_SOC_DAPM_PGA("DAC 2", SND_SOC_NOPM, 0, 0, NULL, 0),
  1465. SND_SOC_DAPM_PGA("HPOVOL", SND_SOC_NOPM, 0, 0, NULL, 0),
  1466. /* HPO/LOUT/Mono Mixer */
  1467. SND_SOC_DAPM_MIXER("HPO MIX", SND_SOC_NOPM, 0, 0,
  1468. rt5670_hpo_mix, ARRAY_SIZE(rt5670_hpo_mix)),
  1469. SND_SOC_DAPM_MIXER("LOUT MIX", RT5670_PWR_ANLG1, RT5670_PWR_LM_BIT,
  1470. 0, rt5670_lout_mix, ARRAY_SIZE(rt5670_lout_mix)),
  1471. SND_SOC_DAPM_SUPPLY_S("Improve HP Amp Drv", 1, SND_SOC_NOPM, 0, 0,
  1472. rt5670_hp_power_event, SND_SOC_DAPM_POST_PMU |
  1473. SND_SOC_DAPM_PRE_PMD),
  1474. SND_SOC_DAPM_SUPPLY("HP L Amp", RT5670_PWR_ANLG1,
  1475. RT5670_PWR_HP_L_BIT, 0, NULL, 0),
  1476. SND_SOC_DAPM_SUPPLY("HP R Amp", RT5670_PWR_ANLG1,
  1477. RT5670_PWR_HP_R_BIT, 0, NULL, 0),
  1478. SND_SOC_DAPM_PGA_S("HP Amp", 1, SND_SOC_NOPM, 0, 0,
  1479. rt5670_hp_event, SND_SOC_DAPM_PRE_PMD |
  1480. SND_SOC_DAPM_POST_PMU),
  1481. SND_SOC_DAPM_SWITCH("LOUT L Playback", SND_SOC_NOPM, 0, 0,
  1482. &lout_l_enable_control),
  1483. SND_SOC_DAPM_SWITCH("LOUT R Playback", SND_SOC_NOPM, 0, 0,
  1484. &lout_r_enable_control),
  1485. SND_SOC_DAPM_PGA("LOUT Amp", SND_SOC_NOPM, 0, 0, NULL, 0),
  1486. /* PDM */
  1487. SND_SOC_DAPM_SUPPLY("PDM1 Power", RT5670_PWR_DIG2,
  1488. RT5670_PWR_PDM1_BIT, 0, NULL, 0),
  1489. SND_SOC_DAPM_MUX("PDM1 L Mux", RT5670_PDM_OUT_CTRL,
  1490. RT5670_M_PDM1_L_SFT, 1, &rt5670_pdm1_l_mux),
  1491. SND_SOC_DAPM_MUX("PDM1 R Mux", RT5670_PDM_OUT_CTRL,
  1492. RT5670_M_PDM1_R_SFT, 1, &rt5670_pdm1_r_mux),
  1493. /* Output Lines */
  1494. SND_SOC_DAPM_OUTPUT("HPOL"),
  1495. SND_SOC_DAPM_OUTPUT("HPOR"),
  1496. SND_SOC_DAPM_OUTPUT("LOUTL"),
  1497. SND_SOC_DAPM_OUTPUT("LOUTR"),
  1498. };
  1499. static const struct snd_soc_dapm_widget rt5670_specific_dapm_widgets[] = {
  1500. SND_SOC_DAPM_SUPPLY("PDM2 Power", RT5670_PWR_DIG2,
  1501. RT5670_PWR_PDM2_BIT, 0, NULL, 0),
  1502. SND_SOC_DAPM_MUX("PDM2 L Mux", RT5670_PDM_OUT_CTRL,
  1503. RT5670_M_PDM2_L_SFT, 1, &rt5670_pdm2_l_mux),
  1504. SND_SOC_DAPM_MUX("PDM2 R Mux", RT5670_PDM_OUT_CTRL,
  1505. RT5670_M_PDM2_R_SFT, 1, &rt5670_pdm2_r_mux),
  1506. SND_SOC_DAPM_OUTPUT("PDM1L"),
  1507. SND_SOC_DAPM_OUTPUT("PDM1R"),
  1508. SND_SOC_DAPM_OUTPUT("PDM2L"),
  1509. SND_SOC_DAPM_OUTPUT("PDM2R"),
  1510. };
  1511. static const struct snd_soc_dapm_widget rt5672_specific_dapm_widgets[] = {
  1512. SND_SOC_DAPM_PGA("SPO Amp", SND_SOC_NOPM, 0, 0, NULL, 0),
  1513. SND_SOC_DAPM_OUTPUT("SPOLP"),
  1514. SND_SOC_DAPM_OUTPUT("SPOLN"),
  1515. SND_SOC_DAPM_OUTPUT("SPORP"),
  1516. SND_SOC_DAPM_OUTPUT("SPORN"),
  1517. };
  1518. static const struct snd_soc_dapm_route rt5670_dapm_routes[] = {
  1519. { "ADC Stereo1 Filter", NULL, "ADC STO1 ASRC", is_using_asrc },
  1520. { "ADC Stereo2 Filter", NULL, "ADC STO2 ASRC", is_using_asrc },
  1521. { "ADC Mono Left Filter", NULL, "ADC MONO L ASRC", is_using_asrc },
  1522. { "ADC Mono Right Filter", NULL, "ADC MONO R ASRC", is_using_asrc },
  1523. { "DAC Mono Left Filter", NULL, "DAC MONO L ASRC", is_using_asrc },
  1524. { "DAC Mono Right Filter", NULL, "DAC MONO R ASRC", is_using_asrc },
  1525. { "DAC Stereo1 Filter", NULL, "DAC STO ASRC", is_using_asrc },
  1526. { "Stereo1 DMIC Mux", NULL, "DMIC STO1 ASRC", can_use_asrc },
  1527. { "Stereo2 DMIC Mux", NULL, "DMIC STO2 ASRC", can_use_asrc },
  1528. { "Mono DMIC L Mux", NULL, "DMIC MONO L ASRC", can_use_asrc },
  1529. { "Mono DMIC R Mux", NULL, "DMIC MONO R ASRC", can_use_asrc },
  1530. { "I2S1", NULL, "I2S1 ASRC", can_use_asrc},
  1531. { "I2S2", NULL, "I2S2 ASRC", can_use_asrc},
  1532. { "DMIC1", NULL, "DMIC L1" },
  1533. { "DMIC1", NULL, "DMIC R1" },
  1534. { "DMIC2", NULL, "DMIC L2" },
  1535. { "DMIC2", NULL, "DMIC R2" },
  1536. { "DMIC3", NULL, "DMIC L3" },
  1537. { "DMIC3", NULL, "DMIC R3" },
  1538. { "BST1", NULL, "IN1P" },
  1539. { "BST1", NULL, "IN1N" },
  1540. { "BST1", NULL, "Mic Det Power" },
  1541. { "BST2", NULL, "IN2P" },
  1542. { "BST2", NULL, "IN2N" },
  1543. { "INL VOL", NULL, "IN2P" },
  1544. { "INR VOL", NULL, "IN2N" },
  1545. { "RECMIXL", "INL Switch", "INL VOL" },
  1546. { "RECMIXL", "BST2 Switch", "BST2" },
  1547. { "RECMIXL", "BST1 Switch", "BST1" },
  1548. { "RECMIXR", "INR Switch", "INR VOL" },
  1549. { "RECMIXR", "BST2 Switch", "BST2" },
  1550. { "RECMIXR", "BST1 Switch", "BST1" },
  1551. { "ADC 1", NULL, "RECMIXL" },
  1552. { "ADC 1", NULL, "ADC 1 power" },
  1553. { "ADC 1", NULL, "ADC clock" },
  1554. { "ADC 2", NULL, "RECMIXR" },
  1555. { "ADC 2", NULL, "ADC 2 power" },
  1556. { "ADC 2", NULL, "ADC clock" },
  1557. { "DMIC L1", NULL, "DMIC CLK" },
  1558. { "DMIC L1", NULL, "DMIC1 Power" },
  1559. { "DMIC R1", NULL, "DMIC CLK" },
  1560. { "DMIC R1", NULL, "DMIC1 Power" },
  1561. { "DMIC L2", NULL, "DMIC CLK" },
  1562. { "DMIC L2", NULL, "DMIC2 Power" },
  1563. { "DMIC R2", NULL, "DMIC CLK" },
  1564. { "DMIC R2", NULL, "DMIC2 Power" },
  1565. { "DMIC L3", NULL, "DMIC CLK" },
  1566. { "DMIC L3", NULL, "DMIC3 Power" },
  1567. { "DMIC R3", NULL, "DMIC CLK" },
  1568. { "DMIC R3", NULL, "DMIC3 Power" },
  1569. { "Stereo1 DMIC Mux", "DMIC1", "DMIC1" },
  1570. { "Stereo1 DMIC Mux", "DMIC2", "DMIC2" },
  1571. { "Stereo1 DMIC Mux", "DMIC3", "DMIC3" },
  1572. { "Stereo2 DMIC Mux", "DMIC1", "DMIC1" },
  1573. { "Stereo2 DMIC Mux", "DMIC2", "DMIC2" },
  1574. { "Stereo2 DMIC Mux", "DMIC3", "DMIC3" },
  1575. { "Mono DMIC L Mux", "DMIC1", "DMIC L1" },
  1576. { "Mono DMIC L Mux", "DMIC2", "DMIC L2" },
  1577. { "Mono DMIC L Mux", "DMIC3", "DMIC L3" },
  1578. { "Mono DMIC R Mux", "DMIC1", "DMIC R1" },
  1579. { "Mono DMIC R Mux", "DMIC2", "DMIC R2" },
  1580. { "Mono DMIC R Mux", "DMIC3", "DMIC R3" },
  1581. { "ADC 1_2", NULL, "ADC 1" },
  1582. { "ADC 1_2", NULL, "ADC 2" },
  1583. { "Stereo1 ADC L2 Mux", "DMIC", "Stereo1 DMIC Mux" },
  1584. { "Stereo1 ADC L2 Mux", "DAC MIX", "DAC MIXL" },
  1585. { "Stereo1 ADC L1 Mux", "ADC", "ADC 1_2" },
  1586. { "Stereo1 ADC L1 Mux", "DAC MIX", "DAC MIXL" },
  1587. { "Stereo1 ADC R1 Mux", "ADC", "ADC 1_2" },
  1588. { "Stereo1 ADC R1 Mux", "DAC MIX", "DAC MIXR" },
  1589. { "Stereo1 ADC R2 Mux", "DMIC", "Stereo1 DMIC Mux" },
  1590. { "Stereo1 ADC R2 Mux", "DAC MIX", "DAC MIXR" },
  1591. { "Mono ADC L2 Mux", "DMIC", "Mono DMIC L Mux" },
  1592. { "Mono ADC L2 Mux", "Mono DAC MIXL", "Mono DAC MIXL" },
  1593. { "Mono ADC L1 Mux", "Mono DAC MIXL", "Mono DAC MIXL" },
  1594. { "Mono ADC L1 Mux", "ADC1", "ADC 1" },
  1595. { "Mono ADC R1 Mux", "Mono DAC MIXR", "Mono DAC MIXR" },
  1596. { "Mono ADC R1 Mux", "ADC2", "ADC 2" },
  1597. { "Mono ADC R2 Mux", "DMIC", "Mono DMIC R Mux" },
  1598. { "Mono ADC R2 Mux", "Mono DAC MIXR", "Mono DAC MIXR" },
  1599. { "Sto1 ADC MIXL", "ADC1 Switch", "Stereo1 ADC L1 Mux" },
  1600. { "Sto1 ADC MIXL", "ADC2 Switch", "Stereo1 ADC L2 Mux" },
  1601. { "Sto1 ADC MIXR", "ADC1 Switch", "Stereo1 ADC R1 Mux" },
  1602. { "Sto1 ADC MIXR", "ADC2 Switch", "Stereo1 ADC R2 Mux" },
  1603. { "Stereo1 ADC MIXL", NULL, "Sto1 ADC MIXL" },
  1604. { "Stereo1 ADC MIXL", NULL, "ADC Stereo1 Filter" },
  1605. { "ADC Stereo1 Filter", NULL, "PLL1", is_sys_clk_from_pll },
  1606. { "Stereo1 ADC MIXR", NULL, "Sto1 ADC MIXR" },
  1607. { "Stereo1 ADC MIXR", NULL, "ADC Stereo1 Filter" },
  1608. { "ADC Stereo1 Filter", NULL, "PLL1", is_sys_clk_from_pll },
  1609. { "Mono ADC MIXL", "ADC1 Switch", "Mono ADC L1 Mux" },
  1610. { "Mono ADC MIXL", "ADC2 Switch", "Mono ADC L2 Mux" },
  1611. { "Mono ADC MIXL", NULL, "ADC Mono Left Filter" },
  1612. { "ADC Mono Left Filter", NULL, "PLL1", is_sys_clk_from_pll },
  1613. { "Mono ADC MIXR", "ADC1 Switch", "Mono ADC R1 Mux" },
  1614. { "Mono ADC MIXR", "ADC2 Switch", "Mono ADC R2 Mux" },
  1615. { "Mono ADC MIXR", NULL, "ADC Mono Right Filter" },
  1616. { "ADC Mono Right Filter", NULL, "PLL1", is_sys_clk_from_pll },
  1617. { "Stereo2 ADC L2 Mux", "DMIC", "Stereo2 DMIC Mux" },
  1618. { "Stereo2 ADC L2 Mux", "DAC MIX", "DAC MIXL" },
  1619. { "Stereo2 ADC L1 Mux", "ADC", "ADC 1_2" },
  1620. { "Stereo2 ADC L1 Mux", "DAC MIX", "DAC MIXL" },
  1621. { "Stereo2 ADC R1 Mux", "ADC", "ADC 1_2" },
  1622. { "Stereo2 ADC R1 Mux", "DAC MIX", "DAC MIXR" },
  1623. { "Stereo2 ADC R2 Mux", "DMIC", "Stereo2 DMIC Mux" },
  1624. { "Stereo2 ADC R2 Mux", "DAC MIX", "DAC MIXR" },
  1625. { "Sto2 ADC MIXL", "ADC1 Switch", "Stereo2 ADC L1 Mux" },
  1626. { "Sto2 ADC MIXL", "ADC2 Switch", "Stereo2 ADC L2 Mux" },
  1627. { "Sto2 ADC MIXR", "ADC1 Switch", "Stereo2 ADC R1 Mux" },
  1628. { "Sto2 ADC MIXR", "ADC2 Switch", "Stereo2 ADC R2 Mux" },
  1629. { "Sto2 ADC LR MIX", NULL, "Sto2 ADC MIXL" },
  1630. { "Sto2 ADC LR MIX", NULL, "Sto2 ADC MIXR" },
  1631. { "Stereo2 ADC LR Mux", "L", "Sto2 ADC MIXL" },
  1632. { "Stereo2 ADC LR Mux", "LR", "Sto2 ADC LR MIX" },
  1633. { "Stereo2 ADC MIXL", NULL, "Stereo2 ADC LR Mux" },
  1634. { "Stereo2 ADC MIXL", NULL, "ADC Stereo2 Filter" },
  1635. { "ADC Stereo2 Filter", NULL, "PLL1", is_sys_clk_from_pll },
  1636. { "Stereo2 ADC MIXR", NULL, "Sto2 ADC MIXR" },
  1637. { "Stereo2 ADC MIXR", NULL, "ADC Stereo2 Filter" },
  1638. { "ADC Stereo2 Filter", NULL, "PLL1", is_sys_clk_from_pll },
  1639. { "VAD ADC Mux", "Sto1 ADC L", "Stereo1 ADC MIXL" },
  1640. { "VAD ADC Mux", "Mono ADC L", "Mono ADC MIXL" },
  1641. { "VAD ADC Mux", "Mono ADC R", "Mono ADC MIXR" },
  1642. { "VAD ADC Mux", "Sto2 ADC L", "Sto2 ADC MIXL" },
  1643. { "VAD_ADC", NULL, "VAD ADC Mux" },
  1644. { "IF_ADC1", NULL, "Stereo1 ADC MIXL" },
  1645. { "IF_ADC1", NULL, "Stereo1 ADC MIXR" },
  1646. { "IF_ADC2", NULL, "Mono ADC MIXL" },
  1647. { "IF_ADC2", NULL, "Mono ADC MIXR" },
  1648. { "IF_ADC3", NULL, "Stereo2 ADC MIXL" },
  1649. { "IF_ADC3", NULL, "Stereo2 ADC MIXR" },
  1650. { "IF1 ADC1 IN1 Mux", "IF_ADC1", "IF_ADC1" },
  1651. { "IF1 ADC1 IN1 Mux", "IF1_ADC3", "IF1_ADC3" },
  1652. { "IF1 ADC1 IN2 Mux", "IF1_ADC1_IN1", "IF1 ADC1 IN1 Mux" },
  1653. { "IF1 ADC1 IN2 Mux", "IF1_ADC4", "IF1_ADC4" },
  1654. { "IF1 ADC2 IN Mux", "IF_ADC2", "IF_ADC2" },
  1655. { "IF1 ADC2 IN Mux", "VAD_ADC", "VAD_ADC" },
  1656. { "IF1 ADC2 IN1 Mux", "IF1_ADC2_IN", "IF1 ADC2 IN Mux" },
  1657. { "IF1 ADC2 IN1 Mux", "IF1_ADC4", "IF1_ADC4" },
  1658. { "IF1_ADC1" , NULL, "IF1 ADC1 IN2 Mux" },
  1659. { "IF1_ADC2" , NULL, "IF1 ADC2 IN1 Mux" },
  1660. { "Stereo1 ADC MIX", NULL, "Stereo1 ADC MIXL" },
  1661. { "Stereo1 ADC MIX", NULL, "Stereo1 ADC MIXR" },
  1662. { "Stereo2 ADC MIX", NULL, "Sto2 ADC MIXL" },
  1663. { "Stereo2 ADC MIX", NULL, "Sto2 ADC MIXR" },
  1664. { "Mono ADC MIX", NULL, "Mono ADC MIXL" },
  1665. { "Mono ADC MIX", NULL, "Mono ADC MIXR" },
  1666. { "RxDP Mux", "IF2 DAC", "IF2 DAC" },
  1667. { "RxDP Mux", "IF1 DAC", "IF1 DAC2" },
  1668. { "RxDP Mux", "STO1 ADC Mixer", "Stereo1 ADC MIX" },
  1669. { "RxDP Mux", "STO2 ADC Mixer", "Stereo2 ADC MIX" },
  1670. { "RxDP Mux", "Mono ADC Mixer L", "Mono ADC MIXL" },
  1671. { "RxDP Mux", "Mono ADC Mixer R", "Mono ADC MIXR" },
  1672. { "RxDP Mux", "DAC1", "DAC MIX" },
  1673. { "TDM Data Mux", "Slot 0-1", "Stereo1 ADC MIX" },
  1674. { "TDM Data Mux", "Slot 2-3", "Mono ADC MIX" },
  1675. { "TDM Data Mux", "Slot 4-5", "Stereo2 ADC MIX" },
  1676. { "TDM Data Mux", "Slot 6-7", "IF2 DAC" },
  1677. { "DSP UL Mux", "Bypass", "TDM Data Mux" },
  1678. { "DSP UL Mux", NULL, "I2S DSP" },
  1679. { "DSP DL Mux", "Bypass", "RxDP Mux" },
  1680. { "DSP DL Mux", NULL, "I2S DSP" },
  1681. { "TxDP_ADC_L", NULL, "DSP UL Mux" },
  1682. { "TxDP_ADC_R", NULL, "DSP UL Mux" },
  1683. { "TxDC_DAC", NULL, "DSP DL Mux" },
  1684. { "TxDP_ADC", NULL, "TxDP_ADC_L" },
  1685. { "TxDP_ADC", NULL, "TxDP_ADC_R" },
  1686. { "IF1 ADC", NULL, "I2S1" },
  1687. { "IF1 ADC", NULL, "IF1_ADC1" },
  1688. { "IF1 ADC", NULL, "IF1_ADC2" },
  1689. { "IF1 ADC", NULL, "IF_ADC3" },
  1690. { "IF1 ADC", NULL, "TxDP_ADC" },
  1691. { "IF2 ADC Mux", "IF_ADC1", "IF_ADC1" },
  1692. { "IF2 ADC Mux", "IF_ADC2", "IF_ADC2" },
  1693. { "IF2 ADC Mux", "IF_ADC3", "IF_ADC3" },
  1694. { "IF2 ADC Mux", "TxDC_DAC", "TxDC_DAC" },
  1695. { "IF2 ADC Mux", "TxDP_ADC", "TxDP_ADC" },
  1696. { "IF2 ADC Mux", "VAD_ADC", "VAD_ADC" },
  1697. { "IF2 ADC L", NULL, "IF2 ADC Mux" },
  1698. { "IF2 ADC R", NULL, "IF2 ADC Mux" },
  1699. { "IF2 ADC", NULL, "I2S2" },
  1700. { "IF2 ADC", NULL, "IF2 ADC L" },
  1701. { "IF2 ADC", NULL, "IF2 ADC R" },
  1702. { "AIF1TX", NULL, "IF1 ADC" },
  1703. { "AIF2TX", NULL, "IF2 ADC" },
  1704. { "IF1 DAC1", NULL, "AIF1RX" },
  1705. { "IF1 DAC2", NULL, "AIF1RX" },
  1706. { "IF2 DAC", NULL, "AIF2RX" },
  1707. { "IF1 DAC1", NULL, "I2S1" },
  1708. { "IF1 DAC2", NULL, "I2S1" },
  1709. { "IF2 DAC", NULL, "I2S2" },
  1710. { "IF1 DAC2 L", NULL, "IF1 DAC2" },
  1711. { "IF1 DAC2 R", NULL, "IF1 DAC2" },
  1712. { "IF1 DAC1 L", NULL, "IF1 DAC1" },
  1713. { "IF1 DAC1 R", NULL, "IF1 DAC1" },
  1714. { "IF2 DAC L", NULL, "IF2 DAC" },
  1715. { "IF2 DAC R", NULL, "IF2 DAC" },
  1716. { "DAC1 L Mux", "IF1 DAC", "IF1 DAC1 L" },
  1717. { "DAC1 L Mux", "IF2 DAC", "IF2 DAC L" },
  1718. { "DAC1 R Mux", "IF1 DAC", "IF1 DAC1 R" },
  1719. { "DAC1 R Mux", "IF2 DAC", "IF2 DAC R" },
  1720. { "DAC1 MIXL", "Stereo ADC Switch", "Stereo1 ADC MIXL" },
  1721. { "DAC1 MIXL", "DAC1 Switch", "DAC1 L Mux" },
  1722. { "DAC1 MIXL", NULL, "DAC Stereo1 Filter" },
  1723. { "DAC1 MIXR", "Stereo ADC Switch", "Stereo1 ADC MIXR" },
  1724. { "DAC1 MIXR", "DAC1 Switch", "DAC1 R Mux" },
  1725. { "DAC1 MIXR", NULL, "DAC Stereo1 Filter" },
  1726. { "DAC Stereo1 Filter", NULL, "PLL1", is_sys_clk_from_pll },
  1727. { "DAC Mono Left Filter", NULL, "PLL1", is_sys_clk_from_pll },
  1728. { "DAC Mono Right Filter", NULL, "PLL1", is_sys_clk_from_pll },
  1729. { "DAC MIX", NULL, "DAC1 MIXL" },
  1730. { "DAC MIX", NULL, "DAC1 MIXR" },
  1731. { "Audio DSP", NULL, "DAC1 MIXL" },
  1732. { "Audio DSP", NULL, "DAC1 MIXR" },
  1733. { "DAC L2 Mux", "IF1 DAC", "IF1 DAC2 L" },
  1734. { "DAC L2 Mux", "IF2 DAC", "IF2 DAC L" },
  1735. { "DAC L2 Mux", "TxDC DAC", "TxDC_DAC" },
  1736. { "DAC L2 Mux", "VAD_ADC", "VAD_ADC" },
  1737. { "DAC L2 Volume", NULL, "DAC L2 Mux" },
  1738. { "DAC L2 Volume", NULL, "DAC Mono Left Filter" },
  1739. { "DAC R2 Mux", "IF1 DAC", "IF1 DAC2 R" },
  1740. { "DAC R2 Mux", "IF2 DAC", "IF2 DAC R" },
  1741. { "DAC R2 Mux", "TxDC DAC", "TxDC_DAC" },
  1742. { "DAC R2 Mux", "TxDP ADC", "TxDP_ADC" },
  1743. { "DAC R2 Volume", NULL, "DAC R2 Mux" },
  1744. { "DAC R2 Volume", NULL, "DAC Mono Right Filter" },
  1745. { "Stereo DAC MIXL", "DAC L1 Switch", "DAC1 MIXL" },
  1746. { "Stereo DAC MIXL", "DAC R1 Switch", "DAC1 MIXR" },
  1747. { "Stereo DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" },
  1748. { "Stereo DAC MIXL", NULL, "DAC Stereo1 Filter" },
  1749. { "Stereo DAC MIXL", NULL, "DAC L1 Power" },
  1750. { "Stereo DAC MIXR", "DAC R1 Switch", "DAC1 MIXR" },
  1751. { "Stereo DAC MIXR", "DAC L1 Switch", "DAC1 MIXL" },
  1752. { "Stereo DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" },
  1753. { "Stereo DAC MIXR", NULL, "DAC Stereo1 Filter" },
  1754. { "Stereo DAC MIXR", NULL, "DAC R1 Power" },
  1755. { "Mono DAC MIXL", "DAC L1 Switch", "DAC1 MIXL" },
  1756. { "Mono DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" },
  1757. { "Mono DAC MIXL", "DAC R2 Switch", "DAC R2 Volume" },
  1758. { "Mono DAC MIXL", NULL, "DAC Mono Left Filter" },
  1759. { "Mono DAC MIXR", "DAC R1 Switch", "DAC1 MIXR" },
  1760. { "Mono DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" },
  1761. { "Mono DAC MIXR", "DAC L2 Switch", "DAC L2 Volume" },
  1762. { "Mono DAC MIXR", NULL, "DAC Mono Right Filter" },
  1763. { "DAC MIXL", "Sto DAC Mix L Switch", "Stereo DAC MIXL" },
  1764. { "DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" },
  1765. { "DAC MIXL", "DAC R2 Switch", "DAC R2 Volume" },
  1766. { "DAC MIXR", "Sto DAC Mix R Switch", "Stereo DAC MIXR" },
  1767. { "DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" },
  1768. { "DAC MIXR", "DAC L2 Switch", "DAC L2 Volume" },
  1769. { "DAC L1", NULL, "DAC L1 Power" },
  1770. { "DAC L1", NULL, "Stereo DAC MIXL" },
  1771. { "DAC R1", NULL, "DAC R1 Power" },
  1772. { "DAC R1", NULL, "Stereo DAC MIXR" },
  1773. { "DAC L2", NULL, "Mono DAC MIXL" },
  1774. { "DAC R2", NULL, "Mono DAC MIXR" },
  1775. { "OUT MIXL", "BST1 Switch", "BST1" },
  1776. { "OUT MIXL", "INL Switch", "INL VOL" },
  1777. { "OUT MIXL", "DAC L2 Switch", "DAC L2" },
  1778. { "OUT MIXL", "DAC L1 Switch", "DAC L1" },
  1779. { "OUT MIXR", "BST2 Switch", "BST2" },
  1780. { "OUT MIXR", "INR Switch", "INR VOL" },
  1781. { "OUT MIXR", "DAC R2 Switch", "DAC R2" },
  1782. { "OUT MIXR", "DAC R1 Switch", "DAC R1" },
  1783. { "HPOVOL MIXL", "DAC1 Switch", "DAC L1" },
  1784. { "HPOVOL MIXL", "INL Switch", "INL VOL" },
  1785. { "HPOVOL MIXR", "DAC1 Switch", "DAC R1" },
  1786. { "HPOVOL MIXR", "INR Switch", "INR VOL" },
  1787. { "DAC 2", NULL, "DAC L2" },
  1788. { "DAC 2", NULL, "DAC R2" },
  1789. { "DAC 1", NULL, "DAC L1" },
  1790. { "DAC 1", NULL, "DAC R1" },
  1791. { "HPOVOL", NULL, "HPOVOL MIXL" },
  1792. { "HPOVOL", NULL, "HPOVOL MIXR" },
  1793. { "HPO MIX", "DAC1 Switch", "DAC 1" },
  1794. { "HPO MIX", "HPVOL Switch", "HPOVOL" },
  1795. { "LOUT MIX", "DAC L1 Switch", "DAC L1" },
  1796. { "LOUT MIX", "DAC R1 Switch", "DAC R1" },
  1797. { "LOUT MIX", "OUTMIX L Switch", "OUT MIXL" },
  1798. { "LOUT MIX", "OUTMIX R Switch", "OUT MIXR" },
  1799. { "PDM1 L Mux", "Stereo DAC", "Stereo DAC MIXL" },
  1800. { "PDM1 L Mux", "Mono DAC", "Mono DAC MIXL" },
  1801. { "PDM1 L Mux", NULL, "PDM1 Power" },
  1802. { "PDM1 R Mux", "Stereo DAC", "Stereo DAC MIXR" },
  1803. { "PDM1 R Mux", "Mono DAC", "Mono DAC MIXR" },
  1804. { "PDM1 R Mux", NULL, "PDM1 Power" },
  1805. { "HP Amp", NULL, "HPO MIX" },
  1806. { "HP Amp", NULL, "Mic Det Power" },
  1807. { "HPOL", NULL, "HP Amp" },
  1808. { "HPOL", NULL, "HP L Amp" },
  1809. { "HPOL", NULL, "Improve HP Amp Drv" },
  1810. { "HPOR", NULL, "HP Amp" },
  1811. { "HPOR", NULL, "HP R Amp" },
  1812. { "HPOR", NULL, "Improve HP Amp Drv" },
  1813. { "LOUT Amp", NULL, "LOUT MIX" },
  1814. { "LOUT L Playback", "Switch", "LOUT Amp" },
  1815. { "LOUT R Playback", "Switch", "LOUT Amp" },
  1816. { "LOUTL", NULL, "LOUT L Playback" },
  1817. { "LOUTR", NULL, "LOUT R Playback" },
  1818. { "LOUTL", NULL, "Improve HP Amp Drv" },
  1819. { "LOUTR", NULL, "Improve HP Amp Drv" },
  1820. };
  1821. static const struct snd_soc_dapm_route rt5670_specific_dapm_routes[] = {
  1822. { "PDM2 L Mux", "Stereo DAC", "Stereo DAC MIXL" },
  1823. { "PDM2 L Mux", "Mono DAC", "Mono DAC MIXL" },
  1824. { "PDM2 L Mux", NULL, "PDM2 Power" },
  1825. { "PDM2 R Mux", "Stereo DAC", "Stereo DAC MIXR" },
  1826. { "PDM2 R Mux", "Mono DAC", "Mono DAC MIXR" },
  1827. { "PDM2 R Mux", NULL, "PDM2 Power" },
  1828. { "PDM1L", NULL, "PDM1 L Mux" },
  1829. { "PDM1R", NULL, "PDM1 R Mux" },
  1830. { "PDM2L", NULL, "PDM2 L Mux" },
  1831. { "PDM2R", NULL, "PDM2 R Mux" },
  1832. };
  1833. static const struct snd_soc_dapm_route rt5672_specific_dapm_routes[] = {
  1834. { "SPO Amp", NULL, "PDM1 L Mux" },
  1835. { "SPO Amp", NULL, "PDM1 R Mux" },
  1836. { "SPOLP", NULL, "SPO Amp" },
  1837. { "SPOLN", NULL, "SPO Amp" },
  1838. { "SPORP", NULL, "SPO Amp" },
  1839. { "SPORN", NULL, "SPO Amp" },
  1840. };
  1841. static int rt5670_hw_params(struct snd_pcm_substream *substream,
  1842. struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
  1843. {
  1844. struct snd_soc_codec *codec = dai->codec;
  1845. struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec);
  1846. unsigned int val_len = 0, val_clk, mask_clk;
  1847. int pre_div, bclk_ms, frame_size;
  1848. rt5670->lrck[dai->id] = params_rate(params);
  1849. pre_div = rl6231_get_clk_info(rt5670->sysclk, rt5670->lrck[dai->id]);
  1850. if (pre_div < 0) {
  1851. dev_err(codec->dev, "Unsupported clock setting %d for DAI %d\n",
  1852. rt5670->lrck[dai->id], dai->id);
  1853. return -EINVAL;
  1854. }
  1855. frame_size = snd_soc_params_to_frame_size(params);
  1856. if (frame_size < 0) {
  1857. dev_err(codec->dev, "Unsupported frame size: %d\n", frame_size);
  1858. return -EINVAL;
  1859. }
  1860. bclk_ms = frame_size > 32;
  1861. rt5670->bclk[dai->id] = rt5670->lrck[dai->id] * (32 << bclk_ms);
  1862. dev_dbg(dai->dev, "bclk is %dHz and lrck is %dHz\n",
  1863. rt5670->bclk[dai->id], rt5670->lrck[dai->id]);
  1864. dev_dbg(dai->dev, "bclk_ms is %d and pre_div is %d for iis %d\n",
  1865. bclk_ms, pre_div, dai->id);
  1866. switch (params_width(params)) {
  1867. case 16:
  1868. break;
  1869. case 20:
  1870. val_len |= RT5670_I2S_DL_20;
  1871. break;
  1872. case 24:
  1873. val_len |= RT5670_I2S_DL_24;
  1874. break;
  1875. case 8:
  1876. val_len |= RT5670_I2S_DL_8;
  1877. break;
  1878. default:
  1879. return -EINVAL;
  1880. }
  1881. switch (dai->id) {
  1882. case RT5670_AIF1:
  1883. mask_clk = RT5670_I2S_BCLK_MS1_MASK | RT5670_I2S_PD1_MASK;
  1884. val_clk = bclk_ms << RT5670_I2S_BCLK_MS1_SFT |
  1885. pre_div << RT5670_I2S_PD1_SFT;
  1886. snd_soc_update_bits(codec, RT5670_I2S1_SDP,
  1887. RT5670_I2S_DL_MASK, val_len);
  1888. snd_soc_update_bits(codec, RT5670_ADDA_CLK1, mask_clk, val_clk);
  1889. break;
  1890. case RT5670_AIF2:
  1891. mask_clk = RT5670_I2S_BCLK_MS2_MASK | RT5670_I2S_PD2_MASK;
  1892. val_clk = bclk_ms << RT5670_I2S_BCLK_MS2_SFT |
  1893. pre_div << RT5670_I2S_PD2_SFT;
  1894. snd_soc_update_bits(codec, RT5670_I2S2_SDP,
  1895. RT5670_I2S_DL_MASK, val_len);
  1896. snd_soc_update_bits(codec, RT5670_ADDA_CLK1, mask_clk, val_clk);
  1897. break;
  1898. default:
  1899. dev_err(codec->dev, "Invalid dai->id: %d\n", dai->id);
  1900. return -EINVAL;
  1901. }
  1902. return 0;
  1903. }
  1904. static int rt5670_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
  1905. {
  1906. struct snd_soc_codec *codec = dai->codec;
  1907. struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec);
  1908. unsigned int reg_val = 0;
  1909. switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
  1910. case SND_SOC_DAIFMT_CBM_CFM:
  1911. rt5670->master[dai->id] = 1;
  1912. break;
  1913. case SND_SOC_DAIFMT_CBS_CFS:
  1914. reg_val |= RT5670_I2S_MS_S;
  1915. rt5670->master[dai->id] = 0;
  1916. break;
  1917. default:
  1918. return -EINVAL;
  1919. }
  1920. switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
  1921. case SND_SOC_DAIFMT_NB_NF:
  1922. break;
  1923. case SND_SOC_DAIFMT_IB_NF:
  1924. reg_val |= RT5670_I2S_BP_INV;
  1925. break;
  1926. default:
  1927. return -EINVAL;
  1928. }
  1929. switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
  1930. case SND_SOC_DAIFMT_I2S:
  1931. break;
  1932. case SND_SOC_DAIFMT_LEFT_J:
  1933. reg_val |= RT5670_I2S_DF_LEFT;
  1934. break;
  1935. case SND_SOC_DAIFMT_DSP_A:
  1936. reg_val |= RT5670_I2S_DF_PCM_A;
  1937. break;
  1938. case SND_SOC_DAIFMT_DSP_B:
  1939. reg_val |= RT5670_I2S_DF_PCM_B;
  1940. break;
  1941. default:
  1942. return -EINVAL;
  1943. }
  1944. switch (dai->id) {
  1945. case RT5670_AIF1:
  1946. snd_soc_update_bits(codec, RT5670_I2S1_SDP,
  1947. RT5670_I2S_MS_MASK | RT5670_I2S_BP_MASK |
  1948. RT5670_I2S_DF_MASK, reg_val);
  1949. break;
  1950. case RT5670_AIF2:
  1951. snd_soc_update_bits(codec, RT5670_I2S2_SDP,
  1952. RT5670_I2S_MS_MASK | RT5670_I2S_BP_MASK |
  1953. RT5670_I2S_DF_MASK, reg_val);
  1954. break;
  1955. default:
  1956. dev_err(codec->dev, "Invalid dai->id: %d\n", dai->id);
  1957. return -EINVAL;
  1958. }
  1959. return 0;
  1960. }
  1961. static int rt5670_set_dai_sysclk(struct snd_soc_dai *dai,
  1962. int clk_id, unsigned int freq, int dir)
  1963. {
  1964. struct snd_soc_codec *codec = dai->codec;
  1965. struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec);
  1966. unsigned int reg_val = 0;
  1967. if (freq == rt5670->sysclk && clk_id == rt5670->sysclk_src)
  1968. return 0;
  1969. if (rt5670->pdata.jd_mode) {
  1970. if (clk_id == RT5670_SCLK_S_PLL1)
  1971. snd_soc_dapm_force_enable_pin(&codec->dapm, "PLL1");
  1972. else
  1973. snd_soc_dapm_disable_pin(&codec->dapm, "PLL1");
  1974. snd_soc_dapm_sync(&codec->dapm);
  1975. }
  1976. switch (clk_id) {
  1977. case RT5670_SCLK_S_MCLK:
  1978. reg_val |= RT5670_SCLK_SRC_MCLK;
  1979. break;
  1980. case RT5670_SCLK_S_PLL1:
  1981. reg_val |= RT5670_SCLK_SRC_PLL1;
  1982. break;
  1983. case RT5670_SCLK_S_RCCLK:
  1984. reg_val |= RT5670_SCLK_SRC_RCCLK;
  1985. break;
  1986. default:
  1987. dev_err(codec->dev, "Invalid clock id (%d)\n", clk_id);
  1988. return -EINVAL;
  1989. }
  1990. snd_soc_update_bits(codec, RT5670_GLB_CLK,
  1991. RT5670_SCLK_SRC_MASK, reg_val);
  1992. rt5670->sysclk = freq;
  1993. rt5670->sysclk_src = clk_id;
  1994. dev_dbg(dai->dev, "Sysclk is %dHz and clock id is %d\n", freq, clk_id);
  1995. return 0;
  1996. }
  1997. static int rt5670_set_dai_pll(struct snd_soc_dai *dai, int pll_id, int source,
  1998. unsigned int freq_in, unsigned int freq_out)
  1999. {
  2000. struct snd_soc_codec *codec = dai->codec;
  2001. struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec);
  2002. struct rl6231_pll_code pll_code;
  2003. int ret;
  2004. if (source == rt5670->pll_src && freq_in == rt5670->pll_in &&
  2005. freq_out == rt5670->pll_out)
  2006. return 0;
  2007. if (!freq_in || !freq_out) {
  2008. dev_dbg(codec->dev, "PLL disabled\n");
  2009. rt5670->pll_in = 0;
  2010. rt5670->pll_out = 0;
  2011. snd_soc_update_bits(codec, RT5670_GLB_CLK,
  2012. RT5670_SCLK_SRC_MASK, RT5670_SCLK_SRC_MCLK);
  2013. return 0;
  2014. }
  2015. switch (source) {
  2016. case RT5670_PLL1_S_MCLK:
  2017. snd_soc_update_bits(codec, RT5670_GLB_CLK,
  2018. RT5670_PLL1_SRC_MASK, RT5670_PLL1_SRC_MCLK);
  2019. break;
  2020. case RT5670_PLL1_S_BCLK1:
  2021. case RT5670_PLL1_S_BCLK2:
  2022. case RT5670_PLL1_S_BCLK3:
  2023. case RT5670_PLL1_S_BCLK4:
  2024. switch (dai->id) {
  2025. case RT5670_AIF1:
  2026. snd_soc_update_bits(codec, RT5670_GLB_CLK,
  2027. RT5670_PLL1_SRC_MASK, RT5670_PLL1_SRC_BCLK1);
  2028. break;
  2029. case RT5670_AIF2:
  2030. snd_soc_update_bits(codec, RT5670_GLB_CLK,
  2031. RT5670_PLL1_SRC_MASK, RT5670_PLL1_SRC_BCLK2);
  2032. break;
  2033. default:
  2034. dev_err(codec->dev, "Invalid dai->id: %d\n", dai->id);
  2035. return -EINVAL;
  2036. }
  2037. break;
  2038. default:
  2039. dev_err(codec->dev, "Unknown PLL source %d\n", source);
  2040. return -EINVAL;
  2041. }
  2042. ret = rl6231_pll_calc(freq_in, freq_out, &pll_code);
  2043. if (ret < 0) {
  2044. dev_err(codec->dev, "Unsupport input clock %d\n", freq_in);
  2045. return ret;
  2046. }
  2047. dev_dbg(codec->dev, "bypass=%d m=%d n=%d k=%d\n",
  2048. pll_code.m_bp, (pll_code.m_bp ? 0 : pll_code.m_code),
  2049. pll_code.n_code, pll_code.k_code);
  2050. snd_soc_write(codec, RT5670_PLL_CTRL1,
  2051. pll_code.n_code << RT5670_PLL_N_SFT | pll_code.k_code);
  2052. snd_soc_write(codec, RT5670_PLL_CTRL2,
  2053. (pll_code.m_bp ? 0 : pll_code.m_code) << RT5670_PLL_M_SFT |
  2054. pll_code.m_bp << RT5670_PLL_M_BP_SFT);
  2055. rt5670->pll_in = freq_in;
  2056. rt5670->pll_out = freq_out;
  2057. rt5670->pll_src = source;
  2058. return 0;
  2059. }
  2060. static int rt5670_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask,
  2061. unsigned int rx_mask, int slots, int slot_width)
  2062. {
  2063. struct snd_soc_codec *codec = dai->codec;
  2064. unsigned int val = 0;
  2065. if (rx_mask || tx_mask)
  2066. val |= (1 << 14);
  2067. switch (slots) {
  2068. case 4:
  2069. val |= (1 << 12);
  2070. break;
  2071. case 6:
  2072. val |= (2 << 12);
  2073. break;
  2074. case 8:
  2075. val |= (3 << 12);
  2076. break;
  2077. case 2:
  2078. break;
  2079. default:
  2080. return -EINVAL;
  2081. }
  2082. switch (slot_width) {
  2083. case 20:
  2084. val |= (1 << 10);
  2085. break;
  2086. case 24:
  2087. val |= (2 << 10);
  2088. break;
  2089. case 32:
  2090. val |= (3 << 10);
  2091. break;
  2092. case 16:
  2093. break;
  2094. default:
  2095. return -EINVAL;
  2096. }
  2097. snd_soc_update_bits(codec, RT5670_TDM_CTRL_1, 0x7c00, val);
  2098. return 0;
  2099. }
  2100. static int rt5670_set_bias_level(struct snd_soc_codec *codec,
  2101. enum snd_soc_bias_level level)
  2102. {
  2103. struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec);
  2104. switch (level) {
  2105. case SND_SOC_BIAS_PREPARE:
  2106. if (SND_SOC_BIAS_STANDBY == codec->dapm.bias_level) {
  2107. snd_soc_update_bits(codec, RT5670_PWR_ANLG1,
  2108. RT5670_PWR_VREF1 | RT5670_PWR_MB |
  2109. RT5670_PWR_BG | RT5670_PWR_VREF2,
  2110. RT5670_PWR_VREF1 | RT5670_PWR_MB |
  2111. RT5670_PWR_BG | RT5670_PWR_VREF2);
  2112. mdelay(10);
  2113. snd_soc_update_bits(codec, RT5670_PWR_ANLG1,
  2114. RT5670_PWR_FV1 | RT5670_PWR_FV2,
  2115. RT5670_PWR_FV1 | RT5670_PWR_FV2);
  2116. snd_soc_update_bits(codec, RT5670_CHARGE_PUMP,
  2117. RT5670_OSW_L_MASK | RT5670_OSW_R_MASK,
  2118. RT5670_OSW_L_DIS | RT5670_OSW_R_DIS);
  2119. snd_soc_update_bits(codec, RT5670_DIG_MISC, 0x1, 0x1);
  2120. snd_soc_update_bits(codec, RT5670_PWR_ANLG1,
  2121. RT5670_LDO_SEL_MASK, 0x3);
  2122. }
  2123. break;
  2124. case SND_SOC_BIAS_STANDBY:
  2125. snd_soc_update_bits(codec, RT5670_PWR_ANLG1,
  2126. RT5670_PWR_VREF1 | RT5670_PWR_VREF2 |
  2127. RT5670_PWR_FV1 | RT5670_PWR_FV2, 0);
  2128. snd_soc_update_bits(codec, RT5670_PWR_ANLG1,
  2129. RT5670_LDO_SEL_MASK, 0x1);
  2130. break;
  2131. case SND_SOC_BIAS_OFF:
  2132. if (rt5670->pdata.jd_mode)
  2133. snd_soc_update_bits(codec, RT5670_PWR_ANLG1,
  2134. RT5670_PWR_VREF1 | RT5670_PWR_MB |
  2135. RT5670_PWR_BG | RT5670_PWR_VREF2 |
  2136. RT5670_PWR_FV1 | RT5670_PWR_FV2,
  2137. RT5670_PWR_MB | RT5670_PWR_BG);
  2138. else
  2139. snd_soc_update_bits(codec, RT5670_PWR_ANLG1,
  2140. RT5670_PWR_VREF1 | RT5670_PWR_MB |
  2141. RT5670_PWR_BG | RT5670_PWR_VREF2 |
  2142. RT5670_PWR_FV1 | RT5670_PWR_FV2, 0);
  2143. snd_soc_update_bits(codec, RT5670_DIG_MISC, 0x1, 0x0);
  2144. break;
  2145. default:
  2146. break;
  2147. }
  2148. codec->dapm.bias_level = level;
  2149. return 0;
  2150. }
  2151. static int rt5670_probe(struct snd_soc_codec *codec)
  2152. {
  2153. struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec);
  2154. switch (snd_soc_read(codec, RT5670_RESET) & RT5670_ID_MASK) {
  2155. case RT5670_ID_5670:
  2156. case RT5670_ID_5671:
  2157. snd_soc_dapm_new_controls(&codec->dapm,
  2158. rt5670_specific_dapm_widgets,
  2159. ARRAY_SIZE(rt5670_specific_dapm_widgets));
  2160. snd_soc_dapm_add_routes(&codec->dapm,
  2161. rt5670_specific_dapm_routes,
  2162. ARRAY_SIZE(rt5670_specific_dapm_routes));
  2163. break;
  2164. case RT5670_ID_5672:
  2165. snd_soc_dapm_new_controls(&codec->dapm,
  2166. rt5672_specific_dapm_widgets,
  2167. ARRAY_SIZE(rt5672_specific_dapm_widgets));
  2168. snd_soc_dapm_add_routes(&codec->dapm,
  2169. rt5672_specific_dapm_routes,
  2170. ARRAY_SIZE(rt5672_specific_dapm_routes));
  2171. break;
  2172. default:
  2173. dev_err(codec->dev,
  2174. "The driver is for RT5670 RT5671 or RT5672 only\n");
  2175. return -ENODEV;
  2176. }
  2177. rt5670->codec = codec;
  2178. return 0;
  2179. }
  2180. static int rt5670_remove(struct snd_soc_codec *codec)
  2181. {
  2182. struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec);
  2183. regmap_write(rt5670->regmap, RT5670_RESET, 0);
  2184. return 0;
  2185. }
  2186. #ifdef CONFIG_PM
  2187. static int rt5670_suspend(struct snd_soc_codec *codec)
  2188. {
  2189. struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec);
  2190. regcache_cache_only(rt5670->regmap, true);
  2191. regcache_mark_dirty(rt5670->regmap);
  2192. return 0;
  2193. }
  2194. static int rt5670_resume(struct snd_soc_codec *codec)
  2195. {
  2196. struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec);
  2197. regcache_cache_only(rt5670->regmap, false);
  2198. regcache_sync(rt5670->regmap);
  2199. return 0;
  2200. }
  2201. #else
  2202. #define rt5670_suspend NULL
  2203. #define rt5670_resume NULL
  2204. #endif
  2205. #define RT5670_STEREO_RATES SNDRV_PCM_RATE_8000_96000
  2206. #define RT5670_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
  2207. SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8)
  2208. static struct snd_soc_dai_ops rt5670_aif_dai_ops = {
  2209. .hw_params = rt5670_hw_params,
  2210. .set_fmt = rt5670_set_dai_fmt,
  2211. .set_sysclk = rt5670_set_dai_sysclk,
  2212. .set_tdm_slot = rt5670_set_tdm_slot,
  2213. .set_pll = rt5670_set_dai_pll,
  2214. };
  2215. static struct snd_soc_dai_driver rt5670_dai[] = {
  2216. {
  2217. .name = "rt5670-aif1",
  2218. .id = RT5670_AIF1,
  2219. .playback = {
  2220. .stream_name = "AIF1 Playback",
  2221. .channels_min = 1,
  2222. .channels_max = 2,
  2223. .rates = RT5670_STEREO_RATES,
  2224. .formats = RT5670_FORMATS,
  2225. },
  2226. .capture = {
  2227. .stream_name = "AIF1 Capture",
  2228. .channels_min = 1,
  2229. .channels_max = 2,
  2230. .rates = RT5670_STEREO_RATES,
  2231. .formats = RT5670_FORMATS,
  2232. },
  2233. .ops = &rt5670_aif_dai_ops,
  2234. },
  2235. {
  2236. .name = "rt5670-aif2",
  2237. .id = RT5670_AIF2,
  2238. .playback = {
  2239. .stream_name = "AIF2 Playback",
  2240. .channels_min = 1,
  2241. .channels_max = 2,
  2242. .rates = RT5670_STEREO_RATES,
  2243. .formats = RT5670_FORMATS,
  2244. },
  2245. .capture = {
  2246. .stream_name = "AIF2 Capture",
  2247. .channels_min = 1,
  2248. .channels_max = 2,
  2249. .rates = RT5670_STEREO_RATES,
  2250. .formats = RT5670_FORMATS,
  2251. },
  2252. .ops = &rt5670_aif_dai_ops,
  2253. },
  2254. };
  2255. static struct snd_soc_codec_driver soc_codec_dev_rt5670 = {
  2256. .probe = rt5670_probe,
  2257. .remove = rt5670_remove,
  2258. .suspend = rt5670_suspend,
  2259. .resume = rt5670_resume,
  2260. .set_bias_level = rt5670_set_bias_level,
  2261. .idle_bias_off = true,
  2262. .controls = rt5670_snd_controls,
  2263. .num_controls = ARRAY_SIZE(rt5670_snd_controls),
  2264. .dapm_widgets = rt5670_dapm_widgets,
  2265. .num_dapm_widgets = ARRAY_SIZE(rt5670_dapm_widgets),
  2266. .dapm_routes = rt5670_dapm_routes,
  2267. .num_dapm_routes = ARRAY_SIZE(rt5670_dapm_routes),
  2268. };
  2269. static const struct regmap_config rt5670_regmap = {
  2270. .reg_bits = 8,
  2271. .val_bits = 16,
  2272. .use_single_rw = true,
  2273. .max_register = RT5670_VENDOR_ID2 + 1 + (ARRAY_SIZE(rt5670_ranges) *
  2274. RT5670_PR_SPACING),
  2275. .volatile_reg = rt5670_volatile_register,
  2276. .readable_reg = rt5670_readable_register,
  2277. .cache_type = REGCACHE_RBTREE,
  2278. .reg_defaults = rt5670_reg,
  2279. .num_reg_defaults = ARRAY_SIZE(rt5670_reg),
  2280. .ranges = rt5670_ranges,
  2281. .num_ranges = ARRAY_SIZE(rt5670_ranges),
  2282. };
  2283. static const struct i2c_device_id rt5670_i2c_id[] = {
  2284. { "rt5670", 0 },
  2285. { "rt5671", 0 },
  2286. { "rt5672", 0 },
  2287. { }
  2288. };
  2289. MODULE_DEVICE_TABLE(i2c, rt5670_i2c_id);
  2290. #ifdef CONFIG_ACPI
  2291. static struct acpi_device_id rt5670_acpi_match[] = {
  2292. { "10EC5670", 0},
  2293. { },
  2294. };
  2295. MODULE_DEVICE_TABLE(acpi, rt5670_acpi_match);
  2296. #endif
  2297. static const struct dmi_system_id dmi_platform_intel_braswell[] = {
  2298. {
  2299. .ident = "Intel Braswell",
  2300. .matches = {
  2301. DMI_MATCH(DMI_SYS_VENDOR, "Intel Corporation"),
  2302. DMI_MATCH(DMI_BOARD_NAME, "Braswell CRB"),
  2303. },
  2304. },
  2305. {}
  2306. };
  2307. static int rt5670_i2c_probe(struct i2c_client *i2c,
  2308. const struct i2c_device_id *id)
  2309. {
  2310. struct rt5670_platform_data *pdata = dev_get_platdata(&i2c->dev);
  2311. struct rt5670_priv *rt5670;
  2312. int ret;
  2313. unsigned int val;
  2314. rt5670 = devm_kzalloc(&i2c->dev,
  2315. sizeof(struct rt5670_priv),
  2316. GFP_KERNEL);
  2317. if (NULL == rt5670)
  2318. return -ENOMEM;
  2319. i2c_set_clientdata(i2c, rt5670);
  2320. if (pdata)
  2321. rt5670->pdata = *pdata;
  2322. if (dmi_check_system(dmi_platform_intel_braswell)) {
  2323. rt5670->pdata.dmic_en = true;
  2324. rt5670->pdata.dmic1_data_pin = RT5670_DMIC_DATA_IN2P;
  2325. rt5670->pdata.jd_mode = 1;
  2326. }
  2327. rt5670->regmap = devm_regmap_init_i2c(i2c, &rt5670_regmap);
  2328. if (IS_ERR(rt5670->regmap)) {
  2329. ret = PTR_ERR(rt5670->regmap);
  2330. dev_err(&i2c->dev, "Failed to allocate register map: %d\n",
  2331. ret);
  2332. return ret;
  2333. }
  2334. regmap_read(rt5670->regmap, RT5670_VENDOR_ID2, &val);
  2335. if (val != RT5670_DEVICE_ID) {
  2336. dev_err(&i2c->dev,
  2337. "Device with ID register %x is not rt5670/72\n", val);
  2338. return -ENODEV;
  2339. }
  2340. regmap_write(rt5670->regmap, RT5670_RESET, 0);
  2341. regmap_update_bits(rt5670->regmap, RT5670_PWR_ANLG1,
  2342. RT5670_PWR_HP_L | RT5670_PWR_HP_R |
  2343. RT5670_PWR_VREF2, RT5670_PWR_VREF2);
  2344. msleep(100);
  2345. regmap_write(rt5670->regmap, RT5670_RESET, 0);
  2346. ret = regmap_register_patch(rt5670->regmap, init_list,
  2347. ARRAY_SIZE(init_list));
  2348. if (ret != 0)
  2349. dev_warn(&i2c->dev, "Failed to apply regmap patch: %d\n", ret);
  2350. if (rt5670->pdata.in2_diff)
  2351. regmap_update_bits(rt5670->regmap, RT5670_IN2,
  2352. RT5670_IN_DF2, RT5670_IN_DF2);
  2353. if (i2c->irq) {
  2354. regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL1,
  2355. RT5670_GP1_PIN_MASK, RT5670_GP1_PIN_IRQ);
  2356. regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL2,
  2357. RT5670_GP1_PF_MASK, RT5670_GP1_PF_OUT);
  2358. }
  2359. if (rt5670->pdata.jd_mode) {
  2360. regmap_update_bits(rt5670->regmap, RT5670_GLB_CLK,
  2361. RT5670_SCLK_SRC_MASK, RT5670_SCLK_SRC_RCCLK);
  2362. rt5670->sysclk = 0;
  2363. rt5670->sysclk_src = RT5670_SCLK_S_RCCLK;
  2364. regmap_update_bits(rt5670->regmap, RT5670_PWR_ANLG1,
  2365. RT5670_PWR_MB, RT5670_PWR_MB);
  2366. regmap_update_bits(rt5670->regmap, RT5670_PWR_ANLG2,
  2367. RT5670_PWR_JD1, RT5670_PWR_JD1);
  2368. regmap_update_bits(rt5670->regmap, RT5670_IRQ_CTRL1,
  2369. RT5670_JD1_1_EN_MASK, RT5670_JD1_1_EN);
  2370. regmap_update_bits(rt5670->regmap, RT5670_JD_CTRL3,
  2371. RT5670_JD_TRI_CBJ_SEL_MASK |
  2372. RT5670_JD_TRI_HPO_SEL_MASK,
  2373. RT5670_JD_CBJ_JD1_1 | RT5670_JD_HPO_JD1_1);
  2374. switch (rt5670->pdata.jd_mode) {
  2375. case 1:
  2376. regmap_update_bits(rt5670->regmap, RT5670_A_JD_CTRL1,
  2377. RT5670_JD1_MODE_MASK,
  2378. RT5670_JD1_MODE_0);
  2379. break;
  2380. case 2:
  2381. regmap_update_bits(rt5670->regmap, RT5670_A_JD_CTRL1,
  2382. RT5670_JD1_MODE_MASK,
  2383. RT5670_JD1_MODE_1);
  2384. break;
  2385. case 3:
  2386. regmap_update_bits(rt5670->regmap, RT5670_A_JD_CTRL1,
  2387. RT5670_JD1_MODE_MASK,
  2388. RT5670_JD1_MODE_2);
  2389. break;
  2390. default:
  2391. break;
  2392. }
  2393. }
  2394. if (rt5670->pdata.dmic_en) {
  2395. regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL1,
  2396. RT5670_GP2_PIN_MASK,
  2397. RT5670_GP2_PIN_DMIC1_SCL);
  2398. switch (rt5670->pdata.dmic1_data_pin) {
  2399. case RT5670_DMIC_DATA_IN2P:
  2400. regmap_update_bits(rt5670->regmap, RT5670_DMIC_CTRL1,
  2401. RT5670_DMIC_1_DP_MASK,
  2402. RT5670_DMIC_1_DP_IN2P);
  2403. break;
  2404. case RT5670_DMIC_DATA_GPIO6:
  2405. regmap_update_bits(rt5670->regmap, RT5670_DMIC_CTRL1,
  2406. RT5670_DMIC_1_DP_MASK,
  2407. RT5670_DMIC_1_DP_GPIO6);
  2408. regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL1,
  2409. RT5670_GP6_PIN_MASK,
  2410. RT5670_GP6_PIN_DMIC1_SDA);
  2411. break;
  2412. case RT5670_DMIC_DATA_GPIO7:
  2413. regmap_update_bits(rt5670->regmap, RT5670_DMIC_CTRL1,
  2414. RT5670_DMIC_1_DP_MASK,
  2415. RT5670_DMIC_1_DP_GPIO7);
  2416. regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL1,
  2417. RT5670_GP7_PIN_MASK,
  2418. RT5670_GP7_PIN_DMIC1_SDA);
  2419. break;
  2420. default:
  2421. break;
  2422. }
  2423. switch (rt5670->pdata.dmic2_data_pin) {
  2424. case RT5670_DMIC_DATA_IN3N:
  2425. regmap_update_bits(rt5670->regmap, RT5670_DMIC_CTRL1,
  2426. RT5670_DMIC_2_DP_MASK,
  2427. RT5670_DMIC_2_DP_IN3N);
  2428. break;
  2429. case RT5670_DMIC_DATA_GPIO8:
  2430. regmap_update_bits(rt5670->regmap, RT5670_DMIC_CTRL1,
  2431. RT5670_DMIC_2_DP_MASK,
  2432. RT5670_DMIC_2_DP_GPIO8);
  2433. regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL1,
  2434. RT5670_GP8_PIN_MASK,
  2435. RT5670_GP8_PIN_DMIC2_SDA);
  2436. break;
  2437. default:
  2438. break;
  2439. }
  2440. switch (rt5670->pdata.dmic3_data_pin) {
  2441. case RT5670_DMIC_DATA_GPIO5:
  2442. regmap_update_bits(rt5670->regmap, RT5670_DMIC_CTRL2,
  2443. RT5670_DMIC_3_DP_MASK,
  2444. RT5670_DMIC_3_DP_GPIO5);
  2445. regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL1,
  2446. RT5670_GP5_PIN_MASK,
  2447. RT5670_GP5_PIN_DMIC3_SDA);
  2448. break;
  2449. case RT5670_DMIC_DATA_GPIO9:
  2450. case RT5670_DMIC_DATA_GPIO10:
  2451. dev_err(&i2c->dev,
  2452. "Always use GPIO5 as DMIC3 data pin\n");
  2453. break;
  2454. default:
  2455. break;
  2456. }
  2457. }
  2458. pm_runtime_enable(&i2c->dev);
  2459. pm_request_idle(&i2c->dev);
  2460. ret = snd_soc_register_codec(&i2c->dev, &soc_codec_dev_rt5670,
  2461. rt5670_dai, ARRAY_SIZE(rt5670_dai));
  2462. if (ret < 0)
  2463. goto err;
  2464. pm_runtime_put(&i2c->dev);
  2465. return 0;
  2466. err:
  2467. pm_runtime_disable(&i2c->dev);
  2468. return ret;
  2469. }
  2470. static int rt5670_i2c_remove(struct i2c_client *i2c)
  2471. {
  2472. pm_runtime_disable(&i2c->dev);
  2473. snd_soc_unregister_codec(&i2c->dev);
  2474. return 0;
  2475. }
  2476. static struct i2c_driver rt5670_i2c_driver = {
  2477. .driver = {
  2478. .name = "rt5670",
  2479. .owner = THIS_MODULE,
  2480. .acpi_match_table = ACPI_PTR(rt5670_acpi_match),
  2481. },
  2482. .probe = rt5670_i2c_probe,
  2483. .remove = rt5670_i2c_remove,
  2484. .id_table = rt5670_i2c_id,
  2485. };
  2486. module_i2c_driver(rt5670_i2c_driver);
  2487. MODULE_DESCRIPTION("ASoC RT5670 driver");
  2488. MODULE_AUTHOR("Bard Liao <bardliao@realtek.com>");
  2489. MODULE_LICENSE("GPL v2");