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dt-bindings
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clock
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hix5hd2-clock.h

hix5hd2-clock.h 1.9 KB
Istoric Crud

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  1. /*
    2. 

  2.  * Copyright (c) 2014 Linaro Ltd.
    3. 

  3.  * Copyright (c) 2014 Hisilicon Limited.
    4. 

  4.  *
    5. 

  5.  * This program is free software; you can redistribute it and/or modify it
    6. 

  6.  * under the terms and conditions of the GNU General Public License,
    7. 

  7.  * version 2, as published by the Free Software Foundation.
    8. 

  8.  */
    9. 

  9. 

  10. #ifndef __DTS_HIX5HD2_CLOCK_H
    11. 

  11. #define __DTS_HIX5HD2_CLOCK_H
    12. 

  12. 

  13. /* fixed rate */
    14. 

  14. #define HIX5HD2_FIXED_1200M		1
    15. 

  15. #define HIX5HD2_FIXED_400M		2
    16. 

  16. #define HIX5HD2_FIXED_48M		3
    17. 

  17. #define HIX5HD2_FIXED_24M		4
    18. 

  18. #define HIX5HD2_FIXED_600M		5
    19. 

  19. #define HIX5HD2_FIXED_300M		6
    20. 

  20. #define HIX5HD2_FIXED_75M		7
    21. 

  21. #define HIX5HD2_FIXED_200M		8
    22. 

  22. #define HIX5HD2_FIXED_100M		9
    23. 

  23. #define HIX5HD2_FIXED_40M		10
    24. 

  24. #define HIX5HD2_FIXED_150M		11
    25. 

  25. #define HIX5HD2_FIXED_1728M		12
    26. 

  26. #define HIX5HD2_FIXED_28P8M		13
    27. 

  27. #define HIX5HD2_FIXED_432M		14
    28. 

  28. #define HIX5HD2_FIXED_345P6M		15
    29. 

  29. #define HIX5HD2_FIXED_288M		16
    30. 

  30. #define HIX5HD2_FIXED_60M		17
    31. 

  31. #define HIX5HD2_FIXED_750M		18
    32. 

  32. #define HIX5HD2_FIXED_500M		19
    33. 

  33. #define HIX5HD2_FIXED_54M		20
    34. 

  34. #define HIX5HD2_FIXED_27M		21
    35. 

  35. #define HIX5HD2_FIXED_1500M		22
    36. 

  36. #define HIX5HD2_FIXED_375M		23
    37. 

  37. #define HIX5HD2_FIXED_187M		24
    38. 

  38. #define HIX5HD2_FIXED_250M		25
    39. 

  39. #define HIX5HD2_FIXED_125M		26
    40. 

  40. #define HIX5HD2_FIXED_2P02M		27
    41. 

  41. #define HIX5HD2_FIXED_50M		28
    42. 

  42. #define HIX5HD2_FIXED_25M		29
    43. 

  43. #define HIX5HD2_FIXED_83M		30
    44. 

  44. 

  45. /* mux clocks */
    46. 

  46. #define HIX5HD2_SFC_MUX			64
    47. 

  47. #define HIX5HD2_MMC_MUX			65
    48. 

  48. #define HIX5HD2_FEPHY_MUX		66
    49. 

  49. #define HIX5HD2_SD_MUX			67
    50. 

  50. 

  51. /* gate clocks */
    52. 

  52. #define HIX5HD2_SFC_RST			128
    53. 

  53. #define HIX5HD2_SFC_CLK			129
    54. 

  54. #define HIX5HD2_MMC_CIU_CLK		130
    55. 

  55. #define HIX5HD2_MMC_BIU_CLK		131
    56. 

  56. #define HIX5HD2_MMC_CIU_RST		132
    57. 

  57. #define HIX5HD2_FWD_BUS_CLK		133
    58. 

  58. #define HIX5HD2_FWD_SYS_CLK		134
    59. 

  59. #define HIX5HD2_MAC0_PHY_CLK		135
    60. 

  60. #define HIX5HD2_SD_CIU_CLK		136
    61. 

  61. #define HIX5HD2_SD_BIU_CLK		137
    62. 

  62. #define HIX5HD2_SD_CIU_RST		138
    63. 

  63. 

  64. /* complex */
    65. 

  65. #define HIX5HD2_MAC0_CLK		192
    66. 

  66. #define HIX5HD2_MAC1_CLK		193
    67. 

  67. #define HIX5HD2_SATA_CLK		194
    68. 

  68. #define HIX5HD2_USB_CLK			195
    69. 

  69. 

  70. #define HIX5HD2_NR_CLKS			256
    71. 

  71. #endif	/* __DTS_HIX5HD2_CLOCK_H */
    72.