cpqphp_core.c 36 KB

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  1. /*
  2. * Compaq Hot Plug Controller Driver
  3. *
  4. * Copyright (C) 1995,2001 Compaq Computer Corporation
  5. * Copyright (C) 2001 Greg Kroah-Hartman <greg@kroah.com>
  6. * Copyright (C) 2001 IBM Corp.
  7. *
  8. * All rights reserved.
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License as published by
  12. * the Free Software Foundation; either version 2 of the License, or (at
  13. * your option) any later version.
  14. *
  15. * This program is distributed in the hope that it will be useful, but
  16. * WITHOUT ANY WARRANTY; without even the implied warranty of
  17. * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
  18. * NON INFRINGEMENT. See the GNU General Public License for more
  19. * details.
  20. *
  21. * You should have received a copy of the GNU General Public License
  22. * along with this program; if not, write to the Free Software
  23. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  24. *
  25. * Send feedback to <greg@kroah.com>
  26. *
  27. * Jan 12, 2003 - Added 66/100/133MHz PCI-X support,
  28. * Torben Mathiasen <torben.mathiasen@hp.com>
  29. */
  30. #include <linux/module.h>
  31. #include <linux/moduleparam.h>
  32. #include <linux/kernel.h>
  33. #include <linux/types.h>
  34. #include <linux/proc_fs.h>
  35. #include <linux/slab.h>
  36. #include <linux/workqueue.h>
  37. #include <linux/pci.h>
  38. #include <linux/pci_hotplug.h>
  39. #include <linux/init.h>
  40. #include <linux/interrupt.h>
  41. #include <linux/uaccess.h>
  42. #include "cpqphp.h"
  43. #include "cpqphp_nvram.h"
  44. /* Global variables */
  45. int cpqhp_debug;
  46. int cpqhp_legacy_mode;
  47. struct controller *cpqhp_ctrl_list; /* = NULL */
  48. struct pci_func *cpqhp_slot_list[256];
  49. struct irq_routing_table *cpqhp_routing_table;
  50. /* local variables */
  51. static void __iomem *smbios_table;
  52. static void __iomem *smbios_start;
  53. static void __iomem *cpqhp_rom_start;
  54. static bool power_mode;
  55. static bool debug;
  56. static int initialized;
  57. #define DRIVER_VERSION "0.9.8"
  58. #define DRIVER_AUTHOR "Dan Zink <dan.zink@compaq.com>, Greg Kroah-Hartman <greg@kroah.com>"
  59. #define DRIVER_DESC "Compaq Hot Plug PCI Controller Driver"
  60. MODULE_AUTHOR(DRIVER_AUTHOR);
  61. MODULE_DESCRIPTION(DRIVER_DESC);
  62. MODULE_LICENSE("GPL");
  63. module_param(power_mode, bool, 0644);
  64. MODULE_PARM_DESC(power_mode, "Power mode enabled or not");
  65. module_param(debug, bool, 0644);
  66. MODULE_PARM_DESC(debug, "Debugging mode enabled or not");
  67. #define CPQHPC_MODULE_MINOR 208
  68. static inline int is_slot64bit(struct slot *slot)
  69. {
  70. return (readb(slot->p_sm_slot + SMBIOS_SLOT_WIDTH) == 0x06) ? 1 : 0;
  71. }
  72. static inline int is_slot66mhz(struct slot *slot)
  73. {
  74. return (readb(slot->p_sm_slot + SMBIOS_SLOT_TYPE) == 0x0E) ? 1 : 0;
  75. }
  76. /**
  77. * detect_SMBIOS_pointer - find the System Management BIOS Table in mem region.
  78. * @begin: begin pointer for region to be scanned.
  79. * @end: end pointer for region to be scanned.
  80. *
  81. * Returns pointer to the head of the SMBIOS tables (or %NULL).
  82. */
  83. static void __iomem *detect_SMBIOS_pointer(void __iomem *begin, void __iomem *end)
  84. {
  85. void __iomem *fp;
  86. void __iomem *endp;
  87. u8 temp1, temp2, temp3, temp4;
  88. int status = 0;
  89. endp = (end - sizeof(u32) + 1);
  90. for (fp = begin; fp <= endp; fp += 16) {
  91. temp1 = readb(fp);
  92. temp2 = readb(fp+1);
  93. temp3 = readb(fp+2);
  94. temp4 = readb(fp+3);
  95. if (temp1 == '_' &&
  96. temp2 == 'S' &&
  97. temp3 == 'M' &&
  98. temp4 == '_') {
  99. status = 1;
  100. break;
  101. }
  102. }
  103. if (!status)
  104. fp = NULL;
  105. dbg("Discovered SMBIOS Entry point at %p\n", fp);
  106. return fp;
  107. }
  108. /**
  109. * init_SERR - Initializes the per slot SERR generation.
  110. * @ctrl: controller to use
  111. *
  112. * For unexpected switch opens
  113. */
  114. static int init_SERR(struct controller *ctrl)
  115. {
  116. u32 tempdword;
  117. u32 number_of_slots;
  118. u8 physical_slot;
  119. if (!ctrl)
  120. return 1;
  121. tempdword = ctrl->first_slot;
  122. number_of_slots = readb(ctrl->hpc_reg + SLOT_MASK) & 0x0F;
  123. /* Loop through slots */
  124. while (number_of_slots) {
  125. physical_slot = tempdword;
  126. writeb(0, ctrl->hpc_reg + SLOT_SERR);
  127. tempdword++;
  128. number_of_slots--;
  129. }
  130. return 0;
  131. }
  132. static int init_cpqhp_routing_table(void)
  133. {
  134. int len;
  135. cpqhp_routing_table = pcibios_get_irq_routing_table();
  136. if (cpqhp_routing_table == NULL)
  137. return -ENOMEM;
  138. len = cpqhp_routing_table_length();
  139. if (len == 0) {
  140. kfree(cpqhp_routing_table);
  141. cpqhp_routing_table = NULL;
  142. return -1;
  143. }
  144. return 0;
  145. }
  146. /* nice debugging output */
  147. static void pci_print_IRQ_route(void)
  148. {
  149. int len;
  150. int loop;
  151. u8 tbus, tdevice, tslot;
  152. len = cpqhp_routing_table_length();
  153. dbg("bus dev func slot\n");
  154. for (loop = 0; loop < len; ++loop) {
  155. tbus = cpqhp_routing_table->slots[loop].bus;
  156. tdevice = cpqhp_routing_table->slots[loop].devfn;
  157. tslot = cpqhp_routing_table->slots[loop].slot;
  158. dbg("%d %d %d %d\n", tbus, tdevice >> 3, tdevice & 0x7, tslot);
  159. }
  160. return;
  161. }
  162. /**
  163. * get_subsequent_smbios_entry: get the next entry from bios table.
  164. * @smbios_start: where to start in the SMBIOS table
  165. * @smbios_table: location of the SMBIOS table
  166. * @curr: %NULL or pointer to previously returned structure
  167. *
  168. * Gets the first entry if previous == NULL;
  169. * otherwise, returns the next entry.
  170. * Uses global SMBIOS Table pointer.
  171. *
  172. * Returns a pointer to an SMBIOS structure or NULL if none found.
  173. */
  174. static void __iomem *get_subsequent_smbios_entry(void __iomem *smbios_start,
  175. void __iomem *smbios_table,
  176. void __iomem *curr)
  177. {
  178. u8 bail = 0;
  179. u8 previous_byte = 1;
  180. void __iomem *p_temp;
  181. void __iomem *p_max;
  182. if (!smbios_table || !curr)
  183. return NULL;
  184. /* set p_max to the end of the table */
  185. p_max = smbios_start + readw(smbios_table + ST_LENGTH);
  186. p_temp = curr;
  187. p_temp += readb(curr + SMBIOS_GENERIC_LENGTH);
  188. while ((p_temp < p_max) && !bail) {
  189. /* Look for the double NULL terminator
  190. * The first condition is the previous byte
  191. * and the second is the curr
  192. */
  193. if (!previous_byte && !(readb(p_temp)))
  194. bail = 1;
  195. previous_byte = readb(p_temp);
  196. p_temp++;
  197. }
  198. if (p_temp < p_max)
  199. return p_temp;
  200. else
  201. return NULL;
  202. }
  203. /**
  204. * get_SMBIOS_entry - return the requested SMBIOS entry or %NULL
  205. * @smbios_start: where to start in the SMBIOS table
  206. * @smbios_table: location of the SMBIOS table
  207. * @type: SMBIOS structure type to be returned
  208. * @previous: %NULL or pointer to previously returned structure
  209. *
  210. * Gets the first entry of the specified type if previous == %NULL;
  211. * Otherwise, returns the next entry of the given type.
  212. * Uses global SMBIOS Table pointer.
  213. * Uses get_subsequent_smbios_entry.
  214. *
  215. * Returns a pointer to an SMBIOS structure or %NULL if none found.
  216. */
  217. static void __iomem *get_SMBIOS_entry(void __iomem *smbios_start,
  218. void __iomem *smbios_table,
  219. u8 type,
  220. void __iomem *previous)
  221. {
  222. if (!smbios_table)
  223. return NULL;
  224. if (!previous)
  225. previous = smbios_start;
  226. else
  227. previous = get_subsequent_smbios_entry(smbios_start,
  228. smbios_table, previous);
  229. while (previous)
  230. if (readb(previous + SMBIOS_GENERIC_TYPE) != type)
  231. previous = get_subsequent_smbios_entry(smbios_start,
  232. smbios_table, previous);
  233. else
  234. break;
  235. return previous;
  236. }
  237. static void release_slot(struct hotplug_slot *hotplug_slot)
  238. {
  239. struct slot *slot = hotplug_slot->private;
  240. dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
  241. kfree(slot->hotplug_slot->info);
  242. kfree(slot->hotplug_slot);
  243. kfree(slot);
  244. }
  245. static int ctrl_slot_cleanup(struct controller *ctrl)
  246. {
  247. struct slot *old_slot, *next_slot;
  248. old_slot = ctrl->slot;
  249. ctrl->slot = NULL;
  250. while (old_slot) {
  251. /* memory will be freed by the release_slot callback */
  252. next_slot = old_slot->next;
  253. pci_hp_deregister(old_slot->hotplug_slot);
  254. old_slot = next_slot;
  255. }
  256. cpqhp_remove_debugfs_files(ctrl);
  257. /* Free IRQ associated with hot plug device */
  258. free_irq(ctrl->interrupt, ctrl);
  259. /* Unmap the memory */
  260. iounmap(ctrl->hpc_reg);
  261. /* Finally reclaim PCI mem */
  262. release_mem_region(pci_resource_start(ctrl->pci_dev, 0),
  263. pci_resource_len(ctrl->pci_dev, 0));
  264. return 0;
  265. }
  266. /**
  267. * get_slot_mapping - determine logical slot mapping for PCI device
  268. *
  269. * Won't work for more than one PCI-PCI bridge in a slot.
  270. *
  271. * @bus_num - bus number of PCI device
  272. * @dev_num - device number of PCI device
  273. * @slot - Pointer to u8 where slot number will be returned
  274. *
  275. * Output: SUCCESS or FAILURE
  276. */
  277. static int
  278. get_slot_mapping(struct pci_bus *bus, u8 bus_num, u8 dev_num, u8 *slot)
  279. {
  280. u32 work;
  281. long len;
  282. long loop;
  283. u8 tbus, tdevice, tslot, bridgeSlot;
  284. dbg("%s: %p, %d, %d, %p\n", __func__, bus, bus_num, dev_num, slot);
  285. bridgeSlot = 0xFF;
  286. len = cpqhp_routing_table_length();
  287. for (loop = 0; loop < len; ++loop) {
  288. tbus = cpqhp_routing_table->slots[loop].bus;
  289. tdevice = cpqhp_routing_table->slots[loop].devfn >> 3;
  290. tslot = cpqhp_routing_table->slots[loop].slot;
  291. if ((tbus == bus_num) && (tdevice == dev_num)) {
  292. *slot = tslot;
  293. return 0;
  294. } else {
  295. /* Did not get a match on the target PCI device. Check
  296. * if the current IRQ table entry is a PCI-to-PCI
  297. * bridge device. If so, and it's secondary bus
  298. * matches the bus number for the target device, I need
  299. * to save the bridge's slot number. If I can not find
  300. * an entry for the target device, I will have to
  301. * assume it's on the other side of the bridge, and
  302. * assign it the bridge's slot.
  303. */
  304. bus->number = tbus;
  305. pci_bus_read_config_dword(bus, PCI_DEVFN(tdevice, 0),
  306. PCI_CLASS_REVISION, &work);
  307. if ((work >> 8) == PCI_TO_PCI_BRIDGE_CLASS) {
  308. pci_bus_read_config_dword(bus,
  309. PCI_DEVFN(tdevice, 0),
  310. PCI_PRIMARY_BUS, &work);
  311. // See if bridge's secondary bus matches target bus.
  312. if (((work >> 8) & 0x000000FF) == (long) bus_num)
  313. bridgeSlot = tslot;
  314. }
  315. }
  316. }
  317. /* If we got here, we didn't find an entry in the IRQ mapping table for
  318. * the target PCI device. If we did determine that the target device
  319. * is on the other side of a PCI-to-PCI bridge, return the slot number
  320. * for the bridge.
  321. */
  322. if (bridgeSlot != 0xFF) {
  323. *slot = bridgeSlot;
  324. return 0;
  325. }
  326. /* Couldn't find an entry in the routing table for this PCI device */
  327. return -1;
  328. }
  329. /**
  330. * cpqhp_set_attention_status - Turns the Amber LED for a slot on or off
  331. * @ctrl: struct controller to use
  332. * @func: PCI device/function info
  333. * @status: LED control flag: 1 = LED on, 0 = LED off
  334. */
  335. static int
  336. cpqhp_set_attention_status(struct controller *ctrl, struct pci_func *func,
  337. u32 status)
  338. {
  339. u8 hp_slot;
  340. if (func == NULL)
  341. return 1;
  342. hp_slot = func->device - ctrl->slot_device_offset;
  343. /* Wait for exclusive access to hardware */
  344. mutex_lock(&ctrl->crit_sect);
  345. if (status == 1)
  346. amber_LED_on(ctrl, hp_slot);
  347. else if (status == 0)
  348. amber_LED_off(ctrl, hp_slot);
  349. else {
  350. /* Done with exclusive hardware access */
  351. mutex_unlock(&ctrl->crit_sect);
  352. return 1;
  353. }
  354. set_SOGO(ctrl);
  355. /* Wait for SOBS to be unset */
  356. wait_for_ctrl_irq(ctrl);
  357. /* Done with exclusive hardware access */
  358. mutex_unlock(&ctrl->crit_sect);
  359. return 0;
  360. }
  361. /**
  362. * set_attention_status - Turns the Amber LED for a slot on or off
  363. * @hotplug_slot: slot to change LED on
  364. * @status: LED control flag
  365. */
  366. static int set_attention_status(struct hotplug_slot *hotplug_slot, u8 status)
  367. {
  368. struct pci_func *slot_func;
  369. struct slot *slot = hotplug_slot->private;
  370. struct controller *ctrl = slot->ctrl;
  371. u8 bus;
  372. u8 devfn;
  373. u8 device;
  374. u8 function;
  375. dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
  376. if (cpqhp_get_bus_dev(ctrl, &bus, &devfn, slot->number) == -1)
  377. return -ENODEV;
  378. device = devfn >> 3;
  379. function = devfn & 0x7;
  380. dbg("bus, dev, fn = %d, %d, %d\n", bus, device, function);
  381. slot_func = cpqhp_slot_find(bus, device, function);
  382. if (!slot_func)
  383. return -ENODEV;
  384. return cpqhp_set_attention_status(ctrl, slot_func, status);
  385. }
  386. static int process_SI(struct hotplug_slot *hotplug_slot)
  387. {
  388. struct pci_func *slot_func;
  389. struct slot *slot = hotplug_slot->private;
  390. struct controller *ctrl = slot->ctrl;
  391. u8 bus;
  392. u8 devfn;
  393. u8 device;
  394. u8 function;
  395. dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
  396. if (cpqhp_get_bus_dev(ctrl, &bus, &devfn, slot->number) == -1)
  397. return -ENODEV;
  398. device = devfn >> 3;
  399. function = devfn & 0x7;
  400. dbg("bus, dev, fn = %d, %d, %d\n", bus, device, function);
  401. slot_func = cpqhp_slot_find(bus, device, function);
  402. if (!slot_func)
  403. return -ENODEV;
  404. slot_func->bus = bus;
  405. slot_func->device = device;
  406. slot_func->function = function;
  407. slot_func->configured = 0;
  408. dbg("board_added(%p, %p)\n", slot_func, ctrl);
  409. return cpqhp_process_SI(ctrl, slot_func);
  410. }
  411. static int process_SS(struct hotplug_slot *hotplug_slot)
  412. {
  413. struct pci_func *slot_func;
  414. struct slot *slot = hotplug_slot->private;
  415. struct controller *ctrl = slot->ctrl;
  416. u8 bus;
  417. u8 devfn;
  418. u8 device;
  419. u8 function;
  420. dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
  421. if (cpqhp_get_bus_dev(ctrl, &bus, &devfn, slot->number) == -1)
  422. return -ENODEV;
  423. device = devfn >> 3;
  424. function = devfn & 0x7;
  425. dbg("bus, dev, fn = %d, %d, %d\n", bus, device, function);
  426. slot_func = cpqhp_slot_find(bus, device, function);
  427. if (!slot_func)
  428. return -ENODEV;
  429. dbg("In %s, slot_func = %p, ctrl = %p\n", __func__, slot_func, ctrl);
  430. return cpqhp_process_SS(ctrl, slot_func);
  431. }
  432. static int hardware_test(struct hotplug_slot *hotplug_slot, u32 value)
  433. {
  434. struct slot *slot = hotplug_slot->private;
  435. struct controller *ctrl = slot->ctrl;
  436. dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
  437. return cpqhp_hardware_test(ctrl, value);
  438. }
  439. static int get_power_status(struct hotplug_slot *hotplug_slot, u8 *value)
  440. {
  441. struct slot *slot = hotplug_slot->private;
  442. struct controller *ctrl = slot->ctrl;
  443. dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
  444. *value = get_slot_enabled(ctrl, slot);
  445. return 0;
  446. }
  447. static int get_attention_status(struct hotplug_slot *hotplug_slot, u8 *value)
  448. {
  449. struct slot *slot = hotplug_slot->private;
  450. struct controller *ctrl = slot->ctrl;
  451. dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
  452. *value = cpq_get_attention_status(ctrl, slot);
  453. return 0;
  454. }
  455. static int get_latch_status(struct hotplug_slot *hotplug_slot, u8 *value)
  456. {
  457. struct slot *slot = hotplug_slot->private;
  458. struct controller *ctrl = slot->ctrl;
  459. dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
  460. *value = cpq_get_latch_status(ctrl, slot);
  461. return 0;
  462. }
  463. static int get_adapter_status(struct hotplug_slot *hotplug_slot, u8 *value)
  464. {
  465. struct slot *slot = hotplug_slot->private;
  466. struct controller *ctrl = slot->ctrl;
  467. dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
  468. *value = get_presence_status(ctrl, slot);
  469. return 0;
  470. }
  471. static struct hotplug_slot_ops cpqphp_hotplug_slot_ops = {
  472. .set_attention_status = set_attention_status,
  473. .enable_slot = process_SI,
  474. .disable_slot = process_SS,
  475. .hardware_test = hardware_test,
  476. .get_power_status = get_power_status,
  477. .get_attention_status = get_attention_status,
  478. .get_latch_status = get_latch_status,
  479. .get_adapter_status = get_adapter_status,
  480. };
  481. #define SLOT_NAME_SIZE 10
  482. static int ctrl_slot_setup(struct controller *ctrl,
  483. void __iomem *smbios_start,
  484. void __iomem *smbios_table)
  485. {
  486. struct slot *slot;
  487. struct hotplug_slot *hotplug_slot;
  488. struct hotplug_slot_info *hotplug_slot_info;
  489. struct pci_bus *bus = ctrl->pci_bus;
  490. u8 number_of_slots;
  491. u8 slot_device;
  492. u8 slot_number;
  493. u8 ctrl_slot;
  494. u32 tempdword;
  495. char name[SLOT_NAME_SIZE];
  496. void __iomem *slot_entry = NULL;
  497. int result;
  498. dbg("%s\n", __func__);
  499. tempdword = readl(ctrl->hpc_reg + INT_INPUT_CLEAR);
  500. number_of_slots = readb(ctrl->hpc_reg + SLOT_MASK) & 0x0F;
  501. slot_device = readb(ctrl->hpc_reg + SLOT_MASK) >> 4;
  502. slot_number = ctrl->first_slot;
  503. while (number_of_slots) {
  504. slot = kzalloc(sizeof(*slot), GFP_KERNEL);
  505. if (!slot) {
  506. result = -ENOMEM;
  507. goto error;
  508. }
  509. slot->hotplug_slot = kzalloc(sizeof(*(slot->hotplug_slot)),
  510. GFP_KERNEL);
  511. if (!slot->hotplug_slot) {
  512. result = -ENOMEM;
  513. goto error_slot;
  514. }
  515. hotplug_slot = slot->hotplug_slot;
  516. hotplug_slot->info = kzalloc(sizeof(*(hotplug_slot->info)),
  517. GFP_KERNEL);
  518. if (!hotplug_slot->info) {
  519. result = -ENOMEM;
  520. goto error_hpslot;
  521. }
  522. hotplug_slot_info = hotplug_slot->info;
  523. slot->ctrl = ctrl;
  524. slot->bus = ctrl->bus;
  525. slot->device = slot_device;
  526. slot->number = slot_number;
  527. dbg("slot->number = %u\n", slot->number);
  528. slot_entry = get_SMBIOS_entry(smbios_start, smbios_table, 9,
  529. slot_entry);
  530. while (slot_entry && (readw(slot_entry + SMBIOS_SLOT_NUMBER) !=
  531. slot->number)) {
  532. slot_entry = get_SMBIOS_entry(smbios_start,
  533. smbios_table, 9, slot_entry);
  534. }
  535. slot->p_sm_slot = slot_entry;
  536. timer_setup(&slot->task_event, cpqhp_pushbutton_thread, 0);
  537. slot->task_event.expires = jiffies + 5 * HZ;
  538. /*FIXME: these capabilities aren't used but if they are
  539. * they need to be correctly implemented
  540. */
  541. slot->capabilities |= PCISLOT_REPLACE_SUPPORTED;
  542. slot->capabilities |= PCISLOT_INTERLOCK_SUPPORTED;
  543. if (is_slot64bit(slot))
  544. slot->capabilities |= PCISLOT_64_BIT_SUPPORTED;
  545. if (is_slot66mhz(slot))
  546. slot->capabilities |= PCISLOT_66_MHZ_SUPPORTED;
  547. if (bus->cur_bus_speed == PCI_SPEED_66MHz)
  548. slot->capabilities |= PCISLOT_66_MHZ_OPERATION;
  549. ctrl_slot =
  550. slot_device - (readb(ctrl->hpc_reg + SLOT_MASK) >> 4);
  551. /* Check presence */
  552. slot->capabilities |=
  553. ((((~tempdword) >> 23) |
  554. ((~tempdword) >> 15)) >> ctrl_slot) & 0x02;
  555. /* Check the switch state */
  556. slot->capabilities |=
  557. ((~tempdword & 0xFF) >> ctrl_slot) & 0x01;
  558. /* Check the slot enable */
  559. slot->capabilities |=
  560. ((read_slot_enable(ctrl) << 2) >> ctrl_slot) & 0x04;
  561. /* register this slot with the hotplug pci core */
  562. hotplug_slot->release = &release_slot;
  563. hotplug_slot->private = slot;
  564. snprintf(name, SLOT_NAME_SIZE, "%u", slot->number);
  565. hotplug_slot->ops = &cpqphp_hotplug_slot_ops;
  566. hotplug_slot_info->power_status = get_slot_enabled(ctrl, slot);
  567. hotplug_slot_info->attention_status =
  568. cpq_get_attention_status(ctrl, slot);
  569. hotplug_slot_info->latch_status =
  570. cpq_get_latch_status(ctrl, slot);
  571. hotplug_slot_info->adapter_status =
  572. get_presence_status(ctrl, slot);
  573. dbg("registering bus %d, dev %d, number %d, ctrl->slot_device_offset %d, slot %d\n",
  574. slot->bus, slot->device,
  575. slot->number, ctrl->slot_device_offset,
  576. slot_number);
  577. result = pci_hp_register(hotplug_slot,
  578. ctrl->pci_dev->bus,
  579. slot->device,
  580. name);
  581. if (result) {
  582. err("pci_hp_register failed with error %d\n", result);
  583. goto error_info;
  584. }
  585. slot->next = ctrl->slot;
  586. ctrl->slot = slot;
  587. number_of_slots--;
  588. slot_device++;
  589. slot_number++;
  590. }
  591. return 0;
  592. error_info:
  593. kfree(hotplug_slot_info);
  594. error_hpslot:
  595. kfree(hotplug_slot);
  596. error_slot:
  597. kfree(slot);
  598. error:
  599. return result;
  600. }
  601. static int one_time_init(void)
  602. {
  603. int loop;
  604. int retval = 0;
  605. if (initialized)
  606. return 0;
  607. power_mode = 0;
  608. retval = init_cpqhp_routing_table();
  609. if (retval)
  610. goto error;
  611. if (cpqhp_debug)
  612. pci_print_IRQ_route();
  613. dbg("Initialize + Start the notification mechanism\n");
  614. retval = cpqhp_event_start_thread();
  615. if (retval)
  616. goto error;
  617. dbg("Initialize slot lists\n");
  618. for (loop = 0; loop < 256; loop++)
  619. cpqhp_slot_list[loop] = NULL;
  620. /* FIXME: We also need to hook the NMI handler eventually.
  621. * this also needs to be worked with Christoph
  622. * register_NMI_handler();
  623. */
  624. /* Map rom address */
  625. cpqhp_rom_start = ioremap(ROM_PHY_ADDR, ROM_PHY_LEN);
  626. if (!cpqhp_rom_start) {
  627. err("Could not ioremap memory region for ROM\n");
  628. retval = -EIO;
  629. goto error;
  630. }
  631. /* Now, map the int15 entry point if we are on compaq specific
  632. * hardware
  633. */
  634. compaq_nvram_init(cpqhp_rom_start);
  635. /* Map smbios table entry point structure */
  636. smbios_table = detect_SMBIOS_pointer(cpqhp_rom_start,
  637. cpqhp_rom_start + ROM_PHY_LEN);
  638. if (!smbios_table) {
  639. err("Could not find the SMBIOS pointer in memory\n");
  640. retval = -EIO;
  641. goto error_rom_start;
  642. }
  643. smbios_start = ioremap(readl(smbios_table + ST_ADDRESS),
  644. readw(smbios_table + ST_LENGTH));
  645. if (!smbios_start) {
  646. err("Could not ioremap memory region taken from SMBIOS values\n");
  647. retval = -EIO;
  648. goto error_smbios_start;
  649. }
  650. initialized = 1;
  651. return retval;
  652. error_smbios_start:
  653. iounmap(smbios_start);
  654. error_rom_start:
  655. iounmap(cpqhp_rom_start);
  656. error:
  657. return retval;
  658. }
  659. static int cpqhpc_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  660. {
  661. u8 num_of_slots = 0;
  662. u8 hp_slot = 0;
  663. u8 device;
  664. u8 bus_cap;
  665. u16 temp_word;
  666. u16 vendor_id;
  667. u16 subsystem_vid;
  668. u16 subsystem_deviceid;
  669. u32 rc;
  670. struct controller *ctrl;
  671. struct pci_func *func;
  672. struct pci_bus *bus;
  673. int err;
  674. err = pci_enable_device(pdev);
  675. if (err) {
  676. printk(KERN_ERR MY_NAME ": cannot enable PCI device %s (%d)\n",
  677. pci_name(pdev), err);
  678. return err;
  679. }
  680. bus = pdev->subordinate;
  681. if (!bus) {
  682. dev_notice(&pdev->dev, "the device is not a bridge, skipping\n");
  683. rc = -ENODEV;
  684. goto err_disable_device;
  685. }
  686. /* Need to read VID early b/c it's used to differentiate CPQ and INTC
  687. * discovery
  688. */
  689. vendor_id = pdev->vendor;
  690. if ((vendor_id != PCI_VENDOR_ID_COMPAQ) &&
  691. (vendor_id != PCI_VENDOR_ID_INTEL)) {
  692. err(msg_HPC_non_compaq_or_intel);
  693. rc = -ENODEV;
  694. goto err_disable_device;
  695. }
  696. dbg("Vendor ID: %x\n", vendor_id);
  697. dbg("revision: %d\n", pdev->revision);
  698. if ((vendor_id == PCI_VENDOR_ID_COMPAQ) && (!pdev->revision)) {
  699. err(msg_HPC_rev_error);
  700. rc = -ENODEV;
  701. goto err_disable_device;
  702. }
  703. /* Check for the proper subsystem IDs
  704. * Intel uses a different SSID programming model than Compaq.
  705. * For Intel, each SSID bit identifies a PHP capability.
  706. * Also Intel HPCs may have RID=0.
  707. */
  708. if ((pdev->revision <= 2) && (vendor_id != PCI_VENDOR_ID_INTEL)) {
  709. err(msg_HPC_not_supported);
  710. rc = -ENODEV;
  711. goto err_disable_device;
  712. }
  713. /* TODO: This code can be made to support non-Compaq or Intel
  714. * subsystem IDs
  715. */
  716. subsystem_vid = pdev->subsystem_vendor;
  717. dbg("Subsystem Vendor ID: %x\n", subsystem_vid);
  718. if ((subsystem_vid != PCI_VENDOR_ID_COMPAQ) && (subsystem_vid != PCI_VENDOR_ID_INTEL)) {
  719. err(msg_HPC_non_compaq_or_intel);
  720. rc = -ENODEV;
  721. goto err_disable_device;
  722. }
  723. ctrl = kzalloc(sizeof(struct controller), GFP_KERNEL);
  724. if (!ctrl) {
  725. rc = -ENOMEM;
  726. goto err_disable_device;
  727. }
  728. subsystem_deviceid = pdev->subsystem_device;
  729. info("Hot Plug Subsystem Device ID: %x\n", subsystem_deviceid);
  730. /* Set Vendor ID, so it can be accessed later from other
  731. * functions
  732. */
  733. ctrl->vendor_id = vendor_id;
  734. switch (subsystem_vid) {
  735. case PCI_VENDOR_ID_COMPAQ:
  736. if (pdev->revision >= 0x13) { /* CIOBX */
  737. ctrl->push_flag = 1;
  738. ctrl->slot_switch_type = 1;
  739. ctrl->push_button = 1;
  740. ctrl->pci_config_space = 1;
  741. ctrl->defeature_PHP = 1;
  742. ctrl->pcix_support = 1;
  743. ctrl->pcix_speed_capability = 1;
  744. pci_read_config_byte(pdev, 0x41, &bus_cap);
  745. if (bus_cap & 0x80) {
  746. dbg("bus max supports 133MHz PCI-X\n");
  747. bus->max_bus_speed = PCI_SPEED_133MHz_PCIX;
  748. break;
  749. }
  750. if (bus_cap & 0x40) {
  751. dbg("bus max supports 100MHz PCI-X\n");
  752. bus->max_bus_speed = PCI_SPEED_100MHz_PCIX;
  753. break;
  754. }
  755. if (bus_cap & 0x20) {
  756. dbg("bus max supports 66MHz PCI-X\n");
  757. bus->max_bus_speed = PCI_SPEED_66MHz_PCIX;
  758. break;
  759. }
  760. if (bus_cap & 0x10) {
  761. dbg("bus max supports 66MHz PCI\n");
  762. bus->max_bus_speed = PCI_SPEED_66MHz;
  763. break;
  764. }
  765. break;
  766. }
  767. switch (subsystem_deviceid) {
  768. case PCI_SUB_HPC_ID:
  769. /* Original 6500/7000 implementation */
  770. ctrl->slot_switch_type = 1;
  771. bus->max_bus_speed = PCI_SPEED_33MHz;
  772. ctrl->push_button = 0;
  773. ctrl->pci_config_space = 1;
  774. ctrl->defeature_PHP = 1;
  775. ctrl->pcix_support = 0;
  776. ctrl->pcix_speed_capability = 0;
  777. break;
  778. case PCI_SUB_HPC_ID2:
  779. /* First Pushbutton implementation */
  780. ctrl->push_flag = 1;
  781. ctrl->slot_switch_type = 1;
  782. bus->max_bus_speed = PCI_SPEED_33MHz;
  783. ctrl->push_button = 1;
  784. ctrl->pci_config_space = 1;
  785. ctrl->defeature_PHP = 1;
  786. ctrl->pcix_support = 0;
  787. ctrl->pcix_speed_capability = 0;
  788. break;
  789. case PCI_SUB_HPC_ID_INTC:
  790. /* Third party (6500/7000) */
  791. ctrl->slot_switch_type = 1;
  792. bus->max_bus_speed = PCI_SPEED_33MHz;
  793. ctrl->push_button = 0;
  794. ctrl->pci_config_space = 1;
  795. ctrl->defeature_PHP = 1;
  796. ctrl->pcix_support = 0;
  797. ctrl->pcix_speed_capability = 0;
  798. break;
  799. case PCI_SUB_HPC_ID3:
  800. /* First 66 Mhz implementation */
  801. ctrl->push_flag = 1;
  802. ctrl->slot_switch_type = 1;
  803. bus->max_bus_speed = PCI_SPEED_66MHz;
  804. ctrl->push_button = 1;
  805. ctrl->pci_config_space = 1;
  806. ctrl->defeature_PHP = 1;
  807. ctrl->pcix_support = 0;
  808. ctrl->pcix_speed_capability = 0;
  809. break;
  810. case PCI_SUB_HPC_ID4:
  811. /* First PCI-X implementation, 100MHz */
  812. ctrl->push_flag = 1;
  813. ctrl->slot_switch_type = 1;
  814. bus->max_bus_speed = PCI_SPEED_100MHz_PCIX;
  815. ctrl->push_button = 1;
  816. ctrl->pci_config_space = 1;
  817. ctrl->defeature_PHP = 1;
  818. ctrl->pcix_support = 1;
  819. ctrl->pcix_speed_capability = 0;
  820. break;
  821. default:
  822. err(msg_HPC_not_supported);
  823. rc = -ENODEV;
  824. goto err_free_ctrl;
  825. }
  826. break;
  827. case PCI_VENDOR_ID_INTEL:
  828. /* Check for speed capability (0=33, 1=66) */
  829. if (subsystem_deviceid & 0x0001)
  830. bus->max_bus_speed = PCI_SPEED_66MHz;
  831. else
  832. bus->max_bus_speed = PCI_SPEED_33MHz;
  833. /* Check for push button */
  834. if (subsystem_deviceid & 0x0002)
  835. ctrl->push_button = 0;
  836. else
  837. ctrl->push_button = 1;
  838. /* Check for slot switch type (0=mechanical, 1=not mechanical) */
  839. if (subsystem_deviceid & 0x0004)
  840. ctrl->slot_switch_type = 0;
  841. else
  842. ctrl->slot_switch_type = 1;
  843. /* PHP Status (0=De-feature PHP, 1=Normal operation) */
  844. if (subsystem_deviceid & 0x0008)
  845. ctrl->defeature_PHP = 1; /* PHP supported */
  846. else
  847. ctrl->defeature_PHP = 0; /* PHP not supported */
  848. /* Alternate Base Address Register Interface
  849. * (0=not supported, 1=supported)
  850. */
  851. if (subsystem_deviceid & 0x0010)
  852. ctrl->alternate_base_address = 1;
  853. else
  854. ctrl->alternate_base_address = 0;
  855. /* PCI Config Space Index (0=not supported, 1=supported) */
  856. if (subsystem_deviceid & 0x0020)
  857. ctrl->pci_config_space = 1;
  858. else
  859. ctrl->pci_config_space = 0;
  860. /* PCI-X support */
  861. if (subsystem_deviceid & 0x0080) {
  862. ctrl->pcix_support = 1;
  863. if (subsystem_deviceid & 0x0040)
  864. /* 133MHz PCI-X if bit 7 is 1 */
  865. ctrl->pcix_speed_capability = 1;
  866. else
  867. /* 100MHz PCI-X if bit 7 is 1 and bit 0 is 0, */
  868. /* 66MHz PCI-X if bit 7 is 1 and bit 0 is 1 */
  869. ctrl->pcix_speed_capability = 0;
  870. } else {
  871. /* Conventional PCI */
  872. ctrl->pcix_support = 0;
  873. ctrl->pcix_speed_capability = 0;
  874. }
  875. break;
  876. default:
  877. err(msg_HPC_not_supported);
  878. rc = -ENODEV;
  879. goto err_free_ctrl;
  880. }
  881. /* Tell the user that we found one. */
  882. info("Initializing the PCI hot plug controller residing on PCI bus %d\n",
  883. pdev->bus->number);
  884. dbg("Hotplug controller capabilities:\n");
  885. dbg(" speed_capability %d\n", bus->max_bus_speed);
  886. dbg(" slot_switch_type %s\n", ctrl->slot_switch_type ?
  887. "switch present" : "no switch");
  888. dbg(" defeature_PHP %s\n", ctrl->defeature_PHP ?
  889. "PHP supported" : "PHP not supported");
  890. dbg(" alternate_base_address %s\n", ctrl->alternate_base_address ?
  891. "supported" : "not supported");
  892. dbg(" pci_config_space %s\n", ctrl->pci_config_space ?
  893. "supported" : "not supported");
  894. dbg(" pcix_speed_capability %s\n", ctrl->pcix_speed_capability ?
  895. "supported" : "not supported");
  896. dbg(" pcix_support %s\n", ctrl->pcix_support ?
  897. "supported" : "not supported");
  898. ctrl->pci_dev = pdev;
  899. pci_set_drvdata(pdev, ctrl);
  900. /* make our own copy of the pci bus structure,
  901. * as we like tweaking it a lot */
  902. ctrl->pci_bus = kmemdup(pdev->bus, sizeof(*ctrl->pci_bus), GFP_KERNEL);
  903. if (!ctrl->pci_bus) {
  904. err("out of memory\n");
  905. rc = -ENOMEM;
  906. goto err_free_ctrl;
  907. }
  908. ctrl->bus = pdev->bus->number;
  909. ctrl->rev = pdev->revision;
  910. dbg("bus device function rev: %d %d %d %d\n", ctrl->bus,
  911. PCI_SLOT(pdev->devfn), PCI_FUNC(pdev->devfn), ctrl->rev);
  912. mutex_init(&ctrl->crit_sect);
  913. init_waitqueue_head(&ctrl->queue);
  914. /* initialize our threads if they haven't already been started up */
  915. rc = one_time_init();
  916. if (rc)
  917. goto err_free_bus;
  918. dbg("pdev = %p\n", pdev);
  919. dbg("pci resource start %llx\n", (unsigned long long)pci_resource_start(pdev, 0));
  920. dbg("pci resource len %llx\n", (unsigned long long)pci_resource_len(pdev, 0));
  921. if (!request_mem_region(pci_resource_start(pdev, 0),
  922. pci_resource_len(pdev, 0), MY_NAME)) {
  923. err("cannot reserve MMIO region\n");
  924. rc = -ENOMEM;
  925. goto err_free_bus;
  926. }
  927. ctrl->hpc_reg = ioremap(pci_resource_start(pdev, 0),
  928. pci_resource_len(pdev, 0));
  929. if (!ctrl->hpc_reg) {
  930. err("cannot remap MMIO region %llx @ %llx\n",
  931. (unsigned long long)pci_resource_len(pdev, 0),
  932. (unsigned long long)pci_resource_start(pdev, 0));
  933. rc = -ENODEV;
  934. goto err_free_mem_region;
  935. }
  936. /* Check for 66Mhz operation */
  937. bus->cur_bus_speed = get_controller_speed(ctrl);
  938. /********************************************************
  939. *
  940. * Save configuration headers for this and
  941. * subordinate PCI buses
  942. *
  943. ********************************************************/
  944. /* find the physical slot number of the first hot plug slot */
  945. /* Get slot won't work for devices behind bridges, but
  946. * in this case it will always be called for the "base"
  947. * bus/dev/func of a slot.
  948. * CS: this is leveraging the PCIIRQ routing code from the kernel
  949. * (pci-pc.c: get_irq_routing_table) */
  950. rc = get_slot_mapping(ctrl->pci_bus, pdev->bus->number,
  951. (readb(ctrl->hpc_reg + SLOT_MASK) >> 4),
  952. &(ctrl->first_slot));
  953. dbg("get_slot_mapping: first_slot = %d, returned = %d\n",
  954. ctrl->first_slot, rc);
  955. if (rc) {
  956. err(msg_initialization_err, rc);
  957. goto err_iounmap;
  958. }
  959. /* Store PCI Config Space for all devices on this bus */
  960. rc = cpqhp_save_config(ctrl, ctrl->bus, readb(ctrl->hpc_reg + SLOT_MASK));
  961. if (rc) {
  962. err("%s: unable to save PCI configuration data, error %d\n",
  963. __func__, rc);
  964. goto err_iounmap;
  965. }
  966. /*
  967. * Get IO, memory, and IRQ resources for new devices
  968. */
  969. /* The next line is required for cpqhp_find_available_resources */
  970. ctrl->interrupt = pdev->irq;
  971. if (ctrl->interrupt < 0x10) {
  972. cpqhp_legacy_mode = 1;
  973. dbg("System seems to be configured for Full Table Mapped MPS mode\n");
  974. }
  975. ctrl->cfgspc_irq = 0;
  976. pci_read_config_byte(pdev, PCI_INTERRUPT_LINE, &ctrl->cfgspc_irq);
  977. rc = cpqhp_find_available_resources(ctrl, cpqhp_rom_start);
  978. ctrl->add_support = !rc;
  979. if (rc) {
  980. dbg("cpqhp_find_available_resources = 0x%x\n", rc);
  981. err("unable to locate PCI configuration resources for hot plug add.\n");
  982. goto err_iounmap;
  983. }
  984. /*
  985. * Finish setting up the hot plug ctrl device
  986. */
  987. ctrl->slot_device_offset = readb(ctrl->hpc_reg + SLOT_MASK) >> 4;
  988. dbg("NumSlots %d\n", ctrl->slot_device_offset);
  989. ctrl->next_event = 0;
  990. /* Setup the slot information structures */
  991. rc = ctrl_slot_setup(ctrl, smbios_start, smbios_table);
  992. if (rc) {
  993. err(msg_initialization_err, 6);
  994. err("%s: unable to save PCI configuration data, error %d\n",
  995. __func__, rc);
  996. goto err_iounmap;
  997. }
  998. /* Mask all general input interrupts */
  999. writel(0xFFFFFFFFL, ctrl->hpc_reg + INT_MASK);
  1000. /* set up the interrupt */
  1001. dbg("HPC interrupt = %d\n", ctrl->interrupt);
  1002. if (request_irq(ctrl->interrupt, cpqhp_ctrl_intr,
  1003. IRQF_SHARED, MY_NAME, ctrl)) {
  1004. err("Can't get irq %d for the hotplug pci controller\n",
  1005. ctrl->interrupt);
  1006. rc = -ENODEV;
  1007. goto err_iounmap;
  1008. }
  1009. /* Enable Shift Out interrupt and clear it, also enable SERR on power
  1010. * fault
  1011. */
  1012. temp_word = readw(ctrl->hpc_reg + MISC);
  1013. temp_word |= 0x4006;
  1014. writew(temp_word, ctrl->hpc_reg + MISC);
  1015. /* Changed 05/05/97 to clear all interrupts at start */
  1016. writel(0xFFFFFFFFL, ctrl->hpc_reg + INT_INPUT_CLEAR);
  1017. ctrl->ctrl_int_comp = readl(ctrl->hpc_reg + INT_INPUT_CLEAR);
  1018. writel(0x0L, ctrl->hpc_reg + INT_MASK);
  1019. if (!cpqhp_ctrl_list) {
  1020. cpqhp_ctrl_list = ctrl;
  1021. ctrl->next = NULL;
  1022. } else {
  1023. ctrl->next = cpqhp_ctrl_list;
  1024. cpqhp_ctrl_list = ctrl;
  1025. }
  1026. /* turn off empty slots here unless command line option "ON" set
  1027. * Wait for exclusive access to hardware
  1028. */
  1029. mutex_lock(&ctrl->crit_sect);
  1030. num_of_slots = readb(ctrl->hpc_reg + SLOT_MASK) & 0x0F;
  1031. /* find first device number for the ctrl */
  1032. device = readb(ctrl->hpc_reg + SLOT_MASK) >> 4;
  1033. while (num_of_slots) {
  1034. dbg("num_of_slots: %d\n", num_of_slots);
  1035. func = cpqhp_slot_find(ctrl->bus, device, 0);
  1036. if (!func)
  1037. break;
  1038. hp_slot = func->device - ctrl->slot_device_offset;
  1039. dbg("hp_slot: %d\n", hp_slot);
  1040. /* We have to save the presence info for these slots */
  1041. temp_word = ctrl->ctrl_int_comp >> 16;
  1042. func->presence_save = (temp_word >> hp_slot) & 0x01;
  1043. func->presence_save |= (temp_word >> (hp_slot + 7)) & 0x02;
  1044. if (ctrl->ctrl_int_comp & (0x1L << hp_slot))
  1045. func->switch_save = 0;
  1046. else
  1047. func->switch_save = 0x10;
  1048. if (!power_mode)
  1049. if (!func->is_a_board) {
  1050. green_LED_off(ctrl, hp_slot);
  1051. slot_disable(ctrl, hp_slot);
  1052. }
  1053. device++;
  1054. num_of_slots--;
  1055. }
  1056. if (!power_mode) {
  1057. set_SOGO(ctrl);
  1058. /* Wait for SOBS to be unset */
  1059. wait_for_ctrl_irq(ctrl);
  1060. }
  1061. rc = init_SERR(ctrl);
  1062. if (rc) {
  1063. err("init_SERR failed\n");
  1064. mutex_unlock(&ctrl->crit_sect);
  1065. goto err_free_irq;
  1066. }
  1067. /* Done with exclusive hardware access */
  1068. mutex_unlock(&ctrl->crit_sect);
  1069. cpqhp_create_debugfs_files(ctrl);
  1070. return 0;
  1071. err_free_irq:
  1072. free_irq(ctrl->interrupt, ctrl);
  1073. err_iounmap:
  1074. iounmap(ctrl->hpc_reg);
  1075. err_free_mem_region:
  1076. release_mem_region(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0));
  1077. err_free_bus:
  1078. kfree(ctrl->pci_bus);
  1079. err_free_ctrl:
  1080. kfree(ctrl);
  1081. err_disable_device:
  1082. pci_disable_device(pdev);
  1083. return rc;
  1084. }
  1085. static void __exit unload_cpqphpd(void)
  1086. {
  1087. struct pci_func *next;
  1088. struct pci_func *TempSlot;
  1089. int loop;
  1090. u32 rc;
  1091. struct controller *ctrl;
  1092. struct controller *tctrl;
  1093. struct pci_resource *res;
  1094. struct pci_resource *tres;
  1095. rc = compaq_nvram_store(cpqhp_rom_start);
  1096. ctrl = cpqhp_ctrl_list;
  1097. while (ctrl) {
  1098. if (ctrl->hpc_reg) {
  1099. u16 misc;
  1100. rc = read_slot_enable(ctrl);
  1101. writeb(0, ctrl->hpc_reg + SLOT_SERR);
  1102. writel(0xFFFFFFC0L | ~rc, ctrl->hpc_reg + INT_MASK);
  1103. misc = readw(ctrl->hpc_reg + MISC);
  1104. misc &= 0xFFFD;
  1105. writew(misc, ctrl->hpc_reg + MISC);
  1106. }
  1107. ctrl_slot_cleanup(ctrl);
  1108. res = ctrl->io_head;
  1109. while (res) {
  1110. tres = res;
  1111. res = res->next;
  1112. kfree(tres);
  1113. }
  1114. res = ctrl->mem_head;
  1115. while (res) {
  1116. tres = res;
  1117. res = res->next;
  1118. kfree(tres);
  1119. }
  1120. res = ctrl->p_mem_head;
  1121. while (res) {
  1122. tres = res;
  1123. res = res->next;
  1124. kfree(tres);
  1125. }
  1126. res = ctrl->bus_head;
  1127. while (res) {
  1128. tres = res;
  1129. res = res->next;
  1130. kfree(tres);
  1131. }
  1132. kfree(ctrl->pci_bus);
  1133. tctrl = ctrl;
  1134. ctrl = ctrl->next;
  1135. kfree(tctrl);
  1136. }
  1137. for (loop = 0; loop < 256; loop++) {
  1138. next = cpqhp_slot_list[loop];
  1139. while (next != NULL) {
  1140. res = next->io_head;
  1141. while (res) {
  1142. tres = res;
  1143. res = res->next;
  1144. kfree(tres);
  1145. }
  1146. res = next->mem_head;
  1147. while (res) {
  1148. tres = res;
  1149. res = res->next;
  1150. kfree(tres);
  1151. }
  1152. res = next->p_mem_head;
  1153. while (res) {
  1154. tres = res;
  1155. res = res->next;
  1156. kfree(tres);
  1157. }
  1158. res = next->bus_head;
  1159. while (res) {
  1160. tres = res;
  1161. res = res->next;
  1162. kfree(tres);
  1163. }
  1164. TempSlot = next;
  1165. next = next->next;
  1166. kfree(TempSlot);
  1167. }
  1168. }
  1169. /* Stop the notification mechanism */
  1170. if (initialized)
  1171. cpqhp_event_stop_thread();
  1172. /* unmap the rom address */
  1173. if (cpqhp_rom_start)
  1174. iounmap(cpqhp_rom_start);
  1175. if (smbios_start)
  1176. iounmap(smbios_start);
  1177. }
  1178. static const struct pci_device_id hpcd_pci_tbl[] = {
  1179. {
  1180. /* handle any PCI Hotplug controller */
  1181. .class = ((PCI_CLASS_SYSTEM_PCI_HOTPLUG << 8) | 0x00),
  1182. .class_mask = ~0,
  1183. /* no matter who makes it */
  1184. .vendor = PCI_ANY_ID,
  1185. .device = PCI_ANY_ID,
  1186. .subvendor = PCI_ANY_ID,
  1187. .subdevice = PCI_ANY_ID,
  1188. }, { /* end: all zeroes */ }
  1189. };
  1190. MODULE_DEVICE_TABLE(pci, hpcd_pci_tbl);
  1191. static struct pci_driver cpqhpc_driver = {
  1192. .name = "compaq_pci_hotplug",
  1193. .id_table = hpcd_pci_tbl,
  1194. .probe = cpqhpc_probe,
  1195. /* remove: cpqhpc_remove_one, */
  1196. };
  1197. static int __init cpqhpc_init(void)
  1198. {
  1199. int result;
  1200. cpqhp_debug = debug;
  1201. info(DRIVER_DESC " version: " DRIVER_VERSION "\n");
  1202. cpqhp_initialize_debugfs();
  1203. result = pci_register_driver(&cpqhpc_driver);
  1204. dbg("pci_register_driver = %d\n", result);
  1205. return result;
  1206. }
  1207. static void __exit cpqhpc_cleanup(void)
  1208. {
  1209. dbg("unload_cpqphpd()\n");
  1210. unload_cpqphpd();
  1211. dbg("pci_unregister_driver\n");
  1212. pci_unregister_driver(&cpqhpc_driver);
  1213. cpqhp_shutdown_debugfs();
  1214. }
  1215. module_init(cpqhpc_init);
  1216. module_exit(cpqhpc_cleanup);