am335x-bone-common.dtsi 11 KB

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  1. /*
  2. * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License version 2 as
  6. * published by the Free Software Foundation.
  7. */
  8. / {
  9. cpus {
  10. cpu@0 {
  11. cpu0-supply = <&dcdc2_reg>;
  12. };
  13. };
  14. memory@80000000 {
  15. device_type = "memory";
  16. reg = <0x80000000 0x10000000>; /* 256 MB */
  17. };
  18. chosen {
  19. stdout-path = &uart0;
  20. };
  21. leds {
  22. pinctrl-names = "default";
  23. pinctrl-0 = <&user_leds_s0>;
  24. compatible = "gpio-leds";
  25. led2 {
  26. label = "beaglebone:green:heartbeat";
  27. gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>;
  28. linux,default-trigger = "heartbeat";
  29. default-state = "off";
  30. };
  31. led3 {
  32. label = "beaglebone:green:mmc0";
  33. gpios = <&gpio1 22 GPIO_ACTIVE_HIGH>;
  34. linux,default-trigger = "mmc0";
  35. default-state = "off";
  36. };
  37. led4 {
  38. label = "beaglebone:green:usr2";
  39. gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>;
  40. linux,default-trigger = "cpu0";
  41. default-state = "off";
  42. };
  43. led5 {
  44. label = "beaglebone:green:usr3";
  45. gpios = <&gpio1 24 GPIO_ACTIVE_HIGH>;
  46. linux,default-trigger = "mmc1";
  47. default-state = "off";
  48. };
  49. };
  50. vmmcsd_fixed: fixedregulator0 {
  51. compatible = "regulator-fixed";
  52. regulator-name = "vmmcsd_fixed";
  53. regulator-min-microvolt = <3300000>;
  54. regulator-max-microvolt = <3300000>;
  55. };
  56. };
  57. &am33xx_pinmux {
  58. pinctrl-names = "default";
  59. pinctrl-0 = <&clkout2_pin>;
  60. user_leds_s0: user_leds_s0 {
  61. pinctrl-single,pins = <
  62. AM33XX_IOPAD(0x854, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a5.gpio1_21 */
  63. AM33XX_IOPAD(0x858, PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_a6.gpio1_22 */
  64. AM33XX_IOPAD(0x85c, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a7.gpio1_23 */
  65. AM33XX_IOPAD(0x860, PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_a8.gpio1_24 */
  66. >;
  67. };
  68. i2c0_pins: pinmux_i2c0_pins {
  69. pinctrl-single,pins = <
  70. AM33XX_IOPAD(0x988, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */
  71. AM33XX_IOPAD(0x98c, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */
  72. >;
  73. };
  74. i2c2_pins: pinmux_i2c2_pins {
  75. pinctrl-single,pins = <
  76. AM33XX_IOPAD(0x978, PIN_INPUT_PULLUP | MUX_MODE3) /* uart1_ctsn.i2c2_sda */
  77. AM33XX_IOPAD(0x97c, PIN_INPUT_PULLUP | MUX_MODE3) /* uart1_rtsn.i2c2_scl */
  78. >;
  79. };
  80. uart0_pins: pinmux_uart0_pins {
  81. pinctrl-single,pins = <
  82. AM33XX_IOPAD(0x970, PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */
  83. AM33XX_IOPAD(0x974, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
  84. >;
  85. };
  86. clkout2_pin: pinmux_clkout2_pin {
  87. pinctrl-single,pins = <
  88. AM33XX_IOPAD(0x9b4, PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */
  89. >;
  90. };
  91. cpsw_default: cpsw_default {
  92. pinctrl-single,pins = <
  93. /* Slave 1 */
  94. AM33XX_IOPAD(0x910, PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxerr.mii1_rxerr */
  95. AM33XX_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txen.mii1_txen */
  96. AM33XX_IOPAD(0x918, PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxdv.mii1_rxdv */
  97. AM33XX_IOPAD(0x91c, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd3.mii1_txd3 */
  98. AM33XX_IOPAD(0x920, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd2.mii1_txd2 */
  99. AM33XX_IOPAD(0x924, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd1.mii1_txd1 */
  100. AM33XX_IOPAD(0x928, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd0.mii1_txd0 */
  101. AM33XX_IOPAD(0x92c, PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_txclk.mii1_txclk */
  102. AM33XX_IOPAD(0x930, PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxclk.mii1_rxclk */
  103. AM33XX_IOPAD(0x934, PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd3.mii1_rxd3 */
  104. AM33XX_IOPAD(0x938, PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd2.mii1_rxd2 */
  105. AM33XX_IOPAD(0x93c, PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd1.mii1_rxd1 */
  106. AM33XX_IOPAD(0x940, PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd0.mii1_rxd0 */
  107. >;
  108. };
  109. cpsw_sleep: cpsw_sleep {
  110. pinctrl-single,pins = <
  111. /* Slave 1 reset value */
  112. AM33XX_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE7)
  113. AM33XX_IOPAD(0x914, PIN_INPUT_PULLDOWN | MUX_MODE7)
  114. AM33XX_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE7)
  115. AM33XX_IOPAD(0x91c, PIN_INPUT_PULLDOWN | MUX_MODE7)
  116. AM33XX_IOPAD(0x920, PIN_INPUT_PULLDOWN | MUX_MODE7)
  117. AM33XX_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE7)
  118. AM33XX_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE7)
  119. AM33XX_IOPAD(0x92c, PIN_INPUT_PULLDOWN | MUX_MODE7)
  120. AM33XX_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE7)
  121. AM33XX_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE7)
  122. AM33XX_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE7)
  123. AM33XX_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE7)
  124. AM33XX_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE7)
  125. >;
  126. };
  127. davinci_mdio_default: davinci_mdio_default {
  128. pinctrl-single,pins = <
  129. /* MDIO */
  130. AM33XX_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
  131. AM33XX_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
  132. >;
  133. };
  134. davinci_mdio_sleep: davinci_mdio_sleep {
  135. pinctrl-single,pins = <
  136. /* MDIO reset value */
  137. AM33XX_IOPAD(0x948, PIN_INPUT_PULLDOWN | MUX_MODE7)
  138. AM33XX_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7)
  139. >;
  140. };
  141. mmc1_pins: pinmux_mmc1_pins {
  142. pinctrl-single,pins = <
  143. AM33XX_IOPAD(0x960, PIN_INPUT | MUX_MODE7) /* spio0_cs1.gpio0_6 */
  144. AM33XX_IOPAD(0x8fc, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat0.mmc0_dat0 */
  145. AM33XX_IOPAD(0x8f8, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat1.mmc0_dat1 */
  146. AM33XX_IOPAD(0x8f4, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat2.mmc0_dat2 */
  147. AM33XX_IOPAD(0x8f0, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat3.mmc0_dat3 */
  148. AM33XX_IOPAD(0x904, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_cmd.mmc0_cmd */
  149. AM33XX_IOPAD(0x900, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_clk.mmc0_clk */
  150. >;
  151. };
  152. emmc_pins: pinmux_emmc_pins {
  153. pinctrl-single,pins = <
  154. AM33XX_IOPAD(0x880, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn1.mmc1_clk */
  155. AM33XX_IOPAD(0x884, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn2.mmc1_cmd */
  156. AM33XX_IOPAD(0x800, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */
  157. AM33XX_IOPAD(0x804, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */
  158. AM33XX_IOPAD(0x808, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */
  159. AM33XX_IOPAD(0x80c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */
  160. AM33XX_IOPAD(0x810, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad4.mmc1_dat4 */
  161. AM33XX_IOPAD(0x814, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad5.mmc1_dat5 */
  162. AM33XX_IOPAD(0x818, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad6.mmc1_dat6 */
  163. AM33XX_IOPAD(0x81c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad7.mmc1_dat7 */
  164. >;
  165. };
  166. };
  167. &uart0 {
  168. pinctrl-names = "default";
  169. pinctrl-0 = <&uart0_pins>;
  170. status = "okay";
  171. };
  172. &usb {
  173. status = "okay";
  174. };
  175. &usb_ctrl_mod {
  176. status = "okay";
  177. };
  178. &usb0_phy {
  179. status = "okay";
  180. };
  181. &usb1_phy {
  182. status = "okay";
  183. };
  184. &usb0 {
  185. status = "okay";
  186. dr_mode = "peripheral";
  187. interrupts-extended = <&intc 18 &tps 0>;
  188. interrupt-names = "mc", "vbus";
  189. };
  190. &usb1 {
  191. status = "okay";
  192. dr_mode = "host";
  193. };
  194. &cppi41dma {
  195. status = "okay";
  196. };
  197. &i2c0 {
  198. pinctrl-names = "default";
  199. pinctrl-0 = <&i2c0_pins>;
  200. status = "okay";
  201. clock-frequency = <400000>;
  202. tps: tps@24 {
  203. reg = <0x24>;
  204. };
  205. baseboard_eeprom: baseboard_eeprom@50 {
  206. compatible = "atmel,24c256";
  207. reg = <0x50>;
  208. #address-cells = <1>;
  209. #size-cells = <1>;
  210. baseboard_data: baseboard_data@0 {
  211. reg = <0 0x100>;
  212. };
  213. };
  214. };
  215. &i2c2 {
  216. pinctrl-names = "default";
  217. pinctrl-0 = <&i2c2_pins>;
  218. status = "okay";
  219. clock-frequency = <100000>;
  220. cape_eeprom0: cape_eeprom0@54 {
  221. compatible = "atmel,24c256";
  222. reg = <0x54>;
  223. #address-cells = <1>;
  224. #size-cells = <1>;
  225. cape0_data: cape_data@0 {
  226. reg = <0 0x100>;
  227. };
  228. };
  229. cape_eeprom1: cape_eeprom1@55 {
  230. compatible = "atmel,24c256";
  231. reg = <0x55>;
  232. #address-cells = <1>;
  233. #size-cells = <1>;
  234. cape1_data: cape_data@0 {
  235. reg = <0 0x100>;
  236. };
  237. };
  238. cape_eeprom2: cape_eeprom2@56 {
  239. compatible = "atmel,24c256";
  240. reg = <0x56>;
  241. #address-cells = <1>;
  242. #size-cells = <1>;
  243. cape2_data: cape_data@0 {
  244. reg = <0 0x100>;
  245. };
  246. };
  247. cape_eeprom3: cape_eeprom3@57 {
  248. compatible = "atmel,24c256";
  249. reg = <0x57>;
  250. #address-cells = <1>;
  251. #size-cells = <1>;
  252. cape3_data: cape_data@0 {
  253. reg = <0 0x100>;
  254. };
  255. };
  256. };
  257. /include/ "tps65217.dtsi"
  258. &tps {
  259. /*
  260. * Configure pmic to enter OFF-state instead of SLEEP-state ("RTC-only
  261. * mode") at poweroff. Most BeagleBone versions do not support RTC-only
  262. * mode and risk hardware damage if this mode is entered.
  263. *
  264. * For details, see linux-omap mailing list May 2015 thread
  265. * [PATCH] ARM: dts: am335x-bone* enable pmic-shutdown-controller
  266. * In particular, messages:
  267. * http://www.spinics.net/lists/linux-omap/msg118585.html
  268. * http://www.spinics.net/lists/linux-omap/msg118615.html
  269. *
  270. * You can override this later with
  271. * &tps { /delete-property/ ti,pmic-shutdown-controller; }
  272. * if you want to use RTC-only mode and made sure you are not affected
  273. * by the hardware problems. (Tip: double-check by performing a current
  274. * measurement after shutdown: it should be less than 1 mA.)
  275. */
  276. interrupts = <7>; /* NMI */
  277. interrupt-parent = <&intc>;
  278. ti,pmic-shutdown-controller;
  279. charger {
  280. status = "okay";
  281. };
  282. pwrbutton {
  283. status = "okay";
  284. };
  285. regulators {
  286. dcdc1_reg: regulator@0 {
  287. regulator-name = "vdds_dpr";
  288. regulator-always-on;
  289. };
  290. dcdc2_reg: regulator@1 {
  291. /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
  292. regulator-name = "vdd_mpu";
  293. regulator-min-microvolt = <925000>;
  294. regulator-max-microvolt = <1351500>;
  295. regulator-boot-on;
  296. regulator-always-on;
  297. };
  298. dcdc3_reg: regulator@2 {
  299. /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
  300. regulator-name = "vdd_core";
  301. regulator-min-microvolt = <925000>;
  302. regulator-max-microvolt = <1150000>;
  303. regulator-boot-on;
  304. regulator-always-on;
  305. };
  306. ldo1_reg: regulator@3 {
  307. regulator-name = "vio,vrtc,vdds";
  308. regulator-always-on;
  309. };
  310. ldo2_reg: regulator@4 {
  311. regulator-name = "vdd_3v3aux";
  312. regulator-always-on;
  313. };
  314. ldo3_reg: regulator@5 {
  315. regulator-name = "vdd_1v8";
  316. regulator-always-on;
  317. };
  318. ldo4_reg: regulator@6 {
  319. regulator-name = "vdd_3v3a";
  320. regulator-always-on;
  321. };
  322. };
  323. };
  324. &cpsw_emac0 {
  325. phy_id = <&davinci_mdio>, <0>;
  326. phy-mode = "mii";
  327. };
  328. &mac {
  329. slaves = <1>;
  330. pinctrl-names = "default", "sleep";
  331. pinctrl-0 = <&cpsw_default>;
  332. pinctrl-1 = <&cpsw_sleep>;
  333. status = "okay";
  334. };
  335. &davinci_mdio {
  336. pinctrl-names = "default", "sleep";
  337. pinctrl-0 = <&davinci_mdio_default>;
  338. pinctrl-1 = <&davinci_mdio_sleep>;
  339. status = "okay";
  340. };
  341. &mmc1 {
  342. status = "okay";
  343. bus-width = <0x4>;
  344. pinctrl-names = "default";
  345. pinctrl-0 = <&mmc1_pins>;
  346. cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
  347. };
  348. &aes {
  349. status = "okay";
  350. };
  351. &sham {
  352. status = "okay";
  353. };
  354. &rtc {
  355. clocks = <&clk_32768_ck>, <&l4_per_clkctrl AM3_CLKDIV32K_CLKCTRL 0>;
  356. clock-names = "ext-clk", "int-clk";
  357. };