dra72x.dtsi 2.2 KB

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  1. /*
  2. * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License version 2 as
  6. * published by the Free Software Foundation.
  7. * Based on "omap4.dtsi"
  8. */
  9. #include "dra7.dtsi"
  10. / {
  11. compatible = "ti,dra722", "ti,dra72", "ti,dra7";
  12. aliases {
  13. rproc0 = &ipu1;
  14. rproc1 = &ipu2;
  15. rproc2 = &dsp1;
  16. };
  17. pmu {
  18. compatible = "arm,cortex-a15-pmu";
  19. interrupt-parent = <&wakeupgen>;
  20. interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
  21. };
  22. ocp {
  23. cal: cal@4845b000 {
  24. compatible = "ti,dra72-cal";
  25. ti,hwmods = "cal";
  26. reg = <0x4845B000 0x400>,
  27. <0x4845B800 0x40>,
  28. <0x4845B900 0x40>;
  29. reg-names = "cal_top",
  30. "cal_rx_core0",
  31. "cal_rx_core1";
  32. interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
  33. syscon-camerrx = <&scm_conf 0xE94>;
  34. #address-cells = <1>;
  35. #size-cells = <0>;
  36. status = "disabled";
  37. ports {
  38. #address-cells = <1>;
  39. #size-cells = <0>;
  40. csi2_0: port@0 {
  41. reg = <0>;
  42. };
  43. csi2_1: port@1 {
  44. reg = <1>;
  45. };
  46. };
  47. };
  48. };
  49. };
  50. &scm {
  51. dra72_vip_mux: pinmux@4a002e8c {
  52. compatible = "pinctrl-single";
  53. reg = <0xe8c 0x4>;
  54. #address-cells = <1>;
  55. #size-cells = <0>;
  56. pinctrl-single,register-width = <32>;
  57. pinctrl-single,function-mask = <0x7f>;
  58. };
  59. };
  60. &dss {
  61. reg = <0x58000000 0x80>,
  62. <0x58004054 0x4>,
  63. <0x58004300 0x20>;
  64. reg-names = "dss", "pll1_clkctrl", "pll1";
  65. clocks = <&dss_clkctrl DRA7_DSS_CORE_CLKCTRL 8>,
  66. <&dss_clkctrl DRA7_DSS_CORE_CLKCTRL 12>;
  67. clock-names = "fck", "video1_clk";
  68. };
  69. &mailbox5 {
  70. mbox_ipu1_ipc3x: mbox_ipu1_ipc3x {
  71. ti,mbox-tx = <6 2 2>;
  72. ti,mbox-rx = <4 2 2>;
  73. status = "disabled";
  74. };
  75. mbox_dsp1_ipc3x: mbox_dsp1_ipc3x {
  76. ti,mbox-tx = <5 2 2>;
  77. ti,mbox-rx = <1 2 2>;
  78. status = "disabled";
  79. };
  80. };
  81. &mailbox6 {
  82. mbox_ipu2_ipc3x: mbox_ipu2_ipc3x {
  83. ti,mbox-tx = <6 2 2>;
  84. ti,mbox-rx = <4 2 2>;
  85. status = "disabled";
  86. };
  87. };
  88. &pcie1_rc {
  89. compatible = "ti,dra726-pcie-rc", "ti,dra7-pcie";
  90. };
  91. &pcie1_ep {
  92. compatible = "ti,dra726-pcie-ep", "ti,dra7-pcie-ep";
  93. };
  94. &pcie2_rc {
  95. compatible = "ti,dra726-pcie-rc", "ti,dra7-pcie";
  96. };