mem_encrypt.c 16 KB

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  1. /*
  2. * AMD Memory Encryption Support
  3. *
  4. * Copyright (C) 2016 Advanced Micro Devices, Inc.
  5. *
  6. * Author: Tom Lendacky <thomas.lendacky@amd.com>
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. */
  12. #define DISABLE_BRANCH_PROFILING
  13. #include <linux/linkage.h>
  14. #include <linux/init.h>
  15. #include <linux/mm.h>
  16. #include <linux/dma-mapping.h>
  17. #include <linux/swiotlb.h>
  18. #include <linux/mem_encrypt.h>
  19. #include <asm/tlbflush.h>
  20. #include <asm/fixmap.h>
  21. #include <asm/setup.h>
  22. #include <asm/bootparam.h>
  23. #include <asm/set_memory.h>
  24. #include <asm/cacheflush.h>
  25. #include <asm/sections.h>
  26. #include <asm/processor-flags.h>
  27. #include <asm/msr.h>
  28. #include <asm/cmdline.h>
  29. static char sme_cmdline_arg[] __initdata = "mem_encrypt";
  30. static char sme_cmdline_on[] __initdata = "on";
  31. static char sme_cmdline_off[] __initdata = "off";
  32. /*
  33. * Since SME related variables are set early in the boot process they must
  34. * reside in the .data section so as not to be zeroed out when the .bss
  35. * section is later cleared.
  36. */
  37. u64 sme_me_mask __section(.data) = 0;
  38. EXPORT_SYMBOL_GPL(sme_me_mask);
  39. /* Buffer used for early in-place encryption by BSP, no locking needed */
  40. static char sme_early_buffer[PAGE_SIZE] __aligned(PAGE_SIZE);
  41. /*
  42. * This routine does not change the underlying encryption setting of the
  43. * page(s) that map this memory. It assumes that eventually the memory is
  44. * meant to be accessed as either encrypted or decrypted but the contents
  45. * are currently not in the desired state.
  46. *
  47. * This routine follows the steps outlined in the AMD64 Architecture
  48. * Programmer's Manual Volume 2, Section 7.10.8 Encrypt-in-Place.
  49. */
  50. static void __init __sme_early_enc_dec(resource_size_t paddr,
  51. unsigned long size, bool enc)
  52. {
  53. void *src, *dst;
  54. size_t len;
  55. if (!sme_me_mask)
  56. return;
  57. wbinvd();
  58. /*
  59. * There are limited number of early mapping slots, so map (at most)
  60. * one page at time.
  61. */
  62. while (size) {
  63. len = min_t(size_t, sizeof(sme_early_buffer), size);
  64. /*
  65. * Create mappings for the current and desired format of
  66. * the memory. Use a write-protected mapping for the source.
  67. */
  68. src = enc ? early_memremap_decrypted_wp(paddr, len) :
  69. early_memremap_encrypted_wp(paddr, len);
  70. dst = enc ? early_memremap_encrypted(paddr, len) :
  71. early_memremap_decrypted(paddr, len);
  72. /*
  73. * If a mapping can't be obtained to perform the operation,
  74. * then eventual access of that area in the desired mode
  75. * will cause a crash.
  76. */
  77. BUG_ON(!src || !dst);
  78. /*
  79. * Use a temporary buffer, of cache-line multiple size, to
  80. * avoid data corruption as documented in the APM.
  81. */
  82. memcpy(sme_early_buffer, src, len);
  83. memcpy(dst, sme_early_buffer, len);
  84. early_memunmap(dst, len);
  85. early_memunmap(src, len);
  86. paddr += len;
  87. size -= len;
  88. }
  89. }
  90. void __init sme_early_encrypt(resource_size_t paddr, unsigned long size)
  91. {
  92. __sme_early_enc_dec(paddr, size, true);
  93. }
  94. void __init sme_early_decrypt(resource_size_t paddr, unsigned long size)
  95. {
  96. __sme_early_enc_dec(paddr, size, false);
  97. }
  98. static void __init __sme_early_map_unmap_mem(void *vaddr, unsigned long size,
  99. bool map)
  100. {
  101. unsigned long paddr = (unsigned long)vaddr - __PAGE_OFFSET;
  102. pmdval_t pmd_flags, pmd;
  103. /* Use early_pmd_flags but remove the encryption mask */
  104. pmd_flags = __sme_clr(early_pmd_flags);
  105. do {
  106. pmd = map ? (paddr & PMD_MASK) + pmd_flags : 0;
  107. __early_make_pgtable((unsigned long)vaddr, pmd);
  108. vaddr += PMD_SIZE;
  109. paddr += PMD_SIZE;
  110. size = (size <= PMD_SIZE) ? 0 : size - PMD_SIZE;
  111. } while (size);
  112. __native_flush_tlb();
  113. }
  114. void __init sme_unmap_bootdata(char *real_mode_data)
  115. {
  116. struct boot_params *boot_data;
  117. unsigned long cmdline_paddr;
  118. if (!sme_active())
  119. return;
  120. /* Get the command line address before unmapping the real_mode_data */
  121. boot_data = (struct boot_params *)real_mode_data;
  122. cmdline_paddr = boot_data->hdr.cmd_line_ptr | ((u64)boot_data->ext_cmd_line_ptr << 32);
  123. __sme_early_map_unmap_mem(real_mode_data, sizeof(boot_params), false);
  124. if (!cmdline_paddr)
  125. return;
  126. __sme_early_map_unmap_mem(__va(cmdline_paddr), COMMAND_LINE_SIZE, false);
  127. }
  128. void __init sme_map_bootdata(char *real_mode_data)
  129. {
  130. struct boot_params *boot_data;
  131. unsigned long cmdline_paddr;
  132. if (!sme_active())
  133. return;
  134. __sme_early_map_unmap_mem(real_mode_data, sizeof(boot_params), true);
  135. /* Get the command line address after mapping the real_mode_data */
  136. boot_data = (struct boot_params *)real_mode_data;
  137. cmdline_paddr = boot_data->hdr.cmd_line_ptr | ((u64)boot_data->ext_cmd_line_ptr << 32);
  138. if (!cmdline_paddr)
  139. return;
  140. __sme_early_map_unmap_mem(__va(cmdline_paddr), COMMAND_LINE_SIZE, true);
  141. }
  142. void __init sme_early_init(void)
  143. {
  144. unsigned int i;
  145. if (!sme_me_mask)
  146. return;
  147. early_pmd_flags = __sme_set(early_pmd_flags);
  148. __supported_pte_mask = __sme_set(__supported_pte_mask);
  149. /* Update the protection map with memory encryption mask */
  150. for (i = 0; i < ARRAY_SIZE(protection_map); i++)
  151. protection_map[i] = pgprot_encrypted(protection_map[i]);
  152. }
  153. /* Architecture __weak replacement functions */
  154. void __init mem_encrypt_init(void)
  155. {
  156. if (!sme_me_mask)
  157. return;
  158. /* Call into SWIOTLB to update the SWIOTLB DMA buffers */
  159. swiotlb_update_mem_attributes();
  160. pr_info("AMD Secure Memory Encryption (SME) active\n");
  161. }
  162. void swiotlb_set_mem_attributes(void *vaddr, unsigned long size)
  163. {
  164. WARN(PAGE_ALIGN(size) != size,
  165. "size is not page-aligned (%#lx)\n", size);
  166. /* Make the SWIOTLB buffer area decrypted */
  167. set_memory_decrypted((unsigned long)vaddr, size >> PAGE_SHIFT);
  168. }
  169. static void __init sme_clear_pgd(pgd_t *pgd_base, unsigned long start,
  170. unsigned long end)
  171. {
  172. unsigned long pgd_start, pgd_end, pgd_size;
  173. pgd_t *pgd_p;
  174. pgd_start = start & PGDIR_MASK;
  175. pgd_end = end & PGDIR_MASK;
  176. pgd_size = (((pgd_end - pgd_start) / PGDIR_SIZE) + 1);
  177. pgd_size *= sizeof(pgd_t);
  178. pgd_p = pgd_base + pgd_index(start);
  179. memset(pgd_p, 0, pgd_size);
  180. }
  181. #define PGD_FLAGS _KERNPG_TABLE_NOENC
  182. #define P4D_FLAGS _KERNPG_TABLE_NOENC
  183. #define PUD_FLAGS _KERNPG_TABLE_NOENC
  184. #define PMD_FLAGS (__PAGE_KERNEL_LARGE_EXEC & ~_PAGE_GLOBAL)
  185. static void __init *sme_populate_pgd(pgd_t *pgd_base, void *pgtable_area,
  186. unsigned long vaddr, pmdval_t pmd_val)
  187. {
  188. pgd_t *pgd_p;
  189. p4d_t *p4d_p;
  190. pud_t *pud_p;
  191. pmd_t *pmd_p;
  192. pgd_p = pgd_base + pgd_index(vaddr);
  193. if (native_pgd_val(*pgd_p)) {
  194. if (IS_ENABLED(CONFIG_X86_5LEVEL))
  195. p4d_p = (p4d_t *)(native_pgd_val(*pgd_p) & ~PTE_FLAGS_MASK);
  196. else
  197. pud_p = (pud_t *)(native_pgd_val(*pgd_p) & ~PTE_FLAGS_MASK);
  198. } else {
  199. pgd_t pgd;
  200. if (IS_ENABLED(CONFIG_X86_5LEVEL)) {
  201. p4d_p = pgtable_area;
  202. memset(p4d_p, 0, sizeof(*p4d_p) * PTRS_PER_P4D);
  203. pgtable_area += sizeof(*p4d_p) * PTRS_PER_P4D;
  204. pgd = native_make_pgd((pgdval_t)p4d_p + PGD_FLAGS);
  205. } else {
  206. pud_p = pgtable_area;
  207. memset(pud_p, 0, sizeof(*pud_p) * PTRS_PER_PUD);
  208. pgtable_area += sizeof(*pud_p) * PTRS_PER_PUD;
  209. pgd = native_make_pgd((pgdval_t)pud_p + PGD_FLAGS);
  210. }
  211. native_set_pgd(pgd_p, pgd);
  212. }
  213. if (IS_ENABLED(CONFIG_X86_5LEVEL)) {
  214. p4d_p += p4d_index(vaddr);
  215. if (native_p4d_val(*p4d_p)) {
  216. pud_p = (pud_t *)(native_p4d_val(*p4d_p) & ~PTE_FLAGS_MASK);
  217. } else {
  218. p4d_t p4d;
  219. pud_p = pgtable_area;
  220. memset(pud_p, 0, sizeof(*pud_p) * PTRS_PER_PUD);
  221. pgtable_area += sizeof(*pud_p) * PTRS_PER_PUD;
  222. p4d = native_make_p4d((pudval_t)pud_p + P4D_FLAGS);
  223. native_set_p4d(p4d_p, p4d);
  224. }
  225. }
  226. pud_p += pud_index(vaddr);
  227. if (native_pud_val(*pud_p)) {
  228. if (native_pud_val(*pud_p) & _PAGE_PSE)
  229. goto out;
  230. pmd_p = (pmd_t *)(native_pud_val(*pud_p) & ~PTE_FLAGS_MASK);
  231. } else {
  232. pud_t pud;
  233. pmd_p = pgtable_area;
  234. memset(pmd_p, 0, sizeof(*pmd_p) * PTRS_PER_PMD);
  235. pgtable_area += sizeof(*pmd_p) * PTRS_PER_PMD;
  236. pud = native_make_pud((pmdval_t)pmd_p + PUD_FLAGS);
  237. native_set_pud(pud_p, pud);
  238. }
  239. pmd_p += pmd_index(vaddr);
  240. if (!native_pmd_val(*pmd_p) || !(native_pmd_val(*pmd_p) & _PAGE_PSE))
  241. native_set_pmd(pmd_p, native_make_pmd(pmd_val));
  242. out:
  243. return pgtable_area;
  244. }
  245. static unsigned long __init sme_pgtable_calc(unsigned long len)
  246. {
  247. unsigned long p4d_size, pud_size, pmd_size;
  248. unsigned long total;
  249. /*
  250. * Perform a relatively simplistic calculation of the pagetable
  251. * entries that are needed. That mappings will be covered by 2MB
  252. * PMD entries so we can conservatively calculate the required
  253. * number of P4D, PUD and PMD structures needed to perform the
  254. * mappings. Incrementing the count for each covers the case where
  255. * the addresses cross entries.
  256. */
  257. if (IS_ENABLED(CONFIG_X86_5LEVEL)) {
  258. p4d_size = (ALIGN(len, PGDIR_SIZE) / PGDIR_SIZE) + 1;
  259. p4d_size *= sizeof(p4d_t) * PTRS_PER_P4D;
  260. pud_size = (ALIGN(len, P4D_SIZE) / P4D_SIZE) + 1;
  261. pud_size *= sizeof(pud_t) * PTRS_PER_PUD;
  262. } else {
  263. p4d_size = 0;
  264. pud_size = (ALIGN(len, PGDIR_SIZE) / PGDIR_SIZE) + 1;
  265. pud_size *= sizeof(pud_t) * PTRS_PER_PUD;
  266. }
  267. pmd_size = (ALIGN(len, PUD_SIZE) / PUD_SIZE) + 1;
  268. pmd_size *= sizeof(pmd_t) * PTRS_PER_PMD;
  269. total = p4d_size + pud_size + pmd_size;
  270. /*
  271. * Now calculate the added pagetable structures needed to populate
  272. * the new pagetables.
  273. */
  274. if (IS_ENABLED(CONFIG_X86_5LEVEL)) {
  275. p4d_size = ALIGN(total, PGDIR_SIZE) / PGDIR_SIZE;
  276. p4d_size *= sizeof(p4d_t) * PTRS_PER_P4D;
  277. pud_size = ALIGN(total, P4D_SIZE) / P4D_SIZE;
  278. pud_size *= sizeof(pud_t) * PTRS_PER_PUD;
  279. } else {
  280. p4d_size = 0;
  281. pud_size = ALIGN(total, PGDIR_SIZE) / PGDIR_SIZE;
  282. pud_size *= sizeof(pud_t) * PTRS_PER_PUD;
  283. }
  284. pmd_size = ALIGN(total, PUD_SIZE) / PUD_SIZE;
  285. pmd_size *= sizeof(pmd_t) * PTRS_PER_PMD;
  286. total += p4d_size + pud_size + pmd_size;
  287. return total;
  288. }
  289. void __init sme_encrypt_kernel(void)
  290. {
  291. unsigned long workarea_start, workarea_end, workarea_len;
  292. unsigned long execute_start, execute_end, execute_len;
  293. unsigned long kernel_start, kernel_end, kernel_len;
  294. unsigned long pgtable_area_len;
  295. unsigned long paddr, pmd_flags;
  296. unsigned long decrypted_base;
  297. void *pgtable_area;
  298. pgd_t *pgd;
  299. if (!sme_active())
  300. return;
  301. /*
  302. * Prepare for encrypting the kernel by building new pagetables with
  303. * the necessary attributes needed to encrypt the kernel in place.
  304. *
  305. * One range of virtual addresses will map the memory occupied
  306. * by the kernel as encrypted.
  307. *
  308. * Another range of virtual addresses will map the memory occupied
  309. * by the kernel as decrypted and write-protected.
  310. *
  311. * The use of write-protect attribute will prevent any of the
  312. * memory from being cached.
  313. */
  314. /* Physical addresses gives us the identity mapped virtual addresses */
  315. kernel_start = __pa_symbol(_text);
  316. kernel_end = ALIGN(__pa_symbol(_end), PMD_PAGE_SIZE);
  317. kernel_len = kernel_end - kernel_start;
  318. /* Set the encryption workarea to be immediately after the kernel */
  319. workarea_start = kernel_end;
  320. /*
  321. * Calculate required number of workarea bytes needed:
  322. * executable encryption area size:
  323. * stack page (PAGE_SIZE)
  324. * encryption routine page (PAGE_SIZE)
  325. * intermediate copy buffer (PMD_PAGE_SIZE)
  326. * pagetable structures for the encryption of the kernel
  327. * pagetable structures for workarea (in case not currently mapped)
  328. */
  329. execute_start = workarea_start;
  330. execute_end = execute_start + (PAGE_SIZE * 2) + PMD_PAGE_SIZE;
  331. execute_len = execute_end - execute_start;
  332. /*
  333. * One PGD for both encrypted and decrypted mappings and a set of
  334. * PUDs and PMDs for each of the encrypted and decrypted mappings.
  335. */
  336. pgtable_area_len = sizeof(pgd_t) * PTRS_PER_PGD;
  337. pgtable_area_len += sme_pgtable_calc(execute_end - kernel_start) * 2;
  338. /* PUDs and PMDs needed in the current pagetables for the workarea */
  339. pgtable_area_len += sme_pgtable_calc(execute_len + pgtable_area_len);
  340. /*
  341. * The total workarea includes the executable encryption area and
  342. * the pagetable area.
  343. */
  344. workarea_len = execute_len + pgtable_area_len;
  345. workarea_end = workarea_start + workarea_len;
  346. /*
  347. * Set the address to the start of where newly created pagetable
  348. * structures (PGDs, PUDs and PMDs) will be allocated. New pagetable
  349. * structures are created when the workarea is added to the current
  350. * pagetables and when the new encrypted and decrypted kernel
  351. * mappings are populated.
  352. */
  353. pgtable_area = (void *)execute_end;
  354. /*
  355. * Make sure the current pagetable structure has entries for
  356. * addressing the workarea.
  357. */
  358. pgd = (pgd_t *)native_read_cr3_pa();
  359. paddr = workarea_start;
  360. while (paddr < workarea_end) {
  361. pgtable_area = sme_populate_pgd(pgd, pgtable_area,
  362. paddr,
  363. paddr + PMD_FLAGS);
  364. paddr += PMD_PAGE_SIZE;
  365. }
  366. /* Flush the TLB - no globals so cr3 is enough */
  367. native_write_cr3(__native_read_cr3());
  368. /*
  369. * A new pagetable structure is being built to allow for the kernel
  370. * to be encrypted. It starts with an empty PGD that will then be
  371. * populated with new PUDs and PMDs as the encrypted and decrypted
  372. * kernel mappings are created.
  373. */
  374. pgd = pgtable_area;
  375. memset(pgd, 0, sizeof(*pgd) * PTRS_PER_PGD);
  376. pgtable_area += sizeof(*pgd) * PTRS_PER_PGD;
  377. /* Add encrypted kernel (identity) mappings */
  378. pmd_flags = PMD_FLAGS | _PAGE_ENC;
  379. paddr = kernel_start;
  380. while (paddr < kernel_end) {
  381. pgtable_area = sme_populate_pgd(pgd, pgtable_area,
  382. paddr,
  383. paddr + pmd_flags);
  384. paddr += PMD_PAGE_SIZE;
  385. }
  386. /*
  387. * A different PGD index/entry must be used to get different
  388. * pagetable entries for the decrypted mapping. Choose the next
  389. * PGD index and convert it to a virtual address to be used as
  390. * the base of the mapping.
  391. */
  392. decrypted_base = (pgd_index(workarea_end) + 1) & (PTRS_PER_PGD - 1);
  393. decrypted_base <<= PGDIR_SHIFT;
  394. /* Add decrypted, write-protected kernel (non-identity) mappings */
  395. pmd_flags = (PMD_FLAGS & ~_PAGE_CACHE_MASK) | (_PAGE_PAT | _PAGE_PWT);
  396. paddr = kernel_start;
  397. while (paddr < kernel_end) {
  398. pgtable_area = sme_populate_pgd(pgd, pgtable_area,
  399. paddr + decrypted_base,
  400. paddr + pmd_flags);
  401. paddr += PMD_PAGE_SIZE;
  402. }
  403. /* Add decrypted workarea mappings to both kernel mappings */
  404. paddr = workarea_start;
  405. while (paddr < workarea_end) {
  406. pgtable_area = sme_populate_pgd(pgd, pgtable_area,
  407. paddr,
  408. paddr + PMD_FLAGS);
  409. pgtable_area = sme_populate_pgd(pgd, pgtable_area,
  410. paddr + decrypted_base,
  411. paddr + PMD_FLAGS);
  412. paddr += PMD_PAGE_SIZE;
  413. }
  414. /* Perform the encryption */
  415. sme_encrypt_execute(kernel_start, kernel_start + decrypted_base,
  416. kernel_len, workarea_start, (unsigned long)pgd);
  417. /*
  418. * At this point we are running encrypted. Remove the mappings for
  419. * the decrypted areas - all that is needed for this is to remove
  420. * the PGD entry/entries.
  421. */
  422. sme_clear_pgd(pgd, kernel_start + decrypted_base,
  423. kernel_end + decrypted_base);
  424. sme_clear_pgd(pgd, workarea_start + decrypted_base,
  425. workarea_end + decrypted_base);
  426. /* Flush the TLB - no globals so cr3 is enough */
  427. native_write_cr3(__native_read_cr3());
  428. }
  429. void __init __nostackprotector sme_enable(struct boot_params *bp)
  430. {
  431. const char *cmdline_ptr, *cmdline_arg, *cmdline_on, *cmdline_off;
  432. unsigned int eax, ebx, ecx, edx;
  433. bool active_by_default;
  434. unsigned long me_mask;
  435. char buffer[16];
  436. u64 msr;
  437. /* Check for the SME support leaf */
  438. eax = 0x80000000;
  439. ecx = 0;
  440. native_cpuid(&eax, &ebx, &ecx, &edx);
  441. if (eax < 0x8000001f)
  442. return;
  443. /*
  444. * Check for the SME feature:
  445. * CPUID Fn8000_001F[EAX] - Bit 0
  446. * Secure Memory Encryption support
  447. * CPUID Fn8000_001F[EBX] - Bits 5:0
  448. * Pagetable bit position used to indicate encryption
  449. */
  450. eax = 0x8000001f;
  451. ecx = 0;
  452. native_cpuid(&eax, &ebx, &ecx, &edx);
  453. if (!(eax & 1))
  454. return;
  455. me_mask = 1UL << (ebx & 0x3f);
  456. /* Check if SME is enabled */
  457. msr = __rdmsr(MSR_K8_SYSCFG);
  458. if (!(msr & MSR_K8_SYSCFG_MEM_ENCRYPT))
  459. return;
  460. /*
  461. * Fixups have not been applied to phys_base yet and we're running
  462. * identity mapped, so we must obtain the address to the SME command
  463. * line argument data using rip-relative addressing.
  464. */
  465. asm ("lea sme_cmdline_arg(%%rip), %0"
  466. : "=r" (cmdline_arg)
  467. : "p" (sme_cmdline_arg));
  468. asm ("lea sme_cmdline_on(%%rip), %0"
  469. : "=r" (cmdline_on)
  470. : "p" (sme_cmdline_on));
  471. asm ("lea sme_cmdline_off(%%rip), %0"
  472. : "=r" (cmdline_off)
  473. : "p" (sme_cmdline_off));
  474. if (IS_ENABLED(CONFIG_AMD_MEM_ENCRYPT_ACTIVE_BY_DEFAULT))
  475. active_by_default = true;
  476. else
  477. active_by_default = false;
  478. cmdline_ptr = (const char *)((u64)bp->hdr.cmd_line_ptr |
  479. ((u64)bp->ext_cmd_line_ptr << 32));
  480. cmdline_find_option(cmdline_ptr, cmdline_arg, buffer, sizeof(buffer));
  481. if (!strncmp(buffer, cmdline_on, sizeof(buffer)))
  482. sme_me_mask = me_mask;
  483. else if (!strncmp(buffer, cmdline_off, sizeof(buffer)))
  484. sme_me_mask = 0;
  485. else
  486. sme_me_mask = active_by_default ? me_mask : 0;
  487. }