amdgpu_mn.c 7.8 KB

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  1. /*
  2. * Copyright 2014 Advanced Micro Devices, Inc.
  3. * All Rights Reserved.
  4. *
  5. * Permission is hereby granted, free of charge, to any person obtaining a
  6. * copy of this software and associated documentation files (the
  7. * "Software"), to deal in the Software without restriction, including
  8. * without limitation the rights to use, copy, modify, merge, publish,
  9. * distribute, sub license, and/or sell copies of the Software, and to
  10. * permit persons to whom the Software is furnished to do so, subject to
  11. * the following conditions:
  12. *
  13. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  14. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  15. * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  16. * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
  17. * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  18. * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  19. * USE OR OTHER DEALINGS IN THE SOFTWARE.
  20. *
  21. * The above copyright notice and this permission notice (including the
  22. * next paragraph) shall be included in all copies or substantial portions
  23. * of the Software.
  24. *
  25. */
  26. /*
  27. * Authors:
  28. * Christian König <christian.koenig@amd.com>
  29. */
  30. #include <linux/firmware.h>
  31. #include <linux/module.h>
  32. #include <linux/mmu_notifier.h>
  33. #include <drm/drmP.h>
  34. #include <drm/drm.h>
  35. #include "amdgpu.h"
  36. struct amdgpu_mn {
  37. /* constant after initialisation */
  38. struct amdgpu_device *adev;
  39. struct mm_struct *mm;
  40. struct mmu_notifier mn;
  41. /* only used on destruction */
  42. struct work_struct work;
  43. /* protected by adev->mn_lock */
  44. struct hlist_node node;
  45. /* objects protected by mm->mmap_sem */
  46. struct rb_root objects;
  47. };
  48. struct amdgpu_mn_node {
  49. struct interval_tree_node it;
  50. struct list_head bos;
  51. };
  52. /**
  53. * amdgpu_mn_destroy - destroy the rmn
  54. *
  55. * @work: previously sheduled work item
  56. *
  57. * Lazy destroys the notifier from a work item
  58. */
  59. static void amdgpu_mn_destroy(struct work_struct *work)
  60. {
  61. struct amdgpu_mn *rmn = container_of(work, struct amdgpu_mn, work);
  62. struct amdgpu_device *adev = rmn->adev;
  63. struct amdgpu_mn_node *node, *next_node;
  64. struct amdgpu_bo *bo, *next_bo;
  65. down_write(&rmn->mm->mmap_sem);
  66. mutex_lock(&adev->mn_lock);
  67. hash_del(&rmn->node);
  68. rbtree_postorder_for_each_entry_safe(node, next_node, &rmn->objects,
  69. it.rb) {
  70. interval_tree_remove(&node->it, &rmn->objects);
  71. list_for_each_entry_safe(bo, next_bo, &node->bos, mn_list) {
  72. bo->mn = NULL;
  73. list_del_init(&bo->mn_list);
  74. }
  75. kfree(node);
  76. }
  77. mutex_unlock(&adev->mn_lock);
  78. up_write(&rmn->mm->mmap_sem);
  79. mmu_notifier_unregister_no_release(&rmn->mn, rmn->mm);
  80. kfree(rmn);
  81. }
  82. /**
  83. * amdgpu_mn_release - callback to notify about mm destruction
  84. *
  85. * @mn: our notifier
  86. * @mn: the mm this callback is about
  87. *
  88. * Shedule a work item to lazy destroy our notifier.
  89. */
  90. static void amdgpu_mn_release(struct mmu_notifier *mn,
  91. struct mm_struct *mm)
  92. {
  93. struct amdgpu_mn *rmn = container_of(mn, struct amdgpu_mn, mn);
  94. INIT_WORK(&rmn->work, amdgpu_mn_destroy);
  95. schedule_work(&rmn->work);
  96. }
  97. /**
  98. * amdgpu_mn_invalidate_range_start - callback to notify about mm change
  99. *
  100. * @mn: our notifier
  101. * @mn: the mm this callback is about
  102. * @start: start of updated range
  103. * @end: end of updated range
  104. *
  105. * We block for all BOs between start and end to be idle and
  106. * unmap them by move them into system domain again.
  107. */
  108. static void amdgpu_mn_invalidate_range_start(struct mmu_notifier *mn,
  109. struct mm_struct *mm,
  110. unsigned long start,
  111. unsigned long end)
  112. {
  113. struct amdgpu_mn *rmn = container_of(mn, struct amdgpu_mn, mn);
  114. struct interval_tree_node *it;
  115. /* notification is exclusive, but interval is inclusive */
  116. end -= 1;
  117. it = interval_tree_iter_first(&rmn->objects, start, end);
  118. while (it) {
  119. struct amdgpu_mn_node *node;
  120. struct amdgpu_bo *bo;
  121. long r;
  122. node = container_of(it, struct amdgpu_mn_node, it);
  123. it = interval_tree_iter_next(it, start, end);
  124. list_for_each_entry(bo, &node->bos, mn_list) {
  125. if (!amdgpu_ttm_tt_affect_userptr(bo->tbo.ttm, start,
  126. end))
  127. continue;
  128. r = amdgpu_bo_reserve(bo, true);
  129. if (r) {
  130. DRM_ERROR("(%ld) failed to reserve user bo\n", r);
  131. continue;
  132. }
  133. r = reservation_object_wait_timeout_rcu(bo->tbo.resv,
  134. true, false, MAX_SCHEDULE_TIMEOUT);
  135. if (r <= 0)
  136. DRM_ERROR("(%ld) failed to wait for user bo\n", r);
  137. amdgpu_ttm_placement_from_domain(bo, AMDGPU_GEM_DOMAIN_CPU);
  138. r = ttm_bo_validate(&bo->tbo, &bo->placement, false, false);
  139. if (r)
  140. DRM_ERROR("(%ld) failed to validate user bo\n", r);
  141. amdgpu_bo_unreserve(bo);
  142. }
  143. }
  144. }
  145. static const struct mmu_notifier_ops amdgpu_mn_ops = {
  146. .release = amdgpu_mn_release,
  147. .invalidate_range_start = amdgpu_mn_invalidate_range_start,
  148. };
  149. /**
  150. * amdgpu_mn_get - create notifier context
  151. *
  152. * @adev: amdgpu device pointer
  153. *
  154. * Creates a notifier context for current->mm.
  155. */
  156. static struct amdgpu_mn *amdgpu_mn_get(struct amdgpu_device *adev)
  157. {
  158. struct mm_struct *mm = current->mm;
  159. struct amdgpu_mn *rmn;
  160. int r;
  161. down_write(&mm->mmap_sem);
  162. mutex_lock(&adev->mn_lock);
  163. hash_for_each_possible(adev->mn_hash, rmn, node, (unsigned long)mm)
  164. if (rmn->mm == mm)
  165. goto release_locks;
  166. rmn = kzalloc(sizeof(*rmn), GFP_KERNEL);
  167. if (!rmn) {
  168. rmn = ERR_PTR(-ENOMEM);
  169. goto release_locks;
  170. }
  171. rmn->adev = adev;
  172. rmn->mm = mm;
  173. rmn->mn.ops = &amdgpu_mn_ops;
  174. rmn->objects = RB_ROOT;
  175. r = __mmu_notifier_register(&rmn->mn, mm);
  176. if (r)
  177. goto free_rmn;
  178. hash_add(adev->mn_hash, &rmn->node, (unsigned long)mm);
  179. release_locks:
  180. mutex_unlock(&adev->mn_lock);
  181. up_write(&mm->mmap_sem);
  182. return rmn;
  183. free_rmn:
  184. mutex_unlock(&adev->mn_lock);
  185. up_write(&mm->mmap_sem);
  186. kfree(rmn);
  187. return ERR_PTR(r);
  188. }
  189. /**
  190. * amdgpu_mn_register - register a BO for notifier updates
  191. *
  192. * @bo: amdgpu buffer object
  193. * @addr: userptr addr we should monitor
  194. *
  195. * Registers an MMU notifier for the given BO at the specified address.
  196. * Returns 0 on success, -ERRNO if anything goes wrong.
  197. */
  198. int amdgpu_mn_register(struct amdgpu_bo *bo, unsigned long addr)
  199. {
  200. unsigned long end = addr + amdgpu_bo_size(bo) - 1;
  201. struct amdgpu_device *adev = bo->adev;
  202. struct amdgpu_mn *rmn;
  203. struct amdgpu_mn_node *node = NULL;
  204. struct list_head bos;
  205. struct interval_tree_node *it;
  206. rmn = amdgpu_mn_get(adev);
  207. if (IS_ERR(rmn))
  208. return PTR_ERR(rmn);
  209. INIT_LIST_HEAD(&bos);
  210. down_write(&rmn->mm->mmap_sem);
  211. while ((it = interval_tree_iter_first(&rmn->objects, addr, end))) {
  212. kfree(node);
  213. node = container_of(it, struct amdgpu_mn_node, it);
  214. interval_tree_remove(&node->it, &rmn->objects);
  215. addr = min(it->start, addr);
  216. end = max(it->last, end);
  217. list_splice(&node->bos, &bos);
  218. }
  219. if (!node) {
  220. node = kmalloc(sizeof(struct amdgpu_mn_node), GFP_KERNEL);
  221. if (!node) {
  222. up_write(&rmn->mm->mmap_sem);
  223. return -ENOMEM;
  224. }
  225. }
  226. bo->mn = rmn;
  227. node->it.start = addr;
  228. node->it.last = end;
  229. INIT_LIST_HEAD(&node->bos);
  230. list_splice(&bos, &node->bos);
  231. list_add(&bo->mn_list, &node->bos);
  232. interval_tree_insert(&node->it, &rmn->objects);
  233. up_write(&rmn->mm->mmap_sem);
  234. return 0;
  235. }
  236. /**
  237. * amdgpu_mn_unregister - unregister a BO for notifier updates
  238. *
  239. * @bo: amdgpu buffer object
  240. *
  241. * Remove any registration of MMU notifier updates from the buffer object.
  242. */
  243. void amdgpu_mn_unregister(struct amdgpu_bo *bo)
  244. {
  245. struct amdgpu_device *adev = bo->adev;
  246. struct amdgpu_mn *rmn = bo->mn;
  247. struct list_head *head;
  248. if (rmn == NULL)
  249. return;
  250. down_write(&rmn->mm->mmap_sem);
  251. mutex_lock(&adev->mn_lock);
  252. /* save the next list entry for later */
  253. head = bo->mn_list.next;
  254. bo->mn = NULL;
  255. list_del(&bo->mn_list);
  256. if (list_empty(head)) {
  257. struct amdgpu_mn_node *node;
  258. node = container_of(head, struct amdgpu_mn_node, bos);
  259. interval_tree_remove(&node->it, &rmn->objects);
  260. kfree(node);
  261. }
  262. mutex_unlock(&adev->mn_lock);
  263. up_write(&rmn->mm->mmap_sem);
  264. }