m25p80.c 8.2 KB

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  1. /*
  2. * MTD SPI driver for ST M25Pxx (and similar) serial flash chips
  3. *
  4. * Author: Mike Lavender, mike@steroidmicros.com
  5. *
  6. * Copyright (c) 2005, Intec Automation Inc.
  7. *
  8. * Some parts are based on lart.c by Abraham Van Der Merwe
  9. *
  10. * Cleaned up and generalized based on mtd_dataflash.c
  11. *
  12. * This code is free software; you can redistribute it and/or modify
  13. * it under the terms of the GNU General Public License version 2 as
  14. * published by the Free Software Foundation.
  15. *
  16. */
  17. #include <linux/err.h>
  18. #include <linux/errno.h>
  19. #include <linux/module.h>
  20. #include <linux/device.h>
  21. #include <linux/mtd/mtd.h>
  22. #include <linux/mtd/partitions.h>
  23. #include <linux/spi/spi.h>
  24. #include <linux/spi/flash.h>
  25. #include <linux/mtd/spi-nor.h>
  26. #define MAX_CMD_SIZE 6
  27. struct m25p {
  28. struct spi_device *spi;
  29. struct spi_nor spi_nor;
  30. struct mtd_info mtd;
  31. u8 command[MAX_CMD_SIZE];
  32. };
  33. static int m25p80_read_reg(struct spi_nor *nor, u8 code, u8 *val, int len)
  34. {
  35. struct m25p *flash = nor->priv;
  36. struct spi_device *spi = flash->spi;
  37. int ret;
  38. ret = spi_write_then_read(spi, &code, 1, val, len);
  39. if (ret < 0)
  40. dev_err(&spi->dev, "error %d reading %x\n", ret, code);
  41. return ret;
  42. }
  43. static void m25p_addr2cmd(struct spi_nor *nor, unsigned int addr, u8 *cmd)
  44. {
  45. /* opcode is in cmd[0] */
  46. cmd[1] = addr >> (nor->addr_width * 8 - 8);
  47. cmd[2] = addr >> (nor->addr_width * 8 - 16);
  48. cmd[3] = addr >> (nor->addr_width * 8 - 24);
  49. cmd[4] = addr >> (nor->addr_width * 8 - 32);
  50. }
  51. static int m25p_cmdsz(struct spi_nor *nor)
  52. {
  53. return 1 + nor->addr_width;
  54. }
  55. static int m25p80_write_reg(struct spi_nor *nor, u8 opcode, u8 *buf, int len,
  56. int wr_en)
  57. {
  58. struct m25p *flash = nor->priv;
  59. struct spi_device *spi = flash->spi;
  60. flash->command[0] = opcode;
  61. if (buf)
  62. memcpy(&flash->command[1], buf, len);
  63. return spi_write(spi, flash->command, len + 1);
  64. }
  65. static void m25p80_write(struct spi_nor *nor, loff_t to, size_t len,
  66. size_t *retlen, const u_char *buf)
  67. {
  68. struct m25p *flash = nor->priv;
  69. struct spi_device *spi = flash->spi;
  70. struct spi_transfer t[2] = {};
  71. struct spi_message m;
  72. int cmd_sz = m25p_cmdsz(nor);
  73. spi_message_init(&m);
  74. if (nor->program_opcode == SPINOR_OP_AAI_WP && nor->sst_write_second)
  75. cmd_sz = 1;
  76. flash->command[0] = nor->program_opcode;
  77. m25p_addr2cmd(nor, to, flash->command);
  78. t[0].tx_buf = flash->command;
  79. t[0].len = cmd_sz;
  80. spi_message_add_tail(&t[0], &m);
  81. t[1].tx_buf = buf;
  82. t[1].len = len;
  83. spi_message_add_tail(&t[1], &m);
  84. spi_sync(spi, &m);
  85. *retlen += m.actual_length - cmd_sz;
  86. }
  87. static inline unsigned int m25p80_rx_nbits(struct spi_nor *nor)
  88. {
  89. switch (nor->flash_read) {
  90. case SPI_NOR_DUAL:
  91. return 2;
  92. case SPI_NOR_QUAD:
  93. return 4;
  94. default:
  95. return 0;
  96. }
  97. }
  98. /*
  99. * Read an address range from the nor chip. The address range
  100. * may be any size provided it is within the physical boundaries.
  101. */
  102. static int m25p80_read(struct spi_nor *nor, loff_t from, size_t len,
  103. size_t *retlen, u_char *buf)
  104. {
  105. struct m25p *flash = nor->priv;
  106. struct spi_device *spi = flash->spi;
  107. struct spi_transfer t[2];
  108. struct spi_message m;
  109. unsigned int dummy = nor->read_dummy;
  110. /* convert the dummy cycles to the number of bytes */
  111. dummy /= 8;
  112. spi_message_init(&m);
  113. memset(t, 0, (sizeof t));
  114. flash->command[0] = nor->read_opcode;
  115. m25p_addr2cmd(nor, from, flash->command);
  116. t[0].tx_buf = flash->command;
  117. t[0].len = m25p_cmdsz(nor) + dummy;
  118. spi_message_add_tail(&t[0], &m);
  119. t[1].rx_buf = buf;
  120. t[1].rx_nbits = m25p80_rx_nbits(nor);
  121. t[1].len = len;
  122. spi_message_add_tail(&t[1], &m);
  123. spi_sync(spi, &m);
  124. *retlen = m.actual_length - m25p_cmdsz(nor) - dummy;
  125. return 0;
  126. }
  127. static int m25p80_erase(struct spi_nor *nor, loff_t offset)
  128. {
  129. struct m25p *flash = nor->priv;
  130. dev_dbg(nor->dev, "%dKiB at 0x%08x\n",
  131. flash->mtd.erasesize / 1024, (u32)offset);
  132. /* Set up command buffer. */
  133. flash->command[0] = nor->erase_opcode;
  134. m25p_addr2cmd(nor, offset, flash->command);
  135. spi_write(flash->spi, flash->command, m25p_cmdsz(nor));
  136. return 0;
  137. }
  138. /*
  139. * board specific setup should have ensured the SPI clock used here
  140. * matches what the READ command supports, at least until this driver
  141. * understands FAST_READ (for clocks over 25 MHz).
  142. */
  143. static int m25p_probe(struct spi_device *spi)
  144. {
  145. struct mtd_part_parser_data ppdata;
  146. struct flash_platform_data *data;
  147. struct m25p *flash;
  148. struct spi_nor *nor;
  149. enum read_mode mode = SPI_NOR_NORMAL;
  150. char *flash_name = NULL;
  151. int ret;
  152. data = dev_get_platdata(&spi->dev);
  153. flash = devm_kzalloc(&spi->dev, sizeof(*flash), GFP_KERNEL);
  154. if (!flash)
  155. return -ENOMEM;
  156. nor = &flash->spi_nor;
  157. /* install the hooks */
  158. nor->read = m25p80_read;
  159. nor->write = m25p80_write;
  160. nor->erase = m25p80_erase;
  161. nor->write_reg = m25p80_write_reg;
  162. nor->read_reg = m25p80_read_reg;
  163. nor->dev = &spi->dev;
  164. nor->mtd = &flash->mtd;
  165. nor->priv = flash;
  166. spi_set_drvdata(spi, flash);
  167. flash->mtd.priv = nor;
  168. flash->spi = spi;
  169. if (spi->mode & SPI_RX_QUAD)
  170. mode = SPI_NOR_QUAD;
  171. else if (spi->mode & SPI_RX_DUAL)
  172. mode = SPI_NOR_DUAL;
  173. if (data && data->name)
  174. flash->mtd.name = data->name;
  175. /* For some (historical?) reason many platforms provide two different
  176. * names in flash_platform_data: "name" and "type". Quite often name is
  177. * set to "m25p80" and then "type" provides a real chip name.
  178. * If that's the case, respect "type" and ignore a "name".
  179. */
  180. if (data && data->type)
  181. flash_name = data->type;
  182. else
  183. flash_name = spi->modalias;
  184. ret = spi_nor_scan(nor, flash_name, mode);
  185. if (ret)
  186. return ret;
  187. ppdata.of_node = spi->dev.of_node;
  188. return mtd_device_parse_register(&flash->mtd, NULL, &ppdata,
  189. data ? data->parts : NULL,
  190. data ? data->nr_parts : 0);
  191. }
  192. static int m25p_remove(struct spi_device *spi)
  193. {
  194. struct m25p *flash = spi_get_drvdata(spi);
  195. /* Clean up MTD stuff. */
  196. return mtd_device_unregister(&flash->mtd);
  197. }
  198. /*
  199. * Do NOT add to this array without reading the following:
  200. *
  201. * Historically, many flash devices are bound to this driver by their name. But
  202. * since most of these flash are compatible to some extent, and their
  203. * differences can often be differentiated by the JEDEC read-ID command, we
  204. * encourage new users to add support to the spi-nor library, and simply bind
  205. * against a generic string here (e.g., "jedec,spi-nor").
  206. *
  207. * Many flash names are kept here in this list (as well as in spi-nor.c) to
  208. * keep them available as module aliases for existing platforms.
  209. */
  210. static const struct spi_device_id m25p_ids[] = {
  211. /*
  212. * Entries not used in DTs that should be safe to drop after replacing
  213. * them with "nor-jedec" in platform data.
  214. */
  215. {"s25sl064a"}, {"w25x16"}, {"m25p10"}, {"m25px64"},
  216. /*
  217. * Entries that were used in DTs without "nor-jedec" fallback and should
  218. * be kept for backward compatibility.
  219. */
  220. {"at25df321a"}, {"at25df641"}, {"at26df081a"},
  221. {"mr25h256"},
  222. {"mx25l4005a"}, {"mx25l1606e"}, {"mx25l6405d"}, {"mx25l12805d"},
  223. {"mx25l25635e"},{"mx66l51235l"},
  224. {"n25q064"}, {"n25q128a11"}, {"n25q128a13"}, {"n25q512a"},
  225. {"s25fl256s1"}, {"s25fl512s"}, {"s25sl12801"}, {"s25fl008k"},
  226. {"s25fl064k"},
  227. {"sst25vf040b"},{"sst25vf016b"},{"sst25vf032b"},{"sst25wf040"},
  228. {"m25p40"}, {"m25p80"}, {"m25p16"}, {"m25p32"},
  229. {"m25p64"}, {"m25p128"},
  230. {"w25x80"}, {"w25x32"}, {"w25q32"}, {"w25q32dw"},
  231. {"w25q80bl"}, {"w25q128"}, {"w25q256"},
  232. /* Flashes that can't be detected using JEDEC */
  233. {"m25p05-nonjedec"}, {"m25p10-nonjedec"}, {"m25p20-nonjedec"},
  234. {"m25p40-nonjedec"}, {"m25p80-nonjedec"}, {"m25p16-nonjedec"},
  235. {"m25p32-nonjedec"}, {"m25p64-nonjedec"}, {"m25p128-nonjedec"},
  236. { },
  237. };
  238. MODULE_DEVICE_TABLE(spi, m25p_ids);
  239. static const struct of_device_id m25p_of_table[] = {
  240. /*
  241. * Generic compatibility for SPI NOR that can be identified by the
  242. * JEDEC READ ID opcode (0x9F). Use this, if possible.
  243. */
  244. { .compatible = "jedec,spi-nor" },
  245. {}
  246. };
  247. MODULE_DEVICE_TABLE(of, m25p_of_table);
  248. static struct spi_driver m25p80_driver = {
  249. .driver = {
  250. .name = "m25p80",
  251. .owner = THIS_MODULE,
  252. .of_match_table = m25p_of_table,
  253. },
  254. .id_table = m25p_ids,
  255. .probe = m25p_probe,
  256. .remove = m25p_remove,
  257. /* REVISIT: many of these chips have deep power-down modes, which
  258. * should clearly be entered on suspend() to minimize power use.
  259. * And also when they're otherwise idle...
  260. */
  261. };
  262. module_spi_driver(m25p80_driver);
  263. MODULE_LICENSE("GPL");
  264. MODULE_AUTHOR("Mike Lavender");
  265. MODULE_DESCRIPTION("MTD SPI driver for ST M25Pxx flash chips");