bmg160.c 30 KB

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  1. /*
  2. * BMG160 Gyro Sensor driver
  3. * Copyright (c) 2014, Intel Corporation.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms and conditions of the GNU General Public License,
  7. * version 2, as published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. */
  14. #include <linux/module.h>
  15. #include <linux/i2c.h>
  16. #include <linux/interrupt.h>
  17. #include <linux/delay.h>
  18. #include <linux/slab.h>
  19. #include <linux/acpi.h>
  20. #include <linux/gpio/consumer.h>
  21. #include <linux/pm.h>
  22. #include <linux/pm_runtime.h>
  23. #include <linux/iio/iio.h>
  24. #include <linux/iio/sysfs.h>
  25. #include <linux/iio/buffer.h>
  26. #include <linux/iio/trigger.h>
  27. #include <linux/iio/events.h>
  28. #include <linux/iio/trigger_consumer.h>
  29. #include <linux/iio/triggered_buffer.h>
  30. #define BMG160_DRV_NAME "bmg160"
  31. #define BMG160_IRQ_NAME "bmg160_event"
  32. #define BMG160_GPIO_NAME "gpio_int"
  33. #define BMG160_REG_CHIP_ID 0x00
  34. #define BMG160_CHIP_ID_VAL 0x0F
  35. #define BMG160_REG_PMU_LPW 0x11
  36. #define BMG160_MODE_NORMAL 0x00
  37. #define BMG160_MODE_DEEP_SUSPEND 0x20
  38. #define BMG160_MODE_SUSPEND 0x80
  39. #define BMG160_REG_RANGE 0x0F
  40. #define BMG160_RANGE_2000DPS 0
  41. #define BMG160_RANGE_1000DPS 1
  42. #define BMG160_RANGE_500DPS 2
  43. #define BMG160_RANGE_250DPS 3
  44. #define BMG160_RANGE_125DPS 4
  45. #define BMG160_REG_PMU_BW 0x10
  46. #define BMG160_NO_FILTER 0
  47. #define BMG160_DEF_BW 100
  48. #define BMG160_REG_INT_MAP_0 0x17
  49. #define BMG160_INT_MAP_0_BIT_ANY BIT(1)
  50. #define BMG160_REG_INT_MAP_1 0x18
  51. #define BMG160_INT_MAP_1_BIT_NEW_DATA BIT(0)
  52. #define BMG160_REG_INT_RST_LATCH 0x21
  53. #define BMG160_INT_MODE_LATCH_RESET 0x80
  54. #define BMG160_INT_MODE_LATCH_INT 0x0F
  55. #define BMG160_INT_MODE_NON_LATCH_INT 0x00
  56. #define BMG160_REG_INT_EN_0 0x15
  57. #define BMG160_DATA_ENABLE_INT BIT(7)
  58. #define BMG160_REG_INT_EN_1 0x16
  59. #define BMG160_INT1_BIT_OD BIT(1)
  60. #define BMG160_REG_XOUT_L 0x02
  61. #define BMG160_AXIS_TO_REG(axis) (BMG160_REG_XOUT_L + (axis * 2))
  62. #define BMG160_REG_SLOPE_THRES 0x1B
  63. #define BMG160_SLOPE_THRES_MASK 0x0F
  64. #define BMG160_REG_MOTION_INTR 0x1C
  65. #define BMG160_INT_MOTION_X BIT(0)
  66. #define BMG160_INT_MOTION_Y BIT(1)
  67. #define BMG160_INT_MOTION_Z BIT(2)
  68. #define BMG160_ANY_DUR_MASK 0x30
  69. #define BMG160_ANY_DUR_SHIFT 4
  70. #define BMG160_REG_INT_STATUS_2 0x0B
  71. #define BMG160_ANY_MOTION_MASK 0x07
  72. #define BMG160_ANY_MOTION_BIT_X BIT(0)
  73. #define BMG160_ANY_MOTION_BIT_Y BIT(1)
  74. #define BMG160_ANY_MOTION_BIT_Z BIT(2)
  75. #define BMG160_REG_TEMP 0x08
  76. #define BMG160_TEMP_CENTER_VAL 23
  77. #define BMG160_MAX_STARTUP_TIME_MS 80
  78. #define BMG160_AUTO_SUSPEND_DELAY_MS 2000
  79. struct bmg160_data {
  80. struct i2c_client *client;
  81. struct iio_trigger *dready_trig;
  82. struct iio_trigger *motion_trig;
  83. struct mutex mutex;
  84. s16 buffer[8];
  85. u8 bw_bits;
  86. u32 dps_range;
  87. int ev_enable_state;
  88. int slope_thres;
  89. bool dready_trigger_on;
  90. bool motion_trigger_on;
  91. };
  92. enum bmg160_axis {
  93. AXIS_X,
  94. AXIS_Y,
  95. AXIS_Z,
  96. };
  97. static const struct {
  98. int val;
  99. int bw_bits;
  100. } bmg160_samp_freq_table[] = { {100, 0x07},
  101. {200, 0x06},
  102. {400, 0x03},
  103. {1000, 0x02},
  104. {2000, 0x01} };
  105. static const struct {
  106. int scale;
  107. int dps_range;
  108. } bmg160_scale_table[] = { { 1065, BMG160_RANGE_2000DPS},
  109. { 532, BMG160_RANGE_1000DPS},
  110. { 266, BMG160_RANGE_500DPS},
  111. { 133, BMG160_RANGE_250DPS},
  112. { 66, BMG160_RANGE_125DPS} };
  113. static int bmg160_set_mode(struct bmg160_data *data, u8 mode)
  114. {
  115. int ret;
  116. ret = i2c_smbus_write_byte_data(data->client,
  117. BMG160_REG_PMU_LPW, mode);
  118. if (ret < 0) {
  119. dev_err(&data->client->dev, "Error writing reg_pmu_lpw\n");
  120. return ret;
  121. }
  122. return 0;
  123. }
  124. static int bmg160_convert_freq_to_bit(int val)
  125. {
  126. int i;
  127. for (i = 0; i < ARRAY_SIZE(bmg160_samp_freq_table); ++i) {
  128. if (bmg160_samp_freq_table[i].val == val)
  129. return bmg160_samp_freq_table[i].bw_bits;
  130. }
  131. return -EINVAL;
  132. }
  133. static int bmg160_set_bw(struct bmg160_data *data, int val)
  134. {
  135. int ret;
  136. int bw_bits;
  137. bw_bits = bmg160_convert_freq_to_bit(val);
  138. if (bw_bits < 0)
  139. return bw_bits;
  140. ret = i2c_smbus_write_byte_data(data->client, BMG160_REG_PMU_BW,
  141. bw_bits);
  142. if (ret < 0) {
  143. dev_err(&data->client->dev, "Error writing reg_pmu_bw\n");
  144. return ret;
  145. }
  146. data->bw_bits = bw_bits;
  147. return 0;
  148. }
  149. static int bmg160_chip_init(struct bmg160_data *data)
  150. {
  151. int ret;
  152. ret = i2c_smbus_read_byte_data(data->client, BMG160_REG_CHIP_ID);
  153. if (ret < 0) {
  154. dev_err(&data->client->dev, "Error reading reg_chip_id\n");
  155. return ret;
  156. }
  157. dev_dbg(&data->client->dev, "Chip Id %x\n", ret);
  158. if (ret != BMG160_CHIP_ID_VAL) {
  159. dev_err(&data->client->dev, "invalid chip %x\n", ret);
  160. return -ENODEV;
  161. }
  162. ret = bmg160_set_mode(data, BMG160_MODE_NORMAL);
  163. if (ret < 0)
  164. return ret;
  165. /* Wait upto 500 ms to be ready after changing mode */
  166. usleep_range(500, 1000);
  167. /* Set Bandwidth */
  168. ret = bmg160_set_bw(data, BMG160_DEF_BW);
  169. if (ret < 0)
  170. return ret;
  171. /* Set Default Range */
  172. ret = i2c_smbus_write_byte_data(data->client,
  173. BMG160_REG_RANGE,
  174. BMG160_RANGE_500DPS);
  175. if (ret < 0) {
  176. dev_err(&data->client->dev, "Error writing reg_range\n");
  177. return ret;
  178. }
  179. data->dps_range = BMG160_RANGE_500DPS;
  180. ret = i2c_smbus_read_byte_data(data->client, BMG160_REG_SLOPE_THRES);
  181. if (ret < 0) {
  182. dev_err(&data->client->dev, "Error reading reg_slope_thres\n");
  183. return ret;
  184. }
  185. data->slope_thres = ret;
  186. /* Set default interrupt mode */
  187. ret = i2c_smbus_read_byte_data(data->client, BMG160_REG_INT_EN_1);
  188. if (ret < 0) {
  189. dev_err(&data->client->dev, "Error reading reg_int_en_1\n");
  190. return ret;
  191. }
  192. ret &= ~BMG160_INT1_BIT_OD;
  193. ret = i2c_smbus_write_byte_data(data->client,
  194. BMG160_REG_INT_EN_1, ret);
  195. if (ret < 0) {
  196. dev_err(&data->client->dev, "Error writing reg_int_en_1\n");
  197. return ret;
  198. }
  199. ret = i2c_smbus_write_byte_data(data->client,
  200. BMG160_REG_INT_RST_LATCH,
  201. BMG160_INT_MODE_LATCH_INT |
  202. BMG160_INT_MODE_LATCH_RESET);
  203. if (ret < 0) {
  204. dev_err(&data->client->dev,
  205. "Error writing reg_motion_intr\n");
  206. return ret;
  207. }
  208. return 0;
  209. }
  210. static int bmg160_set_power_state(struct bmg160_data *data, bool on)
  211. {
  212. #ifdef CONFIG_PM
  213. int ret;
  214. if (on)
  215. ret = pm_runtime_get_sync(&data->client->dev);
  216. else {
  217. pm_runtime_mark_last_busy(&data->client->dev);
  218. ret = pm_runtime_put_autosuspend(&data->client->dev);
  219. }
  220. if (ret < 0) {
  221. dev_err(&data->client->dev,
  222. "Failed: bmg160_set_power_state for %d\n", on);
  223. if (on)
  224. pm_runtime_put_noidle(&data->client->dev);
  225. return ret;
  226. }
  227. #endif
  228. return 0;
  229. }
  230. static int bmg160_setup_any_motion_interrupt(struct bmg160_data *data,
  231. bool status)
  232. {
  233. int ret;
  234. /* Enable/Disable INT_MAP0 mapping */
  235. ret = i2c_smbus_read_byte_data(data->client, BMG160_REG_INT_MAP_0);
  236. if (ret < 0) {
  237. dev_err(&data->client->dev, "Error reading reg_int_map0\n");
  238. return ret;
  239. }
  240. if (status)
  241. ret |= BMG160_INT_MAP_0_BIT_ANY;
  242. else
  243. ret &= ~BMG160_INT_MAP_0_BIT_ANY;
  244. ret = i2c_smbus_write_byte_data(data->client,
  245. BMG160_REG_INT_MAP_0,
  246. ret);
  247. if (ret < 0) {
  248. dev_err(&data->client->dev, "Error writing reg_int_map0\n");
  249. return ret;
  250. }
  251. /* Enable/Disable slope interrupts */
  252. if (status) {
  253. /* Update slope thres */
  254. ret = i2c_smbus_write_byte_data(data->client,
  255. BMG160_REG_SLOPE_THRES,
  256. data->slope_thres);
  257. if (ret < 0) {
  258. dev_err(&data->client->dev,
  259. "Error writing reg_slope_thres\n");
  260. return ret;
  261. }
  262. ret = i2c_smbus_write_byte_data(data->client,
  263. BMG160_REG_MOTION_INTR,
  264. BMG160_INT_MOTION_X |
  265. BMG160_INT_MOTION_Y |
  266. BMG160_INT_MOTION_Z);
  267. if (ret < 0) {
  268. dev_err(&data->client->dev,
  269. "Error writing reg_motion_intr\n");
  270. return ret;
  271. }
  272. /*
  273. * New data interrupt is always non-latched,
  274. * which will have higher priority, so no need
  275. * to set latched mode, we will be flooded anyway with INTR
  276. */
  277. if (!data->dready_trigger_on) {
  278. ret = i2c_smbus_write_byte_data(data->client,
  279. BMG160_REG_INT_RST_LATCH,
  280. BMG160_INT_MODE_LATCH_INT |
  281. BMG160_INT_MODE_LATCH_RESET);
  282. if (ret < 0) {
  283. dev_err(&data->client->dev,
  284. "Error writing reg_rst_latch\n");
  285. return ret;
  286. }
  287. }
  288. ret = i2c_smbus_write_byte_data(data->client,
  289. BMG160_REG_INT_EN_0,
  290. BMG160_DATA_ENABLE_INT);
  291. } else
  292. ret = i2c_smbus_write_byte_data(data->client,
  293. BMG160_REG_INT_EN_0,
  294. 0);
  295. if (ret < 0) {
  296. dev_err(&data->client->dev, "Error writing reg_int_en0\n");
  297. return ret;
  298. }
  299. return 0;
  300. }
  301. static int bmg160_setup_new_data_interrupt(struct bmg160_data *data,
  302. bool status)
  303. {
  304. int ret;
  305. /* Enable/Disable INT_MAP1 mapping */
  306. ret = i2c_smbus_read_byte_data(data->client, BMG160_REG_INT_MAP_1);
  307. if (ret < 0) {
  308. dev_err(&data->client->dev, "Error reading reg_int_map1\n");
  309. return ret;
  310. }
  311. if (status)
  312. ret |= BMG160_INT_MAP_1_BIT_NEW_DATA;
  313. else
  314. ret &= ~BMG160_INT_MAP_1_BIT_NEW_DATA;
  315. ret = i2c_smbus_write_byte_data(data->client,
  316. BMG160_REG_INT_MAP_1,
  317. ret);
  318. if (ret < 0) {
  319. dev_err(&data->client->dev, "Error writing reg_int_map1\n");
  320. return ret;
  321. }
  322. if (status) {
  323. ret = i2c_smbus_write_byte_data(data->client,
  324. BMG160_REG_INT_RST_LATCH,
  325. BMG160_INT_MODE_NON_LATCH_INT |
  326. BMG160_INT_MODE_LATCH_RESET);
  327. if (ret < 0) {
  328. dev_err(&data->client->dev,
  329. "Error writing reg_rst_latch\n");
  330. return ret;
  331. }
  332. ret = i2c_smbus_write_byte_data(data->client,
  333. BMG160_REG_INT_EN_0,
  334. BMG160_DATA_ENABLE_INT);
  335. } else {
  336. /* Restore interrupt mode */
  337. ret = i2c_smbus_write_byte_data(data->client,
  338. BMG160_REG_INT_RST_LATCH,
  339. BMG160_INT_MODE_LATCH_INT |
  340. BMG160_INT_MODE_LATCH_RESET);
  341. if (ret < 0) {
  342. dev_err(&data->client->dev,
  343. "Error writing reg_rst_latch\n");
  344. return ret;
  345. }
  346. ret = i2c_smbus_write_byte_data(data->client,
  347. BMG160_REG_INT_EN_0,
  348. 0);
  349. }
  350. if (ret < 0) {
  351. dev_err(&data->client->dev, "Error writing reg_int_en0\n");
  352. return ret;
  353. }
  354. return 0;
  355. }
  356. static int bmg160_get_bw(struct bmg160_data *data, int *val)
  357. {
  358. int i;
  359. for (i = 0; i < ARRAY_SIZE(bmg160_samp_freq_table); ++i) {
  360. if (bmg160_samp_freq_table[i].bw_bits == data->bw_bits) {
  361. *val = bmg160_samp_freq_table[i].val;
  362. return IIO_VAL_INT;
  363. }
  364. }
  365. return -EINVAL;
  366. }
  367. static int bmg160_set_scale(struct bmg160_data *data, int val)
  368. {
  369. int ret, i;
  370. for (i = 0; i < ARRAY_SIZE(bmg160_scale_table); ++i) {
  371. if (bmg160_scale_table[i].scale == val) {
  372. ret = i2c_smbus_write_byte_data(
  373. data->client,
  374. BMG160_REG_RANGE,
  375. bmg160_scale_table[i].dps_range);
  376. if (ret < 0) {
  377. dev_err(&data->client->dev,
  378. "Error writing reg_range\n");
  379. return ret;
  380. }
  381. data->dps_range = bmg160_scale_table[i].dps_range;
  382. return 0;
  383. }
  384. }
  385. return -EINVAL;
  386. }
  387. static int bmg160_get_temp(struct bmg160_data *data, int *val)
  388. {
  389. int ret;
  390. mutex_lock(&data->mutex);
  391. ret = bmg160_set_power_state(data, true);
  392. if (ret < 0) {
  393. mutex_unlock(&data->mutex);
  394. return ret;
  395. }
  396. ret = i2c_smbus_read_byte_data(data->client, BMG160_REG_TEMP);
  397. if (ret < 0) {
  398. dev_err(&data->client->dev, "Error reading reg_temp\n");
  399. bmg160_set_power_state(data, false);
  400. mutex_unlock(&data->mutex);
  401. return ret;
  402. }
  403. *val = sign_extend32(ret, 7);
  404. ret = bmg160_set_power_state(data, false);
  405. mutex_unlock(&data->mutex);
  406. if (ret < 0)
  407. return ret;
  408. return IIO_VAL_INT;
  409. }
  410. static int bmg160_get_axis(struct bmg160_data *data, int axis, int *val)
  411. {
  412. int ret;
  413. mutex_lock(&data->mutex);
  414. ret = bmg160_set_power_state(data, true);
  415. if (ret < 0) {
  416. mutex_unlock(&data->mutex);
  417. return ret;
  418. }
  419. ret = i2c_smbus_read_word_data(data->client, BMG160_AXIS_TO_REG(axis));
  420. if (ret < 0) {
  421. dev_err(&data->client->dev, "Error reading axis %d\n", axis);
  422. bmg160_set_power_state(data, false);
  423. mutex_unlock(&data->mutex);
  424. return ret;
  425. }
  426. *val = sign_extend32(ret, 15);
  427. ret = bmg160_set_power_state(data, false);
  428. mutex_unlock(&data->mutex);
  429. if (ret < 0)
  430. return ret;
  431. return IIO_VAL_INT;
  432. }
  433. static int bmg160_read_raw(struct iio_dev *indio_dev,
  434. struct iio_chan_spec const *chan,
  435. int *val, int *val2, long mask)
  436. {
  437. struct bmg160_data *data = iio_priv(indio_dev);
  438. int ret;
  439. switch (mask) {
  440. case IIO_CHAN_INFO_RAW:
  441. switch (chan->type) {
  442. case IIO_TEMP:
  443. return bmg160_get_temp(data, val);
  444. case IIO_ANGL_VEL:
  445. if (iio_buffer_enabled(indio_dev))
  446. return -EBUSY;
  447. else
  448. return bmg160_get_axis(data, chan->scan_index,
  449. val);
  450. default:
  451. return -EINVAL;
  452. }
  453. case IIO_CHAN_INFO_OFFSET:
  454. if (chan->type == IIO_TEMP) {
  455. *val = BMG160_TEMP_CENTER_VAL;
  456. return IIO_VAL_INT;
  457. } else
  458. return -EINVAL;
  459. case IIO_CHAN_INFO_SCALE:
  460. *val = 0;
  461. switch (chan->type) {
  462. case IIO_TEMP:
  463. *val2 = 500000;
  464. return IIO_VAL_INT_PLUS_MICRO;
  465. case IIO_ANGL_VEL:
  466. {
  467. int i;
  468. for (i = 0; i < ARRAY_SIZE(bmg160_scale_table); ++i) {
  469. if (bmg160_scale_table[i].dps_range ==
  470. data->dps_range) {
  471. *val2 = bmg160_scale_table[i].scale;
  472. return IIO_VAL_INT_PLUS_MICRO;
  473. }
  474. }
  475. return -EINVAL;
  476. }
  477. default:
  478. return -EINVAL;
  479. }
  480. case IIO_CHAN_INFO_SAMP_FREQ:
  481. *val2 = 0;
  482. mutex_lock(&data->mutex);
  483. ret = bmg160_get_bw(data, val);
  484. mutex_unlock(&data->mutex);
  485. return ret;
  486. default:
  487. return -EINVAL;
  488. }
  489. }
  490. static int bmg160_write_raw(struct iio_dev *indio_dev,
  491. struct iio_chan_spec const *chan,
  492. int val, int val2, long mask)
  493. {
  494. struct bmg160_data *data = iio_priv(indio_dev);
  495. int ret;
  496. switch (mask) {
  497. case IIO_CHAN_INFO_SAMP_FREQ:
  498. mutex_lock(&data->mutex);
  499. /*
  500. * Section 4.2 of spec
  501. * In suspend mode, the only supported operations are reading
  502. * registers as well as writing to the (0x14) softreset
  503. * register. Since we will be in suspend mode by default, change
  504. * mode to power on for other writes.
  505. */
  506. ret = bmg160_set_power_state(data, true);
  507. if (ret < 0) {
  508. mutex_unlock(&data->mutex);
  509. return ret;
  510. }
  511. ret = bmg160_set_bw(data, val);
  512. if (ret < 0) {
  513. bmg160_set_power_state(data, false);
  514. mutex_unlock(&data->mutex);
  515. return ret;
  516. }
  517. ret = bmg160_set_power_state(data, false);
  518. mutex_unlock(&data->mutex);
  519. return ret;
  520. case IIO_CHAN_INFO_SCALE:
  521. if (val)
  522. return -EINVAL;
  523. mutex_lock(&data->mutex);
  524. /* Refer to comments above for the suspend mode ops */
  525. ret = bmg160_set_power_state(data, true);
  526. if (ret < 0) {
  527. mutex_unlock(&data->mutex);
  528. return ret;
  529. }
  530. ret = bmg160_set_scale(data, val2);
  531. if (ret < 0) {
  532. bmg160_set_power_state(data, false);
  533. mutex_unlock(&data->mutex);
  534. return ret;
  535. }
  536. ret = bmg160_set_power_state(data, false);
  537. mutex_unlock(&data->mutex);
  538. return ret;
  539. default:
  540. return -EINVAL;
  541. }
  542. return -EINVAL;
  543. }
  544. static int bmg160_read_event(struct iio_dev *indio_dev,
  545. const struct iio_chan_spec *chan,
  546. enum iio_event_type type,
  547. enum iio_event_direction dir,
  548. enum iio_event_info info,
  549. int *val, int *val2)
  550. {
  551. struct bmg160_data *data = iio_priv(indio_dev);
  552. *val2 = 0;
  553. switch (info) {
  554. case IIO_EV_INFO_VALUE:
  555. *val = data->slope_thres & BMG160_SLOPE_THRES_MASK;
  556. break;
  557. default:
  558. return -EINVAL;
  559. }
  560. return IIO_VAL_INT;
  561. }
  562. static int bmg160_write_event(struct iio_dev *indio_dev,
  563. const struct iio_chan_spec *chan,
  564. enum iio_event_type type,
  565. enum iio_event_direction dir,
  566. enum iio_event_info info,
  567. int val, int val2)
  568. {
  569. struct bmg160_data *data = iio_priv(indio_dev);
  570. switch (info) {
  571. case IIO_EV_INFO_VALUE:
  572. if (data->ev_enable_state)
  573. return -EBUSY;
  574. data->slope_thres &= ~BMG160_SLOPE_THRES_MASK;
  575. data->slope_thres |= (val & BMG160_SLOPE_THRES_MASK);
  576. break;
  577. default:
  578. return -EINVAL;
  579. }
  580. return 0;
  581. }
  582. static int bmg160_read_event_config(struct iio_dev *indio_dev,
  583. const struct iio_chan_spec *chan,
  584. enum iio_event_type type,
  585. enum iio_event_direction dir)
  586. {
  587. struct bmg160_data *data = iio_priv(indio_dev);
  588. return data->ev_enable_state;
  589. }
  590. static int bmg160_write_event_config(struct iio_dev *indio_dev,
  591. const struct iio_chan_spec *chan,
  592. enum iio_event_type type,
  593. enum iio_event_direction dir,
  594. int state)
  595. {
  596. struct bmg160_data *data = iio_priv(indio_dev);
  597. int ret;
  598. if (state && data->ev_enable_state)
  599. return 0;
  600. mutex_lock(&data->mutex);
  601. if (!state && data->motion_trigger_on) {
  602. data->ev_enable_state = 0;
  603. mutex_unlock(&data->mutex);
  604. return 0;
  605. }
  606. /*
  607. * We will expect the enable and disable to do operation in
  608. * in reverse order. This will happen here anyway as our
  609. * resume operation uses sync mode runtime pm calls, the
  610. * suspend operation will be delayed by autosuspend delay
  611. * So the disable operation will still happen in reverse of
  612. * enable operation. When runtime pm is disabled the mode
  613. * is always on so sequence doesn't matter
  614. */
  615. ret = bmg160_set_power_state(data, state);
  616. if (ret < 0) {
  617. mutex_unlock(&data->mutex);
  618. return ret;
  619. }
  620. ret = bmg160_setup_any_motion_interrupt(data, state);
  621. if (ret < 0) {
  622. bmg160_set_power_state(data, false);
  623. mutex_unlock(&data->mutex);
  624. return ret;
  625. }
  626. data->ev_enable_state = state;
  627. mutex_unlock(&data->mutex);
  628. return 0;
  629. }
  630. static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("100 200 400 1000 2000");
  631. static IIO_CONST_ATTR(in_anglvel_scale_available,
  632. "0.001065 0.000532 0.000266 0.000133 0.000066");
  633. static struct attribute *bmg160_attributes[] = {
  634. &iio_const_attr_sampling_frequency_available.dev_attr.attr,
  635. &iio_const_attr_in_anglvel_scale_available.dev_attr.attr,
  636. NULL,
  637. };
  638. static const struct attribute_group bmg160_attrs_group = {
  639. .attrs = bmg160_attributes,
  640. };
  641. static const struct iio_event_spec bmg160_event = {
  642. .type = IIO_EV_TYPE_ROC,
  643. .dir = IIO_EV_DIR_EITHER,
  644. .mask_shared_by_type = BIT(IIO_EV_INFO_VALUE) |
  645. BIT(IIO_EV_INFO_ENABLE)
  646. };
  647. #define BMG160_CHANNEL(_axis) { \
  648. .type = IIO_ANGL_VEL, \
  649. .modified = 1, \
  650. .channel2 = IIO_MOD_##_axis, \
  651. .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
  652. .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \
  653. BIT(IIO_CHAN_INFO_SAMP_FREQ), \
  654. .scan_index = AXIS_##_axis, \
  655. .scan_type = { \
  656. .sign = 's', \
  657. .realbits = 16, \
  658. .storagebits = 16, \
  659. }, \
  660. .event_spec = &bmg160_event, \
  661. .num_event_specs = 1 \
  662. }
  663. static const struct iio_chan_spec bmg160_channels[] = {
  664. {
  665. .type = IIO_TEMP,
  666. .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
  667. BIT(IIO_CHAN_INFO_SCALE) |
  668. BIT(IIO_CHAN_INFO_OFFSET),
  669. .scan_index = -1,
  670. },
  671. BMG160_CHANNEL(X),
  672. BMG160_CHANNEL(Y),
  673. BMG160_CHANNEL(Z),
  674. IIO_CHAN_SOFT_TIMESTAMP(3),
  675. };
  676. static const struct iio_info bmg160_info = {
  677. .attrs = &bmg160_attrs_group,
  678. .read_raw = bmg160_read_raw,
  679. .write_raw = bmg160_write_raw,
  680. .read_event_value = bmg160_read_event,
  681. .write_event_value = bmg160_write_event,
  682. .write_event_config = bmg160_write_event_config,
  683. .read_event_config = bmg160_read_event_config,
  684. .driver_module = THIS_MODULE,
  685. };
  686. static irqreturn_t bmg160_trigger_handler(int irq, void *p)
  687. {
  688. struct iio_poll_func *pf = p;
  689. struct iio_dev *indio_dev = pf->indio_dev;
  690. struct bmg160_data *data = iio_priv(indio_dev);
  691. int bit, ret, i = 0;
  692. mutex_lock(&data->mutex);
  693. for_each_set_bit(bit, indio_dev->active_scan_mask,
  694. indio_dev->masklength) {
  695. ret = i2c_smbus_read_word_data(data->client,
  696. BMG160_AXIS_TO_REG(bit));
  697. if (ret < 0) {
  698. mutex_unlock(&data->mutex);
  699. goto err;
  700. }
  701. data->buffer[i++] = ret;
  702. }
  703. mutex_unlock(&data->mutex);
  704. iio_push_to_buffers_with_timestamp(indio_dev, data->buffer,
  705. pf->timestamp);
  706. err:
  707. iio_trigger_notify_done(indio_dev->trig);
  708. return IRQ_HANDLED;
  709. }
  710. static int bmg160_trig_try_reen(struct iio_trigger *trig)
  711. {
  712. struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
  713. struct bmg160_data *data = iio_priv(indio_dev);
  714. int ret;
  715. /* new data interrupts don't need ack */
  716. if (data->dready_trigger_on)
  717. return 0;
  718. /* Set latched mode interrupt and clear any latched interrupt */
  719. ret = i2c_smbus_write_byte_data(data->client,
  720. BMG160_REG_INT_RST_LATCH,
  721. BMG160_INT_MODE_LATCH_INT |
  722. BMG160_INT_MODE_LATCH_RESET);
  723. if (ret < 0) {
  724. dev_err(&data->client->dev, "Error writing reg_rst_latch\n");
  725. return ret;
  726. }
  727. return 0;
  728. }
  729. static int bmg160_data_rdy_trigger_set_state(struct iio_trigger *trig,
  730. bool state)
  731. {
  732. struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
  733. struct bmg160_data *data = iio_priv(indio_dev);
  734. int ret;
  735. mutex_lock(&data->mutex);
  736. if (!state && data->ev_enable_state && data->motion_trigger_on) {
  737. data->motion_trigger_on = false;
  738. mutex_unlock(&data->mutex);
  739. return 0;
  740. }
  741. /*
  742. * Refer to comment in bmg160_write_event_config for
  743. * enable/disable operation order
  744. */
  745. ret = bmg160_set_power_state(data, state);
  746. if (ret < 0) {
  747. mutex_unlock(&data->mutex);
  748. return ret;
  749. }
  750. if (data->motion_trig == trig)
  751. ret = bmg160_setup_any_motion_interrupt(data, state);
  752. else
  753. ret = bmg160_setup_new_data_interrupt(data, state);
  754. if (ret < 0) {
  755. bmg160_set_power_state(data, false);
  756. mutex_unlock(&data->mutex);
  757. return ret;
  758. }
  759. if (data->motion_trig == trig)
  760. data->motion_trigger_on = state;
  761. else
  762. data->dready_trigger_on = state;
  763. mutex_unlock(&data->mutex);
  764. return 0;
  765. }
  766. static const struct iio_trigger_ops bmg160_trigger_ops = {
  767. .set_trigger_state = bmg160_data_rdy_trigger_set_state,
  768. .try_reenable = bmg160_trig_try_reen,
  769. .owner = THIS_MODULE,
  770. };
  771. static irqreturn_t bmg160_event_handler(int irq, void *private)
  772. {
  773. struct iio_dev *indio_dev = private;
  774. struct bmg160_data *data = iio_priv(indio_dev);
  775. int ret;
  776. int dir;
  777. ret = i2c_smbus_read_byte_data(data->client, BMG160_REG_INT_STATUS_2);
  778. if (ret < 0) {
  779. dev_err(&data->client->dev, "Error reading reg_int_status2\n");
  780. goto ack_intr_status;
  781. }
  782. if (ret & 0x08)
  783. dir = IIO_EV_DIR_RISING;
  784. else
  785. dir = IIO_EV_DIR_FALLING;
  786. if (ret & BMG160_ANY_MOTION_BIT_X)
  787. iio_push_event(indio_dev, IIO_MOD_EVENT_CODE(IIO_ANGL_VEL,
  788. 0,
  789. IIO_MOD_X,
  790. IIO_EV_TYPE_ROC,
  791. dir),
  792. iio_get_time_ns());
  793. if (ret & BMG160_ANY_MOTION_BIT_Y)
  794. iio_push_event(indio_dev, IIO_MOD_EVENT_CODE(IIO_ANGL_VEL,
  795. 0,
  796. IIO_MOD_Y,
  797. IIO_EV_TYPE_ROC,
  798. dir),
  799. iio_get_time_ns());
  800. if (ret & BMG160_ANY_MOTION_BIT_Z)
  801. iio_push_event(indio_dev, IIO_MOD_EVENT_CODE(IIO_ANGL_VEL,
  802. 0,
  803. IIO_MOD_Z,
  804. IIO_EV_TYPE_ROC,
  805. dir),
  806. iio_get_time_ns());
  807. ack_intr_status:
  808. if (!data->dready_trigger_on) {
  809. ret = i2c_smbus_write_byte_data(data->client,
  810. BMG160_REG_INT_RST_LATCH,
  811. BMG160_INT_MODE_LATCH_INT |
  812. BMG160_INT_MODE_LATCH_RESET);
  813. if (ret < 0)
  814. dev_err(&data->client->dev,
  815. "Error writing reg_rst_latch\n");
  816. }
  817. return IRQ_HANDLED;
  818. }
  819. static irqreturn_t bmg160_data_rdy_trig_poll(int irq, void *private)
  820. {
  821. struct iio_dev *indio_dev = private;
  822. struct bmg160_data *data = iio_priv(indio_dev);
  823. if (data->dready_trigger_on)
  824. iio_trigger_poll(data->dready_trig);
  825. else if (data->motion_trigger_on)
  826. iio_trigger_poll(data->motion_trig);
  827. if (data->ev_enable_state)
  828. return IRQ_WAKE_THREAD;
  829. else
  830. return IRQ_HANDLED;
  831. }
  832. static int bmg160_buffer_preenable(struct iio_dev *indio_dev)
  833. {
  834. struct bmg160_data *data = iio_priv(indio_dev);
  835. return bmg160_set_power_state(data, true);
  836. }
  837. static int bmg160_buffer_postdisable(struct iio_dev *indio_dev)
  838. {
  839. struct bmg160_data *data = iio_priv(indio_dev);
  840. return bmg160_set_power_state(data, false);
  841. }
  842. static const struct iio_buffer_setup_ops bmg160_buffer_setup_ops = {
  843. .preenable = bmg160_buffer_preenable,
  844. .postenable = iio_triggered_buffer_postenable,
  845. .predisable = iio_triggered_buffer_predisable,
  846. .postdisable = bmg160_buffer_postdisable,
  847. };
  848. static int bmg160_gpio_probe(struct i2c_client *client,
  849. struct bmg160_data *data)
  850. {
  851. struct device *dev;
  852. struct gpio_desc *gpio;
  853. int ret;
  854. if (!client)
  855. return -EINVAL;
  856. dev = &client->dev;
  857. /* data ready gpio interrupt pin */
  858. gpio = devm_gpiod_get_index(dev, BMG160_GPIO_NAME, 0, GPIOD_IN);
  859. if (IS_ERR(gpio)) {
  860. dev_err(dev, "acpi gpio get index failed\n");
  861. return PTR_ERR(gpio);
  862. }
  863. ret = gpiod_to_irq(gpio);
  864. dev_dbg(dev, "GPIO resource, no:%d irq:%d\n", desc_to_gpio(gpio), ret);
  865. return ret;
  866. }
  867. static const char *bmg160_match_acpi_device(struct device *dev)
  868. {
  869. const struct acpi_device_id *id;
  870. id = acpi_match_device(dev->driver->acpi_match_table, dev);
  871. if (!id)
  872. return NULL;
  873. return dev_name(dev);
  874. }
  875. static int bmg160_probe(struct i2c_client *client,
  876. const struct i2c_device_id *id)
  877. {
  878. struct bmg160_data *data;
  879. struct iio_dev *indio_dev;
  880. int ret;
  881. const char *name = NULL;
  882. indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
  883. if (!indio_dev)
  884. return -ENOMEM;
  885. data = iio_priv(indio_dev);
  886. i2c_set_clientdata(client, indio_dev);
  887. data->client = client;
  888. ret = bmg160_chip_init(data);
  889. if (ret < 0)
  890. return ret;
  891. mutex_init(&data->mutex);
  892. if (id)
  893. name = id->name;
  894. if (ACPI_HANDLE(&client->dev))
  895. name = bmg160_match_acpi_device(&client->dev);
  896. indio_dev->dev.parent = &client->dev;
  897. indio_dev->channels = bmg160_channels;
  898. indio_dev->num_channels = ARRAY_SIZE(bmg160_channels);
  899. indio_dev->name = name;
  900. indio_dev->modes = INDIO_DIRECT_MODE;
  901. indio_dev->info = &bmg160_info;
  902. if (client->irq <= 0)
  903. client->irq = bmg160_gpio_probe(client, data);
  904. if (client->irq > 0) {
  905. ret = devm_request_threaded_irq(&client->dev,
  906. client->irq,
  907. bmg160_data_rdy_trig_poll,
  908. bmg160_event_handler,
  909. IRQF_TRIGGER_RISING,
  910. BMG160_IRQ_NAME,
  911. indio_dev);
  912. if (ret)
  913. return ret;
  914. data->dready_trig = devm_iio_trigger_alloc(&client->dev,
  915. "%s-dev%d",
  916. indio_dev->name,
  917. indio_dev->id);
  918. if (!data->dready_trig)
  919. return -ENOMEM;
  920. data->motion_trig = devm_iio_trigger_alloc(&client->dev,
  921. "%s-any-motion-dev%d",
  922. indio_dev->name,
  923. indio_dev->id);
  924. if (!data->motion_trig)
  925. return -ENOMEM;
  926. data->dready_trig->dev.parent = &client->dev;
  927. data->dready_trig->ops = &bmg160_trigger_ops;
  928. iio_trigger_set_drvdata(data->dready_trig, indio_dev);
  929. ret = iio_trigger_register(data->dready_trig);
  930. if (ret)
  931. return ret;
  932. data->motion_trig->dev.parent = &client->dev;
  933. data->motion_trig->ops = &bmg160_trigger_ops;
  934. iio_trigger_set_drvdata(data->motion_trig, indio_dev);
  935. ret = iio_trigger_register(data->motion_trig);
  936. if (ret) {
  937. data->motion_trig = NULL;
  938. goto err_trigger_unregister;
  939. }
  940. }
  941. ret = iio_triggered_buffer_setup(indio_dev,
  942. iio_pollfunc_store_time,
  943. bmg160_trigger_handler,
  944. &bmg160_buffer_setup_ops);
  945. if (ret < 0) {
  946. dev_err(&client->dev,
  947. "iio triggered buffer setup failed\n");
  948. goto err_trigger_unregister;
  949. }
  950. ret = iio_device_register(indio_dev);
  951. if (ret < 0) {
  952. dev_err(&client->dev, "unable to register iio device\n");
  953. goto err_buffer_cleanup;
  954. }
  955. ret = pm_runtime_set_active(&client->dev);
  956. if (ret)
  957. goto err_iio_unregister;
  958. pm_runtime_enable(&client->dev);
  959. pm_runtime_set_autosuspend_delay(&client->dev,
  960. BMG160_AUTO_SUSPEND_DELAY_MS);
  961. pm_runtime_use_autosuspend(&client->dev);
  962. return 0;
  963. err_iio_unregister:
  964. iio_device_unregister(indio_dev);
  965. err_buffer_cleanup:
  966. iio_triggered_buffer_cleanup(indio_dev);
  967. err_trigger_unregister:
  968. if (data->dready_trig)
  969. iio_trigger_unregister(data->dready_trig);
  970. if (data->motion_trig)
  971. iio_trigger_unregister(data->motion_trig);
  972. return ret;
  973. }
  974. static int bmg160_remove(struct i2c_client *client)
  975. {
  976. struct iio_dev *indio_dev = i2c_get_clientdata(client);
  977. struct bmg160_data *data = iio_priv(indio_dev);
  978. pm_runtime_disable(&client->dev);
  979. pm_runtime_set_suspended(&client->dev);
  980. pm_runtime_put_noidle(&client->dev);
  981. iio_device_unregister(indio_dev);
  982. iio_triggered_buffer_cleanup(indio_dev);
  983. if (data->dready_trig) {
  984. iio_trigger_unregister(data->dready_trig);
  985. iio_trigger_unregister(data->motion_trig);
  986. }
  987. mutex_lock(&data->mutex);
  988. bmg160_set_mode(data, BMG160_MODE_DEEP_SUSPEND);
  989. mutex_unlock(&data->mutex);
  990. return 0;
  991. }
  992. #ifdef CONFIG_PM_SLEEP
  993. static int bmg160_suspend(struct device *dev)
  994. {
  995. struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
  996. struct bmg160_data *data = iio_priv(indio_dev);
  997. mutex_lock(&data->mutex);
  998. bmg160_set_mode(data, BMG160_MODE_SUSPEND);
  999. mutex_unlock(&data->mutex);
  1000. return 0;
  1001. }
  1002. static int bmg160_resume(struct device *dev)
  1003. {
  1004. struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
  1005. struct bmg160_data *data = iio_priv(indio_dev);
  1006. mutex_lock(&data->mutex);
  1007. if (data->dready_trigger_on || data->motion_trigger_on ||
  1008. data->ev_enable_state)
  1009. bmg160_set_mode(data, BMG160_MODE_NORMAL);
  1010. mutex_unlock(&data->mutex);
  1011. return 0;
  1012. }
  1013. #endif
  1014. #ifdef CONFIG_PM
  1015. static int bmg160_runtime_suspend(struct device *dev)
  1016. {
  1017. struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
  1018. struct bmg160_data *data = iio_priv(indio_dev);
  1019. int ret;
  1020. ret = bmg160_set_mode(data, BMG160_MODE_SUSPEND);
  1021. if (ret < 0) {
  1022. dev_err(&data->client->dev, "set mode failed\n");
  1023. return -EAGAIN;
  1024. }
  1025. return 0;
  1026. }
  1027. static int bmg160_runtime_resume(struct device *dev)
  1028. {
  1029. struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
  1030. struct bmg160_data *data = iio_priv(indio_dev);
  1031. int ret;
  1032. ret = bmg160_set_mode(data, BMG160_MODE_NORMAL);
  1033. if (ret < 0)
  1034. return ret;
  1035. msleep_interruptible(BMG160_MAX_STARTUP_TIME_MS);
  1036. return 0;
  1037. }
  1038. #endif
  1039. static const struct dev_pm_ops bmg160_pm_ops = {
  1040. SET_SYSTEM_SLEEP_PM_OPS(bmg160_suspend, bmg160_resume)
  1041. SET_RUNTIME_PM_OPS(bmg160_runtime_suspend,
  1042. bmg160_runtime_resume, NULL)
  1043. };
  1044. static const struct acpi_device_id bmg160_acpi_match[] = {
  1045. {"BMG0160", 0},
  1046. {"BMI055B", 0},
  1047. {},
  1048. };
  1049. MODULE_DEVICE_TABLE(acpi, bmg160_acpi_match);
  1050. static const struct i2c_device_id bmg160_id[] = {
  1051. {"bmg160", 0},
  1052. {"bmi055_gyro", 0},
  1053. {}
  1054. };
  1055. MODULE_DEVICE_TABLE(i2c, bmg160_id);
  1056. static struct i2c_driver bmg160_driver = {
  1057. .driver = {
  1058. .name = BMG160_DRV_NAME,
  1059. .acpi_match_table = ACPI_PTR(bmg160_acpi_match),
  1060. .pm = &bmg160_pm_ops,
  1061. },
  1062. .probe = bmg160_probe,
  1063. .remove = bmg160_remove,
  1064. .id_table = bmg160_id,
  1065. };
  1066. module_i2c_driver(bmg160_driver);
  1067. MODULE_AUTHOR("Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>");
  1068. MODULE_LICENSE("GPL v2");
  1069. MODULE_DESCRIPTION("BMG160 Gyro driver");