qplib_fp.c 77 KB

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  1. /*
  2. * Broadcom NetXtreme-E RoCE driver.
  3. *
  4. * Copyright (c) 2016 - 2017, Broadcom. All rights reserved. The term
  5. * Broadcom refers to Broadcom Limited and/or its subsidiaries.
  6. *
  7. * This software is available to you under a choice of one of two
  8. * licenses. You may choose to be licensed under the terms of the GNU
  9. * General Public License (GPL) Version 2, available from the file
  10. * COPYING in the main directory of this source tree, or the
  11. * BSD license below:
  12. *
  13. * Redistribution and use in source and binary forms, with or without
  14. * modification, are permitted provided that the following conditions
  15. * are met:
  16. *
  17. * 1. Redistributions of source code must retain the above copyright
  18. * notice, this list of conditions and the following disclaimer.
  19. * 2. Redistributions in binary form must reproduce the above copyright
  20. * notice, this list of conditions and the following disclaimer in
  21. * the documentation and/or other materials provided with the
  22. * distribution.
  23. *
  24. * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS''
  25. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
  26. * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  27. * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS
  28. * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  29. * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  30. * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
  31. * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
  32. * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
  33. * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
  34. * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  35. *
  36. * Description: Fast Path Operators
  37. */
  38. #include <linux/interrupt.h>
  39. #include <linux/spinlock.h>
  40. #include <linux/sched.h>
  41. #include <linux/slab.h>
  42. #include <linux/pci.h>
  43. #include <linux/prefetch.h>
  44. #include "roce_hsi.h"
  45. #include "qplib_res.h"
  46. #include "qplib_rcfw.h"
  47. #include "qplib_sp.h"
  48. #include "qplib_fp.h"
  49. static void bnxt_qplib_arm_cq_enable(struct bnxt_qplib_cq *cq);
  50. static void __clean_cq(struct bnxt_qplib_cq *cq, u64 qp);
  51. static void bnxt_qplib_arm_srq(struct bnxt_qplib_srq *srq, u32 arm_type);
  52. static void bnxt_qplib_cancel_phantom_processing(struct bnxt_qplib_qp *qp)
  53. {
  54. qp->sq.condition = false;
  55. qp->sq.send_phantom = false;
  56. qp->sq.single = false;
  57. }
  58. /* Flush list */
  59. static void __bnxt_qplib_add_flush_qp(struct bnxt_qplib_qp *qp)
  60. {
  61. struct bnxt_qplib_cq *scq, *rcq;
  62. scq = qp->scq;
  63. rcq = qp->rcq;
  64. if (!qp->sq.flushed) {
  65. dev_dbg(&scq->hwq.pdev->dev,
  66. "QPLIB: FP: Adding to SQ Flush list = %p",
  67. qp);
  68. bnxt_qplib_cancel_phantom_processing(qp);
  69. list_add_tail(&qp->sq_flush, &scq->sqf_head);
  70. qp->sq.flushed = true;
  71. }
  72. if (!qp->srq) {
  73. if (!qp->rq.flushed) {
  74. dev_dbg(&rcq->hwq.pdev->dev,
  75. "QPLIB: FP: Adding to RQ Flush list = %p",
  76. qp);
  77. list_add_tail(&qp->rq_flush, &rcq->rqf_head);
  78. qp->rq.flushed = true;
  79. }
  80. }
  81. }
  82. static void bnxt_qplib_acquire_cq_flush_locks(struct bnxt_qplib_qp *qp,
  83. unsigned long *flags)
  84. __acquires(&qp->scq->flush_lock) __acquires(&qp->rcq->flush_lock)
  85. {
  86. spin_lock_irqsave(&qp->scq->flush_lock, *flags);
  87. if (qp->scq == qp->rcq)
  88. __acquire(&qp->rcq->flush_lock);
  89. else
  90. spin_lock(&qp->rcq->flush_lock);
  91. }
  92. static void bnxt_qplib_release_cq_flush_locks(struct bnxt_qplib_qp *qp,
  93. unsigned long *flags)
  94. __releases(&qp->scq->flush_lock) __releases(&qp->rcq->flush_lock)
  95. {
  96. if (qp->scq == qp->rcq)
  97. __release(&qp->rcq->flush_lock);
  98. else
  99. spin_unlock(&qp->rcq->flush_lock);
  100. spin_unlock_irqrestore(&qp->scq->flush_lock, *flags);
  101. }
  102. void bnxt_qplib_add_flush_qp(struct bnxt_qplib_qp *qp)
  103. {
  104. unsigned long flags;
  105. bnxt_qplib_acquire_cq_flush_locks(qp, &flags);
  106. __bnxt_qplib_add_flush_qp(qp);
  107. bnxt_qplib_release_cq_flush_locks(qp, &flags);
  108. }
  109. static void __bnxt_qplib_del_flush_qp(struct bnxt_qplib_qp *qp)
  110. {
  111. if (qp->sq.flushed) {
  112. qp->sq.flushed = false;
  113. list_del(&qp->sq_flush);
  114. }
  115. if (!qp->srq) {
  116. if (qp->rq.flushed) {
  117. qp->rq.flushed = false;
  118. list_del(&qp->rq_flush);
  119. }
  120. }
  121. }
  122. void bnxt_qplib_clean_qp(struct bnxt_qplib_qp *qp)
  123. {
  124. unsigned long flags;
  125. bnxt_qplib_acquire_cq_flush_locks(qp, &flags);
  126. __clean_cq(qp->scq, (u64)(unsigned long)qp);
  127. qp->sq.hwq.prod = 0;
  128. qp->sq.hwq.cons = 0;
  129. __clean_cq(qp->rcq, (u64)(unsigned long)qp);
  130. qp->rq.hwq.prod = 0;
  131. qp->rq.hwq.cons = 0;
  132. __bnxt_qplib_del_flush_qp(qp);
  133. bnxt_qplib_release_cq_flush_locks(qp, &flags);
  134. }
  135. static void bnxt_qpn_cqn_sched_task(struct work_struct *work)
  136. {
  137. struct bnxt_qplib_nq_work *nq_work =
  138. container_of(work, struct bnxt_qplib_nq_work, work);
  139. struct bnxt_qplib_cq *cq = nq_work->cq;
  140. struct bnxt_qplib_nq *nq = nq_work->nq;
  141. if (cq && nq) {
  142. spin_lock_bh(&cq->compl_lock);
  143. if (atomic_read(&cq->arm_state) && nq->cqn_handler) {
  144. dev_dbg(&nq->pdev->dev,
  145. "%s:Trigger cq = %p event nq = %p\n",
  146. __func__, cq, nq);
  147. nq->cqn_handler(nq, cq);
  148. }
  149. spin_unlock_bh(&cq->compl_lock);
  150. }
  151. kfree(nq_work);
  152. }
  153. static void bnxt_qplib_free_qp_hdr_buf(struct bnxt_qplib_res *res,
  154. struct bnxt_qplib_qp *qp)
  155. {
  156. struct bnxt_qplib_q *rq = &qp->rq;
  157. struct bnxt_qplib_q *sq = &qp->sq;
  158. if (qp->rq_hdr_buf)
  159. dma_free_coherent(&res->pdev->dev,
  160. rq->hwq.max_elements * qp->rq_hdr_buf_size,
  161. qp->rq_hdr_buf, qp->rq_hdr_buf_map);
  162. if (qp->sq_hdr_buf)
  163. dma_free_coherent(&res->pdev->dev,
  164. sq->hwq.max_elements * qp->sq_hdr_buf_size,
  165. qp->sq_hdr_buf, qp->sq_hdr_buf_map);
  166. qp->rq_hdr_buf = NULL;
  167. qp->sq_hdr_buf = NULL;
  168. qp->rq_hdr_buf_map = 0;
  169. qp->sq_hdr_buf_map = 0;
  170. qp->sq_hdr_buf_size = 0;
  171. qp->rq_hdr_buf_size = 0;
  172. }
  173. static int bnxt_qplib_alloc_qp_hdr_buf(struct bnxt_qplib_res *res,
  174. struct bnxt_qplib_qp *qp)
  175. {
  176. struct bnxt_qplib_q *rq = &qp->rq;
  177. struct bnxt_qplib_q *sq = &qp->rq;
  178. int rc = 0;
  179. if (qp->sq_hdr_buf_size && sq->hwq.max_elements) {
  180. qp->sq_hdr_buf = dma_alloc_coherent(&res->pdev->dev,
  181. sq->hwq.max_elements *
  182. qp->sq_hdr_buf_size,
  183. &qp->sq_hdr_buf_map, GFP_KERNEL);
  184. if (!qp->sq_hdr_buf) {
  185. rc = -ENOMEM;
  186. dev_err(&res->pdev->dev,
  187. "QPLIB: Failed to create sq_hdr_buf");
  188. goto fail;
  189. }
  190. }
  191. if (qp->rq_hdr_buf_size && rq->hwq.max_elements) {
  192. qp->rq_hdr_buf = dma_alloc_coherent(&res->pdev->dev,
  193. rq->hwq.max_elements *
  194. qp->rq_hdr_buf_size,
  195. &qp->rq_hdr_buf_map,
  196. GFP_KERNEL);
  197. if (!qp->rq_hdr_buf) {
  198. rc = -ENOMEM;
  199. dev_err(&res->pdev->dev,
  200. "QPLIB: Failed to create rq_hdr_buf");
  201. goto fail;
  202. }
  203. }
  204. return 0;
  205. fail:
  206. bnxt_qplib_free_qp_hdr_buf(res, qp);
  207. return rc;
  208. }
  209. static void bnxt_qplib_service_nq(unsigned long data)
  210. {
  211. struct bnxt_qplib_nq *nq = (struct bnxt_qplib_nq *)data;
  212. struct bnxt_qplib_hwq *hwq = &nq->hwq;
  213. struct nq_base *nqe, **nq_ptr;
  214. struct bnxt_qplib_cq *cq;
  215. int num_cqne_processed = 0;
  216. int num_srqne_processed = 0;
  217. u32 sw_cons, raw_cons;
  218. u16 type;
  219. int budget = nq->budget;
  220. uintptr_t q_handle;
  221. /* Service the NQ until empty */
  222. raw_cons = hwq->cons;
  223. while (budget--) {
  224. sw_cons = HWQ_CMP(raw_cons, hwq);
  225. nq_ptr = (struct nq_base **)hwq->pbl_ptr;
  226. nqe = &nq_ptr[NQE_PG(sw_cons)][NQE_IDX(sw_cons)];
  227. if (!NQE_CMP_VALID(nqe, raw_cons, hwq->max_elements))
  228. break;
  229. /*
  230. * The valid test of the entry must be done first before
  231. * reading any further.
  232. */
  233. dma_rmb();
  234. type = le16_to_cpu(nqe->info10_type) & NQ_BASE_TYPE_MASK;
  235. switch (type) {
  236. case NQ_BASE_TYPE_CQ_NOTIFICATION:
  237. {
  238. struct nq_cn *nqcne = (struct nq_cn *)nqe;
  239. q_handle = le32_to_cpu(nqcne->cq_handle_low);
  240. q_handle |= (u64)le32_to_cpu(nqcne->cq_handle_high)
  241. << 32;
  242. cq = (struct bnxt_qplib_cq *)(unsigned long)q_handle;
  243. bnxt_qplib_arm_cq_enable(cq);
  244. spin_lock_bh(&cq->compl_lock);
  245. atomic_set(&cq->arm_state, 0);
  246. if (!nq->cqn_handler(nq, (cq)))
  247. num_cqne_processed++;
  248. else
  249. dev_warn(&nq->pdev->dev,
  250. "QPLIB: cqn - type 0x%x not handled",
  251. type);
  252. spin_unlock_bh(&cq->compl_lock);
  253. break;
  254. }
  255. case NQ_BASE_TYPE_SRQ_EVENT:
  256. {
  257. struct nq_srq_event *nqsrqe =
  258. (struct nq_srq_event *)nqe;
  259. q_handle = le32_to_cpu(nqsrqe->srq_handle_low);
  260. q_handle |= (u64)le32_to_cpu(nqsrqe->srq_handle_high)
  261. << 32;
  262. bnxt_qplib_arm_srq((struct bnxt_qplib_srq *)q_handle,
  263. DBR_DBR_TYPE_SRQ_ARMENA);
  264. if (!nq->srqn_handler(nq,
  265. (struct bnxt_qplib_srq *)q_handle,
  266. nqsrqe->event))
  267. num_srqne_processed++;
  268. else
  269. dev_warn(&nq->pdev->dev,
  270. "QPLIB: SRQ event 0x%x not handled",
  271. nqsrqe->event);
  272. break;
  273. }
  274. case NQ_BASE_TYPE_DBQ_EVENT:
  275. break;
  276. default:
  277. dev_warn(&nq->pdev->dev,
  278. "QPLIB: nqe with type = 0x%x not handled",
  279. type);
  280. break;
  281. }
  282. raw_cons++;
  283. }
  284. if (hwq->cons != raw_cons) {
  285. hwq->cons = raw_cons;
  286. NQ_DB_REARM(nq->bar_reg_iomem, hwq->cons, hwq->max_elements);
  287. }
  288. }
  289. static irqreturn_t bnxt_qplib_nq_irq(int irq, void *dev_instance)
  290. {
  291. struct bnxt_qplib_nq *nq = dev_instance;
  292. struct bnxt_qplib_hwq *hwq = &nq->hwq;
  293. struct nq_base **nq_ptr;
  294. u32 sw_cons;
  295. /* Prefetch the NQ element */
  296. sw_cons = HWQ_CMP(hwq->cons, hwq);
  297. nq_ptr = (struct nq_base **)nq->hwq.pbl_ptr;
  298. prefetch(&nq_ptr[NQE_PG(sw_cons)][NQE_IDX(sw_cons)]);
  299. /* Fan out to CPU affinitized kthreads? */
  300. tasklet_schedule(&nq->worker);
  301. return IRQ_HANDLED;
  302. }
  303. void bnxt_qplib_nq_stop_irq(struct bnxt_qplib_nq *nq, bool kill)
  304. {
  305. tasklet_disable(&nq->worker);
  306. /* Mask h/w interrupt */
  307. NQ_DB(nq->bar_reg_iomem, nq->hwq.cons, nq->hwq.max_elements);
  308. /* Sync with last running IRQ handler */
  309. synchronize_irq(nq->vector);
  310. if (kill)
  311. tasklet_kill(&nq->worker);
  312. if (nq->requested) {
  313. irq_set_affinity_hint(nq->vector, NULL);
  314. free_irq(nq->vector, nq);
  315. nq->requested = false;
  316. }
  317. }
  318. void bnxt_qplib_disable_nq(struct bnxt_qplib_nq *nq)
  319. {
  320. if (nq->cqn_wq) {
  321. destroy_workqueue(nq->cqn_wq);
  322. nq->cqn_wq = NULL;
  323. }
  324. /* Make sure the HW is stopped! */
  325. bnxt_qplib_nq_stop_irq(nq, true);
  326. if (nq->bar_reg_iomem)
  327. iounmap(nq->bar_reg_iomem);
  328. nq->bar_reg_iomem = NULL;
  329. nq->cqn_handler = NULL;
  330. nq->srqn_handler = NULL;
  331. nq->vector = 0;
  332. }
  333. int bnxt_qplib_nq_start_irq(struct bnxt_qplib_nq *nq, int nq_indx,
  334. int msix_vector, bool need_init)
  335. {
  336. int rc;
  337. if (nq->requested)
  338. return -EFAULT;
  339. nq->vector = msix_vector;
  340. if (need_init)
  341. tasklet_init(&nq->worker, bnxt_qplib_service_nq,
  342. (unsigned long)nq);
  343. else
  344. tasklet_enable(&nq->worker);
  345. snprintf(nq->name, sizeof(nq->name), "bnxt_qplib_nq-%d", nq_indx);
  346. rc = request_irq(nq->vector, bnxt_qplib_nq_irq, 0, nq->name, nq);
  347. if (rc)
  348. return rc;
  349. cpumask_clear(&nq->mask);
  350. cpumask_set_cpu(nq_indx, &nq->mask);
  351. rc = irq_set_affinity_hint(nq->vector, &nq->mask);
  352. if (rc) {
  353. dev_warn(&nq->pdev->dev,
  354. "QPLIB: set affinity failed; vector: %d nq_idx: %d\n",
  355. nq->vector, nq_indx);
  356. }
  357. nq->requested = true;
  358. NQ_DB_REARM(nq->bar_reg_iomem, nq->hwq.cons, nq->hwq.max_elements);
  359. return rc;
  360. }
  361. int bnxt_qplib_enable_nq(struct pci_dev *pdev, struct bnxt_qplib_nq *nq,
  362. int nq_idx, int msix_vector, int bar_reg_offset,
  363. int (*cqn_handler)(struct bnxt_qplib_nq *nq,
  364. struct bnxt_qplib_cq *),
  365. int (*srqn_handler)(struct bnxt_qplib_nq *nq,
  366. struct bnxt_qplib_srq *,
  367. u8 event))
  368. {
  369. resource_size_t nq_base;
  370. int rc = -1;
  371. if (cqn_handler)
  372. nq->cqn_handler = cqn_handler;
  373. if (srqn_handler)
  374. nq->srqn_handler = srqn_handler;
  375. /* Have a task to schedule CQ notifiers in post send case */
  376. nq->cqn_wq = create_singlethread_workqueue("bnxt_qplib_nq");
  377. if (!nq->cqn_wq)
  378. return -ENOMEM;
  379. nq->bar_reg = NQ_CONS_PCI_BAR_REGION;
  380. nq->bar_reg_off = bar_reg_offset;
  381. nq_base = pci_resource_start(pdev, nq->bar_reg);
  382. if (!nq_base) {
  383. rc = -ENOMEM;
  384. goto fail;
  385. }
  386. nq->bar_reg_iomem = ioremap_nocache(nq_base + nq->bar_reg_off, 4);
  387. if (!nq->bar_reg_iomem) {
  388. rc = -ENOMEM;
  389. goto fail;
  390. }
  391. rc = bnxt_qplib_nq_start_irq(nq, nq_idx, msix_vector, true);
  392. if (rc) {
  393. dev_err(&nq->pdev->dev,
  394. "QPLIB: Failed to request irq for nq-idx %d", nq_idx);
  395. goto fail;
  396. }
  397. return 0;
  398. fail:
  399. bnxt_qplib_disable_nq(nq);
  400. return rc;
  401. }
  402. void bnxt_qplib_free_nq(struct bnxt_qplib_nq *nq)
  403. {
  404. if (nq->hwq.max_elements) {
  405. bnxt_qplib_free_hwq(nq->pdev, &nq->hwq);
  406. nq->hwq.max_elements = 0;
  407. }
  408. }
  409. int bnxt_qplib_alloc_nq(struct pci_dev *pdev, struct bnxt_qplib_nq *nq)
  410. {
  411. nq->pdev = pdev;
  412. if (!nq->hwq.max_elements ||
  413. nq->hwq.max_elements > BNXT_QPLIB_NQE_MAX_CNT)
  414. nq->hwq.max_elements = BNXT_QPLIB_NQE_MAX_CNT;
  415. if (bnxt_qplib_alloc_init_hwq(nq->pdev, &nq->hwq, NULL, 0,
  416. &nq->hwq.max_elements,
  417. BNXT_QPLIB_MAX_NQE_ENTRY_SIZE, 0,
  418. PAGE_SIZE, HWQ_TYPE_L2_CMPL))
  419. return -ENOMEM;
  420. nq->budget = 8;
  421. return 0;
  422. }
  423. /* SRQ */
  424. static void bnxt_qplib_arm_srq(struct bnxt_qplib_srq *srq, u32 arm_type)
  425. {
  426. struct bnxt_qplib_hwq *srq_hwq = &srq->hwq;
  427. struct dbr_dbr db_msg = { 0 };
  428. void __iomem *db;
  429. u32 sw_prod = 0;
  430. /* Ring DB */
  431. sw_prod = (arm_type == DBR_DBR_TYPE_SRQ_ARM) ? srq->threshold :
  432. HWQ_CMP(srq_hwq->prod, srq_hwq);
  433. db_msg.index = cpu_to_le32((sw_prod << DBR_DBR_INDEX_SFT) &
  434. DBR_DBR_INDEX_MASK);
  435. db_msg.type_xid = cpu_to_le32(((srq->id << DBR_DBR_XID_SFT) &
  436. DBR_DBR_XID_MASK) | arm_type);
  437. db = (arm_type == DBR_DBR_TYPE_SRQ_ARMENA) ?
  438. srq->dbr_base : srq->dpi->dbr;
  439. wmb(); /* barrier before db ring */
  440. __iowrite64_copy(db, &db_msg, sizeof(db_msg) / sizeof(u64));
  441. }
  442. int bnxt_qplib_destroy_srq(struct bnxt_qplib_res *res,
  443. struct bnxt_qplib_srq *srq)
  444. {
  445. struct bnxt_qplib_rcfw *rcfw = res->rcfw;
  446. struct cmdq_destroy_srq req;
  447. struct creq_destroy_srq_resp resp;
  448. u16 cmd_flags = 0;
  449. int rc;
  450. RCFW_CMD_PREP(req, DESTROY_SRQ, cmd_flags);
  451. /* Configure the request */
  452. req.srq_cid = cpu_to_le32(srq->id);
  453. rc = bnxt_qplib_rcfw_send_message(rcfw, (void *)&req,
  454. (void *)&resp, NULL, 0);
  455. if (rc)
  456. return rc;
  457. bnxt_qplib_free_hwq(res->pdev, &srq->hwq);
  458. kfree(srq->swq);
  459. return 0;
  460. }
  461. int bnxt_qplib_create_srq(struct bnxt_qplib_res *res,
  462. struct bnxt_qplib_srq *srq)
  463. {
  464. struct bnxt_qplib_rcfw *rcfw = res->rcfw;
  465. struct cmdq_create_srq req;
  466. struct creq_create_srq_resp resp;
  467. struct bnxt_qplib_pbl *pbl;
  468. u16 cmd_flags = 0;
  469. int rc, idx;
  470. srq->hwq.max_elements = srq->max_wqe;
  471. rc = bnxt_qplib_alloc_init_hwq(res->pdev, &srq->hwq, srq->sglist,
  472. srq->nmap, &srq->hwq.max_elements,
  473. BNXT_QPLIB_MAX_RQE_ENTRY_SIZE, 0,
  474. PAGE_SIZE, HWQ_TYPE_QUEUE);
  475. if (rc)
  476. goto exit;
  477. srq->swq = kcalloc(srq->hwq.max_elements, sizeof(*srq->swq),
  478. GFP_KERNEL);
  479. if (!srq->swq) {
  480. rc = -ENOMEM;
  481. goto fail;
  482. }
  483. RCFW_CMD_PREP(req, CREATE_SRQ, cmd_flags);
  484. /* Configure the request */
  485. req.dpi = cpu_to_le32(srq->dpi->dpi);
  486. req.srq_handle = cpu_to_le64((uintptr_t)srq);
  487. req.srq_size = cpu_to_le16((u16)srq->hwq.max_elements);
  488. pbl = &srq->hwq.pbl[PBL_LVL_0];
  489. req.pg_size_lvl = cpu_to_le16((((u16)srq->hwq.level &
  490. CMDQ_CREATE_SRQ_LVL_MASK) <<
  491. CMDQ_CREATE_SRQ_LVL_SFT) |
  492. (pbl->pg_size == ROCE_PG_SIZE_4K ?
  493. CMDQ_CREATE_SRQ_PG_SIZE_PG_4K :
  494. pbl->pg_size == ROCE_PG_SIZE_8K ?
  495. CMDQ_CREATE_SRQ_PG_SIZE_PG_8K :
  496. pbl->pg_size == ROCE_PG_SIZE_64K ?
  497. CMDQ_CREATE_SRQ_PG_SIZE_PG_64K :
  498. pbl->pg_size == ROCE_PG_SIZE_2M ?
  499. CMDQ_CREATE_SRQ_PG_SIZE_PG_2M :
  500. pbl->pg_size == ROCE_PG_SIZE_8M ?
  501. CMDQ_CREATE_SRQ_PG_SIZE_PG_8M :
  502. pbl->pg_size == ROCE_PG_SIZE_1G ?
  503. CMDQ_CREATE_SRQ_PG_SIZE_PG_1G :
  504. CMDQ_CREATE_SRQ_PG_SIZE_PG_4K));
  505. req.pbl = cpu_to_le64(pbl->pg_map_arr[0]);
  506. req.pd_id = cpu_to_le32(srq->pd->id);
  507. req.eventq_id = cpu_to_le16(srq->eventq_hw_ring_id);
  508. rc = bnxt_qplib_rcfw_send_message(rcfw, (void *)&req,
  509. (void *)&resp, NULL, 0);
  510. if (rc)
  511. goto fail;
  512. spin_lock_init(&srq->lock);
  513. srq->start_idx = 0;
  514. srq->last_idx = srq->hwq.max_elements - 1;
  515. for (idx = 0; idx < srq->hwq.max_elements; idx++)
  516. srq->swq[idx].next_idx = idx + 1;
  517. srq->swq[srq->last_idx].next_idx = -1;
  518. srq->id = le32_to_cpu(resp.xid);
  519. srq->dbr_base = res->dpi_tbl.dbr_bar_reg_iomem;
  520. if (srq->threshold)
  521. bnxt_qplib_arm_srq(srq, DBR_DBR_TYPE_SRQ_ARMENA);
  522. srq->arm_req = false;
  523. return 0;
  524. fail:
  525. bnxt_qplib_free_hwq(res->pdev, &srq->hwq);
  526. kfree(srq->swq);
  527. exit:
  528. return rc;
  529. }
  530. int bnxt_qplib_modify_srq(struct bnxt_qplib_res *res,
  531. struct bnxt_qplib_srq *srq)
  532. {
  533. struct bnxt_qplib_hwq *srq_hwq = &srq->hwq;
  534. u32 sw_prod, sw_cons, count = 0;
  535. sw_prod = HWQ_CMP(srq_hwq->prod, srq_hwq);
  536. sw_cons = HWQ_CMP(srq_hwq->cons, srq_hwq);
  537. count = sw_prod > sw_cons ? sw_prod - sw_cons :
  538. srq_hwq->max_elements - sw_cons + sw_prod;
  539. if (count > srq->threshold) {
  540. srq->arm_req = false;
  541. bnxt_qplib_arm_srq(srq, DBR_DBR_TYPE_SRQ_ARM);
  542. } else {
  543. /* Deferred arming */
  544. srq->arm_req = true;
  545. }
  546. return 0;
  547. }
  548. int bnxt_qplib_query_srq(struct bnxt_qplib_res *res,
  549. struct bnxt_qplib_srq *srq)
  550. {
  551. struct bnxt_qplib_rcfw *rcfw = res->rcfw;
  552. struct cmdq_query_srq req;
  553. struct creq_query_srq_resp resp;
  554. struct bnxt_qplib_rcfw_sbuf *sbuf;
  555. struct creq_query_srq_resp_sb *sb;
  556. u16 cmd_flags = 0;
  557. int rc = 0;
  558. RCFW_CMD_PREP(req, QUERY_SRQ, cmd_flags);
  559. req.srq_cid = cpu_to_le32(srq->id);
  560. /* Configure the request */
  561. sbuf = bnxt_qplib_rcfw_alloc_sbuf(rcfw, sizeof(*sb));
  562. if (!sbuf)
  563. return -ENOMEM;
  564. sb = sbuf->sb;
  565. rc = bnxt_qplib_rcfw_send_message(rcfw, (void *)&req, (void *)&resp,
  566. (void *)sbuf, 0);
  567. srq->threshold = le16_to_cpu(sb->srq_limit);
  568. bnxt_qplib_rcfw_free_sbuf(rcfw, sbuf);
  569. return rc;
  570. }
  571. int bnxt_qplib_post_srq_recv(struct bnxt_qplib_srq *srq,
  572. struct bnxt_qplib_swqe *wqe)
  573. {
  574. struct bnxt_qplib_hwq *srq_hwq = &srq->hwq;
  575. struct rq_wqe *srqe, **srqe_ptr;
  576. struct sq_sge *hw_sge;
  577. u32 sw_prod, sw_cons, count = 0;
  578. int i, rc = 0, next;
  579. spin_lock(&srq_hwq->lock);
  580. if (srq->start_idx == srq->last_idx) {
  581. dev_err(&srq_hwq->pdev->dev, "QPLIB: FP: SRQ (0x%x) is full!",
  582. srq->id);
  583. rc = -EINVAL;
  584. spin_unlock(&srq_hwq->lock);
  585. goto done;
  586. }
  587. next = srq->start_idx;
  588. srq->start_idx = srq->swq[next].next_idx;
  589. spin_unlock(&srq_hwq->lock);
  590. sw_prod = HWQ_CMP(srq_hwq->prod, srq_hwq);
  591. srqe_ptr = (struct rq_wqe **)srq_hwq->pbl_ptr;
  592. srqe = &srqe_ptr[RQE_PG(sw_prod)][RQE_IDX(sw_prod)];
  593. memset(srqe, 0, BNXT_QPLIB_MAX_RQE_ENTRY_SIZE);
  594. /* Calculate wqe_size16 and data_len */
  595. for (i = 0, hw_sge = (struct sq_sge *)srqe->data;
  596. i < wqe->num_sge; i++, hw_sge++) {
  597. hw_sge->va_or_pa = cpu_to_le64(wqe->sg_list[i].addr);
  598. hw_sge->l_key = cpu_to_le32(wqe->sg_list[i].lkey);
  599. hw_sge->size = cpu_to_le32(wqe->sg_list[i].size);
  600. }
  601. srqe->wqe_type = wqe->type;
  602. srqe->flags = wqe->flags;
  603. srqe->wqe_size = wqe->num_sge +
  604. ((offsetof(typeof(*srqe), data) + 15) >> 4);
  605. srqe->wr_id[0] = cpu_to_le32((u32)next);
  606. srq->swq[next].wr_id = wqe->wr_id;
  607. srq_hwq->prod++;
  608. spin_lock(&srq_hwq->lock);
  609. sw_prod = HWQ_CMP(srq_hwq->prod, srq_hwq);
  610. /* retaining srq_hwq->cons for this logic
  611. * actually the lock is only required to
  612. * read srq_hwq->cons.
  613. */
  614. sw_cons = HWQ_CMP(srq_hwq->cons, srq_hwq);
  615. count = sw_prod > sw_cons ? sw_prod - sw_cons :
  616. srq_hwq->max_elements - sw_cons + sw_prod;
  617. spin_unlock(&srq_hwq->lock);
  618. /* Ring DB */
  619. bnxt_qplib_arm_srq(srq, DBR_DBR_TYPE_SRQ);
  620. if (srq->arm_req == true && count > srq->threshold) {
  621. srq->arm_req = false;
  622. bnxt_qplib_arm_srq(srq, DBR_DBR_TYPE_SRQ_ARM);
  623. }
  624. done:
  625. return rc;
  626. }
  627. /* QP */
  628. int bnxt_qplib_create_qp1(struct bnxt_qplib_res *res, struct bnxt_qplib_qp *qp)
  629. {
  630. struct bnxt_qplib_rcfw *rcfw = res->rcfw;
  631. struct cmdq_create_qp1 req;
  632. struct creq_create_qp1_resp resp;
  633. struct bnxt_qplib_pbl *pbl;
  634. struct bnxt_qplib_q *sq = &qp->sq;
  635. struct bnxt_qplib_q *rq = &qp->rq;
  636. int rc;
  637. u16 cmd_flags = 0;
  638. u32 qp_flags = 0;
  639. RCFW_CMD_PREP(req, CREATE_QP1, cmd_flags);
  640. /* General */
  641. req.type = qp->type;
  642. req.dpi = cpu_to_le32(qp->dpi->dpi);
  643. req.qp_handle = cpu_to_le64(qp->qp_handle);
  644. /* SQ */
  645. sq->hwq.max_elements = sq->max_wqe;
  646. rc = bnxt_qplib_alloc_init_hwq(res->pdev, &sq->hwq, NULL, 0,
  647. &sq->hwq.max_elements,
  648. BNXT_QPLIB_MAX_SQE_ENTRY_SIZE, 0,
  649. PAGE_SIZE, HWQ_TYPE_QUEUE);
  650. if (rc)
  651. goto exit;
  652. sq->swq = kcalloc(sq->hwq.max_elements, sizeof(*sq->swq), GFP_KERNEL);
  653. if (!sq->swq) {
  654. rc = -ENOMEM;
  655. goto fail_sq;
  656. }
  657. pbl = &sq->hwq.pbl[PBL_LVL_0];
  658. req.sq_pbl = cpu_to_le64(pbl->pg_map_arr[0]);
  659. req.sq_pg_size_sq_lvl =
  660. ((sq->hwq.level & CMDQ_CREATE_QP1_SQ_LVL_MASK)
  661. << CMDQ_CREATE_QP1_SQ_LVL_SFT) |
  662. (pbl->pg_size == ROCE_PG_SIZE_4K ?
  663. CMDQ_CREATE_QP1_SQ_PG_SIZE_PG_4K :
  664. pbl->pg_size == ROCE_PG_SIZE_8K ?
  665. CMDQ_CREATE_QP1_SQ_PG_SIZE_PG_8K :
  666. pbl->pg_size == ROCE_PG_SIZE_64K ?
  667. CMDQ_CREATE_QP1_SQ_PG_SIZE_PG_64K :
  668. pbl->pg_size == ROCE_PG_SIZE_2M ?
  669. CMDQ_CREATE_QP1_SQ_PG_SIZE_PG_2M :
  670. pbl->pg_size == ROCE_PG_SIZE_8M ?
  671. CMDQ_CREATE_QP1_SQ_PG_SIZE_PG_8M :
  672. pbl->pg_size == ROCE_PG_SIZE_1G ?
  673. CMDQ_CREATE_QP1_SQ_PG_SIZE_PG_1G :
  674. CMDQ_CREATE_QP1_SQ_PG_SIZE_PG_4K);
  675. if (qp->scq)
  676. req.scq_cid = cpu_to_le32(qp->scq->id);
  677. qp_flags |= CMDQ_CREATE_QP1_QP_FLAGS_RESERVED_LKEY_ENABLE;
  678. /* RQ */
  679. if (rq->max_wqe) {
  680. rq->hwq.max_elements = qp->rq.max_wqe;
  681. rc = bnxt_qplib_alloc_init_hwq(res->pdev, &rq->hwq, NULL, 0,
  682. &rq->hwq.max_elements,
  683. BNXT_QPLIB_MAX_RQE_ENTRY_SIZE, 0,
  684. PAGE_SIZE, HWQ_TYPE_QUEUE);
  685. if (rc)
  686. goto fail_sq;
  687. rq->swq = kcalloc(rq->hwq.max_elements, sizeof(*rq->swq),
  688. GFP_KERNEL);
  689. if (!rq->swq) {
  690. rc = -ENOMEM;
  691. goto fail_rq;
  692. }
  693. pbl = &rq->hwq.pbl[PBL_LVL_0];
  694. req.rq_pbl = cpu_to_le64(pbl->pg_map_arr[0]);
  695. req.rq_pg_size_rq_lvl =
  696. ((rq->hwq.level & CMDQ_CREATE_QP1_RQ_LVL_MASK) <<
  697. CMDQ_CREATE_QP1_RQ_LVL_SFT) |
  698. (pbl->pg_size == ROCE_PG_SIZE_4K ?
  699. CMDQ_CREATE_QP1_RQ_PG_SIZE_PG_4K :
  700. pbl->pg_size == ROCE_PG_SIZE_8K ?
  701. CMDQ_CREATE_QP1_RQ_PG_SIZE_PG_8K :
  702. pbl->pg_size == ROCE_PG_SIZE_64K ?
  703. CMDQ_CREATE_QP1_RQ_PG_SIZE_PG_64K :
  704. pbl->pg_size == ROCE_PG_SIZE_2M ?
  705. CMDQ_CREATE_QP1_RQ_PG_SIZE_PG_2M :
  706. pbl->pg_size == ROCE_PG_SIZE_8M ?
  707. CMDQ_CREATE_QP1_RQ_PG_SIZE_PG_8M :
  708. pbl->pg_size == ROCE_PG_SIZE_1G ?
  709. CMDQ_CREATE_QP1_RQ_PG_SIZE_PG_1G :
  710. CMDQ_CREATE_QP1_RQ_PG_SIZE_PG_4K);
  711. if (qp->rcq)
  712. req.rcq_cid = cpu_to_le32(qp->rcq->id);
  713. }
  714. /* Header buffer - allow hdr_buf pass in */
  715. rc = bnxt_qplib_alloc_qp_hdr_buf(res, qp);
  716. if (rc) {
  717. rc = -ENOMEM;
  718. goto fail;
  719. }
  720. req.qp_flags = cpu_to_le32(qp_flags);
  721. req.sq_size = cpu_to_le32(sq->hwq.max_elements);
  722. req.rq_size = cpu_to_le32(rq->hwq.max_elements);
  723. req.sq_fwo_sq_sge =
  724. cpu_to_le16((sq->max_sge & CMDQ_CREATE_QP1_SQ_SGE_MASK) <<
  725. CMDQ_CREATE_QP1_SQ_SGE_SFT);
  726. req.rq_fwo_rq_sge =
  727. cpu_to_le16((rq->max_sge & CMDQ_CREATE_QP1_RQ_SGE_MASK) <<
  728. CMDQ_CREATE_QP1_RQ_SGE_SFT);
  729. req.pd_id = cpu_to_le32(qp->pd->id);
  730. rc = bnxt_qplib_rcfw_send_message(rcfw, (void *)&req,
  731. (void *)&resp, NULL, 0);
  732. if (rc)
  733. goto fail;
  734. qp->id = le32_to_cpu(resp.xid);
  735. qp->cur_qp_state = CMDQ_MODIFY_QP_NEW_STATE_RESET;
  736. rcfw->qp_tbl[qp->id].qp_id = qp->id;
  737. rcfw->qp_tbl[qp->id].qp_handle = (void *)qp;
  738. return 0;
  739. fail:
  740. bnxt_qplib_free_qp_hdr_buf(res, qp);
  741. fail_rq:
  742. bnxt_qplib_free_hwq(res->pdev, &rq->hwq);
  743. kfree(rq->swq);
  744. fail_sq:
  745. bnxt_qplib_free_hwq(res->pdev, &sq->hwq);
  746. kfree(sq->swq);
  747. exit:
  748. return rc;
  749. }
  750. int bnxt_qplib_create_qp(struct bnxt_qplib_res *res, struct bnxt_qplib_qp *qp)
  751. {
  752. struct bnxt_qplib_rcfw *rcfw = res->rcfw;
  753. struct sq_send *hw_sq_send_hdr, **hw_sq_send_ptr;
  754. struct cmdq_create_qp req;
  755. struct creq_create_qp_resp resp;
  756. struct bnxt_qplib_pbl *pbl;
  757. struct sq_psn_search **psn_search_ptr;
  758. unsigned long int psn_search, poff = 0;
  759. struct bnxt_qplib_q *sq = &qp->sq;
  760. struct bnxt_qplib_q *rq = &qp->rq;
  761. struct bnxt_qplib_hwq *xrrq;
  762. int i, rc, req_size, psn_sz;
  763. u16 cmd_flags = 0, max_ssge;
  764. u32 sw_prod, qp_flags = 0;
  765. RCFW_CMD_PREP(req, CREATE_QP, cmd_flags);
  766. /* General */
  767. req.type = qp->type;
  768. req.dpi = cpu_to_le32(qp->dpi->dpi);
  769. req.qp_handle = cpu_to_le64(qp->qp_handle);
  770. /* SQ */
  771. psn_sz = (qp->type == CMDQ_CREATE_QP_TYPE_RC) ?
  772. sizeof(struct sq_psn_search) : 0;
  773. sq->hwq.max_elements = sq->max_wqe;
  774. rc = bnxt_qplib_alloc_init_hwq(res->pdev, &sq->hwq, sq->sglist,
  775. sq->nmap, &sq->hwq.max_elements,
  776. BNXT_QPLIB_MAX_SQE_ENTRY_SIZE,
  777. psn_sz,
  778. PAGE_SIZE, HWQ_TYPE_QUEUE);
  779. if (rc)
  780. goto exit;
  781. sq->swq = kcalloc(sq->hwq.max_elements, sizeof(*sq->swq), GFP_KERNEL);
  782. if (!sq->swq) {
  783. rc = -ENOMEM;
  784. goto fail_sq;
  785. }
  786. hw_sq_send_ptr = (struct sq_send **)sq->hwq.pbl_ptr;
  787. if (psn_sz) {
  788. psn_search_ptr = (struct sq_psn_search **)
  789. &hw_sq_send_ptr[get_sqe_pg
  790. (sq->hwq.max_elements)];
  791. psn_search = (unsigned long int)
  792. &hw_sq_send_ptr[get_sqe_pg(sq->hwq.max_elements)]
  793. [get_sqe_idx(sq->hwq.max_elements)];
  794. if (psn_search & ~PAGE_MASK) {
  795. /* If the psn_search does not start on a page boundary,
  796. * then calculate the offset
  797. */
  798. poff = (psn_search & ~PAGE_MASK) /
  799. BNXT_QPLIB_MAX_PSNE_ENTRY_SIZE;
  800. }
  801. for (i = 0; i < sq->hwq.max_elements; i++)
  802. sq->swq[i].psn_search =
  803. &psn_search_ptr[get_psne_pg(i + poff)]
  804. [get_psne_idx(i + poff)];
  805. }
  806. pbl = &sq->hwq.pbl[PBL_LVL_0];
  807. req.sq_pbl = cpu_to_le64(pbl->pg_map_arr[0]);
  808. req.sq_pg_size_sq_lvl =
  809. ((sq->hwq.level & CMDQ_CREATE_QP_SQ_LVL_MASK)
  810. << CMDQ_CREATE_QP_SQ_LVL_SFT) |
  811. (pbl->pg_size == ROCE_PG_SIZE_4K ?
  812. CMDQ_CREATE_QP_SQ_PG_SIZE_PG_4K :
  813. pbl->pg_size == ROCE_PG_SIZE_8K ?
  814. CMDQ_CREATE_QP_SQ_PG_SIZE_PG_8K :
  815. pbl->pg_size == ROCE_PG_SIZE_64K ?
  816. CMDQ_CREATE_QP_SQ_PG_SIZE_PG_64K :
  817. pbl->pg_size == ROCE_PG_SIZE_2M ?
  818. CMDQ_CREATE_QP_SQ_PG_SIZE_PG_2M :
  819. pbl->pg_size == ROCE_PG_SIZE_8M ?
  820. CMDQ_CREATE_QP_SQ_PG_SIZE_PG_8M :
  821. pbl->pg_size == ROCE_PG_SIZE_1G ?
  822. CMDQ_CREATE_QP_SQ_PG_SIZE_PG_1G :
  823. CMDQ_CREATE_QP_SQ_PG_SIZE_PG_4K);
  824. /* initialize all SQ WQEs to LOCAL_INVALID (sq prep for hw fetch) */
  825. hw_sq_send_ptr = (struct sq_send **)sq->hwq.pbl_ptr;
  826. for (sw_prod = 0; sw_prod < sq->hwq.max_elements; sw_prod++) {
  827. hw_sq_send_hdr = &hw_sq_send_ptr[get_sqe_pg(sw_prod)]
  828. [get_sqe_idx(sw_prod)];
  829. hw_sq_send_hdr->wqe_type = SQ_BASE_WQE_TYPE_LOCAL_INVALID;
  830. }
  831. if (qp->scq)
  832. req.scq_cid = cpu_to_le32(qp->scq->id);
  833. qp_flags |= CMDQ_CREATE_QP_QP_FLAGS_RESERVED_LKEY_ENABLE;
  834. qp_flags |= CMDQ_CREATE_QP_QP_FLAGS_FR_PMR_ENABLED;
  835. if (qp->sig_type)
  836. qp_flags |= CMDQ_CREATE_QP_QP_FLAGS_FORCE_COMPLETION;
  837. /* RQ */
  838. if (rq->max_wqe) {
  839. rq->hwq.max_elements = rq->max_wqe;
  840. rc = bnxt_qplib_alloc_init_hwq(res->pdev, &rq->hwq, rq->sglist,
  841. rq->nmap, &rq->hwq.max_elements,
  842. BNXT_QPLIB_MAX_RQE_ENTRY_SIZE, 0,
  843. PAGE_SIZE, HWQ_TYPE_QUEUE);
  844. if (rc)
  845. goto fail_sq;
  846. rq->swq = kcalloc(rq->hwq.max_elements, sizeof(*rq->swq),
  847. GFP_KERNEL);
  848. if (!rq->swq) {
  849. rc = -ENOMEM;
  850. goto fail_rq;
  851. }
  852. pbl = &rq->hwq.pbl[PBL_LVL_0];
  853. req.rq_pbl = cpu_to_le64(pbl->pg_map_arr[0]);
  854. req.rq_pg_size_rq_lvl =
  855. ((rq->hwq.level & CMDQ_CREATE_QP_RQ_LVL_MASK) <<
  856. CMDQ_CREATE_QP_RQ_LVL_SFT) |
  857. (pbl->pg_size == ROCE_PG_SIZE_4K ?
  858. CMDQ_CREATE_QP_RQ_PG_SIZE_PG_4K :
  859. pbl->pg_size == ROCE_PG_SIZE_8K ?
  860. CMDQ_CREATE_QP_RQ_PG_SIZE_PG_8K :
  861. pbl->pg_size == ROCE_PG_SIZE_64K ?
  862. CMDQ_CREATE_QP_RQ_PG_SIZE_PG_64K :
  863. pbl->pg_size == ROCE_PG_SIZE_2M ?
  864. CMDQ_CREATE_QP_RQ_PG_SIZE_PG_2M :
  865. pbl->pg_size == ROCE_PG_SIZE_8M ?
  866. CMDQ_CREATE_QP_RQ_PG_SIZE_PG_8M :
  867. pbl->pg_size == ROCE_PG_SIZE_1G ?
  868. CMDQ_CREATE_QP_RQ_PG_SIZE_PG_1G :
  869. CMDQ_CREATE_QP_RQ_PG_SIZE_PG_4K);
  870. } else {
  871. /* SRQ */
  872. if (qp->srq) {
  873. qp_flags |= CMDQ_CREATE_QP_QP_FLAGS_SRQ_USED;
  874. req.srq_cid = cpu_to_le32(qp->srq->id);
  875. }
  876. }
  877. if (qp->rcq)
  878. req.rcq_cid = cpu_to_le32(qp->rcq->id);
  879. req.qp_flags = cpu_to_le32(qp_flags);
  880. req.sq_size = cpu_to_le32(sq->hwq.max_elements);
  881. req.rq_size = cpu_to_le32(rq->hwq.max_elements);
  882. qp->sq_hdr_buf = NULL;
  883. qp->rq_hdr_buf = NULL;
  884. rc = bnxt_qplib_alloc_qp_hdr_buf(res, qp);
  885. if (rc)
  886. goto fail_rq;
  887. /* CTRL-22434: Irrespective of the requested SGE count on the SQ
  888. * always create the QP with max send sges possible if the requested
  889. * inline size is greater than 0.
  890. */
  891. max_ssge = qp->max_inline_data ? 6 : sq->max_sge;
  892. req.sq_fwo_sq_sge = cpu_to_le16(
  893. ((max_ssge & CMDQ_CREATE_QP_SQ_SGE_MASK)
  894. << CMDQ_CREATE_QP_SQ_SGE_SFT) | 0);
  895. req.rq_fwo_rq_sge = cpu_to_le16(
  896. ((rq->max_sge & CMDQ_CREATE_QP_RQ_SGE_MASK)
  897. << CMDQ_CREATE_QP_RQ_SGE_SFT) | 0);
  898. /* ORRQ and IRRQ */
  899. if (psn_sz) {
  900. xrrq = &qp->orrq;
  901. xrrq->max_elements =
  902. ORD_LIMIT_TO_ORRQ_SLOTS(qp->max_rd_atomic);
  903. req_size = xrrq->max_elements *
  904. BNXT_QPLIB_MAX_ORRQE_ENTRY_SIZE + PAGE_SIZE - 1;
  905. req_size &= ~(PAGE_SIZE - 1);
  906. rc = bnxt_qplib_alloc_init_hwq(res->pdev, xrrq, NULL, 0,
  907. &xrrq->max_elements,
  908. BNXT_QPLIB_MAX_ORRQE_ENTRY_SIZE,
  909. 0, req_size, HWQ_TYPE_CTX);
  910. if (rc)
  911. goto fail_buf_free;
  912. pbl = &xrrq->pbl[PBL_LVL_0];
  913. req.orrq_addr = cpu_to_le64(pbl->pg_map_arr[0]);
  914. xrrq = &qp->irrq;
  915. xrrq->max_elements = IRD_LIMIT_TO_IRRQ_SLOTS(
  916. qp->max_dest_rd_atomic);
  917. req_size = xrrq->max_elements *
  918. BNXT_QPLIB_MAX_IRRQE_ENTRY_SIZE + PAGE_SIZE - 1;
  919. req_size &= ~(PAGE_SIZE - 1);
  920. rc = bnxt_qplib_alloc_init_hwq(res->pdev, xrrq, NULL, 0,
  921. &xrrq->max_elements,
  922. BNXT_QPLIB_MAX_IRRQE_ENTRY_SIZE,
  923. 0, req_size, HWQ_TYPE_CTX);
  924. if (rc)
  925. goto fail_orrq;
  926. pbl = &xrrq->pbl[PBL_LVL_0];
  927. req.irrq_addr = cpu_to_le64(pbl->pg_map_arr[0]);
  928. }
  929. req.pd_id = cpu_to_le32(qp->pd->id);
  930. rc = bnxt_qplib_rcfw_send_message(rcfw, (void *)&req,
  931. (void *)&resp, NULL, 0);
  932. if (rc)
  933. goto fail;
  934. qp->id = le32_to_cpu(resp.xid);
  935. qp->cur_qp_state = CMDQ_MODIFY_QP_NEW_STATE_RESET;
  936. INIT_LIST_HEAD(&qp->sq_flush);
  937. INIT_LIST_HEAD(&qp->rq_flush);
  938. rcfw->qp_tbl[qp->id].qp_id = qp->id;
  939. rcfw->qp_tbl[qp->id].qp_handle = (void *)qp;
  940. return 0;
  941. fail:
  942. if (qp->irrq.max_elements)
  943. bnxt_qplib_free_hwq(res->pdev, &qp->irrq);
  944. fail_orrq:
  945. if (qp->orrq.max_elements)
  946. bnxt_qplib_free_hwq(res->pdev, &qp->orrq);
  947. fail_buf_free:
  948. bnxt_qplib_free_qp_hdr_buf(res, qp);
  949. fail_rq:
  950. bnxt_qplib_free_hwq(res->pdev, &rq->hwq);
  951. kfree(rq->swq);
  952. fail_sq:
  953. bnxt_qplib_free_hwq(res->pdev, &sq->hwq);
  954. kfree(sq->swq);
  955. exit:
  956. return rc;
  957. }
  958. static void __modify_flags_from_init_state(struct bnxt_qplib_qp *qp)
  959. {
  960. switch (qp->state) {
  961. case CMDQ_MODIFY_QP_NEW_STATE_RTR:
  962. /* INIT->RTR, configure the path_mtu to the default
  963. * 2048 if not being requested
  964. */
  965. if (!(qp->modify_flags &
  966. CMDQ_MODIFY_QP_MODIFY_MASK_PATH_MTU)) {
  967. qp->modify_flags |=
  968. CMDQ_MODIFY_QP_MODIFY_MASK_PATH_MTU;
  969. qp->path_mtu =
  970. CMDQ_MODIFY_QP_PATH_MTU_MTU_2048;
  971. }
  972. qp->modify_flags &=
  973. ~CMDQ_MODIFY_QP_MODIFY_MASK_VLAN_ID;
  974. /* Bono FW require the max_dest_rd_atomic to be >= 1 */
  975. if (qp->max_dest_rd_atomic < 1)
  976. qp->max_dest_rd_atomic = 1;
  977. qp->modify_flags &= ~CMDQ_MODIFY_QP_MODIFY_MASK_SRC_MAC;
  978. /* Bono FW 20.6.5 requires SGID_INDEX configuration */
  979. if (!(qp->modify_flags &
  980. CMDQ_MODIFY_QP_MODIFY_MASK_SGID_INDEX)) {
  981. qp->modify_flags |=
  982. CMDQ_MODIFY_QP_MODIFY_MASK_SGID_INDEX;
  983. qp->ah.sgid_index = 0;
  984. }
  985. break;
  986. default:
  987. break;
  988. }
  989. }
  990. static void __modify_flags_from_rtr_state(struct bnxt_qplib_qp *qp)
  991. {
  992. switch (qp->state) {
  993. case CMDQ_MODIFY_QP_NEW_STATE_RTS:
  994. /* Bono FW requires the max_rd_atomic to be >= 1 */
  995. if (qp->max_rd_atomic < 1)
  996. qp->max_rd_atomic = 1;
  997. /* Bono FW does not allow PKEY_INDEX,
  998. * DGID, FLOW_LABEL, SGID_INDEX, HOP_LIMIT,
  999. * TRAFFIC_CLASS, DEST_MAC, PATH_MTU, RQ_PSN,
  1000. * MIN_RNR_TIMER, MAX_DEST_RD_ATOMIC, DEST_QP_ID
  1001. * modification
  1002. */
  1003. qp->modify_flags &=
  1004. ~(CMDQ_MODIFY_QP_MODIFY_MASK_PKEY |
  1005. CMDQ_MODIFY_QP_MODIFY_MASK_DGID |
  1006. CMDQ_MODIFY_QP_MODIFY_MASK_FLOW_LABEL |
  1007. CMDQ_MODIFY_QP_MODIFY_MASK_SGID_INDEX |
  1008. CMDQ_MODIFY_QP_MODIFY_MASK_HOP_LIMIT |
  1009. CMDQ_MODIFY_QP_MODIFY_MASK_TRAFFIC_CLASS |
  1010. CMDQ_MODIFY_QP_MODIFY_MASK_DEST_MAC |
  1011. CMDQ_MODIFY_QP_MODIFY_MASK_PATH_MTU |
  1012. CMDQ_MODIFY_QP_MODIFY_MASK_RQ_PSN |
  1013. CMDQ_MODIFY_QP_MODIFY_MASK_MIN_RNR_TIMER |
  1014. CMDQ_MODIFY_QP_MODIFY_MASK_MAX_DEST_RD_ATOMIC |
  1015. CMDQ_MODIFY_QP_MODIFY_MASK_DEST_QP_ID);
  1016. break;
  1017. default:
  1018. break;
  1019. }
  1020. }
  1021. static void __filter_modify_flags(struct bnxt_qplib_qp *qp)
  1022. {
  1023. switch (qp->cur_qp_state) {
  1024. case CMDQ_MODIFY_QP_NEW_STATE_RESET:
  1025. break;
  1026. case CMDQ_MODIFY_QP_NEW_STATE_INIT:
  1027. __modify_flags_from_init_state(qp);
  1028. break;
  1029. case CMDQ_MODIFY_QP_NEW_STATE_RTR:
  1030. __modify_flags_from_rtr_state(qp);
  1031. break;
  1032. case CMDQ_MODIFY_QP_NEW_STATE_RTS:
  1033. break;
  1034. case CMDQ_MODIFY_QP_NEW_STATE_SQD:
  1035. break;
  1036. case CMDQ_MODIFY_QP_NEW_STATE_SQE:
  1037. break;
  1038. case CMDQ_MODIFY_QP_NEW_STATE_ERR:
  1039. break;
  1040. default:
  1041. break;
  1042. }
  1043. }
  1044. int bnxt_qplib_modify_qp(struct bnxt_qplib_res *res, struct bnxt_qplib_qp *qp)
  1045. {
  1046. struct bnxt_qplib_rcfw *rcfw = res->rcfw;
  1047. struct cmdq_modify_qp req;
  1048. struct creq_modify_qp_resp resp;
  1049. u16 cmd_flags = 0, pkey;
  1050. u32 temp32[4];
  1051. u32 bmask;
  1052. int rc;
  1053. RCFW_CMD_PREP(req, MODIFY_QP, cmd_flags);
  1054. /* Filter out the qp_attr_mask based on the state->new transition */
  1055. __filter_modify_flags(qp);
  1056. bmask = qp->modify_flags;
  1057. req.modify_mask = cpu_to_le32(qp->modify_flags);
  1058. req.qp_cid = cpu_to_le32(qp->id);
  1059. if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_STATE) {
  1060. req.network_type_en_sqd_async_notify_new_state =
  1061. (qp->state & CMDQ_MODIFY_QP_NEW_STATE_MASK) |
  1062. (qp->en_sqd_async_notify ?
  1063. CMDQ_MODIFY_QP_EN_SQD_ASYNC_NOTIFY : 0);
  1064. }
  1065. req.network_type_en_sqd_async_notify_new_state |= qp->nw_type;
  1066. if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_ACCESS)
  1067. req.access = qp->access;
  1068. if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_PKEY) {
  1069. if (!bnxt_qplib_get_pkey(res, &res->pkey_tbl,
  1070. qp->pkey_index, &pkey))
  1071. req.pkey = cpu_to_le16(pkey);
  1072. }
  1073. if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_QKEY)
  1074. req.qkey = cpu_to_le32(qp->qkey);
  1075. if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_DGID) {
  1076. memcpy(temp32, qp->ah.dgid.data, sizeof(struct bnxt_qplib_gid));
  1077. req.dgid[0] = cpu_to_le32(temp32[0]);
  1078. req.dgid[1] = cpu_to_le32(temp32[1]);
  1079. req.dgid[2] = cpu_to_le32(temp32[2]);
  1080. req.dgid[3] = cpu_to_le32(temp32[3]);
  1081. }
  1082. if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_FLOW_LABEL)
  1083. req.flow_label = cpu_to_le32(qp->ah.flow_label);
  1084. if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_SGID_INDEX)
  1085. req.sgid_index = cpu_to_le16(res->sgid_tbl.hw_id
  1086. [qp->ah.sgid_index]);
  1087. if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_HOP_LIMIT)
  1088. req.hop_limit = qp->ah.hop_limit;
  1089. if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_TRAFFIC_CLASS)
  1090. req.traffic_class = qp->ah.traffic_class;
  1091. if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_DEST_MAC)
  1092. memcpy(req.dest_mac, qp->ah.dmac, 6);
  1093. if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_PATH_MTU)
  1094. req.path_mtu = qp->path_mtu;
  1095. if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_TIMEOUT)
  1096. req.timeout = qp->timeout;
  1097. if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_RETRY_CNT)
  1098. req.retry_cnt = qp->retry_cnt;
  1099. if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_RNR_RETRY)
  1100. req.rnr_retry = qp->rnr_retry;
  1101. if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_MIN_RNR_TIMER)
  1102. req.min_rnr_timer = qp->min_rnr_timer;
  1103. if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_RQ_PSN)
  1104. req.rq_psn = cpu_to_le32(qp->rq.psn);
  1105. if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_SQ_PSN)
  1106. req.sq_psn = cpu_to_le32(qp->sq.psn);
  1107. if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_MAX_RD_ATOMIC)
  1108. req.max_rd_atomic =
  1109. ORD_LIMIT_TO_ORRQ_SLOTS(qp->max_rd_atomic);
  1110. if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_MAX_DEST_RD_ATOMIC)
  1111. req.max_dest_rd_atomic =
  1112. IRD_LIMIT_TO_IRRQ_SLOTS(qp->max_dest_rd_atomic);
  1113. req.sq_size = cpu_to_le32(qp->sq.hwq.max_elements);
  1114. req.rq_size = cpu_to_le32(qp->rq.hwq.max_elements);
  1115. req.sq_sge = cpu_to_le16(qp->sq.max_sge);
  1116. req.rq_sge = cpu_to_le16(qp->rq.max_sge);
  1117. req.max_inline_data = cpu_to_le32(qp->max_inline_data);
  1118. if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_DEST_QP_ID)
  1119. req.dest_qp_id = cpu_to_le32(qp->dest_qpn);
  1120. req.vlan_pcp_vlan_dei_vlan_id = cpu_to_le16(qp->vlan_id);
  1121. rc = bnxt_qplib_rcfw_send_message(rcfw, (void *)&req,
  1122. (void *)&resp, NULL, 0);
  1123. if (rc)
  1124. return rc;
  1125. qp->cur_qp_state = qp->state;
  1126. return 0;
  1127. }
  1128. int bnxt_qplib_query_qp(struct bnxt_qplib_res *res, struct bnxt_qplib_qp *qp)
  1129. {
  1130. struct bnxt_qplib_rcfw *rcfw = res->rcfw;
  1131. struct cmdq_query_qp req;
  1132. struct creq_query_qp_resp resp;
  1133. struct bnxt_qplib_rcfw_sbuf *sbuf;
  1134. struct creq_query_qp_resp_sb *sb;
  1135. u16 cmd_flags = 0;
  1136. u32 temp32[4];
  1137. int i, rc = 0;
  1138. RCFW_CMD_PREP(req, QUERY_QP, cmd_flags);
  1139. sbuf = bnxt_qplib_rcfw_alloc_sbuf(rcfw, sizeof(*sb));
  1140. if (!sbuf)
  1141. return -ENOMEM;
  1142. sb = sbuf->sb;
  1143. req.qp_cid = cpu_to_le32(qp->id);
  1144. req.resp_size = sizeof(*sb) / BNXT_QPLIB_CMDQE_UNITS;
  1145. rc = bnxt_qplib_rcfw_send_message(rcfw, (void *)&req, (void *)&resp,
  1146. (void *)sbuf, 0);
  1147. if (rc)
  1148. goto bail;
  1149. /* Extract the context from the side buffer */
  1150. qp->state = sb->en_sqd_async_notify_state &
  1151. CREQ_QUERY_QP_RESP_SB_STATE_MASK;
  1152. qp->en_sqd_async_notify = sb->en_sqd_async_notify_state &
  1153. CREQ_QUERY_QP_RESP_SB_EN_SQD_ASYNC_NOTIFY ?
  1154. true : false;
  1155. qp->access = sb->access;
  1156. qp->pkey_index = le16_to_cpu(sb->pkey);
  1157. qp->qkey = le32_to_cpu(sb->qkey);
  1158. temp32[0] = le32_to_cpu(sb->dgid[0]);
  1159. temp32[1] = le32_to_cpu(sb->dgid[1]);
  1160. temp32[2] = le32_to_cpu(sb->dgid[2]);
  1161. temp32[3] = le32_to_cpu(sb->dgid[3]);
  1162. memcpy(qp->ah.dgid.data, temp32, sizeof(qp->ah.dgid.data));
  1163. qp->ah.flow_label = le32_to_cpu(sb->flow_label);
  1164. qp->ah.sgid_index = 0;
  1165. for (i = 0; i < res->sgid_tbl.max; i++) {
  1166. if (res->sgid_tbl.hw_id[i] == le16_to_cpu(sb->sgid_index)) {
  1167. qp->ah.sgid_index = i;
  1168. break;
  1169. }
  1170. }
  1171. if (i == res->sgid_tbl.max)
  1172. dev_warn(&res->pdev->dev, "QPLIB: SGID not found??");
  1173. qp->ah.hop_limit = sb->hop_limit;
  1174. qp->ah.traffic_class = sb->traffic_class;
  1175. memcpy(qp->ah.dmac, sb->dest_mac, 6);
  1176. qp->ah.vlan_id = (le16_to_cpu(sb->path_mtu_dest_vlan_id) &
  1177. CREQ_QUERY_QP_RESP_SB_VLAN_ID_MASK) >>
  1178. CREQ_QUERY_QP_RESP_SB_VLAN_ID_SFT;
  1179. qp->path_mtu = (le16_to_cpu(sb->path_mtu_dest_vlan_id) &
  1180. CREQ_QUERY_QP_RESP_SB_PATH_MTU_MASK) >>
  1181. CREQ_QUERY_QP_RESP_SB_PATH_MTU_SFT;
  1182. qp->timeout = sb->timeout;
  1183. qp->retry_cnt = sb->retry_cnt;
  1184. qp->rnr_retry = sb->rnr_retry;
  1185. qp->min_rnr_timer = sb->min_rnr_timer;
  1186. qp->rq.psn = le32_to_cpu(sb->rq_psn);
  1187. qp->max_rd_atomic = ORRQ_SLOTS_TO_ORD_LIMIT(sb->max_rd_atomic);
  1188. qp->sq.psn = le32_to_cpu(sb->sq_psn);
  1189. qp->max_dest_rd_atomic =
  1190. IRRQ_SLOTS_TO_IRD_LIMIT(sb->max_dest_rd_atomic);
  1191. qp->sq.max_wqe = qp->sq.hwq.max_elements;
  1192. qp->rq.max_wqe = qp->rq.hwq.max_elements;
  1193. qp->sq.max_sge = le16_to_cpu(sb->sq_sge);
  1194. qp->rq.max_sge = le16_to_cpu(sb->rq_sge);
  1195. qp->max_inline_data = le32_to_cpu(sb->max_inline_data);
  1196. qp->dest_qpn = le32_to_cpu(sb->dest_qp_id);
  1197. memcpy(qp->smac, sb->src_mac, 6);
  1198. qp->vlan_id = le16_to_cpu(sb->vlan_pcp_vlan_dei_vlan_id);
  1199. bail:
  1200. bnxt_qplib_rcfw_free_sbuf(rcfw, sbuf);
  1201. return rc;
  1202. }
  1203. static void __clean_cq(struct bnxt_qplib_cq *cq, u64 qp)
  1204. {
  1205. struct bnxt_qplib_hwq *cq_hwq = &cq->hwq;
  1206. struct cq_base *hw_cqe, **hw_cqe_ptr;
  1207. int i;
  1208. for (i = 0; i < cq_hwq->max_elements; i++) {
  1209. hw_cqe_ptr = (struct cq_base **)cq_hwq->pbl_ptr;
  1210. hw_cqe = &hw_cqe_ptr[CQE_PG(i)][CQE_IDX(i)];
  1211. if (!CQE_CMP_VALID(hw_cqe, i, cq_hwq->max_elements))
  1212. continue;
  1213. /*
  1214. * The valid test of the entry must be done first before
  1215. * reading any further.
  1216. */
  1217. dma_rmb();
  1218. switch (hw_cqe->cqe_type_toggle & CQ_BASE_CQE_TYPE_MASK) {
  1219. case CQ_BASE_CQE_TYPE_REQ:
  1220. case CQ_BASE_CQE_TYPE_TERMINAL:
  1221. {
  1222. struct cq_req *cqe = (struct cq_req *)hw_cqe;
  1223. if (qp == le64_to_cpu(cqe->qp_handle))
  1224. cqe->qp_handle = 0;
  1225. break;
  1226. }
  1227. case CQ_BASE_CQE_TYPE_RES_RC:
  1228. case CQ_BASE_CQE_TYPE_RES_UD:
  1229. case CQ_BASE_CQE_TYPE_RES_RAWETH_QP1:
  1230. {
  1231. struct cq_res_rc *cqe = (struct cq_res_rc *)hw_cqe;
  1232. if (qp == le64_to_cpu(cqe->qp_handle))
  1233. cqe->qp_handle = 0;
  1234. break;
  1235. }
  1236. default:
  1237. break;
  1238. }
  1239. }
  1240. }
  1241. int bnxt_qplib_destroy_qp(struct bnxt_qplib_res *res,
  1242. struct bnxt_qplib_qp *qp)
  1243. {
  1244. struct bnxt_qplib_rcfw *rcfw = res->rcfw;
  1245. struct cmdq_destroy_qp req;
  1246. struct creq_destroy_qp_resp resp;
  1247. u16 cmd_flags = 0;
  1248. int rc;
  1249. rcfw->qp_tbl[qp->id].qp_id = BNXT_QPLIB_QP_ID_INVALID;
  1250. rcfw->qp_tbl[qp->id].qp_handle = NULL;
  1251. RCFW_CMD_PREP(req, DESTROY_QP, cmd_flags);
  1252. req.qp_cid = cpu_to_le32(qp->id);
  1253. rc = bnxt_qplib_rcfw_send_message(rcfw, (void *)&req,
  1254. (void *)&resp, NULL, 0);
  1255. if (rc) {
  1256. rcfw->qp_tbl[qp->id].qp_id = qp->id;
  1257. rcfw->qp_tbl[qp->id].qp_handle = qp;
  1258. return rc;
  1259. }
  1260. return 0;
  1261. }
  1262. void bnxt_qplib_free_qp_res(struct bnxt_qplib_res *res,
  1263. struct bnxt_qplib_qp *qp)
  1264. {
  1265. bnxt_qplib_free_qp_hdr_buf(res, qp);
  1266. bnxt_qplib_free_hwq(res->pdev, &qp->sq.hwq);
  1267. kfree(qp->sq.swq);
  1268. bnxt_qplib_free_hwq(res->pdev, &qp->rq.hwq);
  1269. kfree(qp->rq.swq);
  1270. if (qp->irrq.max_elements)
  1271. bnxt_qplib_free_hwq(res->pdev, &qp->irrq);
  1272. if (qp->orrq.max_elements)
  1273. bnxt_qplib_free_hwq(res->pdev, &qp->orrq);
  1274. }
  1275. void *bnxt_qplib_get_qp1_sq_buf(struct bnxt_qplib_qp *qp,
  1276. struct bnxt_qplib_sge *sge)
  1277. {
  1278. struct bnxt_qplib_q *sq = &qp->sq;
  1279. u32 sw_prod;
  1280. memset(sge, 0, sizeof(*sge));
  1281. if (qp->sq_hdr_buf) {
  1282. sw_prod = HWQ_CMP(sq->hwq.prod, &sq->hwq);
  1283. sge->addr = (dma_addr_t)(qp->sq_hdr_buf_map +
  1284. sw_prod * qp->sq_hdr_buf_size);
  1285. sge->lkey = 0xFFFFFFFF;
  1286. sge->size = qp->sq_hdr_buf_size;
  1287. return qp->sq_hdr_buf + sw_prod * sge->size;
  1288. }
  1289. return NULL;
  1290. }
  1291. u32 bnxt_qplib_get_rq_prod_index(struct bnxt_qplib_qp *qp)
  1292. {
  1293. struct bnxt_qplib_q *rq = &qp->rq;
  1294. return HWQ_CMP(rq->hwq.prod, &rq->hwq);
  1295. }
  1296. dma_addr_t bnxt_qplib_get_qp_buf_from_index(struct bnxt_qplib_qp *qp, u32 index)
  1297. {
  1298. return (qp->rq_hdr_buf_map + index * qp->rq_hdr_buf_size);
  1299. }
  1300. void *bnxt_qplib_get_qp1_rq_buf(struct bnxt_qplib_qp *qp,
  1301. struct bnxt_qplib_sge *sge)
  1302. {
  1303. struct bnxt_qplib_q *rq = &qp->rq;
  1304. u32 sw_prod;
  1305. memset(sge, 0, sizeof(*sge));
  1306. if (qp->rq_hdr_buf) {
  1307. sw_prod = HWQ_CMP(rq->hwq.prod, &rq->hwq);
  1308. sge->addr = (dma_addr_t)(qp->rq_hdr_buf_map +
  1309. sw_prod * qp->rq_hdr_buf_size);
  1310. sge->lkey = 0xFFFFFFFF;
  1311. sge->size = qp->rq_hdr_buf_size;
  1312. return qp->rq_hdr_buf + sw_prod * sge->size;
  1313. }
  1314. return NULL;
  1315. }
  1316. void bnxt_qplib_post_send_db(struct bnxt_qplib_qp *qp)
  1317. {
  1318. struct bnxt_qplib_q *sq = &qp->sq;
  1319. struct dbr_dbr db_msg = { 0 };
  1320. u32 sw_prod;
  1321. sw_prod = HWQ_CMP(sq->hwq.prod, &sq->hwq);
  1322. db_msg.index = cpu_to_le32((sw_prod << DBR_DBR_INDEX_SFT) &
  1323. DBR_DBR_INDEX_MASK);
  1324. db_msg.type_xid =
  1325. cpu_to_le32(((qp->id << DBR_DBR_XID_SFT) & DBR_DBR_XID_MASK) |
  1326. DBR_DBR_TYPE_SQ);
  1327. /* Flush all the WQE writes to HW */
  1328. wmb();
  1329. __iowrite64_copy(qp->dpi->dbr, &db_msg, sizeof(db_msg) / sizeof(u64));
  1330. }
  1331. int bnxt_qplib_post_send(struct bnxt_qplib_qp *qp,
  1332. struct bnxt_qplib_swqe *wqe)
  1333. {
  1334. struct bnxt_qplib_q *sq = &qp->sq;
  1335. struct bnxt_qplib_swq *swq;
  1336. struct sq_send *hw_sq_send_hdr, **hw_sq_send_ptr;
  1337. struct sq_sge *hw_sge;
  1338. struct bnxt_qplib_nq_work *nq_work = NULL;
  1339. bool sch_handler = false;
  1340. u32 sw_prod;
  1341. u8 wqe_size16;
  1342. int i, rc = 0, data_len = 0, pkt_num = 0;
  1343. __le32 temp32;
  1344. if (qp->state != CMDQ_MODIFY_QP_NEW_STATE_RTS) {
  1345. if (qp->state == CMDQ_MODIFY_QP_NEW_STATE_ERR) {
  1346. sch_handler = true;
  1347. dev_dbg(&sq->hwq.pdev->dev,
  1348. "%s Error QP. Scheduling for poll_cq\n",
  1349. __func__);
  1350. goto queue_err;
  1351. }
  1352. }
  1353. if (bnxt_qplib_queue_full(sq)) {
  1354. dev_err(&sq->hwq.pdev->dev,
  1355. "QPLIB: prod = %#x cons = %#x qdepth = %#x delta = %#x",
  1356. sq->hwq.prod, sq->hwq.cons, sq->hwq.max_elements,
  1357. sq->q_full_delta);
  1358. rc = -ENOMEM;
  1359. goto done;
  1360. }
  1361. sw_prod = HWQ_CMP(sq->hwq.prod, &sq->hwq);
  1362. swq = &sq->swq[sw_prod];
  1363. swq->wr_id = wqe->wr_id;
  1364. swq->type = wqe->type;
  1365. swq->flags = wqe->flags;
  1366. if (qp->sig_type)
  1367. swq->flags |= SQ_SEND_FLAGS_SIGNAL_COMP;
  1368. swq->start_psn = sq->psn & BTH_PSN_MASK;
  1369. hw_sq_send_ptr = (struct sq_send **)sq->hwq.pbl_ptr;
  1370. hw_sq_send_hdr = &hw_sq_send_ptr[get_sqe_pg(sw_prod)]
  1371. [get_sqe_idx(sw_prod)];
  1372. memset(hw_sq_send_hdr, 0, BNXT_QPLIB_MAX_SQE_ENTRY_SIZE);
  1373. if (wqe->flags & BNXT_QPLIB_SWQE_FLAGS_INLINE) {
  1374. /* Copy the inline data */
  1375. if (wqe->inline_len > BNXT_QPLIB_SWQE_MAX_INLINE_LENGTH) {
  1376. dev_warn(&sq->hwq.pdev->dev,
  1377. "QPLIB: Inline data length > 96 detected");
  1378. data_len = BNXT_QPLIB_SWQE_MAX_INLINE_LENGTH;
  1379. } else {
  1380. data_len = wqe->inline_len;
  1381. }
  1382. memcpy(hw_sq_send_hdr->data, wqe->inline_data, data_len);
  1383. wqe_size16 = (data_len + 15) >> 4;
  1384. } else {
  1385. for (i = 0, hw_sge = (struct sq_sge *)hw_sq_send_hdr->data;
  1386. i < wqe->num_sge; i++, hw_sge++) {
  1387. hw_sge->va_or_pa = cpu_to_le64(wqe->sg_list[i].addr);
  1388. hw_sge->l_key = cpu_to_le32(wqe->sg_list[i].lkey);
  1389. hw_sge->size = cpu_to_le32(wqe->sg_list[i].size);
  1390. data_len += wqe->sg_list[i].size;
  1391. }
  1392. /* Each SGE entry = 1 WQE size16 */
  1393. wqe_size16 = wqe->num_sge;
  1394. /* HW requires wqe size has room for atleast one SGE even if
  1395. * none was supplied by ULP
  1396. */
  1397. if (!wqe->num_sge)
  1398. wqe_size16++;
  1399. }
  1400. /* Specifics */
  1401. switch (wqe->type) {
  1402. case BNXT_QPLIB_SWQE_TYPE_SEND:
  1403. if (qp->type == CMDQ_CREATE_QP1_TYPE_GSI) {
  1404. /* Assemble info for Raw Ethertype QPs */
  1405. struct sq_send_raweth_qp1 *sqe =
  1406. (struct sq_send_raweth_qp1 *)hw_sq_send_hdr;
  1407. sqe->wqe_type = wqe->type;
  1408. sqe->flags = wqe->flags;
  1409. sqe->wqe_size = wqe_size16 +
  1410. ((offsetof(typeof(*sqe), data) + 15) >> 4);
  1411. sqe->cfa_action = cpu_to_le16(wqe->rawqp1.cfa_action);
  1412. sqe->lflags = cpu_to_le16(wqe->rawqp1.lflags);
  1413. sqe->length = cpu_to_le32(data_len);
  1414. sqe->cfa_meta = cpu_to_le32((wqe->rawqp1.cfa_meta &
  1415. SQ_SEND_RAWETH_QP1_CFA_META_VLAN_VID_MASK) <<
  1416. SQ_SEND_RAWETH_QP1_CFA_META_VLAN_VID_SFT);
  1417. break;
  1418. }
  1419. /* fall thru */
  1420. case BNXT_QPLIB_SWQE_TYPE_SEND_WITH_IMM:
  1421. case BNXT_QPLIB_SWQE_TYPE_SEND_WITH_INV:
  1422. {
  1423. struct sq_send *sqe = (struct sq_send *)hw_sq_send_hdr;
  1424. sqe->wqe_type = wqe->type;
  1425. sqe->flags = wqe->flags;
  1426. sqe->wqe_size = wqe_size16 +
  1427. ((offsetof(typeof(*sqe), data) + 15) >> 4);
  1428. sqe->inv_key_or_imm_data = cpu_to_le32(
  1429. wqe->send.inv_key);
  1430. if (qp->type == CMDQ_CREATE_QP_TYPE_UD) {
  1431. sqe->q_key = cpu_to_le32(wqe->send.q_key);
  1432. sqe->dst_qp = cpu_to_le32(
  1433. wqe->send.dst_qp & SQ_SEND_DST_QP_MASK);
  1434. sqe->length = cpu_to_le32(data_len);
  1435. sqe->avid = cpu_to_le32(wqe->send.avid &
  1436. SQ_SEND_AVID_MASK);
  1437. sq->psn = (sq->psn + 1) & BTH_PSN_MASK;
  1438. } else {
  1439. sqe->length = cpu_to_le32(data_len);
  1440. sqe->dst_qp = 0;
  1441. sqe->avid = 0;
  1442. if (qp->mtu)
  1443. pkt_num = (data_len + qp->mtu - 1) / qp->mtu;
  1444. if (!pkt_num)
  1445. pkt_num = 1;
  1446. sq->psn = (sq->psn + pkt_num) & BTH_PSN_MASK;
  1447. }
  1448. break;
  1449. }
  1450. case BNXT_QPLIB_SWQE_TYPE_RDMA_WRITE:
  1451. case BNXT_QPLIB_SWQE_TYPE_RDMA_WRITE_WITH_IMM:
  1452. case BNXT_QPLIB_SWQE_TYPE_RDMA_READ:
  1453. {
  1454. struct sq_rdma *sqe = (struct sq_rdma *)hw_sq_send_hdr;
  1455. sqe->wqe_type = wqe->type;
  1456. sqe->flags = wqe->flags;
  1457. sqe->wqe_size = wqe_size16 +
  1458. ((offsetof(typeof(*sqe), data) + 15) >> 4);
  1459. sqe->imm_data = cpu_to_le32(wqe->rdma.inv_key);
  1460. sqe->length = cpu_to_le32((u32)data_len);
  1461. sqe->remote_va = cpu_to_le64(wqe->rdma.remote_va);
  1462. sqe->remote_key = cpu_to_le32(wqe->rdma.r_key);
  1463. if (qp->mtu)
  1464. pkt_num = (data_len + qp->mtu - 1) / qp->mtu;
  1465. if (!pkt_num)
  1466. pkt_num = 1;
  1467. sq->psn = (sq->psn + pkt_num) & BTH_PSN_MASK;
  1468. break;
  1469. }
  1470. case BNXT_QPLIB_SWQE_TYPE_ATOMIC_CMP_AND_SWP:
  1471. case BNXT_QPLIB_SWQE_TYPE_ATOMIC_FETCH_AND_ADD:
  1472. {
  1473. struct sq_atomic *sqe = (struct sq_atomic *)hw_sq_send_hdr;
  1474. sqe->wqe_type = wqe->type;
  1475. sqe->flags = wqe->flags;
  1476. sqe->remote_key = cpu_to_le32(wqe->atomic.r_key);
  1477. sqe->remote_va = cpu_to_le64(wqe->atomic.remote_va);
  1478. sqe->swap_data = cpu_to_le64(wqe->atomic.swap_data);
  1479. sqe->cmp_data = cpu_to_le64(wqe->atomic.cmp_data);
  1480. if (qp->mtu)
  1481. pkt_num = (data_len + qp->mtu - 1) / qp->mtu;
  1482. if (!pkt_num)
  1483. pkt_num = 1;
  1484. sq->psn = (sq->psn + pkt_num) & BTH_PSN_MASK;
  1485. break;
  1486. }
  1487. case BNXT_QPLIB_SWQE_TYPE_LOCAL_INV:
  1488. {
  1489. struct sq_localinvalidate *sqe =
  1490. (struct sq_localinvalidate *)hw_sq_send_hdr;
  1491. sqe->wqe_type = wqe->type;
  1492. sqe->flags = wqe->flags;
  1493. sqe->inv_l_key = cpu_to_le32(wqe->local_inv.inv_l_key);
  1494. break;
  1495. }
  1496. case BNXT_QPLIB_SWQE_TYPE_FAST_REG_MR:
  1497. {
  1498. struct sq_fr_pmr *sqe = (struct sq_fr_pmr *)hw_sq_send_hdr;
  1499. sqe->wqe_type = wqe->type;
  1500. sqe->flags = wqe->flags;
  1501. sqe->access_cntl = wqe->frmr.access_cntl |
  1502. SQ_FR_PMR_ACCESS_CNTL_LOCAL_WRITE;
  1503. sqe->zero_based_page_size_log =
  1504. (wqe->frmr.pg_sz_log & SQ_FR_PMR_PAGE_SIZE_LOG_MASK) <<
  1505. SQ_FR_PMR_PAGE_SIZE_LOG_SFT |
  1506. (wqe->frmr.zero_based ? SQ_FR_PMR_ZERO_BASED : 0);
  1507. sqe->l_key = cpu_to_le32(wqe->frmr.l_key);
  1508. temp32 = cpu_to_le32(wqe->frmr.length);
  1509. memcpy(sqe->length, &temp32, sizeof(wqe->frmr.length));
  1510. sqe->numlevels_pbl_page_size_log =
  1511. ((wqe->frmr.pbl_pg_sz_log <<
  1512. SQ_FR_PMR_PBL_PAGE_SIZE_LOG_SFT) &
  1513. SQ_FR_PMR_PBL_PAGE_SIZE_LOG_MASK) |
  1514. ((wqe->frmr.levels << SQ_FR_PMR_NUMLEVELS_SFT) &
  1515. SQ_FR_PMR_NUMLEVELS_MASK);
  1516. for (i = 0; i < wqe->frmr.page_list_len; i++)
  1517. wqe->frmr.pbl_ptr[i] = cpu_to_le64(
  1518. wqe->frmr.page_list[i] |
  1519. PTU_PTE_VALID);
  1520. sqe->pblptr = cpu_to_le64(wqe->frmr.pbl_dma_ptr);
  1521. sqe->va = cpu_to_le64(wqe->frmr.va);
  1522. break;
  1523. }
  1524. case BNXT_QPLIB_SWQE_TYPE_BIND_MW:
  1525. {
  1526. struct sq_bind *sqe = (struct sq_bind *)hw_sq_send_hdr;
  1527. sqe->wqe_type = wqe->type;
  1528. sqe->flags = wqe->flags;
  1529. sqe->access_cntl = wqe->bind.access_cntl;
  1530. sqe->mw_type_zero_based = wqe->bind.mw_type |
  1531. (wqe->bind.zero_based ? SQ_BIND_ZERO_BASED : 0);
  1532. sqe->parent_l_key = cpu_to_le32(wqe->bind.parent_l_key);
  1533. sqe->l_key = cpu_to_le32(wqe->bind.r_key);
  1534. sqe->va = cpu_to_le64(wqe->bind.va);
  1535. temp32 = cpu_to_le32(wqe->bind.length);
  1536. memcpy(&sqe->length, &temp32, sizeof(wqe->bind.length));
  1537. break;
  1538. }
  1539. default:
  1540. /* Bad wqe, return error */
  1541. rc = -EINVAL;
  1542. goto done;
  1543. }
  1544. swq->next_psn = sq->psn & BTH_PSN_MASK;
  1545. if (swq->psn_search) {
  1546. swq->psn_search->opcode_start_psn = cpu_to_le32(
  1547. ((swq->start_psn << SQ_PSN_SEARCH_START_PSN_SFT) &
  1548. SQ_PSN_SEARCH_START_PSN_MASK) |
  1549. ((wqe->type << SQ_PSN_SEARCH_OPCODE_SFT) &
  1550. SQ_PSN_SEARCH_OPCODE_MASK));
  1551. swq->psn_search->flags_next_psn = cpu_to_le32(
  1552. ((swq->next_psn << SQ_PSN_SEARCH_NEXT_PSN_SFT) &
  1553. SQ_PSN_SEARCH_NEXT_PSN_MASK));
  1554. }
  1555. queue_err:
  1556. if (sch_handler) {
  1557. /* Store the ULP info in the software structures */
  1558. sw_prod = HWQ_CMP(sq->hwq.prod, &sq->hwq);
  1559. swq = &sq->swq[sw_prod];
  1560. swq->wr_id = wqe->wr_id;
  1561. swq->type = wqe->type;
  1562. swq->flags = wqe->flags;
  1563. if (qp->sig_type)
  1564. swq->flags |= SQ_SEND_FLAGS_SIGNAL_COMP;
  1565. swq->start_psn = sq->psn & BTH_PSN_MASK;
  1566. }
  1567. sq->hwq.prod++;
  1568. qp->wqe_cnt++;
  1569. done:
  1570. if (sch_handler) {
  1571. nq_work = kzalloc(sizeof(*nq_work), GFP_ATOMIC);
  1572. if (nq_work) {
  1573. nq_work->cq = qp->scq;
  1574. nq_work->nq = qp->scq->nq;
  1575. INIT_WORK(&nq_work->work, bnxt_qpn_cqn_sched_task);
  1576. queue_work(qp->scq->nq->cqn_wq, &nq_work->work);
  1577. } else {
  1578. dev_err(&sq->hwq.pdev->dev,
  1579. "QPLIB: FP: Failed to allocate SQ nq_work!");
  1580. rc = -ENOMEM;
  1581. }
  1582. }
  1583. return rc;
  1584. }
  1585. void bnxt_qplib_post_recv_db(struct bnxt_qplib_qp *qp)
  1586. {
  1587. struct bnxt_qplib_q *rq = &qp->rq;
  1588. struct dbr_dbr db_msg = { 0 };
  1589. u32 sw_prod;
  1590. sw_prod = HWQ_CMP(rq->hwq.prod, &rq->hwq);
  1591. db_msg.index = cpu_to_le32((sw_prod << DBR_DBR_INDEX_SFT) &
  1592. DBR_DBR_INDEX_MASK);
  1593. db_msg.type_xid =
  1594. cpu_to_le32(((qp->id << DBR_DBR_XID_SFT) & DBR_DBR_XID_MASK) |
  1595. DBR_DBR_TYPE_RQ);
  1596. /* Flush the writes to HW Rx WQE before the ringing Rx DB */
  1597. wmb();
  1598. __iowrite64_copy(qp->dpi->dbr, &db_msg, sizeof(db_msg) / sizeof(u64));
  1599. }
  1600. int bnxt_qplib_post_recv(struct bnxt_qplib_qp *qp,
  1601. struct bnxt_qplib_swqe *wqe)
  1602. {
  1603. struct bnxt_qplib_q *rq = &qp->rq;
  1604. struct rq_wqe *rqe, **rqe_ptr;
  1605. struct sq_sge *hw_sge;
  1606. struct bnxt_qplib_nq_work *nq_work = NULL;
  1607. bool sch_handler = false;
  1608. u32 sw_prod;
  1609. int i, rc = 0;
  1610. if (qp->state == CMDQ_MODIFY_QP_NEW_STATE_ERR) {
  1611. sch_handler = true;
  1612. dev_dbg(&rq->hwq.pdev->dev,
  1613. "%s Error QP. Scheduling for poll_cq\n",
  1614. __func__);
  1615. goto queue_err;
  1616. }
  1617. if (bnxt_qplib_queue_full(rq)) {
  1618. dev_err(&rq->hwq.pdev->dev,
  1619. "QPLIB: FP: QP (0x%x) RQ is full!", qp->id);
  1620. rc = -EINVAL;
  1621. goto done;
  1622. }
  1623. sw_prod = HWQ_CMP(rq->hwq.prod, &rq->hwq);
  1624. rq->swq[sw_prod].wr_id = wqe->wr_id;
  1625. rqe_ptr = (struct rq_wqe **)rq->hwq.pbl_ptr;
  1626. rqe = &rqe_ptr[RQE_PG(sw_prod)][RQE_IDX(sw_prod)];
  1627. memset(rqe, 0, BNXT_QPLIB_MAX_RQE_ENTRY_SIZE);
  1628. /* Calculate wqe_size16 and data_len */
  1629. for (i = 0, hw_sge = (struct sq_sge *)rqe->data;
  1630. i < wqe->num_sge; i++, hw_sge++) {
  1631. hw_sge->va_or_pa = cpu_to_le64(wqe->sg_list[i].addr);
  1632. hw_sge->l_key = cpu_to_le32(wqe->sg_list[i].lkey);
  1633. hw_sge->size = cpu_to_le32(wqe->sg_list[i].size);
  1634. }
  1635. rqe->wqe_type = wqe->type;
  1636. rqe->flags = wqe->flags;
  1637. rqe->wqe_size = wqe->num_sge +
  1638. ((offsetof(typeof(*rqe), data) + 15) >> 4);
  1639. /* HW requires wqe size has room for atleast one SGE even if none
  1640. * was supplied by ULP
  1641. */
  1642. if (!wqe->num_sge)
  1643. rqe->wqe_size++;
  1644. /* Supply the rqe->wr_id index to the wr_id_tbl for now */
  1645. rqe->wr_id[0] = cpu_to_le32(sw_prod);
  1646. queue_err:
  1647. if (sch_handler) {
  1648. /* Store the ULP info in the software structures */
  1649. sw_prod = HWQ_CMP(rq->hwq.prod, &rq->hwq);
  1650. rq->swq[sw_prod].wr_id = wqe->wr_id;
  1651. }
  1652. rq->hwq.prod++;
  1653. if (sch_handler) {
  1654. nq_work = kzalloc(sizeof(*nq_work), GFP_ATOMIC);
  1655. if (nq_work) {
  1656. nq_work->cq = qp->rcq;
  1657. nq_work->nq = qp->rcq->nq;
  1658. INIT_WORK(&nq_work->work, bnxt_qpn_cqn_sched_task);
  1659. queue_work(qp->rcq->nq->cqn_wq, &nq_work->work);
  1660. } else {
  1661. dev_err(&rq->hwq.pdev->dev,
  1662. "QPLIB: FP: Failed to allocate RQ nq_work!");
  1663. rc = -ENOMEM;
  1664. }
  1665. }
  1666. done:
  1667. return rc;
  1668. }
  1669. /* CQ */
  1670. /* Spinlock must be held */
  1671. static void bnxt_qplib_arm_cq_enable(struct bnxt_qplib_cq *cq)
  1672. {
  1673. struct dbr_dbr db_msg = { 0 };
  1674. db_msg.type_xid =
  1675. cpu_to_le32(((cq->id << DBR_DBR_XID_SFT) & DBR_DBR_XID_MASK) |
  1676. DBR_DBR_TYPE_CQ_ARMENA);
  1677. /* Flush memory writes before enabling the CQ */
  1678. wmb();
  1679. __iowrite64_copy(cq->dbr_base, &db_msg, sizeof(db_msg) / sizeof(u64));
  1680. }
  1681. static void bnxt_qplib_arm_cq(struct bnxt_qplib_cq *cq, u32 arm_type)
  1682. {
  1683. struct bnxt_qplib_hwq *cq_hwq = &cq->hwq;
  1684. struct dbr_dbr db_msg = { 0 };
  1685. u32 sw_cons;
  1686. /* Ring DB */
  1687. sw_cons = HWQ_CMP(cq_hwq->cons, cq_hwq);
  1688. db_msg.index = cpu_to_le32((sw_cons << DBR_DBR_INDEX_SFT) &
  1689. DBR_DBR_INDEX_MASK);
  1690. db_msg.type_xid =
  1691. cpu_to_le32(((cq->id << DBR_DBR_XID_SFT) & DBR_DBR_XID_MASK) |
  1692. arm_type);
  1693. /* flush memory writes before arming the CQ */
  1694. wmb();
  1695. __iowrite64_copy(cq->dpi->dbr, &db_msg, sizeof(db_msg) / sizeof(u64));
  1696. }
  1697. int bnxt_qplib_create_cq(struct bnxt_qplib_res *res, struct bnxt_qplib_cq *cq)
  1698. {
  1699. struct bnxt_qplib_rcfw *rcfw = res->rcfw;
  1700. struct cmdq_create_cq req;
  1701. struct creq_create_cq_resp resp;
  1702. struct bnxt_qplib_pbl *pbl;
  1703. u16 cmd_flags = 0;
  1704. int rc;
  1705. cq->hwq.max_elements = cq->max_wqe;
  1706. rc = bnxt_qplib_alloc_init_hwq(res->pdev, &cq->hwq, cq->sghead,
  1707. cq->nmap, &cq->hwq.max_elements,
  1708. BNXT_QPLIB_MAX_CQE_ENTRY_SIZE, 0,
  1709. PAGE_SIZE, HWQ_TYPE_QUEUE);
  1710. if (rc)
  1711. goto exit;
  1712. RCFW_CMD_PREP(req, CREATE_CQ, cmd_flags);
  1713. if (!cq->dpi) {
  1714. dev_err(&rcfw->pdev->dev,
  1715. "QPLIB: FP: CREATE_CQ failed due to NULL DPI");
  1716. return -EINVAL;
  1717. }
  1718. req.dpi = cpu_to_le32(cq->dpi->dpi);
  1719. req.cq_handle = cpu_to_le64(cq->cq_handle);
  1720. req.cq_size = cpu_to_le32(cq->hwq.max_elements);
  1721. pbl = &cq->hwq.pbl[PBL_LVL_0];
  1722. req.pg_size_lvl = cpu_to_le32(
  1723. ((cq->hwq.level & CMDQ_CREATE_CQ_LVL_MASK) <<
  1724. CMDQ_CREATE_CQ_LVL_SFT) |
  1725. (pbl->pg_size == ROCE_PG_SIZE_4K ? CMDQ_CREATE_CQ_PG_SIZE_PG_4K :
  1726. pbl->pg_size == ROCE_PG_SIZE_8K ? CMDQ_CREATE_CQ_PG_SIZE_PG_8K :
  1727. pbl->pg_size == ROCE_PG_SIZE_64K ? CMDQ_CREATE_CQ_PG_SIZE_PG_64K :
  1728. pbl->pg_size == ROCE_PG_SIZE_2M ? CMDQ_CREATE_CQ_PG_SIZE_PG_2M :
  1729. pbl->pg_size == ROCE_PG_SIZE_8M ? CMDQ_CREATE_CQ_PG_SIZE_PG_8M :
  1730. pbl->pg_size == ROCE_PG_SIZE_1G ? CMDQ_CREATE_CQ_PG_SIZE_PG_1G :
  1731. CMDQ_CREATE_CQ_PG_SIZE_PG_4K));
  1732. req.pbl = cpu_to_le64(pbl->pg_map_arr[0]);
  1733. req.cq_fco_cnq_id = cpu_to_le32(
  1734. (cq->cnq_hw_ring_id & CMDQ_CREATE_CQ_CNQ_ID_MASK) <<
  1735. CMDQ_CREATE_CQ_CNQ_ID_SFT);
  1736. rc = bnxt_qplib_rcfw_send_message(rcfw, (void *)&req,
  1737. (void *)&resp, NULL, 0);
  1738. if (rc)
  1739. goto fail;
  1740. cq->id = le32_to_cpu(resp.xid);
  1741. cq->dbr_base = res->dpi_tbl.dbr_bar_reg_iomem;
  1742. cq->period = BNXT_QPLIB_QUEUE_START_PERIOD;
  1743. init_waitqueue_head(&cq->waitq);
  1744. INIT_LIST_HEAD(&cq->sqf_head);
  1745. INIT_LIST_HEAD(&cq->rqf_head);
  1746. spin_lock_init(&cq->compl_lock);
  1747. bnxt_qplib_arm_cq_enable(cq);
  1748. return 0;
  1749. fail:
  1750. bnxt_qplib_free_hwq(res->pdev, &cq->hwq);
  1751. exit:
  1752. return rc;
  1753. }
  1754. int bnxt_qplib_destroy_cq(struct bnxt_qplib_res *res, struct bnxt_qplib_cq *cq)
  1755. {
  1756. struct bnxt_qplib_rcfw *rcfw = res->rcfw;
  1757. struct cmdq_destroy_cq req;
  1758. struct creq_destroy_cq_resp resp;
  1759. u16 cmd_flags = 0;
  1760. int rc;
  1761. RCFW_CMD_PREP(req, DESTROY_CQ, cmd_flags);
  1762. req.cq_cid = cpu_to_le32(cq->id);
  1763. rc = bnxt_qplib_rcfw_send_message(rcfw, (void *)&req,
  1764. (void *)&resp, NULL, 0);
  1765. if (rc)
  1766. return rc;
  1767. bnxt_qplib_free_hwq(res->pdev, &cq->hwq);
  1768. return 0;
  1769. }
  1770. static int __flush_sq(struct bnxt_qplib_q *sq, struct bnxt_qplib_qp *qp,
  1771. struct bnxt_qplib_cqe **pcqe, int *budget)
  1772. {
  1773. u32 sw_prod, sw_cons;
  1774. struct bnxt_qplib_cqe *cqe;
  1775. int rc = 0;
  1776. /* Now complete all outstanding SQEs with FLUSHED_ERR */
  1777. sw_prod = HWQ_CMP(sq->hwq.prod, &sq->hwq);
  1778. cqe = *pcqe;
  1779. while (*budget) {
  1780. sw_cons = HWQ_CMP(sq->hwq.cons, &sq->hwq);
  1781. if (sw_cons == sw_prod) {
  1782. break;
  1783. }
  1784. /* Skip the FENCE WQE completions */
  1785. if (sq->swq[sw_cons].wr_id == BNXT_QPLIB_FENCE_WRID) {
  1786. bnxt_qplib_cancel_phantom_processing(qp);
  1787. goto skip_compl;
  1788. }
  1789. memset(cqe, 0, sizeof(*cqe));
  1790. cqe->status = CQ_REQ_STATUS_WORK_REQUEST_FLUSHED_ERR;
  1791. cqe->opcode = CQ_BASE_CQE_TYPE_REQ;
  1792. cqe->qp_handle = (u64)(unsigned long)qp;
  1793. cqe->wr_id = sq->swq[sw_cons].wr_id;
  1794. cqe->src_qp = qp->id;
  1795. cqe->type = sq->swq[sw_cons].type;
  1796. cqe++;
  1797. (*budget)--;
  1798. skip_compl:
  1799. sq->hwq.cons++;
  1800. }
  1801. *pcqe = cqe;
  1802. if (!(*budget) && HWQ_CMP(sq->hwq.cons, &sq->hwq) != sw_prod)
  1803. /* Out of budget */
  1804. rc = -EAGAIN;
  1805. return rc;
  1806. }
  1807. static int __flush_rq(struct bnxt_qplib_q *rq, struct bnxt_qplib_qp *qp,
  1808. struct bnxt_qplib_cqe **pcqe, int *budget)
  1809. {
  1810. struct bnxt_qplib_cqe *cqe;
  1811. u32 sw_prod, sw_cons;
  1812. int rc = 0;
  1813. int opcode = 0;
  1814. switch (qp->type) {
  1815. case CMDQ_CREATE_QP1_TYPE_GSI:
  1816. opcode = CQ_BASE_CQE_TYPE_RES_RAWETH_QP1;
  1817. break;
  1818. case CMDQ_CREATE_QP_TYPE_RC:
  1819. opcode = CQ_BASE_CQE_TYPE_RES_RC;
  1820. break;
  1821. case CMDQ_CREATE_QP_TYPE_UD:
  1822. opcode = CQ_BASE_CQE_TYPE_RES_UD;
  1823. break;
  1824. }
  1825. /* Flush the rest of the RQ */
  1826. sw_prod = HWQ_CMP(rq->hwq.prod, &rq->hwq);
  1827. cqe = *pcqe;
  1828. while (*budget) {
  1829. sw_cons = HWQ_CMP(rq->hwq.cons, &rq->hwq);
  1830. if (sw_cons == sw_prod)
  1831. break;
  1832. memset(cqe, 0, sizeof(*cqe));
  1833. cqe->status =
  1834. CQ_RES_RC_STATUS_WORK_REQUEST_FLUSHED_ERR;
  1835. cqe->opcode = opcode;
  1836. cqe->qp_handle = (unsigned long)qp;
  1837. cqe->wr_id = rq->swq[sw_cons].wr_id;
  1838. cqe++;
  1839. (*budget)--;
  1840. rq->hwq.cons++;
  1841. }
  1842. *pcqe = cqe;
  1843. if (!*budget && HWQ_CMP(rq->hwq.cons, &rq->hwq) != sw_prod)
  1844. /* Out of budget */
  1845. rc = -EAGAIN;
  1846. return rc;
  1847. }
  1848. void bnxt_qplib_mark_qp_error(void *qp_handle)
  1849. {
  1850. struct bnxt_qplib_qp *qp = qp_handle;
  1851. if (!qp)
  1852. return;
  1853. /* Must block new posting of SQ and RQ */
  1854. qp->state = CMDQ_MODIFY_QP_NEW_STATE_ERR;
  1855. bnxt_qplib_cancel_phantom_processing(qp);
  1856. }
  1857. /* Note: SQE is valid from sw_sq_cons up to cqe_sq_cons (exclusive)
  1858. * CQE is track from sw_cq_cons to max_element but valid only if VALID=1
  1859. */
  1860. static int do_wa9060(struct bnxt_qplib_qp *qp, struct bnxt_qplib_cq *cq,
  1861. u32 cq_cons, u32 sw_sq_cons, u32 cqe_sq_cons)
  1862. {
  1863. struct bnxt_qplib_q *sq = &qp->sq;
  1864. struct bnxt_qplib_swq *swq;
  1865. u32 peek_sw_cq_cons, peek_raw_cq_cons, peek_sq_cons_idx;
  1866. struct cq_base *peek_hwcqe, **peek_hw_cqe_ptr;
  1867. struct cq_req *peek_req_hwcqe;
  1868. struct bnxt_qplib_qp *peek_qp;
  1869. struct bnxt_qplib_q *peek_sq;
  1870. int i, rc = 0;
  1871. /* Normal mode */
  1872. /* Check for the psn_search marking before completing */
  1873. swq = &sq->swq[sw_sq_cons];
  1874. if (swq->psn_search &&
  1875. le32_to_cpu(swq->psn_search->flags_next_psn) & 0x80000000) {
  1876. /* Unmark */
  1877. swq->psn_search->flags_next_psn = cpu_to_le32
  1878. (le32_to_cpu(swq->psn_search->flags_next_psn)
  1879. & ~0x80000000);
  1880. dev_dbg(&cq->hwq.pdev->dev,
  1881. "FP: Process Req cq_cons=0x%x qp=0x%x sq cons sw=0x%x cqe=0x%x marked!\n",
  1882. cq_cons, qp->id, sw_sq_cons, cqe_sq_cons);
  1883. sq->condition = true;
  1884. sq->send_phantom = true;
  1885. /* TODO: Only ARM if the previous SQE is ARMALL */
  1886. bnxt_qplib_arm_cq(cq, DBR_DBR_TYPE_CQ_ARMALL);
  1887. rc = -EAGAIN;
  1888. goto out;
  1889. }
  1890. if (sq->condition) {
  1891. /* Peek at the completions */
  1892. peek_raw_cq_cons = cq->hwq.cons;
  1893. peek_sw_cq_cons = cq_cons;
  1894. i = cq->hwq.max_elements;
  1895. while (i--) {
  1896. peek_sw_cq_cons = HWQ_CMP((peek_sw_cq_cons), &cq->hwq);
  1897. peek_hw_cqe_ptr = (struct cq_base **)cq->hwq.pbl_ptr;
  1898. peek_hwcqe = &peek_hw_cqe_ptr[CQE_PG(peek_sw_cq_cons)]
  1899. [CQE_IDX(peek_sw_cq_cons)];
  1900. /* If the next hwcqe is VALID */
  1901. if (CQE_CMP_VALID(peek_hwcqe, peek_raw_cq_cons,
  1902. cq->hwq.max_elements)) {
  1903. /*
  1904. * The valid test of the entry must be done first before
  1905. * reading any further.
  1906. */
  1907. dma_rmb();
  1908. /* If the next hwcqe is a REQ */
  1909. if ((peek_hwcqe->cqe_type_toggle &
  1910. CQ_BASE_CQE_TYPE_MASK) ==
  1911. CQ_BASE_CQE_TYPE_REQ) {
  1912. peek_req_hwcqe = (struct cq_req *)
  1913. peek_hwcqe;
  1914. peek_qp = (struct bnxt_qplib_qp *)
  1915. ((unsigned long)
  1916. le64_to_cpu
  1917. (peek_req_hwcqe->qp_handle));
  1918. peek_sq = &peek_qp->sq;
  1919. peek_sq_cons_idx = HWQ_CMP(le16_to_cpu(
  1920. peek_req_hwcqe->sq_cons_idx) - 1
  1921. , &sq->hwq);
  1922. /* If the hwcqe's sq's wr_id matches */
  1923. if (peek_sq == sq &&
  1924. sq->swq[peek_sq_cons_idx].wr_id ==
  1925. BNXT_QPLIB_FENCE_WRID) {
  1926. /*
  1927. * Unbreak only if the phantom
  1928. * comes back
  1929. */
  1930. dev_dbg(&cq->hwq.pdev->dev,
  1931. "FP:Got Phantom CQE");
  1932. sq->condition = false;
  1933. sq->single = true;
  1934. rc = 0;
  1935. goto out;
  1936. }
  1937. }
  1938. /* Valid but not the phantom, so keep looping */
  1939. } else {
  1940. /* Not valid yet, just exit and wait */
  1941. rc = -EINVAL;
  1942. goto out;
  1943. }
  1944. peek_sw_cq_cons++;
  1945. peek_raw_cq_cons++;
  1946. }
  1947. dev_err(&cq->hwq.pdev->dev,
  1948. "Should not have come here! cq_cons=0x%x qp=0x%x sq cons sw=0x%x hw=0x%x",
  1949. cq_cons, qp->id, sw_sq_cons, cqe_sq_cons);
  1950. rc = -EINVAL;
  1951. }
  1952. out:
  1953. return rc;
  1954. }
  1955. static int bnxt_qplib_cq_process_req(struct bnxt_qplib_cq *cq,
  1956. struct cq_req *hwcqe,
  1957. struct bnxt_qplib_cqe **pcqe, int *budget,
  1958. u32 cq_cons, struct bnxt_qplib_qp **lib_qp)
  1959. {
  1960. struct bnxt_qplib_qp *qp;
  1961. struct bnxt_qplib_q *sq;
  1962. struct bnxt_qplib_cqe *cqe;
  1963. u32 sw_sq_cons, cqe_sq_cons;
  1964. struct bnxt_qplib_swq *swq;
  1965. int rc = 0;
  1966. qp = (struct bnxt_qplib_qp *)((unsigned long)
  1967. le64_to_cpu(hwcqe->qp_handle));
  1968. if (!qp) {
  1969. dev_err(&cq->hwq.pdev->dev,
  1970. "QPLIB: FP: Process Req qp is NULL");
  1971. return -EINVAL;
  1972. }
  1973. sq = &qp->sq;
  1974. cqe_sq_cons = HWQ_CMP(le16_to_cpu(hwcqe->sq_cons_idx), &sq->hwq);
  1975. if (cqe_sq_cons > sq->hwq.max_elements) {
  1976. dev_err(&cq->hwq.pdev->dev,
  1977. "QPLIB: FP: CQ Process req reported ");
  1978. dev_err(&cq->hwq.pdev->dev,
  1979. "QPLIB: sq_cons_idx 0x%x which exceeded max 0x%x",
  1980. cqe_sq_cons, sq->hwq.max_elements);
  1981. return -EINVAL;
  1982. }
  1983. if (qp->sq.flushed) {
  1984. dev_dbg(&cq->hwq.pdev->dev,
  1985. "%s: QPLIB: QP in Flush QP = %p\n", __func__, qp);
  1986. goto done;
  1987. }
  1988. /* Require to walk the sq's swq to fabricate CQEs for all previously
  1989. * signaled SWQEs due to CQE aggregation from the current sq cons
  1990. * to the cqe_sq_cons
  1991. */
  1992. cqe = *pcqe;
  1993. while (*budget) {
  1994. sw_sq_cons = HWQ_CMP(sq->hwq.cons, &sq->hwq);
  1995. if (sw_sq_cons == cqe_sq_cons)
  1996. /* Done */
  1997. break;
  1998. swq = &sq->swq[sw_sq_cons];
  1999. memset(cqe, 0, sizeof(*cqe));
  2000. cqe->opcode = CQ_BASE_CQE_TYPE_REQ;
  2001. cqe->qp_handle = (u64)(unsigned long)qp;
  2002. cqe->src_qp = qp->id;
  2003. cqe->wr_id = swq->wr_id;
  2004. if (cqe->wr_id == BNXT_QPLIB_FENCE_WRID)
  2005. goto skip;
  2006. cqe->type = swq->type;
  2007. /* For the last CQE, check for status. For errors, regardless
  2008. * of the request being signaled or not, it must complete with
  2009. * the hwcqe error status
  2010. */
  2011. if (HWQ_CMP((sw_sq_cons + 1), &sq->hwq) == cqe_sq_cons &&
  2012. hwcqe->status != CQ_REQ_STATUS_OK) {
  2013. cqe->status = hwcqe->status;
  2014. dev_err(&cq->hwq.pdev->dev,
  2015. "QPLIB: FP: CQ Processed Req ");
  2016. dev_err(&cq->hwq.pdev->dev,
  2017. "QPLIB: wr_id[%d] = 0x%llx with status 0x%x",
  2018. sw_sq_cons, cqe->wr_id, cqe->status);
  2019. cqe++;
  2020. (*budget)--;
  2021. bnxt_qplib_mark_qp_error(qp);
  2022. /* Add qp to flush list of the CQ */
  2023. bnxt_qplib_add_flush_qp(qp);
  2024. } else {
  2025. if (swq->flags & SQ_SEND_FLAGS_SIGNAL_COMP) {
  2026. /* Before we complete, do WA 9060 */
  2027. if (do_wa9060(qp, cq, cq_cons, sw_sq_cons,
  2028. cqe_sq_cons)) {
  2029. *lib_qp = qp;
  2030. goto out;
  2031. }
  2032. cqe->status = CQ_REQ_STATUS_OK;
  2033. cqe++;
  2034. (*budget)--;
  2035. }
  2036. }
  2037. skip:
  2038. sq->hwq.cons++;
  2039. if (sq->single)
  2040. break;
  2041. }
  2042. out:
  2043. *pcqe = cqe;
  2044. if (HWQ_CMP(sq->hwq.cons, &sq->hwq) != cqe_sq_cons) {
  2045. /* Out of budget */
  2046. rc = -EAGAIN;
  2047. goto done;
  2048. }
  2049. /*
  2050. * Back to normal completion mode only after it has completed all of
  2051. * the WC for this CQE
  2052. */
  2053. sq->single = false;
  2054. done:
  2055. return rc;
  2056. }
  2057. static void bnxt_qplib_release_srqe(struct bnxt_qplib_srq *srq, u32 tag)
  2058. {
  2059. spin_lock(&srq->hwq.lock);
  2060. srq->swq[srq->last_idx].next_idx = (int)tag;
  2061. srq->last_idx = (int)tag;
  2062. srq->swq[srq->last_idx].next_idx = -1;
  2063. srq->hwq.cons++; /* Support for SRQE counter */
  2064. spin_unlock(&srq->hwq.lock);
  2065. }
  2066. static int bnxt_qplib_cq_process_res_rc(struct bnxt_qplib_cq *cq,
  2067. struct cq_res_rc *hwcqe,
  2068. struct bnxt_qplib_cqe **pcqe,
  2069. int *budget)
  2070. {
  2071. struct bnxt_qplib_qp *qp;
  2072. struct bnxt_qplib_q *rq;
  2073. struct bnxt_qplib_srq *srq;
  2074. struct bnxt_qplib_cqe *cqe;
  2075. u32 wr_id_idx;
  2076. int rc = 0;
  2077. qp = (struct bnxt_qplib_qp *)((unsigned long)
  2078. le64_to_cpu(hwcqe->qp_handle));
  2079. if (!qp) {
  2080. dev_err(&cq->hwq.pdev->dev, "QPLIB: process_cq RC qp is NULL");
  2081. return -EINVAL;
  2082. }
  2083. if (qp->rq.flushed) {
  2084. dev_dbg(&cq->hwq.pdev->dev,
  2085. "%s: QPLIB: QP in Flush QP = %p\n", __func__, qp);
  2086. goto done;
  2087. }
  2088. cqe = *pcqe;
  2089. cqe->opcode = hwcqe->cqe_type_toggle & CQ_BASE_CQE_TYPE_MASK;
  2090. cqe->length = le32_to_cpu(hwcqe->length);
  2091. cqe->invrkey = le32_to_cpu(hwcqe->imm_data_or_inv_r_key);
  2092. cqe->mr_handle = le64_to_cpu(hwcqe->mr_handle);
  2093. cqe->flags = le16_to_cpu(hwcqe->flags);
  2094. cqe->status = hwcqe->status;
  2095. cqe->qp_handle = (u64)(unsigned long)qp;
  2096. wr_id_idx = le32_to_cpu(hwcqe->srq_or_rq_wr_id) &
  2097. CQ_RES_RC_SRQ_OR_RQ_WR_ID_MASK;
  2098. if (cqe->flags & CQ_RES_RC_FLAGS_SRQ_SRQ) {
  2099. srq = qp->srq;
  2100. if (!srq)
  2101. return -EINVAL;
  2102. if (wr_id_idx >= srq->hwq.max_elements) {
  2103. dev_err(&cq->hwq.pdev->dev,
  2104. "QPLIB: FP: CQ Process RC ");
  2105. dev_err(&cq->hwq.pdev->dev,
  2106. "QPLIB: wr_id idx 0x%x exceeded SRQ max 0x%x",
  2107. wr_id_idx, srq->hwq.max_elements);
  2108. return -EINVAL;
  2109. }
  2110. cqe->wr_id = srq->swq[wr_id_idx].wr_id;
  2111. bnxt_qplib_release_srqe(srq, wr_id_idx);
  2112. cqe++;
  2113. (*budget)--;
  2114. *pcqe = cqe;
  2115. } else {
  2116. rq = &qp->rq;
  2117. if (wr_id_idx >= rq->hwq.max_elements) {
  2118. dev_err(&cq->hwq.pdev->dev,
  2119. "QPLIB: FP: CQ Process RC ");
  2120. dev_err(&cq->hwq.pdev->dev,
  2121. "QPLIB: wr_id idx 0x%x exceeded RQ max 0x%x",
  2122. wr_id_idx, rq->hwq.max_elements);
  2123. return -EINVAL;
  2124. }
  2125. cqe->wr_id = rq->swq[wr_id_idx].wr_id;
  2126. cqe++;
  2127. (*budget)--;
  2128. rq->hwq.cons++;
  2129. *pcqe = cqe;
  2130. if (hwcqe->status != CQ_RES_RC_STATUS_OK) {
  2131. qp->state = CMDQ_MODIFY_QP_NEW_STATE_ERR;
  2132. /* Add qp to flush list of the CQ */
  2133. bnxt_qplib_add_flush_qp(qp);
  2134. }
  2135. }
  2136. done:
  2137. return rc;
  2138. }
  2139. static int bnxt_qplib_cq_process_res_ud(struct bnxt_qplib_cq *cq,
  2140. struct cq_res_ud *hwcqe,
  2141. struct bnxt_qplib_cqe **pcqe,
  2142. int *budget)
  2143. {
  2144. struct bnxt_qplib_qp *qp;
  2145. struct bnxt_qplib_q *rq;
  2146. struct bnxt_qplib_srq *srq;
  2147. struct bnxt_qplib_cqe *cqe;
  2148. u32 wr_id_idx;
  2149. int rc = 0;
  2150. qp = (struct bnxt_qplib_qp *)((unsigned long)
  2151. le64_to_cpu(hwcqe->qp_handle));
  2152. if (!qp) {
  2153. dev_err(&cq->hwq.pdev->dev, "QPLIB: process_cq UD qp is NULL");
  2154. return -EINVAL;
  2155. }
  2156. if (qp->rq.flushed) {
  2157. dev_dbg(&cq->hwq.pdev->dev,
  2158. "%s: QPLIB: QP in Flush QP = %p\n", __func__, qp);
  2159. goto done;
  2160. }
  2161. cqe = *pcqe;
  2162. cqe->opcode = hwcqe->cqe_type_toggle & CQ_BASE_CQE_TYPE_MASK;
  2163. cqe->length = le32_to_cpu(hwcqe->length);
  2164. cqe->invrkey = le32_to_cpu(hwcqe->imm_data);
  2165. cqe->flags = le16_to_cpu(hwcqe->flags);
  2166. cqe->status = hwcqe->status;
  2167. cqe->qp_handle = (u64)(unsigned long)qp;
  2168. memcpy(cqe->smac, hwcqe->src_mac, 6);
  2169. wr_id_idx = le32_to_cpu(hwcqe->src_qp_high_srq_or_rq_wr_id)
  2170. & CQ_RES_UD_SRQ_OR_RQ_WR_ID_MASK;
  2171. cqe->src_qp = le16_to_cpu(hwcqe->src_qp_low) |
  2172. ((le32_to_cpu(
  2173. hwcqe->src_qp_high_srq_or_rq_wr_id) &
  2174. CQ_RES_UD_SRC_QP_HIGH_MASK) >> 8);
  2175. if (cqe->flags & CQ_RES_RC_FLAGS_SRQ_SRQ) {
  2176. srq = qp->srq;
  2177. if (!srq)
  2178. return -EINVAL;
  2179. if (wr_id_idx >= srq->hwq.max_elements) {
  2180. dev_err(&cq->hwq.pdev->dev,
  2181. "QPLIB: FP: CQ Process UD ");
  2182. dev_err(&cq->hwq.pdev->dev,
  2183. "QPLIB: wr_id idx 0x%x exceeded SRQ max 0x%x",
  2184. wr_id_idx, srq->hwq.max_elements);
  2185. return -EINVAL;
  2186. }
  2187. cqe->wr_id = srq->swq[wr_id_idx].wr_id;
  2188. bnxt_qplib_release_srqe(srq, wr_id_idx);
  2189. cqe++;
  2190. (*budget)--;
  2191. *pcqe = cqe;
  2192. } else {
  2193. rq = &qp->rq;
  2194. if (wr_id_idx >= rq->hwq.max_elements) {
  2195. dev_err(&cq->hwq.pdev->dev,
  2196. "QPLIB: FP: CQ Process UD ");
  2197. dev_err(&cq->hwq.pdev->dev,
  2198. "QPLIB: wr_id idx 0x%x exceeded RQ max 0x%x",
  2199. wr_id_idx, rq->hwq.max_elements);
  2200. return -EINVAL;
  2201. }
  2202. cqe->wr_id = rq->swq[wr_id_idx].wr_id;
  2203. cqe++;
  2204. (*budget)--;
  2205. rq->hwq.cons++;
  2206. *pcqe = cqe;
  2207. if (hwcqe->status != CQ_RES_RC_STATUS_OK) {
  2208. qp->state = CMDQ_MODIFY_QP_NEW_STATE_ERR;
  2209. /* Add qp to flush list of the CQ */
  2210. bnxt_qplib_add_flush_qp(qp);
  2211. }
  2212. }
  2213. done:
  2214. return rc;
  2215. }
  2216. bool bnxt_qplib_is_cq_empty(struct bnxt_qplib_cq *cq)
  2217. {
  2218. struct cq_base *hw_cqe, **hw_cqe_ptr;
  2219. u32 sw_cons, raw_cons;
  2220. bool rc = true;
  2221. raw_cons = cq->hwq.cons;
  2222. sw_cons = HWQ_CMP(raw_cons, &cq->hwq);
  2223. hw_cqe_ptr = (struct cq_base **)cq->hwq.pbl_ptr;
  2224. hw_cqe = &hw_cqe_ptr[CQE_PG(sw_cons)][CQE_IDX(sw_cons)];
  2225. /* Check for Valid bit. If the CQE is valid, return false */
  2226. rc = !CQE_CMP_VALID(hw_cqe, raw_cons, cq->hwq.max_elements);
  2227. return rc;
  2228. }
  2229. static int bnxt_qplib_cq_process_res_raweth_qp1(struct bnxt_qplib_cq *cq,
  2230. struct cq_res_raweth_qp1 *hwcqe,
  2231. struct bnxt_qplib_cqe **pcqe,
  2232. int *budget)
  2233. {
  2234. struct bnxt_qplib_qp *qp;
  2235. struct bnxt_qplib_q *rq;
  2236. struct bnxt_qplib_srq *srq;
  2237. struct bnxt_qplib_cqe *cqe;
  2238. u32 wr_id_idx;
  2239. int rc = 0;
  2240. qp = (struct bnxt_qplib_qp *)((unsigned long)
  2241. le64_to_cpu(hwcqe->qp_handle));
  2242. if (!qp) {
  2243. dev_err(&cq->hwq.pdev->dev,
  2244. "QPLIB: process_cq Raw/QP1 qp is NULL");
  2245. return -EINVAL;
  2246. }
  2247. if (qp->rq.flushed) {
  2248. dev_dbg(&cq->hwq.pdev->dev,
  2249. "%s: QPLIB: QP in Flush QP = %p\n", __func__, qp);
  2250. goto done;
  2251. }
  2252. cqe = *pcqe;
  2253. cqe->opcode = hwcqe->cqe_type_toggle & CQ_BASE_CQE_TYPE_MASK;
  2254. cqe->flags = le16_to_cpu(hwcqe->flags);
  2255. cqe->qp_handle = (u64)(unsigned long)qp;
  2256. wr_id_idx =
  2257. le32_to_cpu(hwcqe->raweth_qp1_payload_offset_srq_or_rq_wr_id)
  2258. & CQ_RES_RAWETH_QP1_SRQ_OR_RQ_WR_ID_MASK;
  2259. cqe->src_qp = qp->id;
  2260. if (qp->id == 1 && !cqe->length) {
  2261. /* Add workaround for the length misdetection */
  2262. cqe->length = 296;
  2263. } else {
  2264. cqe->length = le16_to_cpu(hwcqe->length);
  2265. }
  2266. cqe->pkey_index = qp->pkey_index;
  2267. memcpy(cqe->smac, qp->smac, 6);
  2268. cqe->raweth_qp1_flags = le16_to_cpu(hwcqe->raweth_qp1_flags);
  2269. cqe->raweth_qp1_flags2 = le32_to_cpu(hwcqe->raweth_qp1_flags2);
  2270. cqe->raweth_qp1_metadata = le32_to_cpu(hwcqe->raweth_qp1_metadata);
  2271. if (cqe->flags & CQ_RES_RAWETH_QP1_FLAGS_SRQ_SRQ) {
  2272. srq = qp->srq;
  2273. if (!srq) {
  2274. dev_err(&cq->hwq.pdev->dev,
  2275. "QPLIB: FP: SRQ used but not defined??");
  2276. return -EINVAL;
  2277. }
  2278. if (wr_id_idx >= srq->hwq.max_elements) {
  2279. dev_err(&cq->hwq.pdev->dev,
  2280. "QPLIB: FP: CQ Process Raw/QP1 ");
  2281. dev_err(&cq->hwq.pdev->dev,
  2282. "QPLIB: wr_id idx 0x%x exceeded SRQ max 0x%x",
  2283. wr_id_idx, srq->hwq.max_elements);
  2284. return -EINVAL;
  2285. }
  2286. cqe->wr_id = srq->swq[wr_id_idx].wr_id;
  2287. bnxt_qplib_release_srqe(srq, wr_id_idx);
  2288. cqe++;
  2289. (*budget)--;
  2290. *pcqe = cqe;
  2291. } else {
  2292. rq = &qp->rq;
  2293. if (wr_id_idx >= rq->hwq.max_elements) {
  2294. dev_err(&cq->hwq.pdev->dev,
  2295. "QPLIB: FP: CQ Process Raw/QP1 RQ wr_id ");
  2296. dev_err(&cq->hwq.pdev->dev,
  2297. "QPLIB: ix 0x%x exceeded RQ max 0x%x",
  2298. wr_id_idx, rq->hwq.max_elements);
  2299. return -EINVAL;
  2300. }
  2301. cqe->wr_id = rq->swq[wr_id_idx].wr_id;
  2302. cqe++;
  2303. (*budget)--;
  2304. rq->hwq.cons++;
  2305. *pcqe = cqe;
  2306. if (hwcqe->status != CQ_RES_RC_STATUS_OK) {
  2307. qp->state = CMDQ_MODIFY_QP_NEW_STATE_ERR;
  2308. /* Add qp to flush list of the CQ */
  2309. bnxt_qplib_add_flush_qp(qp);
  2310. }
  2311. }
  2312. done:
  2313. return rc;
  2314. }
  2315. static int bnxt_qplib_cq_process_terminal(struct bnxt_qplib_cq *cq,
  2316. struct cq_terminal *hwcqe,
  2317. struct bnxt_qplib_cqe **pcqe,
  2318. int *budget)
  2319. {
  2320. struct bnxt_qplib_qp *qp;
  2321. struct bnxt_qplib_q *sq, *rq;
  2322. struct bnxt_qplib_cqe *cqe;
  2323. u32 sw_cons = 0, cqe_cons;
  2324. int rc = 0;
  2325. /* Check the Status */
  2326. if (hwcqe->status != CQ_TERMINAL_STATUS_OK)
  2327. dev_warn(&cq->hwq.pdev->dev,
  2328. "QPLIB: FP: CQ Process Terminal Error status = 0x%x",
  2329. hwcqe->status);
  2330. qp = (struct bnxt_qplib_qp *)((unsigned long)
  2331. le64_to_cpu(hwcqe->qp_handle));
  2332. if (!qp) {
  2333. dev_err(&cq->hwq.pdev->dev,
  2334. "QPLIB: FP: CQ Process terminal qp is NULL");
  2335. return -EINVAL;
  2336. }
  2337. /* Must block new posting of SQ and RQ */
  2338. qp->state = CMDQ_MODIFY_QP_NEW_STATE_ERR;
  2339. sq = &qp->sq;
  2340. rq = &qp->rq;
  2341. cqe_cons = le16_to_cpu(hwcqe->sq_cons_idx);
  2342. if (cqe_cons == 0xFFFF)
  2343. goto do_rq;
  2344. if (cqe_cons > sq->hwq.max_elements) {
  2345. dev_err(&cq->hwq.pdev->dev,
  2346. "QPLIB: FP: CQ Process terminal reported ");
  2347. dev_err(&cq->hwq.pdev->dev,
  2348. "QPLIB: sq_cons_idx 0x%x which exceeded max 0x%x",
  2349. cqe_cons, sq->hwq.max_elements);
  2350. goto do_rq;
  2351. }
  2352. if (qp->sq.flushed) {
  2353. dev_dbg(&cq->hwq.pdev->dev,
  2354. "%s: QPLIB: QP in Flush QP = %p\n", __func__, qp);
  2355. goto sq_done;
  2356. }
  2357. /* Terminal CQE can also include aggregated successful CQEs prior.
  2358. * So we must complete all CQEs from the current sq's cons to the
  2359. * cq_cons with status OK
  2360. */
  2361. cqe = *pcqe;
  2362. while (*budget) {
  2363. sw_cons = HWQ_CMP(sq->hwq.cons, &sq->hwq);
  2364. if (sw_cons == cqe_cons)
  2365. break;
  2366. if (sq->swq[sw_cons].flags & SQ_SEND_FLAGS_SIGNAL_COMP) {
  2367. memset(cqe, 0, sizeof(*cqe));
  2368. cqe->status = CQ_REQ_STATUS_OK;
  2369. cqe->opcode = CQ_BASE_CQE_TYPE_REQ;
  2370. cqe->qp_handle = (u64)(unsigned long)qp;
  2371. cqe->src_qp = qp->id;
  2372. cqe->wr_id = sq->swq[sw_cons].wr_id;
  2373. cqe->type = sq->swq[sw_cons].type;
  2374. cqe++;
  2375. (*budget)--;
  2376. }
  2377. sq->hwq.cons++;
  2378. }
  2379. *pcqe = cqe;
  2380. if (!(*budget) && sw_cons != cqe_cons) {
  2381. /* Out of budget */
  2382. rc = -EAGAIN;
  2383. goto sq_done;
  2384. }
  2385. sq_done:
  2386. if (rc)
  2387. return rc;
  2388. do_rq:
  2389. cqe_cons = le16_to_cpu(hwcqe->rq_cons_idx);
  2390. if (cqe_cons == 0xFFFF) {
  2391. goto done;
  2392. } else if (cqe_cons > rq->hwq.max_elements) {
  2393. dev_err(&cq->hwq.pdev->dev,
  2394. "QPLIB: FP: CQ Processed terminal ");
  2395. dev_err(&cq->hwq.pdev->dev,
  2396. "QPLIB: reported rq_cons_idx 0x%x exceeds max 0x%x",
  2397. cqe_cons, rq->hwq.max_elements);
  2398. goto done;
  2399. }
  2400. if (qp->rq.flushed) {
  2401. dev_dbg(&cq->hwq.pdev->dev,
  2402. "%s: QPLIB: QP in Flush QP = %p\n", __func__, qp);
  2403. rc = 0;
  2404. goto done;
  2405. }
  2406. /* Terminal CQE requires all posted RQEs to complete with FLUSHED_ERR
  2407. * from the current rq->cons to the rq->prod regardless what the
  2408. * rq->cons the terminal CQE indicates
  2409. */
  2410. /* Add qp to flush list of the CQ */
  2411. bnxt_qplib_add_flush_qp(qp);
  2412. done:
  2413. return rc;
  2414. }
  2415. static int bnxt_qplib_cq_process_cutoff(struct bnxt_qplib_cq *cq,
  2416. struct cq_cutoff *hwcqe)
  2417. {
  2418. /* Check the Status */
  2419. if (hwcqe->status != CQ_CUTOFF_STATUS_OK) {
  2420. dev_err(&cq->hwq.pdev->dev,
  2421. "QPLIB: FP: CQ Process Cutoff Error status = 0x%x",
  2422. hwcqe->status);
  2423. return -EINVAL;
  2424. }
  2425. clear_bit(CQ_FLAGS_RESIZE_IN_PROG, &cq->flags);
  2426. wake_up_interruptible(&cq->waitq);
  2427. return 0;
  2428. }
  2429. int bnxt_qplib_process_flush_list(struct bnxt_qplib_cq *cq,
  2430. struct bnxt_qplib_cqe *cqe,
  2431. int num_cqes)
  2432. {
  2433. struct bnxt_qplib_qp *qp = NULL;
  2434. u32 budget = num_cqes;
  2435. unsigned long flags;
  2436. spin_lock_irqsave(&cq->flush_lock, flags);
  2437. list_for_each_entry(qp, &cq->sqf_head, sq_flush) {
  2438. dev_dbg(&cq->hwq.pdev->dev,
  2439. "QPLIB: FP: Flushing SQ QP= %p",
  2440. qp);
  2441. __flush_sq(&qp->sq, qp, &cqe, &budget);
  2442. }
  2443. list_for_each_entry(qp, &cq->rqf_head, rq_flush) {
  2444. dev_dbg(&cq->hwq.pdev->dev,
  2445. "QPLIB: FP: Flushing RQ QP= %p",
  2446. qp);
  2447. __flush_rq(&qp->rq, qp, &cqe, &budget);
  2448. }
  2449. spin_unlock_irqrestore(&cq->flush_lock, flags);
  2450. return num_cqes - budget;
  2451. }
  2452. int bnxt_qplib_poll_cq(struct bnxt_qplib_cq *cq, struct bnxt_qplib_cqe *cqe,
  2453. int num_cqes, struct bnxt_qplib_qp **lib_qp)
  2454. {
  2455. struct cq_base *hw_cqe, **hw_cqe_ptr;
  2456. u32 sw_cons, raw_cons;
  2457. int budget, rc = 0;
  2458. raw_cons = cq->hwq.cons;
  2459. budget = num_cqes;
  2460. while (budget) {
  2461. sw_cons = HWQ_CMP(raw_cons, &cq->hwq);
  2462. hw_cqe_ptr = (struct cq_base **)cq->hwq.pbl_ptr;
  2463. hw_cqe = &hw_cqe_ptr[CQE_PG(sw_cons)][CQE_IDX(sw_cons)];
  2464. /* Check for Valid bit */
  2465. if (!CQE_CMP_VALID(hw_cqe, raw_cons, cq->hwq.max_elements))
  2466. break;
  2467. /*
  2468. * The valid test of the entry must be done first before
  2469. * reading any further.
  2470. */
  2471. dma_rmb();
  2472. /* From the device's respective CQE format to qplib_wc*/
  2473. switch (hw_cqe->cqe_type_toggle & CQ_BASE_CQE_TYPE_MASK) {
  2474. case CQ_BASE_CQE_TYPE_REQ:
  2475. rc = bnxt_qplib_cq_process_req(cq,
  2476. (struct cq_req *)hw_cqe,
  2477. &cqe, &budget,
  2478. sw_cons, lib_qp);
  2479. break;
  2480. case CQ_BASE_CQE_TYPE_RES_RC:
  2481. rc = bnxt_qplib_cq_process_res_rc(cq,
  2482. (struct cq_res_rc *)
  2483. hw_cqe, &cqe,
  2484. &budget);
  2485. break;
  2486. case CQ_BASE_CQE_TYPE_RES_UD:
  2487. rc = bnxt_qplib_cq_process_res_ud
  2488. (cq, (struct cq_res_ud *)hw_cqe, &cqe,
  2489. &budget);
  2490. break;
  2491. case CQ_BASE_CQE_TYPE_RES_RAWETH_QP1:
  2492. rc = bnxt_qplib_cq_process_res_raweth_qp1
  2493. (cq, (struct cq_res_raweth_qp1 *)
  2494. hw_cqe, &cqe, &budget);
  2495. break;
  2496. case CQ_BASE_CQE_TYPE_TERMINAL:
  2497. rc = bnxt_qplib_cq_process_terminal
  2498. (cq, (struct cq_terminal *)hw_cqe,
  2499. &cqe, &budget);
  2500. break;
  2501. case CQ_BASE_CQE_TYPE_CUT_OFF:
  2502. bnxt_qplib_cq_process_cutoff
  2503. (cq, (struct cq_cutoff *)hw_cqe);
  2504. /* Done processing this CQ */
  2505. goto exit;
  2506. default:
  2507. dev_err(&cq->hwq.pdev->dev,
  2508. "QPLIB: process_cq unknown type 0x%lx",
  2509. hw_cqe->cqe_type_toggle &
  2510. CQ_BASE_CQE_TYPE_MASK);
  2511. rc = -EINVAL;
  2512. break;
  2513. }
  2514. if (rc < 0) {
  2515. if (rc == -EAGAIN)
  2516. break;
  2517. /* Error while processing the CQE, just skip to the
  2518. * next one
  2519. */
  2520. dev_err(&cq->hwq.pdev->dev,
  2521. "QPLIB: process_cqe error rc = 0x%x", rc);
  2522. }
  2523. raw_cons++;
  2524. }
  2525. if (cq->hwq.cons != raw_cons) {
  2526. cq->hwq.cons = raw_cons;
  2527. bnxt_qplib_arm_cq(cq, DBR_DBR_TYPE_CQ);
  2528. }
  2529. exit:
  2530. return num_cqes - budget;
  2531. }
  2532. void bnxt_qplib_req_notify_cq(struct bnxt_qplib_cq *cq, u32 arm_type)
  2533. {
  2534. if (arm_type)
  2535. bnxt_qplib_arm_cq(cq, arm_type);
  2536. /* Using cq->arm_state variable to track whether to issue cq handler */
  2537. atomic_set(&cq->arm_state, 1);
  2538. }
  2539. void bnxt_qplib_flush_cqn_wq(struct bnxt_qplib_qp *qp)
  2540. {
  2541. flush_workqueue(qp->scq->nq->cqn_wq);
  2542. if (qp->scq != qp->rcq)
  2543. flush_workqueue(qp->rcq->nq->cqn_wq);
  2544. }