core.c 92 KB

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  1. /*
  2. * Copyright(c) 2013-2015 Intel Corporation. All rights reserved.
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of version 2 of the GNU General Public License as
  6. * published by the Free Software Foundation.
  7. *
  8. * This program is distributed in the hope that it will be useful, but
  9. * WITHOUT ANY WARRANTY; without even the implied warranty of
  10. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  11. * General Public License for more details.
  12. */
  13. #include <linux/list_sort.h>
  14. #include <linux/libnvdimm.h>
  15. #include <linux/module.h>
  16. #include <linux/mutex.h>
  17. #include <linux/ndctl.h>
  18. #include <linux/sysfs.h>
  19. #include <linux/delay.h>
  20. #include <linux/list.h>
  21. #include <linux/acpi.h>
  22. #include <linux/sort.h>
  23. #include <linux/io.h>
  24. #include <linux/nd.h>
  25. #include <asm/cacheflush.h>
  26. #include <acpi/nfit.h>
  27. #include "nfit.h"
  28. /*
  29. * For readq() and writeq() on 32-bit builds, the hi-lo, lo-hi order is
  30. * irrelevant.
  31. */
  32. #include <linux/io-64-nonatomic-hi-lo.h>
  33. static bool force_enable_dimms;
  34. module_param(force_enable_dimms, bool, S_IRUGO|S_IWUSR);
  35. MODULE_PARM_DESC(force_enable_dimms, "Ignore _STA (ACPI DIMM device) status");
  36. static bool disable_vendor_specific;
  37. module_param(disable_vendor_specific, bool, S_IRUGO);
  38. MODULE_PARM_DESC(disable_vendor_specific,
  39. "Limit commands to the publicly specified set");
  40. static unsigned long override_dsm_mask;
  41. module_param(override_dsm_mask, ulong, S_IRUGO);
  42. MODULE_PARM_DESC(override_dsm_mask, "Bitmask of allowed NVDIMM DSM functions");
  43. static int default_dsm_family = -1;
  44. module_param(default_dsm_family, int, S_IRUGO);
  45. MODULE_PARM_DESC(default_dsm_family,
  46. "Try this DSM type first when identifying NVDIMM family");
  47. static bool no_init_ars;
  48. module_param(no_init_ars, bool, 0644);
  49. MODULE_PARM_DESC(no_init_ars, "Skip ARS run at nfit init time");
  50. LIST_HEAD(acpi_descs);
  51. DEFINE_MUTEX(acpi_desc_lock);
  52. static struct workqueue_struct *nfit_wq;
  53. struct nfit_table_prev {
  54. struct list_head spas;
  55. struct list_head memdevs;
  56. struct list_head dcrs;
  57. struct list_head bdws;
  58. struct list_head idts;
  59. struct list_head flushes;
  60. };
  61. static guid_t nfit_uuid[NFIT_UUID_MAX];
  62. const guid_t *to_nfit_uuid(enum nfit_uuids id)
  63. {
  64. return &nfit_uuid[id];
  65. }
  66. EXPORT_SYMBOL(to_nfit_uuid);
  67. static struct acpi_nfit_desc *to_acpi_nfit_desc(
  68. struct nvdimm_bus_descriptor *nd_desc)
  69. {
  70. return container_of(nd_desc, struct acpi_nfit_desc, nd_desc);
  71. }
  72. static struct acpi_device *to_acpi_dev(struct acpi_nfit_desc *acpi_desc)
  73. {
  74. struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc;
  75. /*
  76. * If provider == 'ACPI.NFIT' we can assume 'dev' is a struct
  77. * acpi_device.
  78. */
  79. if (!nd_desc->provider_name
  80. || strcmp(nd_desc->provider_name, "ACPI.NFIT") != 0)
  81. return NULL;
  82. return to_acpi_device(acpi_desc->dev);
  83. }
  84. static int xlat_bus_status(void *buf, unsigned int cmd, u32 status)
  85. {
  86. struct nd_cmd_clear_error *clear_err;
  87. struct nd_cmd_ars_status *ars_status;
  88. u16 flags;
  89. switch (cmd) {
  90. case ND_CMD_ARS_CAP:
  91. if ((status & 0xffff) == NFIT_ARS_CAP_NONE)
  92. return -ENOTTY;
  93. /* Command failed */
  94. if (status & 0xffff)
  95. return -EIO;
  96. /* No supported scan types for this range */
  97. flags = ND_ARS_PERSISTENT | ND_ARS_VOLATILE;
  98. if ((status >> 16 & flags) == 0)
  99. return -ENOTTY;
  100. return 0;
  101. case ND_CMD_ARS_START:
  102. /* ARS is in progress */
  103. if ((status & 0xffff) == NFIT_ARS_START_BUSY)
  104. return -EBUSY;
  105. /* Command failed */
  106. if (status & 0xffff)
  107. return -EIO;
  108. return 0;
  109. case ND_CMD_ARS_STATUS:
  110. ars_status = buf;
  111. /* Command failed */
  112. if (status & 0xffff)
  113. return -EIO;
  114. /* Check extended status (Upper two bytes) */
  115. if (status == NFIT_ARS_STATUS_DONE)
  116. return 0;
  117. /* ARS is in progress */
  118. if (status == NFIT_ARS_STATUS_BUSY)
  119. return -EBUSY;
  120. /* No ARS performed for the current boot */
  121. if (status == NFIT_ARS_STATUS_NONE)
  122. return -EAGAIN;
  123. /*
  124. * ARS interrupted, either we overflowed or some other
  125. * agent wants the scan to stop. If we didn't overflow
  126. * then just continue with the returned results.
  127. */
  128. if (status == NFIT_ARS_STATUS_INTR) {
  129. if (ars_status->out_length >= 40 && (ars_status->flags
  130. & NFIT_ARS_F_OVERFLOW))
  131. return -ENOSPC;
  132. return 0;
  133. }
  134. /* Unknown status */
  135. if (status >> 16)
  136. return -EIO;
  137. return 0;
  138. case ND_CMD_CLEAR_ERROR:
  139. clear_err = buf;
  140. if (status & 0xffff)
  141. return -EIO;
  142. if (!clear_err->cleared)
  143. return -EIO;
  144. if (clear_err->length > clear_err->cleared)
  145. return clear_err->cleared;
  146. return 0;
  147. default:
  148. break;
  149. }
  150. /* all other non-zero status results in an error */
  151. if (status)
  152. return -EIO;
  153. return 0;
  154. }
  155. #define ACPI_LABELS_LOCKED 3
  156. static int xlat_nvdimm_status(struct nvdimm *nvdimm, void *buf, unsigned int cmd,
  157. u32 status)
  158. {
  159. struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm);
  160. switch (cmd) {
  161. case ND_CMD_GET_CONFIG_SIZE:
  162. /*
  163. * In the _LSI, _LSR, _LSW case the locked status is
  164. * communicated via the read/write commands
  165. */
  166. if (nfit_mem->has_lsr)
  167. break;
  168. if (status >> 16 & ND_CONFIG_LOCKED)
  169. return -EACCES;
  170. break;
  171. case ND_CMD_GET_CONFIG_DATA:
  172. if (nfit_mem->has_lsr && status == ACPI_LABELS_LOCKED)
  173. return -EACCES;
  174. break;
  175. case ND_CMD_SET_CONFIG_DATA:
  176. if (nfit_mem->has_lsw && status == ACPI_LABELS_LOCKED)
  177. return -EACCES;
  178. break;
  179. default:
  180. break;
  181. }
  182. /* all other non-zero status results in an error */
  183. if (status)
  184. return -EIO;
  185. return 0;
  186. }
  187. static int xlat_status(struct nvdimm *nvdimm, void *buf, unsigned int cmd,
  188. u32 status)
  189. {
  190. if (!nvdimm)
  191. return xlat_bus_status(buf, cmd, status);
  192. return xlat_nvdimm_status(nvdimm, buf, cmd, status);
  193. }
  194. /* convert _LS{I,R} packages to the buffer object acpi_nfit_ctl expects */
  195. static union acpi_object *pkg_to_buf(union acpi_object *pkg)
  196. {
  197. int i;
  198. void *dst;
  199. size_t size = 0;
  200. union acpi_object *buf = NULL;
  201. if (pkg->type != ACPI_TYPE_PACKAGE) {
  202. WARN_ONCE(1, "BIOS bug, unexpected element type: %d\n",
  203. pkg->type);
  204. goto err;
  205. }
  206. for (i = 0; i < pkg->package.count; i++) {
  207. union acpi_object *obj = &pkg->package.elements[i];
  208. if (obj->type == ACPI_TYPE_INTEGER)
  209. size += 4;
  210. else if (obj->type == ACPI_TYPE_BUFFER)
  211. size += obj->buffer.length;
  212. else {
  213. WARN_ONCE(1, "BIOS bug, unexpected element type: %d\n",
  214. obj->type);
  215. goto err;
  216. }
  217. }
  218. buf = ACPI_ALLOCATE(sizeof(*buf) + size);
  219. if (!buf)
  220. goto err;
  221. dst = buf + 1;
  222. buf->type = ACPI_TYPE_BUFFER;
  223. buf->buffer.length = size;
  224. buf->buffer.pointer = dst;
  225. for (i = 0; i < pkg->package.count; i++) {
  226. union acpi_object *obj = &pkg->package.elements[i];
  227. if (obj->type == ACPI_TYPE_INTEGER) {
  228. memcpy(dst, &obj->integer.value, 4);
  229. dst += 4;
  230. } else if (obj->type == ACPI_TYPE_BUFFER) {
  231. memcpy(dst, obj->buffer.pointer, obj->buffer.length);
  232. dst += obj->buffer.length;
  233. }
  234. }
  235. err:
  236. ACPI_FREE(pkg);
  237. return buf;
  238. }
  239. static union acpi_object *int_to_buf(union acpi_object *integer)
  240. {
  241. union acpi_object *buf = ACPI_ALLOCATE(sizeof(*buf) + 4);
  242. void *dst = NULL;
  243. if (!buf)
  244. goto err;
  245. if (integer->type != ACPI_TYPE_INTEGER) {
  246. WARN_ONCE(1, "BIOS bug, unexpected element type: %d\n",
  247. integer->type);
  248. goto err;
  249. }
  250. dst = buf + 1;
  251. buf->type = ACPI_TYPE_BUFFER;
  252. buf->buffer.length = 4;
  253. buf->buffer.pointer = dst;
  254. memcpy(dst, &integer->integer.value, 4);
  255. err:
  256. ACPI_FREE(integer);
  257. return buf;
  258. }
  259. static union acpi_object *acpi_label_write(acpi_handle handle, u32 offset,
  260. u32 len, void *data)
  261. {
  262. acpi_status rc;
  263. struct acpi_buffer buf = { ACPI_ALLOCATE_BUFFER, NULL };
  264. struct acpi_object_list input = {
  265. .count = 3,
  266. .pointer = (union acpi_object []) {
  267. [0] = {
  268. .integer.type = ACPI_TYPE_INTEGER,
  269. .integer.value = offset,
  270. },
  271. [1] = {
  272. .integer.type = ACPI_TYPE_INTEGER,
  273. .integer.value = len,
  274. },
  275. [2] = {
  276. .buffer.type = ACPI_TYPE_BUFFER,
  277. .buffer.pointer = data,
  278. .buffer.length = len,
  279. },
  280. },
  281. };
  282. rc = acpi_evaluate_object(handle, "_LSW", &input, &buf);
  283. if (ACPI_FAILURE(rc))
  284. return NULL;
  285. return int_to_buf(buf.pointer);
  286. }
  287. static union acpi_object *acpi_label_read(acpi_handle handle, u32 offset,
  288. u32 len)
  289. {
  290. acpi_status rc;
  291. struct acpi_buffer buf = { ACPI_ALLOCATE_BUFFER, NULL };
  292. struct acpi_object_list input = {
  293. .count = 2,
  294. .pointer = (union acpi_object []) {
  295. [0] = {
  296. .integer.type = ACPI_TYPE_INTEGER,
  297. .integer.value = offset,
  298. },
  299. [1] = {
  300. .integer.type = ACPI_TYPE_INTEGER,
  301. .integer.value = len,
  302. },
  303. },
  304. };
  305. rc = acpi_evaluate_object(handle, "_LSR", &input, &buf);
  306. if (ACPI_FAILURE(rc))
  307. return NULL;
  308. return pkg_to_buf(buf.pointer);
  309. }
  310. static union acpi_object *acpi_label_info(acpi_handle handle)
  311. {
  312. acpi_status rc;
  313. struct acpi_buffer buf = { ACPI_ALLOCATE_BUFFER, NULL };
  314. rc = acpi_evaluate_object(handle, "_LSI", NULL, &buf);
  315. if (ACPI_FAILURE(rc))
  316. return NULL;
  317. return pkg_to_buf(buf.pointer);
  318. }
  319. static u8 nfit_dsm_revid(unsigned family, unsigned func)
  320. {
  321. static const u8 revid_table[NVDIMM_FAMILY_MAX+1][32] = {
  322. [NVDIMM_FAMILY_INTEL] = {
  323. [NVDIMM_INTEL_GET_MODES] = 2,
  324. [NVDIMM_INTEL_GET_FWINFO] = 2,
  325. [NVDIMM_INTEL_START_FWUPDATE] = 2,
  326. [NVDIMM_INTEL_SEND_FWUPDATE] = 2,
  327. [NVDIMM_INTEL_FINISH_FWUPDATE] = 2,
  328. [NVDIMM_INTEL_QUERY_FWUPDATE] = 2,
  329. [NVDIMM_INTEL_SET_THRESHOLD] = 2,
  330. [NVDIMM_INTEL_INJECT_ERROR] = 2,
  331. },
  332. };
  333. u8 id;
  334. if (family > NVDIMM_FAMILY_MAX)
  335. return 0;
  336. if (func > 31)
  337. return 0;
  338. id = revid_table[family][func];
  339. if (id == 0)
  340. return 1; /* default */
  341. return id;
  342. }
  343. int acpi_nfit_ctl(struct nvdimm_bus_descriptor *nd_desc, struct nvdimm *nvdimm,
  344. unsigned int cmd, void *buf, unsigned int buf_len, int *cmd_rc)
  345. {
  346. struct acpi_nfit_desc *acpi_desc = to_acpi_nfit_desc(nd_desc);
  347. struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm);
  348. union acpi_object in_obj, in_buf, *out_obj;
  349. const struct nd_cmd_desc *desc = NULL;
  350. struct device *dev = acpi_desc->dev;
  351. struct nd_cmd_pkg *call_pkg = NULL;
  352. const char *cmd_name, *dimm_name;
  353. unsigned long cmd_mask, dsm_mask;
  354. u32 offset, fw_status = 0;
  355. acpi_handle handle;
  356. unsigned int func;
  357. const guid_t *guid;
  358. int rc, i;
  359. *cmd_rc = -EINVAL;
  360. func = cmd;
  361. if (cmd == ND_CMD_CALL) {
  362. call_pkg = buf;
  363. func = call_pkg->nd_command;
  364. for (i = 0; i < ARRAY_SIZE(call_pkg->nd_reserved2); i++)
  365. if (call_pkg->nd_reserved2[i])
  366. return -EINVAL;
  367. }
  368. if (nvdimm) {
  369. struct acpi_device *adev = nfit_mem->adev;
  370. if (!adev)
  371. return -ENOTTY;
  372. if (call_pkg && nfit_mem->family != call_pkg->nd_family)
  373. return -ENOTTY;
  374. dimm_name = nvdimm_name(nvdimm);
  375. cmd_name = nvdimm_cmd_name(cmd);
  376. cmd_mask = nvdimm_cmd_mask(nvdimm);
  377. dsm_mask = nfit_mem->dsm_mask;
  378. desc = nd_cmd_dimm_desc(cmd);
  379. guid = to_nfit_uuid(nfit_mem->family);
  380. handle = adev->handle;
  381. } else {
  382. struct acpi_device *adev = to_acpi_dev(acpi_desc);
  383. cmd_name = nvdimm_bus_cmd_name(cmd);
  384. cmd_mask = nd_desc->cmd_mask;
  385. dsm_mask = cmd_mask;
  386. if (cmd == ND_CMD_CALL)
  387. dsm_mask = nd_desc->bus_dsm_mask;
  388. desc = nd_cmd_bus_desc(cmd);
  389. guid = to_nfit_uuid(NFIT_DEV_BUS);
  390. handle = adev->handle;
  391. dimm_name = "bus";
  392. }
  393. if (!desc || (cmd && (desc->out_num + desc->in_num == 0)))
  394. return -ENOTTY;
  395. if (!test_bit(cmd, &cmd_mask) || !test_bit(func, &dsm_mask))
  396. return -ENOTTY;
  397. in_obj.type = ACPI_TYPE_PACKAGE;
  398. in_obj.package.count = 1;
  399. in_obj.package.elements = &in_buf;
  400. in_buf.type = ACPI_TYPE_BUFFER;
  401. in_buf.buffer.pointer = buf;
  402. in_buf.buffer.length = 0;
  403. /* libnvdimm has already validated the input envelope */
  404. for (i = 0; i < desc->in_num; i++)
  405. in_buf.buffer.length += nd_cmd_in_size(nvdimm, cmd, desc,
  406. i, buf);
  407. if (call_pkg) {
  408. /* skip over package wrapper */
  409. in_buf.buffer.pointer = (void *) &call_pkg->nd_payload;
  410. in_buf.buffer.length = call_pkg->nd_size_in;
  411. }
  412. dev_dbg(dev, "%s cmd: %d: func: %d input length: %d\n",
  413. dimm_name, cmd, func, in_buf.buffer.length);
  414. print_hex_dump_debug("nvdimm in ", DUMP_PREFIX_OFFSET, 4, 4,
  415. in_buf.buffer.pointer,
  416. min_t(u32, 256, in_buf.buffer.length), true);
  417. /* call the BIOS, prefer the named methods over _DSM if available */
  418. if (nvdimm && cmd == ND_CMD_GET_CONFIG_SIZE && nfit_mem->has_lsr)
  419. out_obj = acpi_label_info(handle);
  420. else if (nvdimm && cmd == ND_CMD_GET_CONFIG_DATA && nfit_mem->has_lsr) {
  421. struct nd_cmd_get_config_data_hdr *p = buf;
  422. out_obj = acpi_label_read(handle, p->in_offset, p->in_length);
  423. } else if (nvdimm && cmd == ND_CMD_SET_CONFIG_DATA
  424. && nfit_mem->has_lsw) {
  425. struct nd_cmd_set_config_hdr *p = buf;
  426. out_obj = acpi_label_write(handle, p->in_offset, p->in_length,
  427. p->in_buf);
  428. } else {
  429. u8 revid;
  430. if (nvdimm)
  431. revid = nfit_dsm_revid(nfit_mem->family, func);
  432. else
  433. revid = 1;
  434. out_obj = acpi_evaluate_dsm(handle, guid, revid, func, &in_obj);
  435. }
  436. if (!out_obj) {
  437. dev_dbg(dev, "%s _DSM failed cmd: %s\n", dimm_name, cmd_name);
  438. return -EINVAL;
  439. }
  440. if (call_pkg) {
  441. call_pkg->nd_fw_size = out_obj->buffer.length;
  442. memcpy(call_pkg->nd_payload + call_pkg->nd_size_in,
  443. out_obj->buffer.pointer,
  444. min(call_pkg->nd_fw_size, call_pkg->nd_size_out));
  445. ACPI_FREE(out_obj);
  446. /*
  447. * Need to support FW function w/o known size in advance.
  448. * Caller can determine required size based upon nd_fw_size.
  449. * If we return an error (like elsewhere) then caller wouldn't
  450. * be able to rely upon data returned to make calculation.
  451. */
  452. *cmd_rc = 0;
  453. return 0;
  454. }
  455. if (out_obj->package.type != ACPI_TYPE_BUFFER) {
  456. dev_dbg(dev, "%s unexpected output object type cmd: %s type: %d\n",
  457. dimm_name, cmd_name, out_obj->type);
  458. rc = -EINVAL;
  459. goto out;
  460. }
  461. dev_dbg(dev, "%s cmd: %s output length: %d\n", dimm_name,
  462. cmd_name, out_obj->buffer.length);
  463. print_hex_dump_debug(cmd_name, DUMP_PREFIX_OFFSET, 4, 4,
  464. out_obj->buffer.pointer,
  465. min_t(u32, 128, out_obj->buffer.length), true);
  466. for (i = 0, offset = 0; i < desc->out_num; i++) {
  467. u32 out_size = nd_cmd_out_size(nvdimm, cmd, desc, i, buf,
  468. (u32 *) out_obj->buffer.pointer,
  469. out_obj->buffer.length - offset);
  470. if (offset + out_size > out_obj->buffer.length) {
  471. dev_dbg(dev, "%s output object underflow cmd: %s field: %d\n",
  472. dimm_name, cmd_name, i);
  473. break;
  474. }
  475. if (in_buf.buffer.length + offset + out_size > buf_len) {
  476. dev_dbg(dev, "%s output overrun cmd: %s field: %d\n",
  477. dimm_name, cmd_name, i);
  478. rc = -ENXIO;
  479. goto out;
  480. }
  481. memcpy(buf + in_buf.buffer.length + offset,
  482. out_obj->buffer.pointer + offset, out_size);
  483. offset += out_size;
  484. }
  485. /*
  486. * Set fw_status for all the commands with a known format to be
  487. * later interpreted by xlat_status().
  488. */
  489. if (i >= 1 && ((!nvdimm && cmd >= ND_CMD_ARS_CAP
  490. && cmd <= ND_CMD_CLEAR_ERROR)
  491. || (nvdimm && cmd >= ND_CMD_SMART
  492. && cmd <= ND_CMD_VENDOR)))
  493. fw_status = *(u32 *) out_obj->buffer.pointer;
  494. if (offset + in_buf.buffer.length < buf_len) {
  495. if (i >= 1) {
  496. /*
  497. * status valid, return the number of bytes left
  498. * unfilled in the output buffer
  499. */
  500. rc = buf_len - offset - in_buf.buffer.length;
  501. if (cmd_rc)
  502. *cmd_rc = xlat_status(nvdimm, buf, cmd,
  503. fw_status);
  504. } else {
  505. dev_err(dev, "%s:%s underrun cmd: %s buf_len: %d out_len: %d\n",
  506. __func__, dimm_name, cmd_name, buf_len,
  507. offset);
  508. rc = -ENXIO;
  509. }
  510. } else {
  511. rc = 0;
  512. if (cmd_rc)
  513. *cmd_rc = xlat_status(nvdimm, buf, cmd, fw_status);
  514. }
  515. out:
  516. ACPI_FREE(out_obj);
  517. return rc;
  518. }
  519. EXPORT_SYMBOL_GPL(acpi_nfit_ctl);
  520. static const char *spa_type_name(u16 type)
  521. {
  522. static const char *to_name[] = {
  523. [NFIT_SPA_VOLATILE] = "volatile",
  524. [NFIT_SPA_PM] = "pmem",
  525. [NFIT_SPA_DCR] = "dimm-control-region",
  526. [NFIT_SPA_BDW] = "block-data-window",
  527. [NFIT_SPA_VDISK] = "volatile-disk",
  528. [NFIT_SPA_VCD] = "volatile-cd",
  529. [NFIT_SPA_PDISK] = "persistent-disk",
  530. [NFIT_SPA_PCD] = "persistent-cd",
  531. };
  532. if (type > NFIT_SPA_PCD)
  533. return "unknown";
  534. return to_name[type];
  535. }
  536. int nfit_spa_type(struct acpi_nfit_system_address *spa)
  537. {
  538. int i;
  539. for (i = 0; i < NFIT_UUID_MAX; i++)
  540. if (guid_equal(to_nfit_uuid(i), (guid_t *)&spa->range_guid))
  541. return i;
  542. return -1;
  543. }
  544. static bool add_spa(struct acpi_nfit_desc *acpi_desc,
  545. struct nfit_table_prev *prev,
  546. struct acpi_nfit_system_address *spa)
  547. {
  548. struct device *dev = acpi_desc->dev;
  549. struct nfit_spa *nfit_spa;
  550. if (spa->header.length != sizeof(*spa))
  551. return false;
  552. list_for_each_entry(nfit_spa, &prev->spas, list) {
  553. if (memcmp(nfit_spa->spa, spa, sizeof(*spa)) == 0) {
  554. list_move_tail(&nfit_spa->list, &acpi_desc->spas);
  555. return true;
  556. }
  557. }
  558. nfit_spa = devm_kzalloc(dev, sizeof(*nfit_spa) + sizeof(*spa),
  559. GFP_KERNEL);
  560. if (!nfit_spa)
  561. return false;
  562. INIT_LIST_HEAD(&nfit_spa->list);
  563. memcpy(nfit_spa->spa, spa, sizeof(*spa));
  564. list_add_tail(&nfit_spa->list, &acpi_desc->spas);
  565. dev_dbg(dev, "spa index: %d type: %s\n",
  566. spa->range_index,
  567. spa_type_name(nfit_spa_type(spa)));
  568. return true;
  569. }
  570. static bool add_memdev(struct acpi_nfit_desc *acpi_desc,
  571. struct nfit_table_prev *prev,
  572. struct acpi_nfit_memory_map *memdev)
  573. {
  574. struct device *dev = acpi_desc->dev;
  575. struct nfit_memdev *nfit_memdev;
  576. if (memdev->header.length != sizeof(*memdev))
  577. return false;
  578. list_for_each_entry(nfit_memdev, &prev->memdevs, list)
  579. if (memcmp(nfit_memdev->memdev, memdev, sizeof(*memdev)) == 0) {
  580. list_move_tail(&nfit_memdev->list, &acpi_desc->memdevs);
  581. return true;
  582. }
  583. nfit_memdev = devm_kzalloc(dev, sizeof(*nfit_memdev) + sizeof(*memdev),
  584. GFP_KERNEL);
  585. if (!nfit_memdev)
  586. return false;
  587. INIT_LIST_HEAD(&nfit_memdev->list);
  588. memcpy(nfit_memdev->memdev, memdev, sizeof(*memdev));
  589. list_add_tail(&nfit_memdev->list, &acpi_desc->memdevs);
  590. dev_dbg(dev, "memdev handle: %#x spa: %d dcr: %d flags: %#x\n",
  591. memdev->device_handle, memdev->range_index,
  592. memdev->region_index, memdev->flags);
  593. return true;
  594. }
  595. int nfit_get_smbios_id(u32 device_handle, u16 *flags)
  596. {
  597. struct acpi_nfit_memory_map *memdev;
  598. struct acpi_nfit_desc *acpi_desc;
  599. struct nfit_mem *nfit_mem;
  600. mutex_lock(&acpi_desc_lock);
  601. list_for_each_entry(acpi_desc, &acpi_descs, list) {
  602. mutex_lock(&acpi_desc->init_mutex);
  603. list_for_each_entry(nfit_mem, &acpi_desc->dimms, list) {
  604. memdev = __to_nfit_memdev(nfit_mem);
  605. if (memdev->device_handle == device_handle) {
  606. mutex_unlock(&acpi_desc->init_mutex);
  607. mutex_unlock(&acpi_desc_lock);
  608. *flags = memdev->flags;
  609. return memdev->physical_id;
  610. }
  611. }
  612. mutex_unlock(&acpi_desc->init_mutex);
  613. }
  614. mutex_unlock(&acpi_desc_lock);
  615. return -ENODEV;
  616. }
  617. EXPORT_SYMBOL_GPL(nfit_get_smbios_id);
  618. /*
  619. * An implementation may provide a truncated control region if no block windows
  620. * are defined.
  621. */
  622. static size_t sizeof_dcr(struct acpi_nfit_control_region *dcr)
  623. {
  624. if (dcr->header.length < offsetof(struct acpi_nfit_control_region,
  625. window_size))
  626. return 0;
  627. if (dcr->windows)
  628. return sizeof(*dcr);
  629. return offsetof(struct acpi_nfit_control_region, window_size);
  630. }
  631. static bool add_dcr(struct acpi_nfit_desc *acpi_desc,
  632. struct nfit_table_prev *prev,
  633. struct acpi_nfit_control_region *dcr)
  634. {
  635. struct device *dev = acpi_desc->dev;
  636. struct nfit_dcr *nfit_dcr;
  637. if (!sizeof_dcr(dcr))
  638. return false;
  639. list_for_each_entry(nfit_dcr, &prev->dcrs, list)
  640. if (memcmp(nfit_dcr->dcr, dcr, sizeof_dcr(dcr)) == 0) {
  641. list_move_tail(&nfit_dcr->list, &acpi_desc->dcrs);
  642. return true;
  643. }
  644. nfit_dcr = devm_kzalloc(dev, sizeof(*nfit_dcr) + sizeof(*dcr),
  645. GFP_KERNEL);
  646. if (!nfit_dcr)
  647. return false;
  648. INIT_LIST_HEAD(&nfit_dcr->list);
  649. memcpy(nfit_dcr->dcr, dcr, sizeof_dcr(dcr));
  650. list_add_tail(&nfit_dcr->list, &acpi_desc->dcrs);
  651. dev_dbg(dev, "dcr index: %d windows: %d\n",
  652. dcr->region_index, dcr->windows);
  653. return true;
  654. }
  655. static bool add_bdw(struct acpi_nfit_desc *acpi_desc,
  656. struct nfit_table_prev *prev,
  657. struct acpi_nfit_data_region *bdw)
  658. {
  659. struct device *dev = acpi_desc->dev;
  660. struct nfit_bdw *nfit_bdw;
  661. if (bdw->header.length != sizeof(*bdw))
  662. return false;
  663. list_for_each_entry(nfit_bdw, &prev->bdws, list)
  664. if (memcmp(nfit_bdw->bdw, bdw, sizeof(*bdw)) == 0) {
  665. list_move_tail(&nfit_bdw->list, &acpi_desc->bdws);
  666. return true;
  667. }
  668. nfit_bdw = devm_kzalloc(dev, sizeof(*nfit_bdw) + sizeof(*bdw),
  669. GFP_KERNEL);
  670. if (!nfit_bdw)
  671. return false;
  672. INIT_LIST_HEAD(&nfit_bdw->list);
  673. memcpy(nfit_bdw->bdw, bdw, sizeof(*bdw));
  674. list_add_tail(&nfit_bdw->list, &acpi_desc->bdws);
  675. dev_dbg(dev, "bdw dcr: %d windows: %d\n",
  676. bdw->region_index, bdw->windows);
  677. return true;
  678. }
  679. static size_t sizeof_idt(struct acpi_nfit_interleave *idt)
  680. {
  681. if (idt->header.length < sizeof(*idt))
  682. return 0;
  683. return sizeof(*idt) + sizeof(u32) * (idt->line_count - 1);
  684. }
  685. static bool add_idt(struct acpi_nfit_desc *acpi_desc,
  686. struct nfit_table_prev *prev,
  687. struct acpi_nfit_interleave *idt)
  688. {
  689. struct device *dev = acpi_desc->dev;
  690. struct nfit_idt *nfit_idt;
  691. if (!sizeof_idt(idt))
  692. return false;
  693. list_for_each_entry(nfit_idt, &prev->idts, list) {
  694. if (sizeof_idt(nfit_idt->idt) != sizeof_idt(idt))
  695. continue;
  696. if (memcmp(nfit_idt->idt, idt, sizeof_idt(idt)) == 0) {
  697. list_move_tail(&nfit_idt->list, &acpi_desc->idts);
  698. return true;
  699. }
  700. }
  701. nfit_idt = devm_kzalloc(dev, sizeof(*nfit_idt) + sizeof_idt(idt),
  702. GFP_KERNEL);
  703. if (!nfit_idt)
  704. return false;
  705. INIT_LIST_HEAD(&nfit_idt->list);
  706. memcpy(nfit_idt->idt, idt, sizeof_idt(idt));
  707. list_add_tail(&nfit_idt->list, &acpi_desc->idts);
  708. dev_dbg(dev, "idt index: %d num_lines: %d\n",
  709. idt->interleave_index, idt->line_count);
  710. return true;
  711. }
  712. static size_t sizeof_flush(struct acpi_nfit_flush_address *flush)
  713. {
  714. if (flush->header.length < sizeof(*flush))
  715. return 0;
  716. return sizeof(*flush) + sizeof(u64) * (flush->hint_count - 1);
  717. }
  718. static bool add_flush(struct acpi_nfit_desc *acpi_desc,
  719. struct nfit_table_prev *prev,
  720. struct acpi_nfit_flush_address *flush)
  721. {
  722. struct device *dev = acpi_desc->dev;
  723. struct nfit_flush *nfit_flush;
  724. if (!sizeof_flush(flush))
  725. return false;
  726. list_for_each_entry(nfit_flush, &prev->flushes, list) {
  727. if (sizeof_flush(nfit_flush->flush) != sizeof_flush(flush))
  728. continue;
  729. if (memcmp(nfit_flush->flush, flush,
  730. sizeof_flush(flush)) == 0) {
  731. list_move_tail(&nfit_flush->list, &acpi_desc->flushes);
  732. return true;
  733. }
  734. }
  735. nfit_flush = devm_kzalloc(dev, sizeof(*nfit_flush)
  736. + sizeof_flush(flush), GFP_KERNEL);
  737. if (!nfit_flush)
  738. return false;
  739. INIT_LIST_HEAD(&nfit_flush->list);
  740. memcpy(nfit_flush->flush, flush, sizeof_flush(flush));
  741. list_add_tail(&nfit_flush->list, &acpi_desc->flushes);
  742. dev_dbg(dev, "nfit_flush handle: %d hint_count: %d\n",
  743. flush->device_handle, flush->hint_count);
  744. return true;
  745. }
  746. static bool add_platform_cap(struct acpi_nfit_desc *acpi_desc,
  747. struct acpi_nfit_capabilities *pcap)
  748. {
  749. struct device *dev = acpi_desc->dev;
  750. u32 mask;
  751. mask = (1 << (pcap->highest_capability + 1)) - 1;
  752. acpi_desc->platform_cap = pcap->capabilities & mask;
  753. dev_dbg(dev, "cap: %#x\n", acpi_desc->platform_cap);
  754. return true;
  755. }
  756. static void *add_table(struct acpi_nfit_desc *acpi_desc,
  757. struct nfit_table_prev *prev, void *table, const void *end)
  758. {
  759. struct device *dev = acpi_desc->dev;
  760. struct acpi_nfit_header *hdr;
  761. void *err = ERR_PTR(-ENOMEM);
  762. if (table >= end)
  763. return NULL;
  764. hdr = table;
  765. if (!hdr->length) {
  766. dev_warn(dev, "found a zero length table '%d' parsing nfit\n",
  767. hdr->type);
  768. return NULL;
  769. }
  770. switch (hdr->type) {
  771. case ACPI_NFIT_TYPE_SYSTEM_ADDRESS:
  772. if (!add_spa(acpi_desc, prev, table))
  773. return err;
  774. break;
  775. case ACPI_NFIT_TYPE_MEMORY_MAP:
  776. if (!add_memdev(acpi_desc, prev, table))
  777. return err;
  778. break;
  779. case ACPI_NFIT_TYPE_CONTROL_REGION:
  780. if (!add_dcr(acpi_desc, prev, table))
  781. return err;
  782. break;
  783. case ACPI_NFIT_TYPE_DATA_REGION:
  784. if (!add_bdw(acpi_desc, prev, table))
  785. return err;
  786. break;
  787. case ACPI_NFIT_TYPE_INTERLEAVE:
  788. if (!add_idt(acpi_desc, prev, table))
  789. return err;
  790. break;
  791. case ACPI_NFIT_TYPE_FLUSH_ADDRESS:
  792. if (!add_flush(acpi_desc, prev, table))
  793. return err;
  794. break;
  795. case ACPI_NFIT_TYPE_SMBIOS:
  796. dev_dbg(dev, "smbios\n");
  797. break;
  798. case ACPI_NFIT_TYPE_CAPABILITIES:
  799. if (!add_platform_cap(acpi_desc, table))
  800. return err;
  801. break;
  802. default:
  803. dev_err(dev, "unknown table '%d' parsing nfit\n", hdr->type);
  804. break;
  805. }
  806. return table + hdr->length;
  807. }
  808. static void nfit_mem_find_spa_bdw(struct acpi_nfit_desc *acpi_desc,
  809. struct nfit_mem *nfit_mem)
  810. {
  811. u32 device_handle = __to_nfit_memdev(nfit_mem)->device_handle;
  812. u16 dcr = nfit_mem->dcr->region_index;
  813. struct nfit_spa *nfit_spa;
  814. list_for_each_entry(nfit_spa, &acpi_desc->spas, list) {
  815. u16 range_index = nfit_spa->spa->range_index;
  816. int type = nfit_spa_type(nfit_spa->spa);
  817. struct nfit_memdev *nfit_memdev;
  818. if (type != NFIT_SPA_BDW)
  819. continue;
  820. list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) {
  821. if (nfit_memdev->memdev->range_index != range_index)
  822. continue;
  823. if (nfit_memdev->memdev->device_handle != device_handle)
  824. continue;
  825. if (nfit_memdev->memdev->region_index != dcr)
  826. continue;
  827. nfit_mem->spa_bdw = nfit_spa->spa;
  828. return;
  829. }
  830. }
  831. dev_dbg(acpi_desc->dev, "SPA-BDW not found for SPA-DCR %d\n",
  832. nfit_mem->spa_dcr->range_index);
  833. nfit_mem->bdw = NULL;
  834. }
  835. static void nfit_mem_init_bdw(struct acpi_nfit_desc *acpi_desc,
  836. struct nfit_mem *nfit_mem, struct acpi_nfit_system_address *spa)
  837. {
  838. u16 dcr = __to_nfit_memdev(nfit_mem)->region_index;
  839. struct nfit_memdev *nfit_memdev;
  840. struct nfit_bdw *nfit_bdw;
  841. struct nfit_idt *nfit_idt;
  842. u16 idt_idx, range_index;
  843. list_for_each_entry(nfit_bdw, &acpi_desc->bdws, list) {
  844. if (nfit_bdw->bdw->region_index != dcr)
  845. continue;
  846. nfit_mem->bdw = nfit_bdw->bdw;
  847. break;
  848. }
  849. if (!nfit_mem->bdw)
  850. return;
  851. nfit_mem_find_spa_bdw(acpi_desc, nfit_mem);
  852. if (!nfit_mem->spa_bdw)
  853. return;
  854. range_index = nfit_mem->spa_bdw->range_index;
  855. list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) {
  856. if (nfit_memdev->memdev->range_index != range_index ||
  857. nfit_memdev->memdev->region_index != dcr)
  858. continue;
  859. nfit_mem->memdev_bdw = nfit_memdev->memdev;
  860. idt_idx = nfit_memdev->memdev->interleave_index;
  861. list_for_each_entry(nfit_idt, &acpi_desc->idts, list) {
  862. if (nfit_idt->idt->interleave_index != idt_idx)
  863. continue;
  864. nfit_mem->idt_bdw = nfit_idt->idt;
  865. break;
  866. }
  867. break;
  868. }
  869. }
  870. static int __nfit_mem_init(struct acpi_nfit_desc *acpi_desc,
  871. struct acpi_nfit_system_address *spa)
  872. {
  873. struct nfit_mem *nfit_mem, *found;
  874. struct nfit_memdev *nfit_memdev;
  875. int type = spa ? nfit_spa_type(spa) : 0;
  876. switch (type) {
  877. case NFIT_SPA_DCR:
  878. case NFIT_SPA_PM:
  879. break;
  880. default:
  881. if (spa)
  882. return 0;
  883. }
  884. /*
  885. * This loop runs in two modes, when a dimm is mapped the loop
  886. * adds memdev associations to an existing dimm, or creates a
  887. * dimm. In the unmapped dimm case this loop sweeps for memdev
  888. * instances with an invalid / zero range_index and adds those
  889. * dimms without spa associations.
  890. */
  891. list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) {
  892. struct nfit_flush *nfit_flush;
  893. struct nfit_dcr *nfit_dcr;
  894. u32 device_handle;
  895. u16 dcr;
  896. if (spa && nfit_memdev->memdev->range_index != spa->range_index)
  897. continue;
  898. if (!spa && nfit_memdev->memdev->range_index)
  899. continue;
  900. found = NULL;
  901. dcr = nfit_memdev->memdev->region_index;
  902. device_handle = nfit_memdev->memdev->device_handle;
  903. list_for_each_entry(nfit_mem, &acpi_desc->dimms, list)
  904. if (__to_nfit_memdev(nfit_mem)->device_handle
  905. == device_handle) {
  906. found = nfit_mem;
  907. break;
  908. }
  909. if (found)
  910. nfit_mem = found;
  911. else {
  912. nfit_mem = devm_kzalloc(acpi_desc->dev,
  913. sizeof(*nfit_mem), GFP_KERNEL);
  914. if (!nfit_mem)
  915. return -ENOMEM;
  916. INIT_LIST_HEAD(&nfit_mem->list);
  917. nfit_mem->acpi_desc = acpi_desc;
  918. list_add(&nfit_mem->list, &acpi_desc->dimms);
  919. }
  920. list_for_each_entry(nfit_dcr, &acpi_desc->dcrs, list) {
  921. if (nfit_dcr->dcr->region_index != dcr)
  922. continue;
  923. /*
  924. * Record the control region for the dimm. For
  925. * the ACPI 6.1 case, where there are separate
  926. * control regions for the pmem vs blk
  927. * interfaces, be sure to record the extended
  928. * blk details.
  929. */
  930. if (!nfit_mem->dcr)
  931. nfit_mem->dcr = nfit_dcr->dcr;
  932. else if (nfit_mem->dcr->windows == 0
  933. && nfit_dcr->dcr->windows)
  934. nfit_mem->dcr = nfit_dcr->dcr;
  935. break;
  936. }
  937. list_for_each_entry(nfit_flush, &acpi_desc->flushes, list) {
  938. struct acpi_nfit_flush_address *flush;
  939. u16 i;
  940. if (nfit_flush->flush->device_handle != device_handle)
  941. continue;
  942. nfit_mem->nfit_flush = nfit_flush;
  943. flush = nfit_flush->flush;
  944. nfit_mem->flush_wpq = devm_kcalloc(acpi_desc->dev,
  945. flush->hint_count,
  946. sizeof(struct resource),
  947. GFP_KERNEL);
  948. if (!nfit_mem->flush_wpq)
  949. return -ENOMEM;
  950. for (i = 0; i < flush->hint_count; i++) {
  951. struct resource *res = &nfit_mem->flush_wpq[i];
  952. res->start = flush->hint_address[i];
  953. res->end = res->start + 8 - 1;
  954. }
  955. break;
  956. }
  957. if (dcr && !nfit_mem->dcr) {
  958. dev_err(acpi_desc->dev, "SPA %d missing DCR %d\n",
  959. spa->range_index, dcr);
  960. return -ENODEV;
  961. }
  962. if (type == NFIT_SPA_DCR) {
  963. struct nfit_idt *nfit_idt;
  964. u16 idt_idx;
  965. /* multiple dimms may share a SPA when interleaved */
  966. nfit_mem->spa_dcr = spa;
  967. nfit_mem->memdev_dcr = nfit_memdev->memdev;
  968. idt_idx = nfit_memdev->memdev->interleave_index;
  969. list_for_each_entry(nfit_idt, &acpi_desc->idts, list) {
  970. if (nfit_idt->idt->interleave_index != idt_idx)
  971. continue;
  972. nfit_mem->idt_dcr = nfit_idt->idt;
  973. break;
  974. }
  975. nfit_mem_init_bdw(acpi_desc, nfit_mem, spa);
  976. } else if (type == NFIT_SPA_PM) {
  977. /*
  978. * A single dimm may belong to multiple SPA-PM
  979. * ranges, record at least one in addition to
  980. * any SPA-DCR range.
  981. */
  982. nfit_mem->memdev_pmem = nfit_memdev->memdev;
  983. } else
  984. nfit_mem->memdev_dcr = nfit_memdev->memdev;
  985. }
  986. return 0;
  987. }
  988. static int nfit_mem_cmp(void *priv, struct list_head *_a, struct list_head *_b)
  989. {
  990. struct nfit_mem *a = container_of(_a, typeof(*a), list);
  991. struct nfit_mem *b = container_of(_b, typeof(*b), list);
  992. u32 handleA, handleB;
  993. handleA = __to_nfit_memdev(a)->device_handle;
  994. handleB = __to_nfit_memdev(b)->device_handle;
  995. if (handleA < handleB)
  996. return -1;
  997. else if (handleA > handleB)
  998. return 1;
  999. return 0;
  1000. }
  1001. static int nfit_mem_init(struct acpi_nfit_desc *acpi_desc)
  1002. {
  1003. struct nfit_spa *nfit_spa;
  1004. int rc;
  1005. /*
  1006. * For each SPA-DCR or SPA-PMEM address range find its
  1007. * corresponding MEMDEV(s). From each MEMDEV find the
  1008. * corresponding DCR. Then, if we're operating on a SPA-DCR,
  1009. * try to find a SPA-BDW and a corresponding BDW that references
  1010. * the DCR. Throw it all into an nfit_mem object. Note, that
  1011. * BDWs are optional.
  1012. */
  1013. list_for_each_entry(nfit_spa, &acpi_desc->spas, list) {
  1014. rc = __nfit_mem_init(acpi_desc, nfit_spa->spa);
  1015. if (rc)
  1016. return rc;
  1017. }
  1018. /*
  1019. * If a DIMM has failed to be mapped into SPA there will be no
  1020. * SPA entries above. Find and register all the unmapped DIMMs
  1021. * for reporting and recovery purposes.
  1022. */
  1023. rc = __nfit_mem_init(acpi_desc, NULL);
  1024. if (rc)
  1025. return rc;
  1026. list_sort(NULL, &acpi_desc->dimms, nfit_mem_cmp);
  1027. return 0;
  1028. }
  1029. static ssize_t bus_dsm_mask_show(struct device *dev,
  1030. struct device_attribute *attr, char *buf)
  1031. {
  1032. struct nvdimm_bus *nvdimm_bus = to_nvdimm_bus(dev);
  1033. struct nvdimm_bus_descriptor *nd_desc = to_nd_desc(nvdimm_bus);
  1034. return sprintf(buf, "%#lx\n", nd_desc->bus_dsm_mask);
  1035. }
  1036. static struct device_attribute dev_attr_bus_dsm_mask =
  1037. __ATTR(dsm_mask, 0444, bus_dsm_mask_show, NULL);
  1038. static ssize_t revision_show(struct device *dev,
  1039. struct device_attribute *attr, char *buf)
  1040. {
  1041. struct nvdimm_bus *nvdimm_bus = to_nvdimm_bus(dev);
  1042. struct nvdimm_bus_descriptor *nd_desc = to_nd_desc(nvdimm_bus);
  1043. struct acpi_nfit_desc *acpi_desc = to_acpi_desc(nd_desc);
  1044. return sprintf(buf, "%d\n", acpi_desc->acpi_header.revision);
  1045. }
  1046. static DEVICE_ATTR_RO(revision);
  1047. static ssize_t hw_error_scrub_show(struct device *dev,
  1048. struct device_attribute *attr, char *buf)
  1049. {
  1050. struct nvdimm_bus *nvdimm_bus = to_nvdimm_bus(dev);
  1051. struct nvdimm_bus_descriptor *nd_desc = to_nd_desc(nvdimm_bus);
  1052. struct acpi_nfit_desc *acpi_desc = to_acpi_desc(nd_desc);
  1053. return sprintf(buf, "%d\n", acpi_desc->scrub_mode);
  1054. }
  1055. /*
  1056. * The 'hw_error_scrub' attribute can have the following values written to it:
  1057. * '0': Switch to the default mode where an exception will only insert
  1058. * the address of the memory error into the poison and badblocks lists.
  1059. * '1': Enable a full scrub to happen if an exception for a memory error is
  1060. * received.
  1061. */
  1062. static ssize_t hw_error_scrub_store(struct device *dev,
  1063. struct device_attribute *attr, const char *buf, size_t size)
  1064. {
  1065. struct nvdimm_bus_descriptor *nd_desc;
  1066. ssize_t rc;
  1067. long val;
  1068. rc = kstrtol(buf, 0, &val);
  1069. if (rc)
  1070. return rc;
  1071. device_lock(dev);
  1072. nd_desc = dev_get_drvdata(dev);
  1073. if (nd_desc) {
  1074. struct acpi_nfit_desc *acpi_desc = to_acpi_desc(nd_desc);
  1075. switch (val) {
  1076. case HW_ERROR_SCRUB_ON:
  1077. acpi_desc->scrub_mode = HW_ERROR_SCRUB_ON;
  1078. break;
  1079. case HW_ERROR_SCRUB_OFF:
  1080. acpi_desc->scrub_mode = HW_ERROR_SCRUB_OFF;
  1081. break;
  1082. default:
  1083. rc = -EINVAL;
  1084. break;
  1085. }
  1086. }
  1087. device_unlock(dev);
  1088. if (rc)
  1089. return rc;
  1090. return size;
  1091. }
  1092. static DEVICE_ATTR_RW(hw_error_scrub);
  1093. /*
  1094. * This shows the number of full Address Range Scrubs that have been
  1095. * completed since driver load time. Userspace can wait on this using
  1096. * select/poll etc. A '+' at the end indicates an ARS is in progress
  1097. */
  1098. static ssize_t scrub_show(struct device *dev,
  1099. struct device_attribute *attr, char *buf)
  1100. {
  1101. struct nvdimm_bus_descriptor *nd_desc;
  1102. ssize_t rc = -ENXIO;
  1103. device_lock(dev);
  1104. nd_desc = dev_get_drvdata(dev);
  1105. if (nd_desc) {
  1106. struct acpi_nfit_desc *acpi_desc = to_acpi_desc(nd_desc);
  1107. mutex_lock(&acpi_desc->init_mutex);
  1108. rc = sprintf(buf, "%d%s", acpi_desc->scrub_count,
  1109. work_busy(&acpi_desc->dwork.work)
  1110. && !acpi_desc->cancel ? "+\n" : "\n");
  1111. mutex_unlock(&acpi_desc->init_mutex);
  1112. }
  1113. device_unlock(dev);
  1114. return rc;
  1115. }
  1116. static ssize_t scrub_store(struct device *dev,
  1117. struct device_attribute *attr, const char *buf, size_t size)
  1118. {
  1119. struct nvdimm_bus_descriptor *nd_desc;
  1120. ssize_t rc;
  1121. long val;
  1122. rc = kstrtol(buf, 0, &val);
  1123. if (rc)
  1124. return rc;
  1125. if (val != 1)
  1126. return -EINVAL;
  1127. device_lock(dev);
  1128. nd_desc = dev_get_drvdata(dev);
  1129. if (nd_desc) {
  1130. struct acpi_nfit_desc *acpi_desc = to_acpi_desc(nd_desc);
  1131. rc = acpi_nfit_ars_rescan(acpi_desc, 0);
  1132. }
  1133. device_unlock(dev);
  1134. if (rc)
  1135. return rc;
  1136. return size;
  1137. }
  1138. static DEVICE_ATTR_RW(scrub);
  1139. static bool ars_supported(struct nvdimm_bus *nvdimm_bus)
  1140. {
  1141. struct nvdimm_bus_descriptor *nd_desc = to_nd_desc(nvdimm_bus);
  1142. const unsigned long mask = 1 << ND_CMD_ARS_CAP | 1 << ND_CMD_ARS_START
  1143. | 1 << ND_CMD_ARS_STATUS;
  1144. return (nd_desc->cmd_mask & mask) == mask;
  1145. }
  1146. static umode_t nfit_visible(struct kobject *kobj, struct attribute *a, int n)
  1147. {
  1148. struct device *dev = container_of(kobj, struct device, kobj);
  1149. struct nvdimm_bus *nvdimm_bus = to_nvdimm_bus(dev);
  1150. if (a == &dev_attr_scrub.attr && !ars_supported(nvdimm_bus))
  1151. return 0;
  1152. return a->mode;
  1153. }
  1154. static struct attribute *acpi_nfit_attributes[] = {
  1155. &dev_attr_revision.attr,
  1156. &dev_attr_scrub.attr,
  1157. &dev_attr_hw_error_scrub.attr,
  1158. &dev_attr_bus_dsm_mask.attr,
  1159. NULL,
  1160. };
  1161. static const struct attribute_group acpi_nfit_attribute_group = {
  1162. .name = "nfit",
  1163. .attrs = acpi_nfit_attributes,
  1164. .is_visible = nfit_visible,
  1165. };
  1166. static const struct attribute_group *acpi_nfit_attribute_groups[] = {
  1167. &nvdimm_bus_attribute_group,
  1168. &acpi_nfit_attribute_group,
  1169. NULL,
  1170. };
  1171. static struct acpi_nfit_memory_map *to_nfit_memdev(struct device *dev)
  1172. {
  1173. struct nvdimm *nvdimm = to_nvdimm(dev);
  1174. struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm);
  1175. return __to_nfit_memdev(nfit_mem);
  1176. }
  1177. static struct acpi_nfit_control_region *to_nfit_dcr(struct device *dev)
  1178. {
  1179. struct nvdimm *nvdimm = to_nvdimm(dev);
  1180. struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm);
  1181. return nfit_mem->dcr;
  1182. }
  1183. static ssize_t handle_show(struct device *dev,
  1184. struct device_attribute *attr, char *buf)
  1185. {
  1186. struct acpi_nfit_memory_map *memdev = to_nfit_memdev(dev);
  1187. return sprintf(buf, "%#x\n", memdev->device_handle);
  1188. }
  1189. static DEVICE_ATTR_RO(handle);
  1190. static ssize_t phys_id_show(struct device *dev,
  1191. struct device_attribute *attr, char *buf)
  1192. {
  1193. struct acpi_nfit_memory_map *memdev = to_nfit_memdev(dev);
  1194. return sprintf(buf, "%#x\n", memdev->physical_id);
  1195. }
  1196. static DEVICE_ATTR_RO(phys_id);
  1197. static ssize_t vendor_show(struct device *dev,
  1198. struct device_attribute *attr, char *buf)
  1199. {
  1200. struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev);
  1201. return sprintf(buf, "0x%04x\n", be16_to_cpu(dcr->vendor_id));
  1202. }
  1203. static DEVICE_ATTR_RO(vendor);
  1204. static ssize_t rev_id_show(struct device *dev,
  1205. struct device_attribute *attr, char *buf)
  1206. {
  1207. struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev);
  1208. return sprintf(buf, "0x%04x\n", be16_to_cpu(dcr->revision_id));
  1209. }
  1210. static DEVICE_ATTR_RO(rev_id);
  1211. static ssize_t device_show(struct device *dev,
  1212. struct device_attribute *attr, char *buf)
  1213. {
  1214. struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev);
  1215. return sprintf(buf, "0x%04x\n", be16_to_cpu(dcr->device_id));
  1216. }
  1217. static DEVICE_ATTR_RO(device);
  1218. static ssize_t subsystem_vendor_show(struct device *dev,
  1219. struct device_attribute *attr, char *buf)
  1220. {
  1221. struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev);
  1222. return sprintf(buf, "0x%04x\n", be16_to_cpu(dcr->subsystem_vendor_id));
  1223. }
  1224. static DEVICE_ATTR_RO(subsystem_vendor);
  1225. static ssize_t subsystem_rev_id_show(struct device *dev,
  1226. struct device_attribute *attr, char *buf)
  1227. {
  1228. struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev);
  1229. return sprintf(buf, "0x%04x\n",
  1230. be16_to_cpu(dcr->subsystem_revision_id));
  1231. }
  1232. static DEVICE_ATTR_RO(subsystem_rev_id);
  1233. static ssize_t subsystem_device_show(struct device *dev,
  1234. struct device_attribute *attr, char *buf)
  1235. {
  1236. struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev);
  1237. return sprintf(buf, "0x%04x\n", be16_to_cpu(dcr->subsystem_device_id));
  1238. }
  1239. static DEVICE_ATTR_RO(subsystem_device);
  1240. static int num_nvdimm_formats(struct nvdimm *nvdimm)
  1241. {
  1242. struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm);
  1243. int formats = 0;
  1244. if (nfit_mem->memdev_pmem)
  1245. formats++;
  1246. if (nfit_mem->memdev_bdw)
  1247. formats++;
  1248. return formats;
  1249. }
  1250. static ssize_t format_show(struct device *dev,
  1251. struct device_attribute *attr, char *buf)
  1252. {
  1253. struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev);
  1254. return sprintf(buf, "0x%04x\n", le16_to_cpu(dcr->code));
  1255. }
  1256. static DEVICE_ATTR_RO(format);
  1257. static ssize_t format1_show(struct device *dev,
  1258. struct device_attribute *attr, char *buf)
  1259. {
  1260. u32 handle;
  1261. ssize_t rc = -ENXIO;
  1262. struct nfit_mem *nfit_mem;
  1263. struct nfit_memdev *nfit_memdev;
  1264. struct acpi_nfit_desc *acpi_desc;
  1265. struct nvdimm *nvdimm = to_nvdimm(dev);
  1266. struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev);
  1267. nfit_mem = nvdimm_provider_data(nvdimm);
  1268. acpi_desc = nfit_mem->acpi_desc;
  1269. handle = to_nfit_memdev(dev)->device_handle;
  1270. /* assumes DIMMs have at most 2 published interface codes */
  1271. mutex_lock(&acpi_desc->init_mutex);
  1272. list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) {
  1273. struct acpi_nfit_memory_map *memdev = nfit_memdev->memdev;
  1274. struct nfit_dcr *nfit_dcr;
  1275. if (memdev->device_handle != handle)
  1276. continue;
  1277. list_for_each_entry(nfit_dcr, &acpi_desc->dcrs, list) {
  1278. if (nfit_dcr->dcr->region_index != memdev->region_index)
  1279. continue;
  1280. if (nfit_dcr->dcr->code == dcr->code)
  1281. continue;
  1282. rc = sprintf(buf, "0x%04x\n",
  1283. le16_to_cpu(nfit_dcr->dcr->code));
  1284. break;
  1285. }
  1286. if (rc != ENXIO)
  1287. break;
  1288. }
  1289. mutex_unlock(&acpi_desc->init_mutex);
  1290. return rc;
  1291. }
  1292. static DEVICE_ATTR_RO(format1);
  1293. static ssize_t formats_show(struct device *dev,
  1294. struct device_attribute *attr, char *buf)
  1295. {
  1296. struct nvdimm *nvdimm = to_nvdimm(dev);
  1297. return sprintf(buf, "%d\n", num_nvdimm_formats(nvdimm));
  1298. }
  1299. static DEVICE_ATTR_RO(formats);
  1300. static ssize_t serial_show(struct device *dev,
  1301. struct device_attribute *attr, char *buf)
  1302. {
  1303. struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev);
  1304. return sprintf(buf, "0x%08x\n", be32_to_cpu(dcr->serial_number));
  1305. }
  1306. static DEVICE_ATTR_RO(serial);
  1307. static ssize_t family_show(struct device *dev,
  1308. struct device_attribute *attr, char *buf)
  1309. {
  1310. struct nvdimm *nvdimm = to_nvdimm(dev);
  1311. struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm);
  1312. if (nfit_mem->family < 0)
  1313. return -ENXIO;
  1314. return sprintf(buf, "%d\n", nfit_mem->family);
  1315. }
  1316. static DEVICE_ATTR_RO(family);
  1317. static ssize_t dsm_mask_show(struct device *dev,
  1318. struct device_attribute *attr, char *buf)
  1319. {
  1320. struct nvdimm *nvdimm = to_nvdimm(dev);
  1321. struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm);
  1322. if (nfit_mem->family < 0)
  1323. return -ENXIO;
  1324. return sprintf(buf, "%#lx\n", nfit_mem->dsm_mask);
  1325. }
  1326. static DEVICE_ATTR_RO(dsm_mask);
  1327. static ssize_t flags_show(struct device *dev,
  1328. struct device_attribute *attr, char *buf)
  1329. {
  1330. u16 flags = to_nfit_memdev(dev)->flags;
  1331. return sprintf(buf, "%s%s%s%s%s%s%s\n",
  1332. flags & ACPI_NFIT_MEM_SAVE_FAILED ? "save_fail " : "",
  1333. flags & ACPI_NFIT_MEM_RESTORE_FAILED ? "restore_fail " : "",
  1334. flags & ACPI_NFIT_MEM_FLUSH_FAILED ? "flush_fail " : "",
  1335. flags & ACPI_NFIT_MEM_NOT_ARMED ? "not_armed " : "",
  1336. flags & ACPI_NFIT_MEM_HEALTH_OBSERVED ? "smart_event " : "",
  1337. flags & ACPI_NFIT_MEM_MAP_FAILED ? "map_fail " : "",
  1338. flags & ACPI_NFIT_MEM_HEALTH_ENABLED ? "smart_notify " : "");
  1339. }
  1340. static DEVICE_ATTR_RO(flags);
  1341. static ssize_t id_show(struct device *dev,
  1342. struct device_attribute *attr, char *buf)
  1343. {
  1344. struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev);
  1345. if (dcr->valid_fields & ACPI_NFIT_CONTROL_MFG_INFO_VALID)
  1346. return sprintf(buf, "%04x-%02x-%04x-%08x\n",
  1347. be16_to_cpu(dcr->vendor_id),
  1348. dcr->manufacturing_location,
  1349. be16_to_cpu(dcr->manufacturing_date),
  1350. be32_to_cpu(dcr->serial_number));
  1351. else
  1352. return sprintf(buf, "%04x-%08x\n",
  1353. be16_to_cpu(dcr->vendor_id),
  1354. be32_to_cpu(dcr->serial_number));
  1355. }
  1356. static DEVICE_ATTR_RO(id);
  1357. static struct attribute *acpi_nfit_dimm_attributes[] = {
  1358. &dev_attr_handle.attr,
  1359. &dev_attr_phys_id.attr,
  1360. &dev_attr_vendor.attr,
  1361. &dev_attr_device.attr,
  1362. &dev_attr_rev_id.attr,
  1363. &dev_attr_subsystem_vendor.attr,
  1364. &dev_attr_subsystem_device.attr,
  1365. &dev_attr_subsystem_rev_id.attr,
  1366. &dev_attr_format.attr,
  1367. &dev_attr_formats.attr,
  1368. &dev_attr_format1.attr,
  1369. &dev_attr_serial.attr,
  1370. &dev_attr_flags.attr,
  1371. &dev_attr_id.attr,
  1372. &dev_attr_family.attr,
  1373. &dev_attr_dsm_mask.attr,
  1374. NULL,
  1375. };
  1376. static umode_t acpi_nfit_dimm_attr_visible(struct kobject *kobj,
  1377. struct attribute *a, int n)
  1378. {
  1379. struct device *dev = container_of(kobj, struct device, kobj);
  1380. struct nvdimm *nvdimm = to_nvdimm(dev);
  1381. if (!to_nfit_dcr(dev)) {
  1382. /* Without a dcr only the memdev attributes can be surfaced */
  1383. if (a == &dev_attr_handle.attr || a == &dev_attr_phys_id.attr
  1384. || a == &dev_attr_flags.attr
  1385. || a == &dev_attr_family.attr
  1386. || a == &dev_attr_dsm_mask.attr)
  1387. return a->mode;
  1388. return 0;
  1389. }
  1390. if (a == &dev_attr_format1.attr && num_nvdimm_formats(nvdimm) <= 1)
  1391. return 0;
  1392. return a->mode;
  1393. }
  1394. static const struct attribute_group acpi_nfit_dimm_attribute_group = {
  1395. .name = "nfit",
  1396. .attrs = acpi_nfit_dimm_attributes,
  1397. .is_visible = acpi_nfit_dimm_attr_visible,
  1398. };
  1399. static const struct attribute_group *acpi_nfit_dimm_attribute_groups[] = {
  1400. &nvdimm_attribute_group,
  1401. &nd_device_attribute_group,
  1402. &acpi_nfit_dimm_attribute_group,
  1403. NULL,
  1404. };
  1405. static struct nvdimm *acpi_nfit_dimm_by_handle(struct acpi_nfit_desc *acpi_desc,
  1406. u32 device_handle)
  1407. {
  1408. struct nfit_mem *nfit_mem;
  1409. list_for_each_entry(nfit_mem, &acpi_desc->dimms, list)
  1410. if (__to_nfit_memdev(nfit_mem)->device_handle == device_handle)
  1411. return nfit_mem->nvdimm;
  1412. return NULL;
  1413. }
  1414. void __acpi_nvdimm_notify(struct device *dev, u32 event)
  1415. {
  1416. struct nfit_mem *nfit_mem;
  1417. struct acpi_nfit_desc *acpi_desc;
  1418. dev_dbg(dev->parent, "%s: event: %d\n", dev_name(dev),
  1419. event);
  1420. if (event != NFIT_NOTIFY_DIMM_HEALTH) {
  1421. dev_dbg(dev->parent, "%s: unknown event: %d\n", dev_name(dev),
  1422. event);
  1423. return;
  1424. }
  1425. acpi_desc = dev_get_drvdata(dev->parent);
  1426. if (!acpi_desc)
  1427. return;
  1428. /*
  1429. * If we successfully retrieved acpi_desc, then we know nfit_mem data
  1430. * is still valid.
  1431. */
  1432. nfit_mem = dev_get_drvdata(dev);
  1433. if (nfit_mem && nfit_mem->flags_attr)
  1434. sysfs_notify_dirent(nfit_mem->flags_attr);
  1435. }
  1436. EXPORT_SYMBOL_GPL(__acpi_nvdimm_notify);
  1437. static void acpi_nvdimm_notify(acpi_handle handle, u32 event, void *data)
  1438. {
  1439. struct acpi_device *adev = data;
  1440. struct device *dev = &adev->dev;
  1441. device_lock(dev->parent);
  1442. __acpi_nvdimm_notify(dev, event);
  1443. device_unlock(dev->parent);
  1444. }
  1445. static bool acpi_nvdimm_has_method(struct acpi_device *adev, char *method)
  1446. {
  1447. acpi_handle handle;
  1448. acpi_status status;
  1449. status = acpi_get_handle(adev->handle, method, &handle);
  1450. if (ACPI_SUCCESS(status))
  1451. return true;
  1452. return false;
  1453. }
  1454. static int acpi_nfit_add_dimm(struct acpi_nfit_desc *acpi_desc,
  1455. struct nfit_mem *nfit_mem, u32 device_handle)
  1456. {
  1457. struct acpi_device *adev, *adev_dimm;
  1458. struct device *dev = acpi_desc->dev;
  1459. unsigned long dsm_mask;
  1460. const guid_t *guid;
  1461. int i;
  1462. int family = -1;
  1463. /* nfit test assumes 1:1 relationship between commands and dsms */
  1464. nfit_mem->dsm_mask = acpi_desc->dimm_cmd_force_en;
  1465. nfit_mem->family = NVDIMM_FAMILY_INTEL;
  1466. adev = to_acpi_dev(acpi_desc);
  1467. if (!adev)
  1468. return 0;
  1469. adev_dimm = acpi_find_child_device(adev, device_handle, false);
  1470. nfit_mem->adev = adev_dimm;
  1471. if (!adev_dimm) {
  1472. dev_err(dev, "no ACPI.NFIT device with _ADR %#x, disabling...\n",
  1473. device_handle);
  1474. return force_enable_dimms ? 0 : -ENODEV;
  1475. }
  1476. if (ACPI_FAILURE(acpi_install_notify_handler(adev_dimm->handle,
  1477. ACPI_DEVICE_NOTIFY, acpi_nvdimm_notify, adev_dimm))) {
  1478. dev_err(dev, "%s: notification registration failed\n",
  1479. dev_name(&adev_dimm->dev));
  1480. return -ENXIO;
  1481. }
  1482. /*
  1483. * Record nfit_mem for the notification path to track back to
  1484. * the nfit sysfs attributes for this dimm device object.
  1485. */
  1486. dev_set_drvdata(&adev_dimm->dev, nfit_mem);
  1487. /*
  1488. * Until standardization materializes we need to consider 4
  1489. * different command sets. Note, that checking for function0 (bit0)
  1490. * tells us if any commands are reachable through this GUID.
  1491. */
  1492. for (i = 0; i <= NVDIMM_FAMILY_MAX; i++)
  1493. if (acpi_check_dsm(adev_dimm->handle, to_nfit_uuid(i), 1, 1))
  1494. if (family < 0 || i == default_dsm_family)
  1495. family = i;
  1496. /* limit the supported commands to those that are publicly documented */
  1497. nfit_mem->family = family;
  1498. if (override_dsm_mask && !disable_vendor_specific)
  1499. dsm_mask = override_dsm_mask;
  1500. else if (nfit_mem->family == NVDIMM_FAMILY_INTEL) {
  1501. dsm_mask = NVDIMM_INTEL_CMDMASK;
  1502. if (disable_vendor_specific)
  1503. dsm_mask &= ~(1 << ND_CMD_VENDOR);
  1504. } else if (nfit_mem->family == NVDIMM_FAMILY_HPE1) {
  1505. dsm_mask = 0x1c3c76;
  1506. } else if (nfit_mem->family == NVDIMM_FAMILY_HPE2) {
  1507. dsm_mask = 0x1fe;
  1508. if (disable_vendor_specific)
  1509. dsm_mask &= ~(1 << 8);
  1510. } else if (nfit_mem->family == NVDIMM_FAMILY_MSFT) {
  1511. dsm_mask = 0xffffffff;
  1512. } else {
  1513. dev_dbg(dev, "unknown dimm command family\n");
  1514. nfit_mem->family = -1;
  1515. /* DSMs are optional, continue loading the driver... */
  1516. return 0;
  1517. }
  1518. guid = to_nfit_uuid(nfit_mem->family);
  1519. for_each_set_bit(i, &dsm_mask, BITS_PER_LONG)
  1520. if (acpi_check_dsm(adev_dimm->handle, guid,
  1521. nfit_dsm_revid(nfit_mem->family, i),
  1522. 1ULL << i))
  1523. set_bit(i, &nfit_mem->dsm_mask);
  1524. if (acpi_nvdimm_has_method(adev_dimm, "_LSI")
  1525. && acpi_nvdimm_has_method(adev_dimm, "_LSR")) {
  1526. dev_dbg(dev, "%s: has _LSR\n", dev_name(&adev_dimm->dev));
  1527. nfit_mem->has_lsr = true;
  1528. }
  1529. if (nfit_mem->has_lsr && acpi_nvdimm_has_method(adev_dimm, "_LSW")) {
  1530. dev_dbg(dev, "%s: has _LSW\n", dev_name(&adev_dimm->dev));
  1531. nfit_mem->has_lsw = true;
  1532. }
  1533. return 0;
  1534. }
  1535. static void shutdown_dimm_notify(void *data)
  1536. {
  1537. struct acpi_nfit_desc *acpi_desc = data;
  1538. struct nfit_mem *nfit_mem;
  1539. mutex_lock(&acpi_desc->init_mutex);
  1540. /*
  1541. * Clear out the nfit_mem->flags_attr and shut down dimm event
  1542. * notifications.
  1543. */
  1544. list_for_each_entry(nfit_mem, &acpi_desc->dimms, list) {
  1545. struct acpi_device *adev_dimm = nfit_mem->adev;
  1546. if (nfit_mem->flags_attr) {
  1547. sysfs_put(nfit_mem->flags_attr);
  1548. nfit_mem->flags_attr = NULL;
  1549. }
  1550. if (adev_dimm) {
  1551. acpi_remove_notify_handler(adev_dimm->handle,
  1552. ACPI_DEVICE_NOTIFY, acpi_nvdimm_notify);
  1553. dev_set_drvdata(&adev_dimm->dev, NULL);
  1554. }
  1555. }
  1556. mutex_unlock(&acpi_desc->init_mutex);
  1557. }
  1558. static int acpi_nfit_register_dimms(struct acpi_nfit_desc *acpi_desc)
  1559. {
  1560. struct nfit_mem *nfit_mem;
  1561. int dimm_count = 0, rc;
  1562. struct nvdimm *nvdimm;
  1563. list_for_each_entry(nfit_mem, &acpi_desc->dimms, list) {
  1564. struct acpi_nfit_flush_address *flush;
  1565. unsigned long flags = 0, cmd_mask;
  1566. struct nfit_memdev *nfit_memdev;
  1567. u32 device_handle;
  1568. u16 mem_flags;
  1569. device_handle = __to_nfit_memdev(nfit_mem)->device_handle;
  1570. nvdimm = acpi_nfit_dimm_by_handle(acpi_desc, device_handle);
  1571. if (nvdimm) {
  1572. dimm_count++;
  1573. continue;
  1574. }
  1575. if (nfit_mem->bdw && nfit_mem->memdev_pmem)
  1576. set_bit(NDD_ALIASING, &flags);
  1577. /* collate flags across all memdevs for this dimm */
  1578. list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) {
  1579. struct acpi_nfit_memory_map *dimm_memdev;
  1580. dimm_memdev = __to_nfit_memdev(nfit_mem);
  1581. if (dimm_memdev->device_handle
  1582. != nfit_memdev->memdev->device_handle)
  1583. continue;
  1584. dimm_memdev->flags |= nfit_memdev->memdev->flags;
  1585. }
  1586. mem_flags = __to_nfit_memdev(nfit_mem)->flags;
  1587. if (mem_flags & ACPI_NFIT_MEM_NOT_ARMED)
  1588. set_bit(NDD_UNARMED, &flags);
  1589. rc = acpi_nfit_add_dimm(acpi_desc, nfit_mem, device_handle);
  1590. if (rc)
  1591. continue;
  1592. /*
  1593. * TODO: provide translation for non-NVDIMM_FAMILY_INTEL
  1594. * devices (i.e. from nd_cmd to acpi_dsm) to standardize the
  1595. * userspace interface.
  1596. */
  1597. cmd_mask = 1UL << ND_CMD_CALL;
  1598. if (nfit_mem->family == NVDIMM_FAMILY_INTEL) {
  1599. /*
  1600. * These commands have a 1:1 correspondence
  1601. * between DSM payload and libnvdimm ioctl
  1602. * payload format.
  1603. */
  1604. cmd_mask |= nfit_mem->dsm_mask & NVDIMM_STANDARD_CMDMASK;
  1605. }
  1606. if (nfit_mem->has_lsr) {
  1607. set_bit(ND_CMD_GET_CONFIG_SIZE, &cmd_mask);
  1608. set_bit(ND_CMD_GET_CONFIG_DATA, &cmd_mask);
  1609. }
  1610. if (nfit_mem->has_lsw)
  1611. set_bit(ND_CMD_SET_CONFIG_DATA, &cmd_mask);
  1612. flush = nfit_mem->nfit_flush ? nfit_mem->nfit_flush->flush
  1613. : NULL;
  1614. nvdimm = nvdimm_create(acpi_desc->nvdimm_bus, nfit_mem,
  1615. acpi_nfit_dimm_attribute_groups,
  1616. flags, cmd_mask, flush ? flush->hint_count : 0,
  1617. nfit_mem->flush_wpq);
  1618. if (!nvdimm)
  1619. return -ENOMEM;
  1620. nfit_mem->nvdimm = nvdimm;
  1621. dimm_count++;
  1622. if ((mem_flags & ACPI_NFIT_MEM_FAILED_MASK) == 0)
  1623. continue;
  1624. dev_info(acpi_desc->dev, "%s flags:%s%s%s%s%s\n",
  1625. nvdimm_name(nvdimm),
  1626. mem_flags & ACPI_NFIT_MEM_SAVE_FAILED ? " save_fail" : "",
  1627. mem_flags & ACPI_NFIT_MEM_RESTORE_FAILED ? " restore_fail":"",
  1628. mem_flags & ACPI_NFIT_MEM_FLUSH_FAILED ? " flush_fail" : "",
  1629. mem_flags & ACPI_NFIT_MEM_NOT_ARMED ? " not_armed" : "",
  1630. mem_flags & ACPI_NFIT_MEM_MAP_FAILED ? " map_fail" : "");
  1631. }
  1632. rc = nvdimm_bus_check_dimm_count(acpi_desc->nvdimm_bus, dimm_count);
  1633. if (rc)
  1634. return rc;
  1635. /*
  1636. * Now that dimms are successfully registered, and async registration
  1637. * is flushed, attempt to enable event notification.
  1638. */
  1639. list_for_each_entry(nfit_mem, &acpi_desc->dimms, list) {
  1640. struct kernfs_node *nfit_kernfs;
  1641. nvdimm = nfit_mem->nvdimm;
  1642. if (!nvdimm)
  1643. continue;
  1644. nfit_kernfs = sysfs_get_dirent(nvdimm_kobj(nvdimm)->sd, "nfit");
  1645. if (nfit_kernfs)
  1646. nfit_mem->flags_attr = sysfs_get_dirent(nfit_kernfs,
  1647. "flags");
  1648. sysfs_put(nfit_kernfs);
  1649. if (!nfit_mem->flags_attr)
  1650. dev_warn(acpi_desc->dev, "%s: notifications disabled\n",
  1651. nvdimm_name(nvdimm));
  1652. }
  1653. return devm_add_action_or_reset(acpi_desc->dev, shutdown_dimm_notify,
  1654. acpi_desc);
  1655. }
  1656. /*
  1657. * These constants are private because there are no kernel consumers of
  1658. * these commands.
  1659. */
  1660. enum nfit_aux_cmds {
  1661. NFIT_CMD_TRANSLATE_SPA = 5,
  1662. NFIT_CMD_ARS_INJECT_SET = 7,
  1663. NFIT_CMD_ARS_INJECT_CLEAR = 8,
  1664. NFIT_CMD_ARS_INJECT_GET = 9,
  1665. };
  1666. static void acpi_nfit_init_dsms(struct acpi_nfit_desc *acpi_desc)
  1667. {
  1668. struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc;
  1669. const guid_t *guid = to_nfit_uuid(NFIT_DEV_BUS);
  1670. struct acpi_device *adev;
  1671. unsigned long dsm_mask;
  1672. int i;
  1673. nd_desc->cmd_mask = acpi_desc->bus_cmd_force_en;
  1674. nd_desc->bus_dsm_mask = acpi_desc->bus_nfit_cmd_force_en;
  1675. adev = to_acpi_dev(acpi_desc);
  1676. if (!adev)
  1677. return;
  1678. for (i = ND_CMD_ARS_CAP; i <= ND_CMD_CLEAR_ERROR; i++)
  1679. if (acpi_check_dsm(adev->handle, guid, 1, 1ULL << i))
  1680. set_bit(i, &nd_desc->cmd_mask);
  1681. set_bit(ND_CMD_CALL, &nd_desc->cmd_mask);
  1682. dsm_mask =
  1683. (1 << ND_CMD_ARS_CAP) |
  1684. (1 << ND_CMD_ARS_START) |
  1685. (1 << ND_CMD_ARS_STATUS) |
  1686. (1 << ND_CMD_CLEAR_ERROR) |
  1687. (1 << NFIT_CMD_TRANSLATE_SPA) |
  1688. (1 << NFIT_CMD_ARS_INJECT_SET) |
  1689. (1 << NFIT_CMD_ARS_INJECT_CLEAR) |
  1690. (1 << NFIT_CMD_ARS_INJECT_GET);
  1691. for_each_set_bit(i, &dsm_mask, BITS_PER_LONG)
  1692. if (acpi_check_dsm(adev->handle, guid, 1, 1ULL << i))
  1693. set_bit(i, &nd_desc->bus_dsm_mask);
  1694. }
  1695. static ssize_t range_index_show(struct device *dev,
  1696. struct device_attribute *attr, char *buf)
  1697. {
  1698. struct nd_region *nd_region = to_nd_region(dev);
  1699. struct nfit_spa *nfit_spa = nd_region_provider_data(nd_region);
  1700. return sprintf(buf, "%d\n", nfit_spa->spa->range_index);
  1701. }
  1702. static DEVICE_ATTR_RO(range_index);
  1703. static struct attribute *acpi_nfit_region_attributes[] = {
  1704. &dev_attr_range_index.attr,
  1705. NULL,
  1706. };
  1707. static const struct attribute_group acpi_nfit_region_attribute_group = {
  1708. .name = "nfit",
  1709. .attrs = acpi_nfit_region_attributes,
  1710. };
  1711. static const struct attribute_group *acpi_nfit_region_attribute_groups[] = {
  1712. &nd_region_attribute_group,
  1713. &nd_mapping_attribute_group,
  1714. &nd_device_attribute_group,
  1715. &nd_numa_attribute_group,
  1716. &acpi_nfit_region_attribute_group,
  1717. NULL,
  1718. };
  1719. /* enough info to uniquely specify an interleave set */
  1720. struct nfit_set_info {
  1721. struct nfit_set_info_map {
  1722. u64 region_offset;
  1723. u32 serial_number;
  1724. u32 pad;
  1725. } mapping[0];
  1726. };
  1727. struct nfit_set_info2 {
  1728. struct nfit_set_info_map2 {
  1729. u64 region_offset;
  1730. u32 serial_number;
  1731. u16 vendor_id;
  1732. u16 manufacturing_date;
  1733. u8 manufacturing_location;
  1734. u8 reserved[31];
  1735. } mapping[0];
  1736. };
  1737. static size_t sizeof_nfit_set_info(int num_mappings)
  1738. {
  1739. return sizeof(struct nfit_set_info)
  1740. + num_mappings * sizeof(struct nfit_set_info_map);
  1741. }
  1742. static size_t sizeof_nfit_set_info2(int num_mappings)
  1743. {
  1744. return sizeof(struct nfit_set_info2)
  1745. + num_mappings * sizeof(struct nfit_set_info_map2);
  1746. }
  1747. static int cmp_map_compat(const void *m0, const void *m1)
  1748. {
  1749. const struct nfit_set_info_map *map0 = m0;
  1750. const struct nfit_set_info_map *map1 = m1;
  1751. return memcmp(&map0->region_offset, &map1->region_offset,
  1752. sizeof(u64));
  1753. }
  1754. static int cmp_map(const void *m0, const void *m1)
  1755. {
  1756. const struct nfit_set_info_map *map0 = m0;
  1757. const struct nfit_set_info_map *map1 = m1;
  1758. if (map0->region_offset < map1->region_offset)
  1759. return -1;
  1760. else if (map0->region_offset > map1->region_offset)
  1761. return 1;
  1762. return 0;
  1763. }
  1764. static int cmp_map2(const void *m0, const void *m1)
  1765. {
  1766. const struct nfit_set_info_map2 *map0 = m0;
  1767. const struct nfit_set_info_map2 *map1 = m1;
  1768. if (map0->region_offset < map1->region_offset)
  1769. return -1;
  1770. else if (map0->region_offset > map1->region_offset)
  1771. return 1;
  1772. return 0;
  1773. }
  1774. /* Retrieve the nth entry referencing this spa */
  1775. static struct acpi_nfit_memory_map *memdev_from_spa(
  1776. struct acpi_nfit_desc *acpi_desc, u16 range_index, int n)
  1777. {
  1778. struct nfit_memdev *nfit_memdev;
  1779. list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list)
  1780. if (nfit_memdev->memdev->range_index == range_index)
  1781. if (n-- == 0)
  1782. return nfit_memdev->memdev;
  1783. return NULL;
  1784. }
  1785. static int acpi_nfit_init_interleave_set(struct acpi_nfit_desc *acpi_desc,
  1786. struct nd_region_desc *ndr_desc,
  1787. struct acpi_nfit_system_address *spa)
  1788. {
  1789. struct device *dev = acpi_desc->dev;
  1790. struct nd_interleave_set *nd_set;
  1791. u16 nr = ndr_desc->num_mappings;
  1792. struct nfit_set_info2 *info2;
  1793. struct nfit_set_info *info;
  1794. int i;
  1795. nd_set = devm_kzalloc(dev, sizeof(*nd_set), GFP_KERNEL);
  1796. if (!nd_set)
  1797. return -ENOMEM;
  1798. ndr_desc->nd_set = nd_set;
  1799. guid_copy(&nd_set->type_guid, (guid_t *) spa->range_guid);
  1800. info = devm_kzalloc(dev, sizeof_nfit_set_info(nr), GFP_KERNEL);
  1801. if (!info)
  1802. return -ENOMEM;
  1803. info2 = devm_kzalloc(dev, sizeof_nfit_set_info2(nr), GFP_KERNEL);
  1804. if (!info2)
  1805. return -ENOMEM;
  1806. for (i = 0; i < nr; i++) {
  1807. struct nd_mapping_desc *mapping = &ndr_desc->mapping[i];
  1808. struct nfit_set_info_map *map = &info->mapping[i];
  1809. struct nfit_set_info_map2 *map2 = &info2->mapping[i];
  1810. struct nvdimm *nvdimm = mapping->nvdimm;
  1811. struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm);
  1812. struct acpi_nfit_memory_map *memdev = memdev_from_spa(acpi_desc,
  1813. spa->range_index, i);
  1814. struct acpi_nfit_control_region *dcr = nfit_mem->dcr;
  1815. if (!memdev || !nfit_mem->dcr) {
  1816. dev_err(dev, "%s: failed to find DCR\n", __func__);
  1817. return -ENODEV;
  1818. }
  1819. map->region_offset = memdev->region_offset;
  1820. map->serial_number = dcr->serial_number;
  1821. map2->region_offset = memdev->region_offset;
  1822. map2->serial_number = dcr->serial_number;
  1823. map2->vendor_id = dcr->vendor_id;
  1824. map2->manufacturing_date = dcr->manufacturing_date;
  1825. map2->manufacturing_location = dcr->manufacturing_location;
  1826. }
  1827. /* v1.1 namespaces */
  1828. sort(&info->mapping[0], nr, sizeof(struct nfit_set_info_map),
  1829. cmp_map, NULL);
  1830. nd_set->cookie1 = nd_fletcher64(info, sizeof_nfit_set_info(nr), 0);
  1831. /* v1.2 namespaces */
  1832. sort(&info2->mapping[0], nr, sizeof(struct nfit_set_info_map2),
  1833. cmp_map2, NULL);
  1834. nd_set->cookie2 = nd_fletcher64(info2, sizeof_nfit_set_info2(nr), 0);
  1835. /* support v1.1 namespaces created with the wrong sort order */
  1836. sort(&info->mapping[0], nr, sizeof(struct nfit_set_info_map),
  1837. cmp_map_compat, NULL);
  1838. nd_set->altcookie = nd_fletcher64(info, sizeof_nfit_set_info(nr), 0);
  1839. /* record the result of the sort for the mapping position */
  1840. for (i = 0; i < nr; i++) {
  1841. struct nfit_set_info_map2 *map2 = &info2->mapping[i];
  1842. int j;
  1843. for (j = 0; j < nr; j++) {
  1844. struct nd_mapping_desc *mapping = &ndr_desc->mapping[j];
  1845. struct nvdimm *nvdimm = mapping->nvdimm;
  1846. struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm);
  1847. struct acpi_nfit_control_region *dcr = nfit_mem->dcr;
  1848. if (map2->serial_number == dcr->serial_number &&
  1849. map2->vendor_id == dcr->vendor_id &&
  1850. map2->manufacturing_date == dcr->manufacturing_date &&
  1851. map2->manufacturing_location
  1852. == dcr->manufacturing_location) {
  1853. mapping->position = i;
  1854. break;
  1855. }
  1856. }
  1857. }
  1858. ndr_desc->nd_set = nd_set;
  1859. devm_kfree(dev, info);
  1860. devm_kfree(dev, info2);
  1861. return 0;
  1862. }
  1863. static u64 to_interleave_offset(u64 offset, struct nfit_blk_mmio *mmio)
  1864. {
  1865. struct acpi_nfit_interleave *idt = mmio->idt;
  1866. u32 sub_line_offset, line_index, line_offset;
  1867. u64 line_no, table_skip_count, table_offset;
  1868. line_no = div_u64_rem(offset, mmio->line_size, &sub_line_offset);
  1869. table_skip_count = div_u64_rem(line_no, mmio->num_lines, &line_index);
  1870. line_offset = idt->line_offset[line_index]
  1871. * mmio->line_size;
  1872. table_offset = table_skip_count * mmio->table_size;
  1873. return mmio->base_offset + line_offset + table_offset + sub_line_offset;
  1874. }
  1875. static u32 read_blk_stat(struct nfit_blk *nfit_blk, unsigned int bw)
  1876. {
  1877. struct nfit_blk_mmio *mmio = &nfit_blk->mmio[DCR];
  1878. u64 offset = nfit_blk->stat_offset + mmio->size * bw;
  1879. const u32 STATUS_MASK = 0x80000037;
  1880. if (mmio->num_lines)
  1881. offset = to_interleave_offset(offset, mmio);
  1882. return readl(mmio->addr.base + offset) & STATUS_MASK;
  1883. }
  1884. static void write_blk_ctl(struct nfit_blk *nfit_blk, unsigned int bw,
  1885. resource_size_t dpa, unsigned int len, unsigned int write)
  1886. {
  1887. u64 cmd, offset;
  1888. struct nfit_blk_mmio *mmio = &nfit_blk->mmio[DCR];
  1889. enum {
  1890. BCW_OFFSET_MASK = (1ULL << 48)-1,
  1891. BCW_LEN_SHIFT = 48,
  1892. BCW_LEN_MASK = (1ULL << 8) - 1,
  1893. BCW_CMD_SHIFT = 56,
  1894. };
  1895. cmd = (dpa >> L1_CACHE_SHIFT) & BCW_OFFSET_MASK;
  1896. len = len >> L1_CACHE_SHIFT;
  1897. cmd |= ((u64) len & BCW_LEN_MASK) << BCW_LEN_SHIFT;
  1898. cmd |= ((u64) write) << BCW_CMD_SHIFT;
  1899. offset = nfit_blk->cmd_offset + mmio->size * bw;
  1900. if (mmio->num_lines)
  1901. offset = to_interleave_offset(offset, mmio);
  1902. writeq(cmd, mmio->addr.base + offset);
  1903. nvdimm_flush(nfit_blk->nd_region);
  1904. if (nfit_blk->dimm_flags & NFIT_BLK_DCR_LATCH)
  1905. readq(mmio->addr.base + offset);
  1906. }
  1907. static int acpi_nfit_blk_single_io(struct nfit_blk *nfit_blk,
  1908. resource_size_t dpa, void *iobuf, size_t len, int rw,
  1909. unsigned int lane)
  1910. {
  1911. struct nfit_blk_mmio *mmio = &nfit_blk->mmio[BDW];
  1912. unsigned int copied = 0;
  1913. u64 base_offset;
  1914. int rc;
  1915. base_offset = nfit_blk->bdw_offset + dpa % L1_CACHE_BYTES
  1916. + lane * mmio->size;
  1917. write_blk_ctl(nfit_blk, lane, dpa, len, rw);
  1918. while (len) {
  1919. unsigned int c;
  1920. u64 offset;
  1921. if (mmio->num_lines) {
  1922. u32 line_offset;
  1923. offset = to_interleave_offset(base_offset + copied,
  1924. mmio);
  1925. div_u64_rem(offset, mmio->line_size, &line_offset);
  1926. c = min_t(size_t, len, mmio->line_size - line_offset);
  1927. } else {
  1928. offset = base_offset + nfit_blk->bdw_offset;
  1929. c = len;
  1930. }
  1931. if (rw)
  1932. memcpy_flushcache(mmio->addr.aperture + offset, iobuf + copied, c);
  1933. else {
  1934. if (nfit_blk->dimm_flags & NFIT_BLK_READ_FLUSH)
  1935. arch_invalidate_pmem((void __force *)
  1936. mmio->addr.aperture + offset, c);
  1937. memcpy(iobuf + copied, mmio->addr.aperture + offset, c);
  1938. }
  1939. copied += c;
  1940. len -= c;
  1941. }
  1942. if (rw)
  1943. nvdimm_flush(nfit_blk->nd_region);
  1944. rc = read_blk_stat(nfit_blk, lane) ? -EIO : 0;
  1945. return rc;
  1946. }
  1947. static int acpi_nfit_blk_region_do_io(struct nd_blk_region *ndbr,
  1948. resource_size_t dpa, void *iobuf, u64 len, int rw)
  1949. {
  1950. struct nfit_blk *nfit_blk = nd_blk_region_provider_data(ndbr);
  1951. struct nfit_blk_mmio *mmio = &nfit_blk->mmio[BDW];
  1952. struct nd_region *nd_region = nfit_blk->nd_region;
  1953. unsigned int lane, copied = 0;
  1954. int rc = 0;
  1955. lane = nd_region_acquire_lane(nd_region);
  1956. while (len) {
  1957. u64 c = min(len, mmio->size);
  1958. rc = acpi_nfit_blk_single_io(nfit_blk, dpa + copied,
  1959. iobuf + copied, c, rw, lane);
  1960. if (rc)
  1961. break;
  1962. copied += c;
  1963. len -= c;
  1964. }
  1965. nd_region_release_lane(nd_region, lane);
  1966. return rc;
  1967. }
  1968. static int nfit_blk_init_interleave(struct nfit_blk_mmio *mmio,
  1969. struct acpi_nfit_interleave *idt, u16 interleave_ways)
  1970. {
  1971. if (idt) {
  1972. mmio->num_lines = idt->line_count;
  1973. mmio->line_size = idt->line_size;
  1974. if (interleave_ways == 0)
  1975. return -ENXIO;
  1976. mmio->table_size = mmio->num_lines * interleave_ways
  1977. * mmio->line_size;
  1978. }
  1979. return 0;
  1980. }
  1981. static int acpi_nfit_blk_get_flags(struct nvdimm_bus_descriptor *nd_desc,
  1982. struct nvdimm *nvdimm, struct nfit_blk *nfit_blk)
  1983. {
  1984. struct nd_cmd_dimm_flags flags;
  1985. int rc;
  1986. memset(&flags, 0, sizeof(flags));
  1987. rc = nd_desc->ndctl(nd_desc, nvdimm, ND_CMD_DIMM_FLAGS, &flags,
  1988. sizeof(flags), NULL);
  1989. if (rc >= 0 && flags.status == 0)
  1990. nfit_blk->dimm_flags = flags.flags;
  1991. else if (rc == -ENOTTY) {
  1992. /* fall back to a conservative default */
  1993. nfit_blk->dimm_flags = NFIT_BLK_DCR_LATCH | NFIT_BLK_READ_FLUSH;
  1994. rc = 0;
  1995. } else
  1996. rc = -ENXIO;
  1997. return rc;
  1998. }
  1999. static int acpi_nfit_blk_region_enable(struct nvdimm_bus *nvdimm_bus,
  2000. struct device *dev)
  2001. {
  2002. struct nvdimm_bus_descriptor *nd_desc = to_nd_desc(nvdimm_bus);
  2003. struct nd_blk_region *ndbr = to_nd_blk_region(dev);
  2004. struct nfit_blk_mmio *mmio;
  2005. struct nfit_blk *nfit_blk;
  2006. struct nfit_mem *nfit_mem;
  2007. struct nvdimm *nvdimm;
  2008. int rc;
  2009. nvdimm = nd_blk_region_to_dimm(ndbr);
  2010. nfit_mem = nvdimm_provider_data(nvdimm);
  2011. if (!nfit_mem || !nfit_mem->dcr || !nfit_mem->bdw) {
  2012. dev_dbg(dev, "missing%s%s%s\n",
  2013. nfit_mem ? "" : " nfit_mem",
  2014. (nfit_mem && nfit_mem->dcr) ? "" : " dcr",
  2015. (nfit_mem && nfit_mem->bdw) ? "" : " bdw");
  2016. return -ENXIO;
  2017. }
  2018. nfit_blk = devm_kzalloc(dev, sizeof(*nfit_blk), GFP_KERNEL);
  2019. if (!nfit_blk)
  2020. return -ENOMEM;
  2021. nd_blk_region_set_provider_data(ndbr, nfit_blk);
  2022. nfit_blk->nd_region = to_nd_region(dev);
  2023. /* map block aperture memory */
  2024. nfit_blk->bdw_offset = nfit_mem->bdw->offset;
  2025. mmio = &nfit_blk->mmio[BDW];
  2026. mmio->addr.base = devm_nvdimm_memremap(dev, nfit_mem->spa_bdw->address,
  2027. nfit_mem->spa_bdw->length, nd_blk_memremap_flags(ndbr));
  2028. if (!mmio->addr.base) {
  2029. dev_dbg(dev, "%s failed to map bdw\n",
  2030. nvdimm_name(nvdimm));
  2031. return -ENOMEM;
  2032. }
  2033. mmio->size = nfit_mem->bdw->size;
  2034. mmio->base_offset = nfit_mem->memdev_bdw->region_offset;
  2035. mmio->idt = nfit_mem->idt_bdw;
  2036. mmio->spa = nfit_mem->spa_bdw;
  2037. rc = nfit_blk_init_interleave(mmio, nfit_mem->idt_bdw,
  2038. nfit_mem->memdev_bdw->interleave_ways);
  2039. if (rc) {
  2040. dev_dbg(dev, "%s failed to init bdw interleave\n",
  2041. nvdimm_name(nvdimm));
  2042. return rc;
  2043. }
  2044. /* map block control memory */
  2045. nfit_blk->cmd_offset = nfit_mem->dcr->command_offset;
  2046. nfit_blk->stat_offset = nfit_mem->dcr->status_offset;
  2047. mmio = &nfit_blk->mmio[DCR];
  2048. mmio->addr.base = devm_nvdimm_ioremap(dev, nfit_mem->spa_dcr->address,
  2049. nfit_mem->spa_dcr->length);
  2050. if (!mmio->addr.base) {
  2051. dev_dbg(dev, "%s failed to map dcr\n",
  2052. nvdimm_name(nvdimm));
  2053. return -ENOMEM;
  2054. }
  2055. mmio->size = nfit_mem->dcr->window_size;
  2056. mmio->base_offset = nfit_mem->memdev_dcr->region_offset;
  2057. mmio->idt = nfit_mem->idt_dcr;
  2058. mmio->spa = nfit_mem->spa_dcr;
  2059. rc = nfit_blk_init_interleave(mmio, nfit_mem->idt_dcr,
  2060. nfit_mem->memdev_dcr->interleave_ways);
  2061. if (rc) {
  2062. dev_dbg(dev, "%s failed to init dcr interleave\n",
  2063. nvdimm_name(nvdimm));
  2064. return rc;
  2065. }
  2066. rc = acpi_nfit_blk_get_flags(nd_desc, nvdimm, nfit_blk);
  2067. if (rc < 0) {
  2068. dev_dbg(dev, "%s failed get DIMM flags\n",
  2069. nvdimm_name(nvdimm));
  2070. return rc;
  2071. }
  2072. if (nvdimm_has_flush(nfit_blk->nd_region) < 0)
  2073. dev_warn(dev, "unable to guarantee persistence of writes\n");
  2074. if (mmio->line_size == 0)
  2075. return 0;
  2076. if ((u32) nfit_blk->cmd_offset % mmio->line_size
  2077. + 8 > mmio->line_size) {
  2078. dev_dbg(dev, "cmd_offset crosses interleave boundary\n");
  2079. return -ENXIO;
  2080. } else if ((u32) nfit_blk->stat_offset % mmio->line_size
  2081. + 8 > mmio->line_size) {
  2082. dev_dbg(dev, "stat_offset crosses interleave boundary\n");
  2083. return -ENXIO;
  2084. }
  2085. return 0;
  2086. }
  2087. static int ars_get_cap(struct acpi_nfit_desc *acpi_desc,
  2088. struct nd_cmd_ars_cap *cmd, struct nfit_spa *nfit_spa)
  2089. {
  2090. struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc;
  2091. struct acpi_nfit_system_address *spa = nfit_spa->spa;
  2092. int cmd_rc, rc;
  2093. cmd->address = spa->address;
  2094. cmd->length = spa->length;
  2095. rc = nd_desc->ndctl(nd_desc, NULL, ND_CMD_ARS_CAP, cmd,
  2096. sizeof(*cmd), &cmd_rc);
  2097. if (rc < 0)
  2098. return rc;
  2099. return cmd_rc;
  2100. }
  2101. static int ars_start(struct acpi_nfit_desc *acpi_desc, struct nfit_spa *nfit_spa)
  2102. {
  2103. int rc;
  2104. int cmd_rc;
  2105. struct nd_cmd_ars_start ars_start;
  2106. struct acpi_nfit_system_address *spa = nfit_spa->spa;
  2107. struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc;
  2108. memset(&ars_start, 0, sizeof(ars_start));
  2109. ars_start.address = spa->address;
  2110. ars_start.length = spa->length;
  2111. if (test_bit(ARS_SHORT, &nfit_spa->ars_state))
  2112. ars_start.flags = ND_ARS_RETURN_PREV_DATA;
  2113. if (nfit_spa_type(spa) == NFIT_SPA_PM)
  2114. ars_start.type = ND_ARS_PERSISTENT;
  2115. else if (nfit_spa_type(spa) == NFIT_SPA_VOLATILE)
  2116. ars_start.type = ND_ARS_VOLATILE;
  2117. else
  2118. return -ENOTTY;
  2119. rc = nd_desc->ndctl(nd_desc, NULL, ND_CMD_ARS_START, &ars_start,
  2120. sizeof(ars_start), &cmd_rc);
  2121. if (rc < 0)
  2122. return rc;
  2123. return cmd_rc;
  2124. }
  2125. static int ars_continue(struct acpi_nfit_desc *acpi_desc)
  2126. {
  2127. int rc, cmd_rc;
  2128. struct nd_cmd_ars_start ars_start;
  2129. struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc;
  2130. struct nd_cmd_ars_status *ars_status = acpi_desc->ars_status;
  2131. memset(&ars_start, 0, sizeof(ars_start));
  2132. ars_start.address = ars_status->restart_address;
  2133. ars_start.length = ars_status->restart_length;
  2134. ars_start.type = ars_status->type;
  2135. ars_start.flags = acpi_desc->ars_start_flags;
  2136. rc = nd_desc->ndctl(nd_desc, NULL, ND_CMD_ARS_START, &ars_start,
  2137. sizeof(ars_start), &cmd_rc);
  2138. if (rc < 0)
  2139. return rc;
  2140. return cmd_rc;
  2141. }
  2142. static int ars_get_status(struct acpi_nfit_desc *acpi_desc)
  2143. {
  2144. struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc;
  2145. struct nd_cmd_ars_status *ars_status = acpi_desc->ars_status;
  2146. int rc, cmd_rc;
  2147. rc = nd_desc->ndctl(nd_desc, NULL, ND_CMD_ARS_STATUS, ars_status,
  2148. acpi_desc->max_ars, &cmd_rc);
  2149. if (rc < 0)
  2150. return rc;
  2151. return cmd_rc;
  2152. }
  2153. static void ars_complete(struct acpi_nfit_desc *acpi_desc,
  2154. struct nfit_spa *nfit_spa)
  2155. {
  2156. struct nd_cmd_ars_status *ars_status = acpi_desc->ars_status;
  2157. struct acpi_nfit_system_address *spa = nfit_spa->spa;
  2158. struct nd_region *nd_region = nfit_spa->nd_region;
  2159. struct device *dev;
  2160. if ((ars_status->address >= spa->address && ars_status->address
  2161. < spa->address + spa->length)
  2162. || (ars_status->address < spa->address)) {
  2163. /*
  2164. * Assume that if a scrub starts at an offset from the
  2165. * start of nfit_spa that we are in the continuation
  2166. * case.
  2167. *
  2168. * Otherwise, if the scrub covers the spa range, mark
  2169. * any pending request complete.
  2170. */
  2171. if (ars_status->address + ars_status->length
  2172. >= spa->address + spa->length)
  2173. /* complete */;
  2174. else
  2175. return;
  2176. } else
  2177. return;
  2178. if (test_bit(ARS_DONE, &nfit_spa->ars_state))
  2179. return;
  2180. if (!test_and_clear_bit(ARS_REQ, &nfit_spa->ars_state))
  2181. return;
  2182. if (nd_region) {
  2183. dev = nd_region_dev(nd_region);
  2184. nvdimm_region_notify(nd_region, NVDIMM_REVALIDATE_POISON);
  2185. } else
  2186. dev = acpi_desc->dev;
  2187. dev_dbg(dev, "ARS: range %d %s complete\n", spa->range_index,
  2188. test_bit(ARS_SHORT, &nfit_spa->ars_state)
  2189. ? "short" : "long");
  2190. clear_bit(ARS_SHORT, &nfit_spa->ars_state);
  2191. set_bit(ARS_DONE, &nfit_spa->ars_state);
  2192. }
  2193. static int ars_status_process_records(struct acpi_nfit_desc *acpi_desc)
  2194. {
  2195. struct nvdimm_bus *nvdimm_bus = acpi_desc->nvdimm_bus;
  2196. struct nd_cmd_ars_status *ars_status = acpi_desc->ars_status;
  2197. int rc;
  2198. u32 i;
  2199. /*
  2200. * First record starts at 44 byte offset from the start of the
  2201. * payload.
  2202. */
  2203. if (ars_status->out_length < 44)
  2204. return 0;
  2205. for (i = 0; i < ars_status->num_records; i++) {
  2206. /* only process full records */
  2207. if (ars_status->out_length
  2208. < 44 + sizeof(struct nd_ars_record) * (i + 1))
  2209. break;
  2210. rc = nvdimm_bus_add_badrange(nvdimm_bus,
  2211. ars_status->records[i].err_address,
  2212. ars_status->records[i].length);
  2213. if (rc)
  2214. return rc;
  2215. }
  2216. if (i < ars_status->num_records)
  2217. dev_warn(acpi_desc->dev, "detected truncated ars results\n");
  2218. return 0;
  2219. }
  2220. static void acpi_nfit_remove_resource(void *data)
  2221. {
  2222. struct resource *res = data;
  2223. remove_resource(res);
  2224. }
  2225. static int acpi_nfit_insert_resource(struct acpi_nfit_desc *acpi_desc,
  2226. struct nd_region_desc *ndr_desc)
  2227. {
  2228. struct resource *res, *nd_res = ndr_desc->res;
  2229. int is_pmem, ret;
  2230. /* No operation if the region is already registered as PMEM */
  2231. is_pmem = region_intersects(nd_res->start, resource_size(nd_res),
  2232. IORESOURCE_MEM, IORES_DESC_PERSISTENT_MEMORY);
  2233. if (is_pmem == REGION_INTERSECTS)
  2234. return 0;
  2235. res = devm_kzalloc(acpi_desc->dev, sizeof(*res), GFP_KERNEL);
  2236. if (!res)
  2237. return -ENOMEM;
  2238. res->name = "Persistent Memory";
  2239. res->start = nd_res->start;
  2240. res->end = nd_res->end;
  2241. res->flags = IORESOURCE_MEM;
  2242. res->desc = IORES_DESC_PERSISTENT_MEMORY;
  2243. ret = insert_resource(&iomem_resource, res);
  2244. if (ret)
  2245. return ret;
  2246. ret = devm_add_action_or_reset(acpi_desc->dev,
  2247. acpi_nfit_remove_resource,
  2248. res);
  2249. if (ret)
  2250. return ret;
  2251. return 0;
  2252. }
  2253. static int acpi_nfit_init_mapping(struct acpi_nfit_desc *acpi_desc,
  2254. struct nd_mapping_desc *mapping, struct nd_region_desc *ndr_desc,
  2255. struct acpi_nfit_memory_map *memdev,
  2256. struct nfit_spa *nfit_spa)
  2257. {
  2258. struct nvdimm *nvdimm = acpi_nfit_dimm_by_handle(acpi_desc,
  2259. memdev->device_handle);
  2260. struct acpi_nfit_system_address *spa = nfit_spa->spa;
  2261. struct nd_blk_region_desc *ndbr_desc;
  2262. struct nfit_mem *nfit_mem;
  2263. int rc;
  2264. if (!nvdimm) {
  2265. dev_err(acpi_desc->dev, "spa%d dimm: %#x not found\n",
  2266. spa->range_index, memdev->device_handle);
  2267. return -ENODEV;
  2268. }
  2269. mapping->nvdimm = nvdimm;
  2270. switch (nfit_spa_type(spa)) {
  2271. case NFIT_SPA_PM:
  2272. case NFIT_SPA_VOLATILE:
  2273. mapping->start = memdev->address;
  2274. mapping->size = memdev->region_size;
  2275. break;
  2276. case NFIT_SPA_DCR:
  2277. nfit_mem = nvdimm_provider_data(nvdimm);
  2278. if (!nfit_mem || !nfit_mem->bdw) {
  2279. dev_dbg(acpi_desc->dev, "spa%d %s missing bdw\n",
  2280. spa->range_index, nvdimm_name(nvdimm));
  2281. break;
  2282. }
  2283. mapping->size = nfit_mem->bdw->capacity;
  2284. mapping->start = nfit_mem->bdw->start_address;
  2285. ndr_desc->num_lanes = nfit_mem->bdw->windows;
  2286. ndr_desc->mapping = mapping;
  2287. ndr_desc->num_mappings = 1;
  2288. ndbr_desc = to_blk_region_desc(ndr_desc);
  2289. ndbr_desc->enable = acpi_nfit_blk_region_enable;
  2290. ndbr_desc->do_io = acpi_desc->blk_do_io;
  2291. rc = acpi_nfit_init_interleave_set(acpi_desc, ndr_desc, spa);
  2292. if (rc)
  2293. return rc;
  2294. nfit_spa->nd_region = nvdimm_blk_region_create(acpi_desc->nvdimm_bus,
  2295. ndr_desc);
  2296. if (!nfit_spa->nd_region)
  2297. return -ENOMEM;
  2298. break;
  2299. }
  2300. return 0;
  2301. }
  2302. static bool nfit_spa_is_virtual(struct acpi_nfit_system_address *spa)
  2303. {
  2304. return (nfit_spa_type(spa) == NFIT_SPA_VDISK ||
  2305. nfit_spa_type(spa) == NFIT_SPA_VCD ||
  2306. nfit_spa_type(spa) == NFIT_SPA_PDISK ||
  2307. nfit_spa_type(spa) == NFIT_SPA_PCD);
  2308. }
  2309. static bool nfit_spa_is_volatile(struct acpi_nfit_system_address *spa)
  2310. {
  2311. return (nfit_spa_type(spa) == NFIT_SPA_VDISK ||
  2312. nfit_spa_type(spa) == NFIT_SPA_VCD ||
  2313. nfit_spa_type(spa) == NFIT_SPA_VOLATILE);
  2314. }
  2315. static int acpi_nfit_register_region(struct acpi_nfit_desc *acpi_desc,
  2316. struct nfit_spa *nfit_spa)
  2317. {
  2318. static struct nd_mapping_desc mappings[ND_MAX_MAPPINGS];
  2319. struct acpi_nfit_system_address *spa = nfit_spa->spa;
  2320. struct nd_blk_region_desc ndbr_desc;
  2321. struct nd_region_desc *ndr_desc;
  2322. struct nfit_memdev *nfit_memdev;
  2323. struct nvdimm_bus *nvdimm_bus;
  2324. struct resource res;
  2325. int count = 0, rc;
  2326. if (nfit_spa->nd_region)
  2327. return 0;
  2328. if (spa->range_index == 0 && !nfit_spa_is_virtual(spa)) {
  2329. dev_dbg(acpi_desc->dev, "detected invalid spa index\n");
  2330. return 0;
  2331. }
  2332. memset(&res, 0, sizeof(res));
  2333. memset(&mappings, 0, sizeof(mappings));
  2334. memset(&ndbr_desc, 0, sizeof(ndbr_desc));
  2335. res.start = spa->address;
  2336. res.end = res.start + spa->length - 1;
  2337. ndr_desc = &ndbr_desc.ndr_desc;
  2338. ndr_desc->res = &res;
  2339. ndr_desc->provider_data = nfit_spa;
  2340. ndr_desc->attr_groups = acpi_nfit_region_attribute_groups;
  2341. if (spa->flags & ACPI_NFIT_PROXIMITY_VALID)
  2342. ndr_desc->numa_node = acpi_map_pxm_to_online_node(
  2343. spa->proximity_domain);
  2344. else
  2345. ndr_desc->numa_node = NUMA_NO_NODE;
  2346. /*
  2347. * Persistence domain bits are hierarchical, if
  2348. * ACPI_NFIT_CAPABILITY_CACHE_FLUSH is set then
  2349. * ACPI_NFIT_CAPABILITY_MEM_FLUSH is implied.
  2350. */
  2351. if (acpi_desc->platform_cap & ACPI_NFIT_CAPABILITY_CACHE_FLUSH)
  2352. set_bit(ND_REGION_PERSIST_CACHE, &ndr_desc->flags);
  2353. else if (acpi_desc->platform_cap & ACPI_NFIT_CAPABILITY_MEM_FLUSH)
  2354. set_bit(ND_REGION_PERSIST_MEMCTRL, &ndr_desc->flags);
  2355. list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) {
  2356. struct acpi_nfit_memory_map *memdev = nfit_memdev->memdev;
  2357. struct nd_mapping_desc *mapping;
  2358. if (memdev->range_index != spa->range_index)
  2359. continue;
  2360. if (count >= ND_MAX_MAPPINGS) {
  2361. dev_err(acpi_desc->dev, "spa%d exceeds max mappings %d\n",
  2362. spa->range_index, ND_MAX_MAPPINGS);
  2363. return -ENXIO;
  2364. }
  2365. mapping = &mappings[count++];
  2366. rc = acpi_nfit_init_mapping(acpi_desc, mapping, ndr_desc,
  2367. memdev, nfit_spa);
  2368. if (rc)
  2369. goto out;
  2370. }
  2371. ndr_desc->mapping = mappings;
  2372. ndr_desc->num_mappings = count;
  2373. rc = acpi_nfit_init_interleave_set(acpi_desc, ndr_desc, spa);
  2374. if (rc)
  2375. goto out;
  2376. nvdimm_bus = acpi_desc->nvdimm_bus;
  2377. if (nfit_spa_type(spa) == NFIT_SPA_PM) {
  2378. rc = acpi_nfit_insert_resource(acpi_desc, ndr_desc);
  2379. if (rc) {
  2380. dev_warn(acpi_desc->dev,
  2381. "failed to insert pmem resource to iomem: %d\n",
  2382. rc);
  2383. goto out;
  2384. }
  2385. nfit_spa->nd_region = nvdimm_pmem_region_create(nvdimm_bus,
  2386. ndr_desc);
  2387. if (!nfit_spa->nd_region)
  2388. rc = -ENOMEM;
  2389. } else if (nfit_spa_is_volatile(spa)) {
  2390. nfit_spa->nd_region = nvdimm_volatile_region_create(nvdimm_bus,
  2391. ndr_desc);
  2392. if (!nfit_spa->nd_region)
  2393. rc = -ENOMEM;
  2394. } else if (nfit_spa_is_virtual(spa)) {
  2395. nfit_spa->nd_region = nvdimm_pmem_region_create(nvdimm_bus,
  2396. ndr_desc);
  2397. if (!nfit_spa->nd_region)
  2398. rc = -ENOMEM;
  2399. }
  2400. out:
  2401. if (rc)
  2402. dev_err(acpi_desc->dev, "failed to register spa range %d\n",
  2403. nfit_spa->spa->range_index);
  2404. return rc;
  2405. }
  2406. static int ars_status_alloc(struct acpi_nfit_desc *acpi_desc)
  2407. {
  2408. struct device *dev = acpi_desc->dev;
  2409. struct nd_cmd_ars_status *ars_status;
  2410. if (acpi_desc->ars_status) {
  2411. memset(acpi_desc->ars_status, 0, acpi_desc->max_ars);
  2412. return 0;
  2413. }
  2414. ars_status = devm_kzalloc(dev, acpi_desc->max_ars, GFP_KERNEL);
  2415. if (!ars_status)
  2416. return -ENOMEM;
  2417. acpi_desc->ars_status = ars_status;
  2418. return 0;
  2419. }
  2420. static int acpi_nfit_query_poison(struct acpi_nfit_desc *acpi_desc)
  2421. {
  2422. int rc;
  2423. if (ars_status_alloc(acpi_desc))
  2424. return -ENOMEM;
  2425. rc = ars_get_status(acpi_desc);
  2426. if (rc < 0 && rc != -ENOSPC)
  2427. return rc;
  2428. if (ars_status_process_records(acpi_desc))
  2429. return -ENOMEM;
  2430. return 0;
  2431. }
  2432. static int ars_register(struct acpi_nfit_desc *acpi_desc, struct nfit_spa *nfit_spa,
  2433. int *query_rc)
  2434. {
  2435. int rc = *query_rc;
  2436. if (no_init_ars)
  2437. return acpi_nfit_register_region(acpi_desc, nfit_spa);
  2438. set_bit(ARS_REQ, &nfit_spa->ars_state);
  2439. set_bit(ARS_SHORT, &nfit_spa->ars_state);
  2440. switch (rc) {
  2441. case 0:
  2442. case -EAGAIN:
  2443. rc = ars_start(acpi_desc, nfit_spa);
  2444. if (rc == -EBUSY) {
  2445. *query_rc = rc;
  2446. break;
  2447. } else if (rc == 0) {
  2448. rc = acpi_nfit_query_poison(acpi_desc);
  2449. } else {
  2450. set_bit(ARS_FAILED, &nfit_spa->ars_state);
  2451. break;
  2452. }
  2453. if (rc == -EAGAIN)
  2454. clear_bit(ARS_SHORT, &nfit_spa->ars_state);
  2455. else if (rc == 0)
  2456. ars_complete(acpi_desc, nfit_spa);
  2457. break;
  2458. case -EBUSY:
  2459. case -ENOSPC:
  2460. break;
  2461. default:
  2462. set_bit(ARS_FAILED, &nfit_spa->ars_state);
  2463. break;
  2464. }
  2465. if (test_and_clear_bit(ARS_DONE, &nfit_spa->ars_state))
  2466. set_bit(ARS_REQ, &nfit_spa->ars_state);
  2467. return acpi_nfit_register_region(acpi_desc, nfit_spa);
  2468. }
  2469. static void ars_complete_all(struct acpi_nfit_desc *acpi_desc)
  2470. {
  2471. struct nfit_spa *nfit_spa;
  2472. list_for_each_entry(nfit_spa, &acpi_desc->spas, list) {
  2473. if (test_bit(ARS_FAILED, &nfit_spa->ars_state))
  2474. continue;
  2475. ars_complete(acpi_desc, nfit_spa);
  2476. }
  2477. }
  2478. static unsigned int __acpi_nfit_scrub(struct acpi_nfit_desc *acpi_desc,
  2479. int query_rc)
  2480. {
  2481. unsigned int tmo = acpi_desc->scrub_tmo;
  2482. struct device *dev = acpi_desc->dev;
  2483. struct nfit_spa *nfit_spa;
  2484. if (acpi_desc->cancel)
  2485. return 0;
  2486. if (query_rc == -EBUSY) {
  2487. dev_dbg(dev, "ARS: ARS busy\n");
  2488. return min(30U * 60U, tmo * 2);
  2489. }
  2490. if (query_rc == -ENOSPC) {
  2491. dev_dbg(dev, "ARS: ARS continue\n");
  2492. ars_continue(acpi_desc);
  2493. return 1;
  2494. }
  2495. if (query_rc && query_rc != -EAGAIN) {
  2496. unsigned long long addr, end;
  2497. addr = acpi_desc->ars_status->address;
  2498. end = addr + acpi_desc->ars_status->length;
  2499. dev_dbg(dev, "ARS: %llx-%llx failed (%d)\n", addr, end,
  2500. query_rc);
  2501. }
  2502. ars_complete_all(acpi_desc);
  2503. list_for_each_entry(nfit_spa, &acpi_desc->spas, list) {
  2504. if (test_bit(ARS_FAILED, &nfit_spa->ars_state))
  2505. continue;
  2506. if (test_bit(ARS_REQ, &nfit_spa->ars_state)) {
  2507. int rc = ars_start(acpi_desc, nfit_spa);
  2508. clear_bit(ARS_DONE, &nfit_spa->ars_state);
  2509. dev = nd_region_dev(nfit_spa->nd_region);
  2510. dev_dbg(dev, "ARS: range %d ARS start (%d)\n",
  2511. nfit_spa->spa->range_index, rc);
  2512. if (rc == 0 || rc == -EBUSY)
  2513. return 1;
  2514. dev_err(dev, "ARS: range %d ARS failed (%d)\n",
  2515. nfit_spa->spa->range_index, rc);
  2516. set_bit(ARS_FAILED, &nfit_spa->ars_state);
  2517. }
  2518. }
  2519. return 0;
  2520. }
  2521. static void acpi_nfit_scrub(struct work_struct *work)
  2522. {
  2523. struct acpi_nfit_desc *acpi_desc;
  2524. unsigned int tmo;
  2525. int query_rc;
  2526. acpi_desc = container_of(work, typeof(*acpi_desc), dwork.work);
  2527. mutex_lock(&acpi_desc->init_mutex);
  2528. query_rc = acpi_nfit_query_poison(acpi_desc);
  2529. tmo = __acpi_nfit_scrub(acpi_desc, query_rc);
  2530. if (tmo) {
  2531. queue_delayed_work(nfit_wq, &acpi_desc->dwork, tmo * HZ);
  2532. acpi_desc->scrub_tmo = tmo;
  2533. } else {
  2534. acpi_desc->scrub_count++;
  2535. if (acpi_desc->scrub_count_state)
  2536. sysfs_notify_dirent(acpi_desc->scrub_count_state);
  2537. }
  2538. memset(acpi_desc->ars_status, 0, acpi_desc->max_ars);
  2539. mutex_unlock(&acpi_desc->init_mutex);
  2540. }
  2541. static void acpi_nfit_init_ars(struct acpi_nfit_desc *acpi_desc,
  2542. struct nfit_spa *nfit_spa)
  2543. {
  2544. int type = nfit_spa_type(nfit_spa->spa);
  2545. struct nd_cmd_ars_cap ars_cap;
  2546. int rc;
  2547. memset(&ars_cap, 0, sizeof(ars_cap));
  2548. rc = ars_get_cap(acpi_desc, &ars_cap, nfit_spa);
  2549. if (rc < 0)
  2550. return;
  2551. /* check that the supported scrub types match the spa type */
  2552. if (type == NFIT_SPA_VOLATILE && ((ars_cap.status >> 16)
  2553. & ND_ARS_VOLATILE) == 0)
  2554. return;
  2555. if (type == NFIT_SPA_PM && ((ars_cap.status >> 16)
  2556. & ND_ARS_PERSISTENT) == 0)
  2557. return;
  2558. nfit_spa->max_ars = ars_cap.max_ars_out;
  2559. nfit_spa->clear_err_unit = ars_cap.clear_err_unit;
  2560. acpi_desc->max_ars = max(nfit_spa->max_ars, acpi_desc->max_ars);
  2561. clear_bit(ARS_FAILED, &nfit_spa->ars_state);
  2562. set_bit(ARS_REQ, &nfit_spa->ars_state);
  2563. }
  2564. static int acpi_nfit_register_regions(struct acpi_nfit_desc *acpi_desc)
  2565. {
  2566. struct nfit_spa *nfit_spa;
  2567. int rc, query_rc;
  2568. list_for_each_entry(nfit_spa, &acpi_desc->spas, list) {
  2569. set_bit(ARS_FAILED, &nfit_spa->ars_state);
  2570. switch (nfit_spa_type(nfit_spa->spa)) {
  2571. case NFIT_SPA_VOLATILE:
  2572. case NFIT_SPA_PM:
  2573. acpi_nfit_init_ars(acpi_desc, nfit_spa);
  2574. break;
  2575. }
  2576. }
  2577. /*
  2578. * Reap any results that might be pending before starting new
  2579. * short requests.
  2580. */
  2581. query_rc = acpi_nfit_query_poison(acpi_desc);
  2582. if (query_rc == 0)
  2583. ars_complete_all(acpi_desc);
  2584. list_for_each_entry(nfit_spa, &acpi_desc->spas, list)
  2585. switch (nfit_spa_type(nfit_spa->spa)) {
  2586. case NFIT_SPA_VOLATILE:
  2587. case NFIT_SPA_PM:
  2588. /* register regions and kick off initial ARS run */
  2589. rc = ars_register(acpi_desc, nfit_spa, &query_rc);
  2590. if (rc)
  2591. return rc;
  2592. break;
  2593. case NFIT_SPA_BDW:
  2594. /* nothing to register */
  2595. break;
  2596. case NFIT_SPA_DCR:
  2597. case NFIT_SPA_VDISK:
  2598. case NFIT_SPA_VCD:
  2599. case NFIT_SPA_PDISK:
  2600. case NFIT_SPA_PCD:
  2601. /* register known regions that don't support ARS */
  2602. rc = acpi_nfit_register_region(acpi_desc, nfit_spa);
  2603. if (rc)
  2604. return rc;
  2605. break;
  2606. default:
  2607. /* don't register unknown regions */
  2608. break;
  2609. }
  2610. queue_delayed_work(nfit_wq, &acpi_desc->dwork, 0);
  2611. return 0;
  2612. }
  2613. static int acpi_nfit_check_deletions(struct acpi_nfit_desc *acpi_desc,
  2614. struct nfit_table_prev *prev)
  2615. {
  2616. struct device *dev = acpi_desc->dev;
  2617. if (!list_empty(&prev->spas) ||
  2618. !list_empty(&prev->memdevs) ||
  2619. !list_empty(&prev->dcrs) ||
  2620. !list_empty(&prev->bdws) ||
  2621. !list_empty(&prev->idts) ||
  2622. !list_empty(&prev->flushes)) {
  2623. dev_err(dev, "new nfit deletes entries (unsupported)\n");
  2624. return -ENXIO;
  2625. }
  2626. return 0;
  2627. }
  2628. static int acpi_nfit_desc_init_scrub_attr(struct acpi_nfit_desc *acpi_desc)
  2629. {
  2630. struct device *dev = acpi_desc->dev;
  2631. struct kernfs_node *nfit;
  2632. struct device *bus_dev;
  2633. if (!ars_supported(acpi_desc->nvdimm_bus))
  2634. return 0;
  2635. bus_dev = to_nvdimm_bus_dev(acpi_desc->nvdimm_bus);
  2636. nfit = sysfs_get_dirent(bus_dev->kobj.sd, "nfit");
  2637. if (!nfit) {
  2638. dev_err(dev, "sysfs_get_dirent 'nfit' failed\n");
  2639. return -ENODEV;
  2640. }
  2641. acpi_desc->scrub_count_state = sysfs_get_dirent(nfit, "scrub");
  2642. sysfs_put(nfit);
  2643. if (!acpi_desc->scrub_count_state) {
  2644. dev_err(dev, "sysfs_get_dirent 'scrub' failed\n");
  2645. return -ENODEV;
  2646. }
  2647. return 0;
  2648. }
  2649. static void acpi_nfit_unregister(void *data)
  2650. {
  2651. struct acpi_nfit_desc *acpi_desc = data;
  2652. nvdimm_bus_unregister(acpi_desc->nvdimm_bus);
  2653. }
  2654. int acpi_nfit_init(struct acpi_nfit_desc *acpi_desc, void *data, acpi_size sz)
  2655. {
  2656. struct device *dev = acpi_desc->dev;
  2657. struct nfit_table_prev prev;
  2658. const void *end;
  2659. int rc;
  2660. if (!acpi_desc->nvdimm_bus) {
  2661. acpi_nfit_init_dsms(acpi_desc);
  2662. acpi_desc->nvdimm_bus = nvdimm_bus_register(dev,
  2663. &acpi_desc->nd_desc);
  2664. if (!acpi_desc->nvdimm_bus)
  2665. return -ENOMEM;
  2666. rc = devm_add_action_or_reset(dev, acpi_nfit_unregister,
  2667. acpi_desc);
  2668. if (rc)
  2669. return rc;
  2670. rc = acpi_nfit_desc_init_scrub_attr(acpi_desc);
  2671. if (rc)
  2672. return rc;
  2673. /* register this acpi_desc for mce notifications */
  2674. mutex_lock(&acpi_desc_lock);
  2675. list_add_tail(&acpi_desc->list, &acpi_descs);
  2676. mutex_unlock(&acpi_desc_lock);
  2677. }
  2678. mutex_lock(&acpi_desc->init_mutex);
  2679. INIT_LIST_HEAD(&prev.spas);
  2680. INIT_LIST_HEAD(&prev.memdevs);
  2681. INIT_LIST_HEAD(&prev.dcrs);
  2682. INIT_LIST_HEAD(&prev.bdws);
  2683. INIT_LIST_HEAD(&prev.idts);
  2684. INIT_LIST_HEAD(&prev.flushes);
  2685. list_cut_position(&prev.spas, &acpi_desc->spas,
  2686. acpi_desc->spas.prev);
  2687. list_cut_position(&prev.memdevs, &acpi_desc->memdevs,
  2688. acpi_desc->memdevs.prev);
  2689. list_cut_position(&prev.dcrs, &acpi_desc->dcrs,
  2690. acpi_desc->dcrs.prev);
  2691. list_cut_position(&prev.bdws, &acpi_desc->bdws,
  2692. acpi_desc->bdws.prev);
  2693. list_cut_position(&prev.idts, &acpi_desc->idts,
  2694. acpi_desc->idts.prev);
  2695. list_cut_position(&prev.flushes, &acpi_desc->flushes,
  2696. acpi_desc->flushes.prev);
  2697. end = data + sz;
  2698. while (!IS_ERR_OR_NULL(data))
  2699. data = add_table(acpi_desc, &prev, data, end);
  2700. if (IS_ERR(data)) {
  2701. dev_dbg(dev, "nfit table parsing error: %ld\n", PTR_ERR(data));
  2702. rc = PTR_ERR(data);
  2703. goto out_unlock;
  2704. }
  2705. rc = acpi_nfit_check_deletions(acpi_desc, &prev);
  2706. if (rc)
  2707. goto out_unlock;
  2708. rc = nfit_mem_init(acpi_desc);
  2709. if (rc)
  2710. goto out_unlock;
  2711. rc = acpi_nfit_register_dimms(acpi_desc);
  2712. if (rc)
  2713. goto out_unlock;
  2714. rc = acpi_nfit_register_regions(acpi_desc);
  2715. out_unlock:
  2716. mutex_unlock(&acpi_desc->init_mutex);
  2717. return rc;
  2718. }
  2719. EXPORT_SYMBOL_GPL(acpi_nfit_init);
  2720. static int acpi_nfit_flush_probe(struct nvdimm_bus_descriptor *nd_desc)
  2721. {
  2722. struct acpi_nfit_desc *acpi_desc = to_acpi_nfit_desc(nd_desc);
  2723. struct device *dev = acpi_desc->dev;
  2724. /* Bounce the device lock to flush acpi_nfit_add / acpi_nfit_notify */
  2725. device_lock(dev);
  2726. device_unlock(dev);
  2727. /* Bounce the init_mutex to complete initial registration */
  2728. mutex_lock(&acpi_desc->init_mutex);
  2729. mutex_unlock(&acpi_desc->init_mutex);
  2730. return 0;
  2731. }
  2732. static int acpi_nfit_clear_to_send(struct nvdimm_bus_descriptor *nd_desc,
  2733. struct nvdimm *nvdimm, unsigned int cmd)
  2734. {
  2735. struct acpi_nfit_desc *acpi_desc = to_acpi_nfit_desc(nd_desc);
  2736. if (nvdimm)
  2737. return 0;
  2738. if (cmd != ND_CMD_ARS_START)
  2739. return 0;
  2740. /*
  2741. * The kernel and userspace may race to initiate a scrub, but
  2742. * the scrub thread is prepared to lose that initial race. It
  2743. * just needs guarantees that any ars it initiates are not
  2744. * interrupted by any intervening start reqeusts from userspace.
  2745. */
  2746. if (work_busy(&acpi_desc->dwork.work))
  2747. return -EBUSY;
  2748. return 0;
  2749. }
  2750. int acpi_nfit_ars_rescan(struct acpi_nfit_desc *acpi_desc, unsigned long flags)
  2751. {
  2752. struct device *dev = acpi_desc->dev;
  2753. int scheduled = 0, busy = 0;
  2754. struct nfit_spa *nfit_spa;
  2755. mutex_lock(&acpi_desc->init_mutex);
  2756. if (acpi_desc->cancel) {
  2757. mutex_unlock(&acpi_desc->init_mutex);
  2758. return 0;
  2759. }
  2760. list_for_each_entry(nfit_spa, &acpi_desc->spas, list) {
  2761. int type = nfit_spa_type(nfit_spa->spa);
  2762. if (type != NFIT_SPA_PM && type != NFIT_SPA_VOLATILE)
  2763. continue;
  2764. if (test_bit(ARS_FAILED, &nfit_spa->ars_state))
  2765. continue;
  2766. if (test_and_set_bit(ARS_REQ, &nfit_spa->ars_state))
  2767. busy++;
  2768. else {
  2769. if (test_bit(ARS_SHORT, &flags))
  2770. set_bit(ARS_SHORT, &nfit_spa->ars_state);
  2771. scheduled++;
  2772. }
  2773. }
  2774. if (scheduled) {
  2775. queue_delayed_work(nfit_wq, &acpi_desc->dwork, 0);
  2776. dev_dbg(dev, "ars_scan triggered\n");
  2777. }
  2778. mutex_unlock(&acpi_desc->init_mutex);
  2779. if (scheduled)
  2780. return 0;
  2781. if (busy)
  2782. return -EBUSY;
  2783. return -ENOTTY;
  2784. }
  2785. void acpi_nfit_desc_init(struct acpi_nfit_desc *acpi_desc, struct device *dev)
  2786. {
  2787. struct nvdimm_bus_descriptor *nd_desc;
  2788. dev_set_drvdata(dev, acpi_desc);
  2789. acpi_desc->dev = dev;
  2790. acpi_desc->blk_do_io = acpi_nfit_blk_region_do_io;
  2791. nd_desc = &acpi_desc->nd_desc;
  2792. nd_desc->provider_name = "ACPI.NFIT";
  2793. nd_desc->module = THIS_MODULE;
  2794. nd_desc->ndctl = acpi_nfit_ctl;
  2795. nd_desc->flush_probe = acpi_nfit_flush_probe;
  2796. nd_desc->clear_to_send = acpi_nfit_clear_to_send;
  2797. nd_desc->attr_groups = acpi_nfit_attribute_groups;
  2798. INIT_LIST_HEAD(&acpi_desc->spas);
  2799. INIT_LIST_HEAD(&acpi_desc->dcrs);
  2800. INIT_LIST_HEAD(&acpi_desc->bdws);
  2801. INIT_LIST_HEAD(&acpi_desc->idts);
  2802. INIT_LIST_HEAD(&acpi_desc->flushes);
  2803. INIT_LIST_HEAD(&acpi_desc->memdevs);
  2804. INIT_LIST_HEAD(&acpi_desc->dimms);
  2805. INIT_LIST_HEAD(&acpi_desc->list);
  2806. mutex_init(&acpi_desc->init_mutex);
  2807. acpi_desc->scrub_tmo = 1;
  2808. INIT_DELAYED_WORK(&acpi_desc->dwork, acpi_nfit_scrub);
  2809. }
  2810. EXPORT_SYMBOL_GPL(acpi_nfit_desc_init);
  2811. static void acpi_nfit_put_table(void *table)
  2812. {
  2813. acpi_put_table(table);
  2814. }
  2815. void acpi_nfit_shutdown(void *data)
  2816. {
  2817. struct acpi_nfit_desc *acpi_desc = data;
  2818. struct device *bus_dev = to_nvdimm_bus_dev(acpi_desc->nvdimm_bus);
  2819. /*
  2820. * Destruct under acpi_desc_lock so that nfit_handle_mce does not
  2821. * race teardown
  2822. */
  2823. mutex_lock(&acpi_desc_lock);
  2824. list_del(&acpi_desc->list);
  2825. mutex_unlock(&acpi_desc_lock);
  2826. mutex_lock(&acpi_desc->init_mutex);
  2827. acpi_desc->cancel = 1;
  2828. cancel_delayed_work_sync(&acpi_desc->dwork);
  2829. mutex_unlock(&acpi_desc->init_mutex);
  2830. /*
  2831. * Bounce the nvdimm bus lock to make sure any in-flight
  2832. * acpi_nfit_ars_rescan() submissions have had a chance to
  2833. * either submit or see ->cancel set.
  2834. */
  2835. device_lock(bus_dev);
  2836. device_unlock(bus_dev);
  2837. flush_workqueue(nfit_wq);
  2838. }
  2839. EXPORT_SYMBOL_GPL(acpi_nfit_shutdown);
  2840. static int acpi_nfit_add(struct acpi_device *adev)
  2841. {
  2842. struct acpi_buffer buf = { ACPI_ALLOCATE_BUFFER, NULL };
  2843. struct acpi_nfit_desc *acpi_desc;
  2844. struct device *dev = &adev->dev;
  2845. struct acpi_table_header *tbl;
  2846. acpi_status status = AE_OK;
  2847. acpi_size sz;
  2848. int rc = 0;
  2849. status = acpi_get_table(ACPI_SIG_NFIT, 0, &tbl);
  2850. if (ACPI_FAILURE(status)) {
  2851. /* This is ok, we could have an nvdimm hotplugged later */
  2852. dev_dbg(dev, "failed to find NFIT at startup\n");
  2853. return 0;
  2854. }
  2855. rc = devm_add_action_or_reset(dev, acpi_nfit_put_table, tbl);
  2856. if (rc)
  2857. return rc;
  2858. sz = tbl->length;
  2859. acpi_desc = devm_kzalloc(dev, sizeof(*acpi_desc), GFP_KERNEL);
  2860. if (!acpi_desc)
  2861. return -ENOMEM;
  2862. acpi_nfit_desc_init(acpi_desc, &adev->dev);
  2863. /* Save the acpi header for exporting the revision via sysfs */
  2864. acpi_desc->acpi_header = *tbl;
  2865. /* Evaluate _FIT and override with that if present */
  2866. status = acpi_evaluate_object(adev->handle, "_FIT", NULL, &buf);
  2867. if (ACPI_SUCCESS(status) && buf.length > 0) {
  2868. union acpi_object *obj = buf.pointer;
  2869. if (obj->type == ACPI_TYPE_BUFFER)
  2870. rc = acpi_nfit_init(acpi_desc, obj->buffer.pointer,
  2871. obj->buffer.length);
  2872. else
  2873. dev_dbg(dev, "invalid type %d, ignoring _FIT\n",
  2874. (int) obj->type);
  2875. kfree(buf.pointer);
  2876. } else
  2877. /* skip over the lead-in header table */
  2878. rc = acpi_nfit_init(acpi_desc, (void *) tbl
  2879. + sizeof(struct acpi_table_nfit),
  2880. sz - sizeof(struct acpi_table_nfit));
  2881. if (rc)
  2882. return rc;
  2883. return devm_add_action_or_reset(dev, acpi_nfit_shutdown, acpi_desc);
  2884. }
  2885. static int acpi_nfit_remove(struct acpi_device *adev)
  2886. {
  2887. /* see acpi_nfit_unregister */
  2888. return 0;
  2889. }
  2890. static void acpi_nfit_update_notify(struct device *dev, acpi_handle handle)
  2891. {
  2892. struct acpi_nfit_desc *acpi_desc = dev_get_drvdata(dev);
  2893. struct acpi_buffer buf = { ACPI_ALLOCATE_BUFFER, NULL };
  2894. union acpi_object *obj;
  2895. acpi_status status;
  2896. int ret;
  2897. if (!dev->driver) {
  2898. /* dev->driver may be null if we're being removed */
  2899. dev_dbg(dev, "no driver found for dev\n");
  2900. return;
  2901. }
  2902. if (!acpi_desc) {
  2903. acpi_desc = devm_kzalloc(dev, sizeof(*acpi_desc), GFP_KERNEL);
  2904. if (!acpi_desc)
  2905. return;
  2906. acpi_nfit_desc_init(acpi_desc, dev);
  2907. } else {
  2908. /*
  2909. * Finish previous registration before considering new
  2910. * regions.
  2911. */
  2912. flush_workqueue(nfit_wq);
  2913. }
  2914. /* Evaluate _FIT */
  2915. status = acpi_evaluate_object(handle, "_FIT", NULL, &buf);
  2916. if (ACPI_FAILURE(status)) {
  2917. dev_err(dev, "failed to evaluate _FIT\n");
  2918. return;
  2919. }
  2920. obj = buf.pointer;
  2921. if (obj->type == ACPI_TYPE_BUFFER) {
  2922. ret = acpi_nfit_init(acpi_desc, obj->buffer.pointer,
  2923. obj->buffer.length);
  2924. if (ret)
  2925. dev_err(dev, "failed to merge updated NFIT\n");
  2926. } else
  2927. dev_err(dev, "Invalid _FIT\n");
  2928. kfree(buf.pointer);
  2929. }
  2930. static void acpi_nfit_uc_error_notify(struct device *dev, acpi_handle handle)
  2931. {
  2932. struct acpi_nfit_desc *acpi_desc = dev_get_drvdata(dev);
  2933. unsigned long flags = (acpi_desc->scrub_mode == HW_ERROR_SCRUB_ON) ?
  2934. 0 : 1 << ARS_SHORT;
  2935. acpi_nfit_ars_rescan(acpi_desc, flags);
  2936. }
  2937. void __acpi_nfit_notify(struct device *dev, acpi_handle handle, u32 event)
  2938. {
  2939. dev_dbg(dev, "event: 0x%x\n", event);
  2940. switch (event) {
  2941. case NFIT_NOTIFY_UPDATE:
  2942. return acpi_nfit_update_notify(dev, handle);
  2943. case NFIT_NOTIFY_UC_MEMORY_ERROR:
  2944. return acpi_nfit_uc_error_notify(dev, handle);
  2945. default:
  2946. return;
  2947. }
  2948. }
  2949. EXPORT_SYMBOL_GPL(__acpi_nfit_notify);
  2950. static void acpi_nfit_notify(struct acpi_device *adev, u32 event)
  2951. {
  2952. device_lock(&adev->dev);
  2953. __acpi_nfit_notify(&adev->dev, adev->handle, event);
  2954. device_unlock(&adev->dev);
  2955. }
  2956. static const struct acpi_device_id acpi_nfit_ids[] = {
  2957. { "ACPI0012", 0 },
  2958. { "", 0 },
  2959. };
  2960. MODULE_DEVICE_TABLE(acpi, acpi_nfit_ids);
  2961. static struct acpi_driver acpi_nfit_driver = {
  2962. .name = KBUILD_MODNAME,
  2963. .ids = acpi_nfit_ids,
  2964. .ops = {
  2965. .add = acpi_nfit_add,
  2966. .remove = acpi_nfit_remove,
  2967. .notify = acpi_nfit_notify,
  2968. },
  2969. };
  2970. static __init int nfit_init(void)
  2971. {
  2972. int ret;
  2973. BUILD_BUG_ON(sizeof(struct acpi_table_nfit) != 40);
  2974. BUILD_BUG_ON(sizeof(struct acpi_nfit_system_address) != 56);
  2975. BUILD_BUG_ON(sizeof(struct acpi_nfit_memory_map) != 48);
  2976. BUILD_BUG_ON(sizeof(struct acpi_nfit_interleave) != 20);
  2977. BUILD_BUG_ON(sizeof(struct acpi_nfit_smbios) != 9);
  2978. BUILD_BUG_ON(sizeof(struct acpi_nfit_control_region) != 80);
  2979. BUILD_BUG_ON(sizeof(struct acpi_nfit_data_region) != 40);
  2980. BUILD_BUG_ON(sizeof(struct acpi_nfit_capabilities) != 16);
  2981. guid_parse(UUID_VOLATILE_MEMORY, &nfit_uuid[NFIT_SPA_VOLATILE]);
  2982. guid_parse(UUID_PERSISTENT_MEMORY, &nfit_uuid[NFIT_SPA_PM]);
  2983. guid_parse(UUID_CONTROL_REGION, &nfit_uuid[NFIT_SPA_DCR]);
  2984. guid_parse(UUID_DATA_REGION, &nfit_uuid[NFIT_SPA_BDW]);
  2985. guid_parse(UUID_VOLATILE_VIRTUAL_DISK, &nfit_uuid[NFIT_SPA_VDISK]);
  2986. guid_parse(UUID_VOLATILE_VIRTUAL_CD, &nfit_uuid[NFIT_SPA_VCD]);
  2987. guid_parse(UUID_PERSISTENT_VIRTUAL_DISK, &nfit_uuid[NFIT_SPA_PDISK]);
  2988. guid_parse(UUID_PERSISTENT_VIRTUAL_CD, &nfit_uuid[NFIT_SPA_PCD]);
  2989. guid_parse(UUID_NFIT_BUS, &nfit_uuid[NFIT_DEV_BUS]);
  2990. guid_parse(UUID_NFIT_DIMM, &nfit_uuid[NFIT_DEV_DIMM]);
  2991. guid_parse(UUID_NFIT_DIMM_N_HPE1, &nfit_uuid[NFIT_DEV_DIMM_N_HPE1]);
  2992. guid_parse(UUID_NFIT_DIMM_N_HPE2, &nfit_uuid[NFIT_DEV_DIMM_N_HPE2]);
  2993. guid_parse(UUID_NFIT_DIMM_N_MSFT, &nfit_uuid[NFIT_DEV_DIMM_N_MSFT]);
  2994. nfit_wq = create_singlethread_workqueue("nfit");
  2995. if (!nfit_wq)
  2996. return -ENOMEM;
  2997. nfit_mce_register();
  2998. ret = acpi_bus_register_driver(&acpi_nfit_driver);
  2999. if (ret) {
  3000. nfit_mce_unregister();
  3001. destroy_workqueue(nfit_wq);
  3002. }
  3003. return ret;
  3004. }
  3005. static __exit void nfit_exit(void)
  3006. {
  3007. nfit_mce_unregister();
  3008. acpi_bus_unregister_driver(&acpi_nfit_driver);
  3009. destroy_workqueue(nfit_wq);
  3010. WARN_ON(!list_empty(&acpi_descs));
  3011. }
  3012. module_init(nfit_init);
  3013. module_exit(nfit_exit);
  3014. MODULE_LICENSE("GPL v2");
  3015. MODULE_AUTHOR("Intel Corporation");