imx6q-gw5400-a.dts 11 KB

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  1. /*
  2. * Copyright 2013 Gateworks Corporation
  3. *
  4. * The code contained herein is licensed under the GNU General Public
  5. * License. You may obtain a copy of the GNU General Public License
  6. * Version 2 or later at the following locations:
  7. *
  8. * http://www.opensource.org/licenses/gpl-license.html
  9. * http://www.gnu.org/copyleft/gpl.html
  10. */
  11. /dts-v1/;
  12. #include <dt-bindings/gpio/gpio.h>
  13. #include "imx6q.dtsi"
  14. / {
  15. model = "Gateworks Ventana GW5400-A";
  16. compatible = "gw,imx6q-gw5400-a", "gw,ventana", "fsl,imx6q";
  17. /* these are used by bootloader for disabling nodes */
  18. aliases {
  19. ethernet1 = &eth1;
  20. i2c0 = &i2c1;
  21. i2c1 = &i2c2;
  22. i2c2 = &i2c3;
  23. led0 = &led0;
  24. led1 = &led1;
  25. led2 = &led2;
  26. ssi0 = &ssi1;
  27. spi0 = &ecspi1;
  28. usb0 = &usbh1;
  29. usb1 = &usbotg;
  30. };
  31. chosen {
  32. bootargs = "console=ttymxc1,115200";
  33. };
  34. leds {
  35. compatible = "gpio-leds";
  36. pinctrl-names = "default";
  37. pinctrl-0 = <&pinctrl_gpio_leds>;
  38. led0: user1 {
  39. label = "user1";
  40. gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* 102 -> MX6_PANLEDG */
  41. default-state = "on";
  42. linux,default-trigger = "heartbeat";
  43. };
  44. led1: user2 {
  45. label = "user2";
  46. gpios = <&gpio4 10 GPIO_ACTIVE_HIGH>; /* 106 -> MX6_PANLEDR */
  47. default-state = "off";
  48. };
  49. led2: user3 {
  50. label = "user3";
  51. gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; /* 111 -> MX6_LOCLED# */
  52. default-state = "off";
  53. };
  54. };
  55. memory {
  56. reg = <0x10000000 0x40000000>;
  57. };
  58. pps {
  59. compatible = "pps-gpio";
  60. pinctrl-names = "default";
  61. pinctrl-0 = <&pinctrl_gpio_leds>;
  62. gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>;
  63. status = "okay";
  64. };
  65. regulators {
  66. compatible = "simple-bus";
  67. #address-cells = <1>;
  68. #size-cells = <0>;
  69. reg_1p0v: regulator@0 {
  70. compatible = "regulator-fixed";
  71. reg = <0>;
  72. regulator-name = "1P0V";
  73. regulator-min-microvolt = <1000000>;
  74. regulator-max-microvolt = <1000000>;
  75. regulator-always-on;
  76. };
  77. reg_3p3v: regulator@1 {
  78. compatible = "regulator-fixed";
  79. reg = <1>;
  80. regulator-name = "3P3V";
  81. regulator-min-microvolt = <3300000>;
  82. regulator-max-microvolt = <3300000>;
  83. regulator-always-on;
  84. };
  85. reg_usb_h1_vbus: regulator@2 {
  86. compatible = "regulator-fixed";
  87. reg = <2>;
  88. regulator-name = "usb_h1_vbus";
  89. regulator-min-microvolt = <5000000>;
  90. regulator-max-microvolt = <5000000>;
  91. regulator-always-on;
  92. };
  93. reg_usb_otg_vbus: regulator@3 {
  94. compatible = "regulator-fixed";
  95. reg = <3>;
  96. regulator-name = "usb_otg_vbus";
  97. regulator-min-microvolt = <5000000>;
  98. regulator-max-microvolt = <5000000>;
  99. gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
  100. enable-active-high;
  101. };
  102. };
  103. sound {
  104. compatible = "fsl,imx6q-ventana-sgtl5000",
  105. "fsl,imx-audio-sgtl5000";
  106. model = "sgtl5000-audio";
  107. ssi-controller = <&ssi1>;
  108. audio-codec = <&codec>;
  109. audio-routing =
  110. "MIC_IN", "Mic Jack",
  111. "Mic Jack", "Mic Bias",
  112. "Headphone Jack", "HP_OUT";
  113. mux-int-port = <1>;
  114. mux-ext-port = <4>;
  115. };
  116. };
  117. &audmux {
  118. pinctrl-names = "default";
  119. pinctrl-0 = <&pinctrl_audmux>;
  120. status = "okay";
  121. };
  122. &ecspi1 {
  123. fsl,spi-num-chipselects = <1>;
  124. cs-gpios = <&gpio3 19 GPIO_ACTIVE_HIGH>;
  125. pinctrl-names = "default";
  126. pinctrl-0 = <&pinctrl_ecspi1>;
  127. status = "okay";
  128. flash: m25p80@0 {
  129. compatible = "sst,w25q256", "jedec,spi-nor";
  130. spi-max-frequency = <30000000>;
  131. reg = <0>;
  132. };
  133. };
  134. &fec {
  135. pinctrl-names = "default";
  136. pinctrl-0 = <&pinctrl_enet>;
  137. phy-mode = "rgmii-id";
  138. phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_HIGH>;
  139. status = "okay";
  140. };
  141. &hdmi {
  142. ddc-i2c-bus = <&i2c3>;
  143. status = "okay";
  144. };
  145. &i2c1 {
  146. clock-frequency = <100000>;
  147. pinctrl-names = "default";
  148. pinctrl-0 = <&pinctrl_i2c1>;
  149. status = "okay";
  150. eeprom1: eeprom@50 {
  151. compatible = "atmel,24c02";
  152. reg = <0x50>;
  153. pagesize = <16>;
  154. };
  155. eeprom2: eeprom@51 {
  156. compatible = "atmel,24c02";
  157. reg = <0x51>;
  158. pagesize = <16>;
  159. };
  160. eeprom3: eeprom@52 {
  161. compatible = "atmel,24c02";
  162. reg = <0x52>;
  163. pagesize = <16>;
  164. };
  165. eeprom4: eeprom@53 {
  166. compatible = "atmel,24c02";
  167. reg = <0x53>;
  168. pagesize = <16>;
  169. };
  170. gpio: pca9555@23 {
  171. compatible = "nxp,pca9555";
  172. reg = <0x23>;
  173. gpio-controller;
  174. #gpio-cells = <2>;
  175. };
  176. rtc: ds1672@68 {
  177. compatible = "dallas,ds1672";
  178. reg = <0x68>;
  179. };
  180. };
  181. &i2c2 {
  182. clock-frequency = <100000>;
  183. pinctrl-names = "default";
  184. pinctrl-0 = <&pinctrl_i2c2>;
  185. status = "okay";
  186. pmic: pfuze100@08 {
  187. compatible = "fsl,pfuze100";
  188. reg = <0x08>;
  189. regulators {
  190. sw1a_reg: sw1ab {
  191. regulator-min-microvolt = <300000>;
  192. regulator-max-microvolt = <1875000>;
  193. regulator-boot-on;
  194. regulator-always-on;
  195. regulator-ramp-delay = <6250>;
  196. };
  197. sw1c_reg: sw1c {
  198. regulator-min-microvolt = <300000>;
  199. regulator-max-microvolt = <1875000>;
  200. regulator-boot-on;
  201. regulator-always-on;
  202. regulator-ramp-delay = <6250>;
  203. };
  204. sw2_reg: sw2 {
  205. regulator-min-microvolt = <800000>;
  206. regulator-max-microvolt = <3950000>;
  207. regulator-boot-on;
  208. regulator-always-on;
  209. };
  210. sw3a_reg: sw3a {
  211. regulator-min-microvolt = <400000>;
  212. regulator-max-microvolt = <1975000>;
  213. regulator-boot-on;
  214. regulator-always-on;
  215. };
  216. sw3b_reg: sw3b {
  217. regulator-min-microvolt = <400000>;
  218. regulator-max-microvolt = <1975000>;
  219. regulator-boot-on;
  220. regulator-always-on;
  221. };
  222. sw4_reg: sw4 {
  223. regulator-min-microvolt = <800000>;
  224. regulator-max-microvolt = <3300000>;
  225. };
  226. swbst_reg: swbst {
  227. regulator-min-microvolt = <5000000>;
  228. regulator-max-microvolt = <5150000>;
  229. };
  230. snvs_reg: vsnvs {
  231. regulator-min-microvolt = <1000000>;
  232. regulator-max-microvolt = <3000000>;
  233. regulator-boot-on;
  234. regulator-always-on;
  235. };
  236. vref_reg: vrefddr {
  237. regulator-boot-on;
  238. regulator-always-on;
  239. };
  240. vgen1_reg: vgen1 {
  241. regulator-min-microvolt = <800000>;
  242. regulator-max-microvolt = <1550000>;
  243. };
  244. vgen2_reg: vgen2 {
  245. regulator-min-microvolt = <800000>;
  246. regulator-max-microvolt = <1550000>;
  247. };
  248. vgen3_reg: vgen3 {
  249. regulator-min-microvolt = <1800000>;
  250. regulator-max-microvolt = <3300000>;
  251. };
  252. vgen4_reg: vgen4 {
  253. regulator-min-microvolt = <1800000>;
  254. regulator-max-microvolt = <3300000>;
  255. regulator-always-on;
  256. };
  257. vgen5_reg: vgen5 {
  258. regulator-min-microvolt = <1800000>;
  259. regulator-max-microvolt = <3300000>;
  260. regulator-always-on;
  261. };
  262. vgen6_reg: vgen6 {
  263. regulator-min-microvolt = <1800000>;
  264. regulator-max-microvolt = <3300000>;
  265. regulator-always-on;
  266. };
  267. };
  268. };
  269. };
  270. &i2c3 {
  271. clock-frequency = <100000>;
  272. pinctrl-names = "default";
  273. pinctrl-0 = <&pinctrl_i2c3>;
  274. status = "okay";
  275. accelerometer: mma8450@1c {
  276. compatible = "fsl,mma8450";
  277. reg = <0x1c>;
  278. };
  279. codec: sgtl5000@0a {
  280. compatible = "fsl,sgtl5000";
  281. reg = <0x0a>;
  282. clocks = <&clks 201>;
  283. VDDA-supply = <&sw4_reg>;
  284. VDDIO-supply = <&reg_3p3v>;
  285. };
  286. touchscreen: egalax_ts@04 {
  287. compatible = "eeti,egalax_ts";
  288. reg = <0x04>;
  289. interrupt-parent = <&gpio7>;
  290. interrupts = <12 2>;
  291. wakeup-gpios = <&gpio7 12 GPIO_ACTIVE_LOW>;
  292. };
  293. };
  294. &ldb {
  295. status = "okay";
  296. };
  297. &pcie {
  298. reset-gpio = <&gpio1 29 GPIO_ACTIVE_LOW>;
  299. status = "okay";
  300. eth1: sky2@8 { /* MAC/PHY on bus 8 */
  301. compatible = "marvell,sky2";
  302. };
  303. };
  304. &ssi1 {
  305. status = "okay";
  306. };
  307. &uart1 {
  308. pinctrl-names = "default";
  309. pinctrl-0 = <&pinctrl_uart1>;
  310. status = "okay";
  311. };
  312. &uart2 {
  313. pinctrl-names = "default";
  314. pinctrl-0 = <&pinctrl_uart2>;
  315. status = "okay";
  316. };
  317. &uart5 {
  318. pinctrl-names = "default";
  319. pinctrl-0 = <&pinctrl_uart5>;
  320. status = "okay";
  321. };
  322. &usbotg {
  323. vbus-supply = <&reg_usb_otg_vbus>;
  324. pinctrl-names = "default";
  325. pinctrl-0 = <&pinctrl_usbotg>;
  326. disable-over-current;
  327. status = "okay";
  328. };
  329. &usbh1 {
  330. vbus-supply = <&reg_usb_h1_vbus>;
  331. status = "okay";
  332. };
  333. &usdhc3 {
  334. pinctrl-names = "default";
  335. pinctrl-0 = <&pinctrl_usdhc3>;
  336. cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
  337. vmmc-supply = <&reg_3p3v>;
  338. status = "okay";
  339. };
  340. &iomuxc {
  341. imx6q-gw5400-a {
  342. pinctrl_audmux: audmuxgrp {
  343. fsl,pins = <
  344. MX6QDL_PAD_SD2_DAT0__AUD4_RXD 0x130b0
  345. MX6QDL_PAD_SD2_DAT3__AUD4_TXC 0x130b0
  346. MX6QDL_PAD_SD2_DAT2__AUD4_TXD 0x110b0
  347. MX6QDL_PAD_SD2_DAT1__AUD4_TXFS 0x130b0
  348. MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0 /* AUD4_MCK */
  349. >;
  350. };
  351. pinctrl_ecspi1: ecspi1grp {
  352. fsl,pins = <
  353. MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1
  354. MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1
  355. MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1
  356. MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x1b0b0 /* SPINOR_CS0# */
  357. >;
  358. };
  359. pinctrl_enet: enetgrp {
  360. fsl,pins = <
  361. MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
  362. MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
  363. MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
  364. MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
  365. MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
  366. MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
  367. MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
  368. MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
  369. MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
  370. MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
  371. MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
  372. MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
  373. MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
  374. MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
  375. MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
  376. MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
  377. >;
  378. };
  379. pinctrl_gpio_leds: gpioledsgrp {
  380. fsl,pins = <
  381. MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x1b0b0 /* user1 led */
  382. MX6QDL_PAD_KEY_COL2__GPIO4_IO10 0x1b0b0 /* user2 led */
  383. MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x1b0b0 /* user3 led */
  384. >;
  385. };
  386. pinctrl_i2c1: i2c1grp {
  387. fsl,pins = <
  388. MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
  389. MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
  390. >;
  391. };
  392. pinctrl_i2c2: i2c2grp {
  393. fsl,pins = <
  394. MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
  395. MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
  396. >;
  397. };
  398. pinctrl_i2c3: i2c3grp {
  399. fsl,pins = <
  400. MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
  401. MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
  402. >;
  403. };
  404. pinctrl_pcie: pciegrp {
  405. fsl,pins = <
  406. MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x1b0b0 /* PCIE IRQ */
  407. MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x1b0b0 /* PCIE RST */
  408. >;
  409. };
  410. pinctrl_pps: ppsgrp {
  411. fsl,pins = <
  412. MX6QDL_PAD_GPIO_5__GPIO1_IO05 0x1b0b0 /* GPS_PPS */
  413. >;
  414. };
  415. pinctrl_uart1: uart1grp {
  416. fsl,pins = <
  417. MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
  418. MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1
  419. >;
  420. };
  421. pinctrl_uart2: uart2grp {
  422. fsl,pins = <
  423. MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
  424. MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
  425. >;
  426. };
  427. pinctrl_uart5: uart5grp {
  428. fsl,pins = <
  429. MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
  430. MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
  431. >;
  432. };
  433. pinctrl_usbotg: usbotggrp {
  434. fsl,pins = <
  435. MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
  436. MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0 /* OTG_PWR_EN */
  437. >;
  438. };
  439. pinctrl_usdhc3: usdhc3grp {
  440. fsl,pins = <
  441. MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
  442. MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
  443. MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
  444. MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
  445. MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
  446. MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
  447. >;
  448. };
  449. };
  450. };