processor.h 6.0 KB

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  1. /*
  2. * Based on arch/arm/include/asm/processor.h
  3. *
  4. * Copyright (C) 1995-1999 Russell King
  5. * Copyright (C) 2012 ARM Ltd.
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program. If not, see <http://www.gnu.org/licenses/>.
  18. */
  19. #ifndef __ASM_PROCESSOR_H
  20. #define __ASM_PROCESSOR_H
  21. #define TASK_SIZE_64 (UL(1) << VA_BITS)
  22. #define KERNEL_DS UL(-1)
  23. #define USER_DS (TASK_SIZE_64 - 1)
  24. #ifndef __ASSEMBLY__
  25. /*
  26. * Default implementation of macro that returns current
  27. * instruction pointer ("program counter").
  28. */
  29. #define current_text_addr() ({ __label__ _l; _l: &&_l;})
  30. #ifdef __KERNEL__
  31. #include <linux/string.h>
  32. #include <asm/alternative.h>
  33. #include <asm/fpsimd.h>
  34. #include <asm/hw_breakpoint.h>
  35. #include <asm/lse.h>
  36. #include <asm/pgtable-hwdef.h>
  37. #include <asm/ptrace.h>
  38. #include <asm/types.h>
  39. /*
  40. * TASK_SIZE - the maximum size of a user space task.
  41. * TASK_UNMAPPED_BASE - the lower boundary of the mmap VM area.
  42. */
  43. #ifdef CONFIG_COMPAT
  44. #define TASK_SIZE_32 UL(0x100000000)
  45. #define TASK_SIZE (test_thread_flag(TIF_32BIT) ? \
  46. TASK_SIZE_32 : TASK_SIZE_64)
  47. #define TASK_SIZE_OF(tsk) (test_tsk_thread_flag(tsk, TIF_32BIT) ? \
  48. TASK_SIZE_32 : TASK_SIZE_64)
  49. #else
  50. #define TASK_SIZE TASK_SIZE_64
  51. #endif /* CONFIG_COMPAT */
  52. #define TASK_UNMAPPED_BASE (PAGE_ALIGN(TASK_SIZE / 4))
  53. #define STACK_TOP_MAX TASK_SIZE_64
  54. #ifdef CONFIG_COMPAT
  55. #define AARCH32_VECTORS_BASE 0xffff0000
  56. #define STACK_TOP (test_thread_flag(TIF_32BIT) ? \
  57. AARCH32_VECTORS_BASE : STACK_TOP_MAX)
  58. #else
  59. #define STACK_TOP STACK_TOP_MAX
  60. #endif /* CONFIG_COMPAT */
  61. extern phys_addr_t arm64_dma_phys_limit;
  62. #define ARCH_LOW_ADDRESS_LIMIT (arm64_dma_phys_limit - 1)
  63. struct debug_info {
  64. #ifdef CONFIG_HAVE_HW_BREAKPOINT
  65. /* Have we suspended stepping by a debugger? */
  66. int suspended_step;
  67. /* Allow breakpoints and watchpoints to be disabled for this thread. */
  68. int bps_disabled;
  69. int wps_disabled;
  70. /* Hardware breakpoints pinned to this task. */
  71. struct perf_event *hbp_break[ARM_MAX_BRP];
  72. struct perf_event *hbp_watch[ARM_MAX_WRP];
  73. #endif
  74. };
  75. struct cpu_context {
  76. unsigned long x19;
  77. unsigned long x20;
  78. unsigned long x21;
  79. unsigned long x22;
  80. unsigned long x23;
  81. unsigned long x24;
  82. unsigned long x25;
  83. unsigned long x26;
  84. unsigned long x27;
  85. unsigned long x28;
  86. unsigned long fp;
  87. unsigned long sp;
  88. unsigned long pc;
  89. };
  90. struct thread_struct {
  91. struct cpu_context cpu_context; /* cpu context */
  92. unsigned long tp_value; /* TLS register */
  93. #ifdef CONFIG_COMPAT
  94. unsigned long tp2_value;
  95. #endif
  96. struct fpsimd_state fpsimd_state;
  97. void *sve_state; /* SVE registers, if any */
  98. unsigned int sve_vl; /* SVE vector length */
  99. unsigned int sve_vl_onexec; /* SVE vl after next exec */
  100. unsigned long fault_address; /* fault info */
  101. unsigned long fault_code; /* ESR_EL1 value */
  102. struct debug_info debug; /* debugging */
  103. };
  104. /*
  105. * Everything usercopied to/from thread_struct is statically-sized, so
  106. * no hardened usercopy whitelist is needed.
  107. */
  108. static inline void arch_thread_struct_whitelist(unsigned long *offset,
  109. unsigned long *size)
  110. {
  111. *offset = *size = 0;
  112. }
  113. #ifdef CONFIG_COMPAT
  114. #define task_user_tls(t) \
  115. ({ \
  116. unsigned long *__tls; \
  117. if (is_compat_thread(task_thread_info(t))) \
  118. __tls = &(t)->thread.tp2_value; \
  119. else \
  120. __tls = &(t)->thread.tp_value; \
  121. __tls; \
  122. })
  123. #else
  124. #define task_user_tls(t) (&(t)->thread.tp_value)
  125. #endif
  126. /* Sync TPIDR_EL0 back to thread_struct for current */
  127. void tls_preserve_current_state(void);
  128. #define INIT_THREAD { }
  129. static inline void start_thread_common(struct pt_regs *regs, unsigned long pc)
  130. {
  131. memset(regs, 0, sizeof(*regs));
  132. forget_syscall(regs);
  133. regs->pc = pc;
  134. }
  135. static inline void start_thread(struct pt_regs *regs, unsigned long pc,
  136. unsigned long sp)
  137. {
  138. start_thread_common(regs, pc);
  139. regs->pstate = PSR_MODE_EL0t;
  140. regs->sp = sp;
  141. }
  142. #ifdef CONFIG_COMPAT
  143. static inline void compat_start_thread(struct pt_regs *regs, unsigned long pc,
  144. unsigned long sp)
  145. {
  146. start_thread_common(regs, pc);
  147. regs->pstate = COMPAT_PSR_MODE_USR;
  148. if (pc & 1)
  149. regs->pstate |= COMPAT_PSR_T_BIT;
  150. #ifdef __AARCH64EB__
  151. regs->pstate |= COMPAT_PSR_E_BIT;
  152. #endif
  153. regs->compat_sp = sp;
  154. }
  155. #endif
  156. /* Forward declaration, a strange C thing */
  157. struct task_struct;
  158. /* Free all resources held by a thread. */
  159. extern void release_thread(struct task_struct *);
  160. unsigned long get_wchan(struct task_struct *p);
  161. static inline void cpu_relax(void)
  162. {
  163. asm volatile("yield" ::: "memory");
  164. }
  165. /* Thread switching */
  166. extern struct task_struct *cpu_switch_to(struct task_struct *prev,
  167. struct task_struct *next);
  168. #define task_pt_regs(p) \
  169. ((struct pt_regs *)(THREAD_SIZE + task_stack_page(p)) - 1)
  170. #define KSTK_EIP(tsk) ((unsigned long)task_pt_regs(tsk)->pc)
  171. #define KSTK_ESP(tsk) user_stack_pointer(task_pt_regs(tsk))
  172. /*
  173. * Prefetching support
  174. */
  175. #define ARCH_HAS_PREFETCH
  176. static inline void prefetch(const void *ptr)
  177. {
  178. asm volatile("prfm pldl1keep, %a0\n" : : "p" (ptr));
  179. }
  180. #define ARCH_HAS_PREFETCHW
  181. static inline void prefetchw(const void *ptr)
  182. {
  183. asm volatile("prfm pstl1keep, %a0\n" : : "p" (ptr));
  184. }
  185. #define ARCH_HAS_SPINLOCK_PREFETCH
  186. static inline void spin_lock_prefetch(const void *ptr)
  187. {
  188. asm volatile(ARM64_LSE_ATOMIC_INSN(
  189. "prfm pstl1strm, %a0",
  190. "nop") : : "p" (ptr));
  191. }
  192. #define HAVE_ARCH_PICK_MMAP_LAYOUT
  193. #endif
  194. int cpu_enable_pan(void *__unused);
  195. int cpu_enable_cache_maint_trap(void *__unused);
  196. int cpu_clear_disr(void *__unused);
  197. /* Userspace interface for PR_SVE_{SET,GET}_VL prctl()s: */
  198. #define SVE_SET_VL(arg) sve_set_current_vl(arg)
  199. #define SVE_GET_VL() sve_get_current_vl()
  200. #endif /* __ASSEMBLY__ */
  201. #endif /* __ASM_PROCESSOR_H */