bcm7425.dtsi 4.7 KB

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  1. / {
  2. #address-cells = <1>;
  3. #size-cells = <1>;
  4. compatible = "brcm,bcm7425";
  5. cpus {
  6. #address-cells = <1>;
  7. #size-cells = <0>;
  8. mips-hpt-frequency = <163125000>;
  9. cpu@0 {
  10. compatible = "brcm,bmips5000";
  11. device_type = "cpu";
  12. reg = <0>;
  13. };
  14. cpu@1 {
  15. compatible = "brcm,bmips5000";
  16. device_type = "cpu";
  17. reg = <1>;
  18. };
  19. };
  20. aliases {
  21. uart0 = &uart0;
  22. };
  23. cpu_intc: cpu_intc {
  24. #address-cells = <0>;
  25. compatible = "mti,cpu-interrupt-controller";
  26. interrupt-controller;
  27. #interrupt-cells = <1>;
  28. };
  29. clocks {
  30. uart_clk: uart_clk {
  31. compatible = "fixed-clock";
  32. #clock-cells = <0>;
  33. clock-frequency = <81000000>;
  34. };
  35. };
  36. rdb {
  37. #address-cells = <1>;
  38. #size-cells = <1>;
  39. compatible = "simple-bus";
  40. ranges = <0 0x10000000 0x01000000>;
  41. periph_intc: periph_intc@41a400 {
  42. compatible = "brcm,bcm7038-l1-intc";
  43. reg = <0x41a400 0x30>, <0x41a600 0x30>;
  44. interrupt-controller;
  45. #interrupt-cells = <1>;
  46. interrupt-parent = <&cpu_intc>;
  47. interrupts = <2>, <3>;
  48. };
  49. sun_l2_intc: sun_l2_intc@403000 {
  50. compatible = "brcm,l2-intc";
  51. reg = <0x403000 0x30>;
  52. interrupt-controller;
  53. #interrupt-cells = <1>;
  54. interrupt-parent = <&periph_intc>;
  55. interrupts = <47>;
  56. };
  57. gisb-arb@400000 {
  58. compatible = "brcm,bcm7400-gisb-arb";
  59. reg = <0x400000 0xdc>;
  60. native-endian;
  61. interrupt-parent = <&sun_l2_intc>;
  62. interrupts = <0>, <2>;
  63. brcm,gisb-arb-master-mask = <0x177b>;
  64. brcm,gisb-arb-master-names = "ssp_0", "cpu_0", "pcie_0",
  65. "bsp_0", "rdc_0",
  66. "raaga_0", "avd_1",
  67. "jtag_0", "svd_0",
  68. "vice_0";
  69. };
  70. upg_irq0_intc: upg_irq0_intc@406780 {
  71. compatible = "brcm,bcm7120-l2-intc";
  72. reg = <0x406780 0x8>;
  73. brcm,int-map-mask = <0x44>;
  74. brcm,int-fwd-mask = <0x70000>;
  75. interrupt-controller;
  76. #interrupt-cells = <1>;
  77. interrupt-parent = <&periph_intc>;
  78. interrupts = <55>;
  79. };
  80. sun_top_ctrl: syscon@404000 {
  81. compatible = "brcm,bcm7425-sun-top-ctrl", "syscon";
  82. reg = <0x404000 0x51c>;
  83. little-endian;
  84. };
  85. reboot {
  86. compatible = "brcm,brcmstb-reboot";
  87. syscon = <&sun_top_ctrl 0x304 0x308>;
  88. };
  89. uart0: serial@406b00 {
  90. compatible = "ns16550a";
  91. reg = <0x406b00 0x20>;
  92. reg-io-width = <0x4>;
  93. reg-shift = <0x2>;
  94. interrupt-parent = <&periph_intc>;
  95. interrupts = <61>;
  96. clocks = <&uart_clk>;
  97. status = "disabled";
  98. };
  99. enet0: ethernet@b80000 {
  100. phy-mode = "internal";
  101. phy-handle = <&phy1>;
  102. mac-address = [ 00 10 18 36 23 1a ];
  103. compatible = "brcm,genet-v3";
  104. #address-cells = <0x1>;
  105. #size-cells = <0x1>;
  106. reg = <0xb80000 0x11c88>;
  107. interrupts = <17>, <18>;
  108. interrupt-parent = <&periph_intc>;
  109. status = "disabled";
  110. mdio@e14 {
  111. compatible = "brcm,genet-mdio-v3";
  112. #address-cells = <0x1>;
  113. #size-cells = <0x0>;
  114. reg = <0xe14 0x8>;
  115. phy1: ethernet-phy@1 {
  116. max-speed = <100>;
  117. reg = <0x1>;
  118. compatible = "brcm,40nm-ephy",
  119. "ethernet-phy-ieee802.3-c22";
  120. };
  121. };
  122. };
  123. ehci0: usb@480300 {
  124. compatible = "brcm,bcm7425-ehci", "generic-ehci";
  125. reg = <0x480300 0x100>;
  126. native-endian;
  127. interrupt-parent = <&periph_intc>;
  128. interrupts = <65>;
  129. status = "disabled";
  130. };
  131. ohci0: usb@480400 {
  132. compatible = "brcm,bcm7425-ohci", "generic-ohci";
  133. reg = <0x480400 0x100>;
  134. native-endian;
  135. no-big-frame-no;
  136. interrupt-parent = <&periph_intc>;
  137. interrupts = <67>;
  138. status = "disabled";
  139. };
  140. ehci1: usb@480500 {
  141. compatible = "brcm,bcm7425-ehci", "generic-ehci";
  142. reg = <0x480500 0x100>;
  143. native-endian;
  144. interrupt-parent = <&periph_intc>;
  145. interrupts = <66>;
  146. status = "disabled";
  147. };
  148. ohci1: usb@480600 {
  149. compatible = "brcm,bcm7425-ohci", "generic-ohci";
  150. reg = <0x480600 0x100>;
  151. native-endian;
  152. no-big-frame-no;
  153. interrupt-parent = <&periph_intc>;
  154. interrupts = <68>;
  155. status = "disabled";
  156. };
  157. ehci2: usb@490300 {
  158. compatible = "brcm,bcm7425-ehci", "generic-ehci";
  159. reg = <0x490300 0x100>;
  160. native-endian;
  161. interrupt-parent = <&periph_intc>;
  162. interrupts = <70>;
  163. status = "disabled";
  164. };
  165. ohci2: usb@490400 {
  166. compatible = "brcm,bcm7425-ohci", "generic-ohci";
  167. reg = <0x490400 0x100>;
  168. native-endian;
  169. no-big-frame-no;
  170. interrupt-parent = <&periph_intc>;
  171. interrupts = <72>;
  172. status = "disabled";
  173. };
  174. ehci3: usb@490500 {
  175. compatible = "brcm,bcm7425-ehci", "generic-ehci";
  176. reg = <0x490500 0x100>;
  177. native-endian;
  178. interrupt-parent = <&periph_intc>;
  179. interrupts = <71>;
  180. status = "disabled";
  181. };
  182. ohci3: usb@490600 {
  183. compatible = "brcm,bcm7425-ohci", "generic-ohci";
  184. reg = <0x490600 0x100>;
  185. native-endian;
  186. no-big-frame-no;
  187. interrupt-parent = <&periph_intc>;
  188. interrupts = <73>;
  189. status = "disabled";
  190. };
  191. };
  192. };