devs.c 28 KB

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  1. /* linux/arch/arm/plat-samsung/devs.c
  2. *
  3. * Copyright (c) 2011 Samsung Electronics Co., Ltd.
  4. * http://www.samsung.com
  5. *
  6. * Base SAMSUNG platform device definitions
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. */
  12. #include <linux/kernel.h>
  13. #include <linux/types.h>
  14. #include <linux/interrupt.h>
  15. #include <linux/list.h>
  16. #include <linux/timer.h>
  17. #include <linux/init.h>
  18. #include <linux/serial_core.h>
  19. #include <linux/serial_s3c.h>
  20. #include <linux/platform_device.h>
  21. #include <linux/io.h>
  22. #include <linux/slab.h>
  23. #include <linux/string.h>
  24. #include <linux/dma-mapping.h>
  25. #include <linux/fb.h>
  26. #include <linux/gfp.h>
  27. #include <linux/mtd/mtd.h>
  28. #include <linux/mtd/onenand.h>
  29. #include <linux/mtd/partitions.h>
  30. #include <linux/mmc/host.h>
  31. #include <linux/ioport.h>
  32. #include <linux/sizes.h>
  33. #include <linux/platform_data/s3c-hsudc.h>
  34. #include <linux/platform_data/s3c-hsotg.h>
  35. #include <linux/platform_data/dma-s3c24xx.h>
  36. #include <linux/platform_data/media/s5p_hdmi.h>
  37. #include <asm/irq.h>
  38. #include <asm/mach/arch.h>
  39. #include <asm/mach/map.h>
  40. #include <asm/mach/irq.h>
  41. #include <mach/dma.h>
  42. #include <mach/irqs.h>
  43. #include <mach/map.h>
  44. #include <plat/cpu.h>
  45. #include <plat/devs.h>
  46. #include <plat/adc.h>
  47. #include <linux/platform_data/ata-samsung_cf.h>
  48. #include <plat/fb.h>
  49. #include <plat/fb-s3c2410.h>
  50. #include <linux/platform_data/hwmon-s3c.h>
  51. #include <linux/platform_data/i2c-s3c2410.h>
  52. #include <plat/keypad.h>
  53. #include <linux/platform_data/mmc-s3cmci.h>
  54. #include <linux/platform_data/mtd-nand-s3c2410.h>
  55. #include <plat/pwm-core.h>
  56. #include <plat/sdhci.h>
  57. #include <linux/platform_data/touchscreen-s3c2410.h>
  58. #include <linux/platform_data/usb-s3c2410_udc.h>
  59. #include <linux/platform_data/usb-ohci-s3c2410.h>
  60. #include <plat/usb-phy.h>
  61. #include <plat/regs-spi.h>
  62. #include <linux/platform_data/asoc-s3c.h>
  63. #include <linux/platform_data/spi-s3c64xx.h>
  64. #define samsung_device_dma_mask (*((u64[]) { DMA_BIT_MASK(32) }))
  65. /* AC97 */
  66. #ifdef CONFIG_CPU_S3C2440
  67. static struct resource s3c_ac97_resource[] = {
  68. [0] = DEFINE_RES_MEM(S3C2440_PA_AC97, S3C2440_SZ_AC97),
  69. [1] = DEFINE_RES_IRQ(IRQ_S3C244X_AC97),
  70. };
  71. struct platform_device s3c_device_ac97 = {
  72. .name = "samsung-ac97",
  73. .id = -1,
  74. .num_resources = ARRAY_SIZE(s3c_ac97_resource),
  75. .resource = s3c_ac97_resource,
  76. .dev = {
  77. .dma_mask = &samsung_device_dma_mask,
  78. .coherent_dma_mask = DMA_BIT_MASK(32),
  79. }
  80. };
  81. #endif /* CONFIG_CPU_S3C2440 */
  82. /* ADC */
  83. #ifdef CONFIG_PLAT_S3C24XX
  84. static struct resource s3c_adc_resource[] = {
  85. [0] = DEFINE_RES_MEM(S3C24XX_PA_ADC, S3C24XX_SZ_ADC),
  86. [1] = DEFINE_RES_IRQ(IRQ_TC),
  87. [2] = DEFINE_RES_IRQ(IRQ_ADC),
  88. };
  89. struct platform_device s3c_device_adc = {
  90. .name = "s3c24xx-adc",
  91. .id = -1,
  92. .num_resources = ARRAY_SIZE(s3c_adc_resource),
  93. .resource = s3c_adc_resource,
  94. };
  95. #endif /* CONFIG_PLAT_S3C24XX */
  96. #if defined(CONFIG_SAMSUNG_DEV_ADC)
  97. static struct resource s3c_adc_resource[] = {
  98. [0] = DEFINE_RES_MEM(SAMSUNG_PA_ADC, SZ_256),
  99. [1] = DEFINE_RES_IRQ(IRQ_ADC),
  100. [2] = DEFINE_RES_IRQ(IRQ_TC),
  101. };
  102. struct platform_device s3c_device_adc = {
  103. .name = "exynos-adc",
  104. .id = -1,
  105. .num_resources = ARRAY_SIZE(s3c_adc_resource),
  106. .resource = s3c_adc_resource,
  107. };
  108. #endif /* CONFIG_SAMSUNG_DEV_ADC */
  109. /* Camif Controller */
  110. #ifdef CONFIG_CPU_S3C2440
  111. static struct resource s3c_camif_resource[] = {
  112. [0] = DEFINE_RES_MEM(S3C2440_PA_CAMIF, S3C2440_SZ_CAMIF),
  113. [1] = DEFINE_RES_IRQ(IRQ_S3C2440_CAM_C),
  114. [2] = DEFINE_RES_IRQ(IRQ_S3C2440_CAM_P),
  115. };
  116. struct platform_device s3c_device_camif = {
  117. .name = "s3c2440-camif",
  118. .id = -1,
  119. .num_resources = ARRAY_SIZE(s3c_camif_resource),
  120. .resource = s3c_camif_resource,
  121. .dev = {
  122. .dma_mask = &samsung_device_dma_mask,
  123. .coherent_dma_mask = DMA_BIT_MASK(32),
  124. }
  125. };
  126. #endif /* CONFIG_CPU_S3C2440 */
  127. /* FB */
  128. #ifdef CONFIG_S3C_DEV_FB
  129. static struct resource s3c_fb_resource[] = {
  130. [0] = DEFINE_RES_MEM(S3C_PA_FB, SZ_16K),
  131. [1] = DEFINE_RES_IRQ(IRQ_LCD_VSYNC),
  132. [2] = DEFINE_RES_IRQ(IRQ_LCD_FIFO),
  133. [3] = DEFINE_RES_IRQ(IRQ_LCD_SYSTEM),
  134. };
  135. struct platform_device s3c_device_fb = {
  136. .name = "s3c-fb",
  137. .id = -1,
  138. .num_resources = ARRAY_SIZE(s3c_fb_resource),
  139. .resource = s3c_fb_resource,
  140. .dev = {
  141. .dma_mask = &samsung_device_dma_mask,
  142. .coherent_dma_mask = DMA_BIT_MASK(32),
  143. },
  144. };
  145. void __init s3c_fb_set_platdata(struct s3c_fb_platdata *pd)
  146. {
  147. s3c_set_platdata(pd, sizeof(struct s3c_fb_platdata),
  148. &s3c_device_fb);
  149. }
  150. #endif /* CONFIG_S3C_DEV_FB */
  151. /* HWMON */
  152. #ifdef CONFIG_S3C_DEV_HWMON
  153. struct platform_device s3c_device_hwmon = {
  154. .name = "s3c-hwmon",
  155. .id = -1,
  156. .dev.parent = &s3c_device_adc.dev,
  157. };
  158. void __init s3c_hwmon_set_platdata(struct s3c_hwmon_pdata *pd)
  159. {
  160. s3c_set_platdata(pd, sizeof(struct s3c_hwmon_pdata),
  161. &s3c_device_hwmon);
  162. }
  163. #endif /* CONFIG_S3C_DEV_HWMON */
  164. /* HSMMC */
  165. #ifdef CONFIG_S3C_DEV_HSMMC
  166. static struct resource s3c_hsmmc_resource[] = {
  167. [0] = DEFINE_RES_MEM(S3C_PA_HSMMC0, SZ_4K),
  168. [1] = DEFINE_RES_IRQ(IRQ_HSMMC0),
  169. };
  170. struct s3c_sdhci_platdata s3c_hsmmc0_def_platdata = {
  171. .max_width = 4,
  172. .host_caps = (MMC_CAP_4_BIT_DATA |
  173. MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
  174. };
  175. struct platform_device s3c_device_hsmmc0 = {
  176. .name = "s3c-sdhci",
  177. .id = 0,
  178. .num_resources = ARRAY_SIZE(s3c_hsmmc_resource),
  179. .resource = s3c_hsmmc_resource,
  180. .dev = {
  181. .dma_mask = &samsung_device_dma_mask,
  182. .coherent_dma_mask = DMA_BIT_MASK(32),
  183. .platform_data = &s3c_hsmmc0_def_platdata,
  184. },
  185. };
  186. void s3c_sdhci0_set_platdata(struct s3c_sdhci_platdata *pd)
  187. {
  188. s3c_sdhci_set_platdata(pd, &s3c_hsmmc0_def_platdata);
  189. }
  190. #endif /* CONFIG_S3C_DEV_HSMMC */
  191. #ifdef CONFIG_S3C_DEV_HSMMC1
  192. static struct resource s3c_hsmmc1_resource[] = {
  193. [0] = DEFINE_RES_MEM(S3C_PA_HSMMC1, SZ_4K),
  194. [1] = DEFINE_RES_IRQ(IRQ_HSMMC1),
  195. };
  196. struct s3c_sdhci_platdata s3c_hsmmc1_def_platdata = {
  197. .max_width = 4,
  198. .host_caps = (MMC_CAP_4_BIT_DATA |
  199. MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
  200. };
  201. struct platform_device s3c_device_hsmmc1 = {
  202. .name = "s3c-sdhci",
  203. .id = 1,
  204. .num_resources = ARRAY_SIZE(s3c_hsmmc1_resource),
  205. .resource = s3c_hsmmc1_resource,
  206. .dev = {
  207. .dma_mask = &samsung_device_dma_mask,
  208. .coherent_dma_mask = DMA_BIT_MASK(32),
  209. .platform_data = &s3c_hsmmc1_def_platdata,
  210. },
  211. };
  212. void s3c_sdhci1_set_platdata(struct s3c_sdhci_platdata *pd)
  213. {
  214. s3c_sdhci_set_platdata(pd, &s3c_hsmmc1_def_platdata);
  215. }
  216. #endif /* CONFIG_S3C_DEV_HSMMC1 */
  217. /* HSMMC2 */
  218. #ifdef CONFIG_S3C_DEV_HSMMC2
  219. static struct resource s3c_hsmmc2_resource[] = {
  220. [0] = DEFINE_RES_MEM(S3C_PA_HSMMC2, SZ_4K),
  221. [1] = DEFINE_RES_IRQ(IRQ_HSMMC2),
  222. };
  223. struct s3c_sdhci_platdata s3c_hsmmc2_def_platdata = {
  224. .max_width = 4,
  225. .host_caps = (MMC_CAP_4_BIT_DATA |
  226. MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
  227. };
  228. struct platform_device s3c_device_hsmmc2 = {
  229. .name = "s3c-sdhci",
  230. .id = 2,
  231. .num_resources = ARRAY_SIZE(s3c_hsmmc2_resource),
  232. .resource = s3c_hsmmc2_resource,
  233. .dev = {
  234. .dma_mask = &samsung_device_dma_mask,
  235. .coherent_dma_mask = DMA_BIT_MASK(32),
  236. .platform_data = &s3c_hsmmc2_def_platdata,
  237. },
  238. };
  239. void s3c_sdhci2_set_platdata(struct s3c_sdhci_platdata *pd)
  240. {
  241. s3c_sdhci_set_platdata(pd, &s3c_hsmmc2_def_platdata);
  242. }
  243. #endif /* CONFIG_S3C_DEV_HSMMC2 */
  244. #ifdef CONFIG_S3C_DEV_HSMMC3
  245. static struct resource s3c_hsmmc3_resource[] = {
  246. [0] = DEFINE_RES_MEM(S3C_PA_HSMMC3, SZ_4K),
  247. [1] = DEFINE_RES_IRQ(IRQ_HSMMC3),
  248. };
  249. struct s3c_sdhci_platdata s3c_hsmmc3_def_platdata = {
  250. .max_width = 4,
  251. .host_caps = (MMC_CAP_4_BIT_DATA |
  252. MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
  253. };
  254. struct platform_device s3c_device_hsmmc3 = {
  255. .name = "s3c-sdhci",
  256. .id = 3,
  257. .num_resources = ARRAY_SIZE(s3c_hsmmc3_resource),
  258. .resource = s3c_hsmmc3_resource,
  259. .dev = {
  260. .dma_mask = &samsung_device_dma_mask,
  261. .coherent_dma_mask = DMA_BIT_MASK(32),
  262. .platform_data = &s3c_hsmmc3_def_platdata,
  263. },
  264. };
  265. void s3c_sdhci3_set_platdata(struct s3c_sdhci_platdata *pd)
  266. {
  267. s3c_sdhci_set_platdata(pd, &s3c_hsmmc3_def_platdata);
  268. }
  269. #endif /* CONFIG_S3C_DEV_HSMMC3 */
  270. /* I2C */
  271. static struct resource s3c_i2c0_resource[] = {
  272. [0] = DEFINE_RES_MEM(S3C_PA_IIC, SZ_4K),
  273. [1] = DEFINE_RES_IRQ(IRQ_IIC),
  274. };
  275. struct platform_device s3c_device_i2c0 = {
  276. .name = "s3c2410-i2c",
  277. .id = 0,
  278. .num_resources = ARRAY_SIZE(s3c_i2c0_resource),
  279. .resource = s3c_i2c0_resource,
  280. };
  281. struct s3c2410_platform_i2c default_i2c_data __initdata = {
  282. .flags = 0,
  283. .slave_addr = 0x10,
  284. .frequency = 100*1000,
  285. .sda_delay = 100,
  286. };
  287. void __init s3c_i2c0_set_platdata(struct s3c2410_platform_i2c *pd)
  288. {
  289. struct s3c2410_platform_i2c *npd;
  290. if (!pd) {
  291. pd = &default_i2c_data;
  292. pd->bus_num = 0;
  293. }
  294. npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
  295. &s3c_device_i2c0);
  296. if (!npd->cfg_gpio)
  297. npd->cfg_gpio = s3c_i2c0_cfg_gpio;
  298. }
  299. #ifdef CONFIG_S3C_DEV_I2C1
  300. static struct resource s3c_i2c1_resource[] = {
  301. [0] = DEFINE_RES_MEM(S3C_PA_IIC1, SZ_4K),
  302. [1] = DEFINE_RES_IRQ(IRQ_IIC1),
  303. };
  304. struct platform_device s3c_device_i2c1 = {
  305. .name = "s3c2410-i2c",
  306. .id = 1,
  307. .num_resources = ARRAY_SIZE(s3c_i2c1_resource),
  308. .resource = s3c_i2c1_resource,
  309. };
  310. void __init s3c_i2c1_set_platdata(struct s3c2410_platform_i2c *pd)
  311. {
  312. struct s3c2410_platform_i2c *npd;
  313. if (!pd) {
  314. pd = &default_i2c_data;
  315. pd->bus_num = 1;
  316. }
  317. npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
  318. &s3c_device_i2c1);
  319. if (!npd->cfg_gpio)
  320. npd->cfg_gpio = s3c_i2c1_cfg_gpio;
  321. }
  322. #endif /* CONFIG_S3C_DEV_I2C1 */
  323. #ifdef CONFIG_S3C_DEV_I2C2
  324. static struct resource s3c_i2c2_resource[] = {
  325. [0] = DEFINE_RES_MEM(S3C_PA_IIC2, SZ_4K),
  326. [1] = DEFINE_RES_IRQ(IRQ_IIC2),
  327. };
  328. struct platform_device s3c_device_i2c2 = {
  329. .name = "s3c2410-i2c",
  330. .id = 2,
  331. .num_resources = ARRAY_SIZE(s3c_i2c2_resource),
  332. .resource = s3c_i2c2_resource,
  333. };
  334. void __init s3c_i2c2_set_platdata(struct s3c2410_platform_i2c *pd)
  335. {
  336. struct s3c2410_platform_i2c *npd;
  337. if (!pd) {
  338. pd = &default_i2c_data;
  339. pd->bus_num = 2;
  340. }
  341. npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
  342. &s3c_device_i2c2);
  343. if (!npd->cfg_gpio)
  344. npd->cfg_gpio = s3c_i2c2_cfg_gpio;
  345. }
  346. #endif /* CONFIG_S3C_DEV_I2C2 */
  347. #ifdef CONFIG_S3C_DEV_I2C3
  348. static struct resource s3c_i2c3_resource[] = {
  349. [0] = DEFINE_RES_MEM(S3C_PA_IIC3, SZ_4K),
  350. [1] = DEFINE_RES_IRQ(IRQ_IIC3),
  351. };
  352. struct platform_device s3c_device_i2c3 = {
  353. .name = "s3c2440-i2c",
  354. .id = 3,
  355. .num_resources = ARRAY_SIZE(s3c_i2c3_resource),
  356. .resource = s3c_i2c3_resource,
  357. };
  358. void __init s3c_i2c3_set_platdata(struct s3c2410_platform_i2c *pd)
  359. {
  360. struct s3c2410_platform_i2c *npd;
  361. if (!pd) {
  362. pd = &default_i2c_data;
  363. pd->bus_num = 3;
  364. }
  365. npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
  366. &s3c_device_i2c3);
  367. if (!npd->cfg_gpio)
  368. npd->cfg_gpio = s3c_i2c3_cfg_gpio;
  369. }
  370. #endif /*CONFIG_S3C_DEV_I2C3 */
  371. #ifdef CONFIG_S3C_DEV_I2C4
  372. static struct resource s3c_i2c4_resource[] = {
  373. [0] = DEFINE_RES_MEM(S3C_PA_IIC4, SZ_4K),
  374. [1] = DEFINE_RES_IRQ(IRQ_IIC4),
  375. };
  376. struct platform_device s3c_device_i2c4 = {
  377. .name = "s3c2440-i2c",
  378. .id = 4,
  379. .num_resources = ARRAY_SIZE(s3c_i2c4_resource),
  380. .resource = s3c_i2c4_resource,
  381. };
  382. void __init s3c_i2c4_set_platdata(struct s3c2410_platform_i2c *pd)
  383. {
  384. struct s3c2410_platform_i2c *npd;
  385. if (!pd) {
  386. pd = &default_i2c_data;
  387. pd->bus_num = 4;
  388. }
  389. npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
  390. &s3c_device_i2c4);
  391. if (!npd->cfg_gpio)
  392. npd->cfg_gpio = s3c_i2c4_cfg_gpio;
  393. }
  394. #endif /*CONFIG_S3C_DEV_I2C4 */
  395. #ifdef CONFIG_S3C_DEV_I2C5
  396. static struct resource s3c_i2c5_resource[] = {
  397. [0] = DEFINE_RES_MEM(S3C_PA_IIC5, SZ_4K),
  398. [1] = DEFINE_RES_IRQ(IRQ_IIC5),
  399. };
  400. struct platform_device s3c_device_i2c5 = {
  401. .name = "s3c2440-i2c",
  402. .id = 5,
  403. .num_resources = ARRAY_SIZE(s3c_i2c5_resource),
  404. .resource = s3c_i2c5_resource,
  405. };
  406. void __init s3c_i2c5_set_platdata(struct s3c2410_platform_i2c *pd)
  407. {
  408. struct s3c2410_platform_i2c *npd;
  409. if (!pd) {
  410. pd = &default_i2c_data;
  411. pd->bus_num = 5;
  412. }
  413. npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
  414. &s3c_device_i2c5);
  415. if (!npd->cfg_gpio)
  416. npd->cfg_gpio = s3c_i2c5_cfg_gpio;
  417. }
  418. #endif /*CONFIG_S3C_DEV_I2C5 */
  419. #ifdef CONFIG_S3C_DEV_I2C6
  420. static struct resource s3c_i2c6_resource[] = {
  421. [0] = DEFINE_RES_MEM(S3C_PA_IIC6, SZ_4K),
  422. [1] = DEFINE_RES_IRQ(IRQ_IIC6),
  423. };
  424. struct platform_device s3c_device_i2c6 = {
  425. .name = "s3c2440-i2c",
  426. .id = 6,
  427. .num_resources = ARRAY_SIZE(s3c_i2c6_resource),
  428. .resource = s3c_i2c6_resource,
  429. };
  430. void __init s3c_i2c6_set_platdata(struct s3c2410_platform_i2c *pd)
  431. {
  432. struct s3c2410_platform_i2c *npd;
  433. if (!pd) {
  434. pd = &default_i2c_data;
  435. pd->bus_num = 6;
  436. }
  437. npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
  438. &s3c_device_i2c6);
  439. if (!npd->cfg_gpio)
  440. npd->cfg_gpio = s3c_i2c6_cfg_gpio;
  441. }
  442. #endif /* CONFIG_S3C_DEV_I2C6 */
  443. #ifdef CONFIG_S3C_DEV_I2C7
  444. static struct resource s3c_i2c7_resource[] = {
  445. [0] = DEFINE_RES_MEM(S3C_PA_IIC7, SZ_4K),
  446. [1] = DEFINE_RES_IRQ(IRQ_IIC7),
  447. };
  448. struct platform_device s3c_device_i2c7 = {
  449. .name = "s3c2440-i2c",
  450. .id = 7,
  451. .num_resources = ARRAY_SIZE(s3c_i2c7_resource),
  452. .resource = s3c_i2c7_resource,
  453. };
  454. void __init s3c_i2c7_set_platdata(struct s3c2410_platform_i2c *pd)
  455. {
  456. struct s3c2410_platform_i2c *npd;
  457. if (!pd) {
  458. pd = &default_i2c_data;
  459. pd->bus_num = 7;
  460. }
  461. npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
  462. &s3c_device_i2c7);
  463. if (!npd->cfg_gpio)
  464. npd->cfg_gpio = s3c_i2c7_cfg_gpio;
  465. }
  466. #endif /* CONFIG_S3C_DEV_I2C7 */
  467. /* I2S */
  468. #ifdef CONFIG_PLAT_S3C24XX
  469. static struct resource s3c_iis_resource[] = {
  470. [0] = DEFINE_RES_MEM(S3C24XX_PA_IIS, S3C24XX_SZ_IIS),
  471. };
  472. struct platform_device s3c_device_iis = {
  473. .name = "s3c24xx-iis",
  474. .id = -1,
  475. .num_resources = ARRAY_SIZE(s3c_iis_resource),
  476. .resource = s3c_iis_resource,
  477. .dev = {
  478. .dma_mask = &samsung_device_dma_mask,
  479. .coherent_dma_mask = DMA_BIT_MASK(32),
  480. }
  481. };
  482. #endif /* CONFIG_PLAT_S3C24XX */
  483. /* IDE CFCON */
  484. #ifdef CONFIG_SAMSUNG_DEV_IDE
  485. static struct resource s3c_cfcon_resource[] = {
  486. [0] = DEFINE_RES_MEM(SAMSUNG_PA_CFCON, SZ_16K),
  487. [1] = DEFINE_RES_IRQ(IRQ_CFCON),
  488. };
  489. struct platform_device s3c_device_cfcon = {
  490. .id = 0,
  491. .num_resources = ARRAY_SIZE(s3c_cfcon_resource),
  492. .resource = s3c_cfcon_resource,
  493. };
  494. void __init s3c_ide_set_platdata(struct s3c_ide_platdata *pdata)
  495. {
  496. s3c_set_platdata(pdata, sizeof(struct s3c_ide_platdata),
  497. &s3c_device_cfcon);
  498. }
  499. #endif /* CONFIG_SAMSUNG_DEV_IDE */
  500. /* KEYPAD */
  501. #ifdef CONFIG_SAMSUNG_DEV_KEYPAD
  502. static struct resource samsung_keypad_resources[] = {
  503. [0] = DEFINE_RES_MEM(SAMSUNG_PA_KEYPAD, SZ_32),
  504. [1] = DEFINE_RES_IRQ(IRQ_KEYPAD),
  505. };
  506. struct platform_device samsung_device_keypad = {
  507. .name = "samsung-keypad",
  508. .id = -1,
  509. .num_resources = ARRAY_SIZE(samsung_keypad_resources),
  510. .resource = samsung_keypad_resources,
  511. };
  512. void __init samsung_keypad_set_platdata(struct samsung_keypad_platdata *pd)
  513. {
  514. struct samsung_keypad_platdata *npd;
  515. npd = s3c_set_platdata(pd, sizeof(struct samsung_keypad_platdata),
  516. &samsung_device_keypad);
  517. if (!npd->cfg_gpio)
  518. npd->cfg_gpio = samsung_keypad_cfg_gpio;
  519. }
  520. #endif /* CONFIG_SAMSUNG_DEV_KEYPAD */
  521. /* LCD Controller */
  522. #ifdef CONFIG_PLAT_S3C24XX
  523. static struct resource s3c_lcd_resource[] = {
  524. [0] = DEFINE_RES_MEM(S3C24XX_PA_LCD, S3C24XX_SZ_LCD),
  525. [1] = DEFINE_RES_IRQ(IRQ_LCD),
  526. };
  527. struct platform_device s3c_device_lcd = {
  528. .name = "s3c2410-lcd",
  529. .id = -1,
  530. .num_resources = ARRAY_SIZE(s3c_lcd_resource),
  531. .resource = s3c_lcd_resource,
  532. .dev = {
  533. .dma_mask = &samsung_device_dma_mask,
  534. .coherent_dma_mask = DMA_BIT_MASK(32),
  535. }
  536. };
  537. void __init s3c24xx_fb_set_platdata(struct s3c2410fb_mach_info *pd)
  538. {
  539. struct s3c2410fb_mach_info *npd;
  540. npd = s3c_set_platdata(pd, sizeof(*npd), &s3c_device_lcd);
  541. if (npd) {
  542. npd->displays = kmemdup(pd->displays,
  543. sizeof(struct s3c2410fb_display) * npd->num_displays,
  544. GFP_KERNEL);
  545. if (!npd->displays)
  546. printk(KERN_ERR "no memory for LCD display data\n");
  547. } else {
  548. printk(KERN_ERR "no memory for LCD platform data\n");
  549. }
  550. }
  551. #endif /* CONFIG_PLAT_S3C24XX */
  552. /* NAND */
  553. #ifdef CONFIG_S3C_DEV_NAND
  554. static struct resource s3c_nand_resource[] = {
  555. [0] = DEFINE_RES_MEM(S3C_PA_NAND, SZ_1M),
  556. };
  557. struct platform_device s3c_device_nand = {
  558. .name = "s3c2410-nand",
  559. .id = -1,
  560. .num_resources = ARRAY_SIZE(s3c_nand_resource),
  561. .resource = s3c_nand_resource,
  562. };
  563. /*
  564. * s3c_nand_copy_set() - copy nand set data
  565. * @set: The new structure, directly copied from the old.
  566. *
  567. * Copy all the fields from the NAND set field from what is probably __initdata
  568. * to new kernel memory. The code returns 0 if the copy happened correctly or
  569. * an error code for the calling function to display.
  570. *
  571. * Note, we currently do not try and look to see if we've already copied the
  572. * data in a previous set.
  573. */
  574. static int __init s3c_nand_copy_set(struct s3c2410_nand_set *set)
  575. {
  576. void *ptr;
  577. int size;
  578. size = sizeof(struct mtd_partition) * set->nr_partitions;
  579. if (size) {
  580. ptr = kmemdup(set->partitions, size, GFP_KERNEL);
  581. set->partitions = ptr;
  582. if (!ptr)
  583. return -ENOMEM;
  584. }
  585. if (set->nr_map && set->nr_chips) {
  586. size = sizeof(int) * set->nr_chips;
  587. ptr = kmemdup(set->nr_map, size, GFP_KERNEL);
  588. set->nr_map = ptr;
  589. if (!ptr)
  590. return -ENOMEM;
  591. }
  592. return 0;
  593. }
  594. void __init s3c_nand_set_platdata(struct s3c2410_platform_nand *nand)
  595. {
  596. struct s3c2410_platform_nand *npd;
  597. int size;
  598. int ret;
  599. /* note, if we get a failure in allocation, we simply drop out of the
  600. * function. If there is so little memory available at initialisation
  601. * time then there is little chance the system is going to run.
  602. */
  603. npd = s3c_set_platdata(nand, sizeof(struct s3c2410_platform_nand),
  604. &s3c_device_nand);
  605. if (!npd)
  606. return;
  607. /* now see if we need to copy any of the nand set data */
  608. size = sizeof(struct s3c2410_nand_set) * npd->nr_sets;
  609. if (size) {
  610. struct s3c2410_nand_set *from = npd->sets;
  611. struct s3c2410_nand_set *to;
  612. int i;
  613. to = kmemdup(from, size, GFP_KERNEL);
  614. npd->sets = to; /* set, even if we failed */
  615. if (!to) {
  616. printk(KERN_ERR "%s: no memory for sets\n", __func__);
  617. return;
  618. }
  619. for (i = 0; i < npd->nr_sets; i++) {
  620. ret = s3c_nand_copy_set(to);
  621. if (ret) {
  622. printk(KERN_ERR "%s: failed to copy set %d\n",
  623. __func__, i);
  624. return;
  625. }
  626. to++;
  627. }
  628. }
  629. }
  630. #endif /* CONFIG_S3C_DEV_NAND */
  631. /* ONENAND */
  632. #ifdef CONFIG_S3C_DEV_ONENAND
  633. static struct resource s3c_onenand_resources[] = {
  634. [0] = DEFINE_RES_MEM(S3C_PA_ONENAND, SZ_1K),
  635. [1] = DEFINE_RES_MEM(S3C_PA_ONENAND_BUF, S3C_SZ_ONENAND_BUF),
  636. [2] = DEFINE_RES_IRQ(IRQ_ONENAND),
  637. };
  638. struct platform_device s3c_device_onenand = {
  639. .name = "samsung-onenand",
  640. .id = 0,
  641. .num_resources = ARRAY_SIZE(s3c_onenand_resources),
  642. .resource = s3c_onenand_resources,
  643. };
  644. #endif /* CONFIG_S3C_DEV_ONENAND */
  645. #ifdef CONFIG_S3C64XX_DEV_ONENAND1
  646. static struct resource s3c64xx_onenand1_resources[] = {
  647. [0] = DEFINE_RES_MEM(S3C64XX_PA_ONENAND1, SZ_1K),
  648. [1] = DEFINE_RES_MEM(S3C64XX_PA_ONENAND1_BUF, S3C64XX_SZ_ONENAND1_BUF),
  649. [2] = DEFINE_RES_IRQ(IRQ_ONENAND1),
  650. };
  651. struct platform_device s3c64xx_device_onenand1 = {
  652. .name = "samsung-onenand",
  653. .id = 1,
  654. .num_resources = ARRAY_SIZE(s3c64xx_onenand1_resources),
  655. .resource = s3c64xx_onenand1_resources,
  656. };
  657. void __init s3c64xx_onenand1_set_platdata(struct onenand_platform_data *pdata)
  658. {
  659. s3c_set_platdata(pdata, sizeof(struct onenand_platform_data),
  660. &s3c64xx_device_onenand1);
  661. }
  662. #endif /* CONFIG_S3C64XX_DEV_ONENAND1 */
  663. /* PWM Timer */
  664. #ifdef CONFIG_SAMSUNG_DEV_PWM
  665. static struct resource samsung_pwm_resource[] = {
  666. DEFINE_RES_MEM(SAMSUNG_PA_TIMER, SZ_4K),
  667. };
  668. struct platform_device samsung_device_pwm = {
  669. .name = "samsung-pwm",
  670. .id = -1,
  671. .num_resources = ARRAY_SIZE(samsung_pwm_resource),
  672. .resource = samsung_pwm_resource,
  673. };
  674. void __init samsung_pwm_set_platdata(struct samsung_pwm_variant *pd)
  675. {
  676. samsung_device_pwm.dev.platform_data = pd;
  677. }
  678. #endif /* CONFIG_SAMSUNG_DEV_PWM */
  679. /* RTC */
  680. #ifdef CONFIG_PLAT_S3C24XX
  681. static struct resource s3c_rtc_resource[] = {
  682. [0] = DEFINE_RES_MEM(S3C24XX_PA_RTC, SZ_256),
  683. [1] = DEFINE_RES_IRQ(IRQ_RTC),
  684. [2] = DEFINE_RES_IRQ(IRQ_TICK),
  685. };
  686. struct platform_device s3c_device_rtc = {
  687. .name = "s3c2410-rtc",
  688. .id = -1,
  689. .num_resources = ARRAY_SIZE(s3c_rtc_resource),
  690. .resource = s3c_rtc_resource,
  691. };
  692. #endif /* CONFIG_PLAT_S3C24XX */
  693. #ifdef CONFIG_S3C_DEV_RTC
  694. static struct resource s3c_rtc_resource[] = {
  695. [0] = DEFINE_RES_MEM(S3C_PA_RTC, SZ_256),
  696. [1] = DEFINE_RES_IRQ(IRQ_RTC_ALARM),
  697. [2] = DEFINE_RES_IRQ(IRQ_RTC_TIC),
  698. };
  699. struct platform_device s3c_device_rtc = {
  700. .name = "s3c64xx-rtc",
  701. .id = -1,
  702. .num_resources = ARRAY_SIZE(s3c_rtc_resource),
  703. .resource = s3c_rtc_resource,
  704. };
  705. #endif /* CONFIG_S3C_DEV_RTC */
  706. /* SDI */
  707. #ifdef CONFIG_PLAT_S3C24XX
  708. static struct resource s3c_sdi_resource[] = {
  709. [0] = DEFINE_RES_MEM(S3C24XX_PA_SDI, S3C24XX_SZ_SDI),
  710. [1] = DEFINE_RES_IRQ(IRQ_SDI),
  711. };
  712. struct platform_device s3c_device_sdi = {
  713. .name = "s3c2410-sdi",
  714. .id = -1,
  715. .num_resources = ARRAY_SIZE(s3c_sdi_resource),
  716. .resource = s3c_sdi_resource,
  717. };
  718. void __init s3c24xx_mci_set_platdata(struct s3c24xx_mci_pdata *pdata)
  719. {
  720. s3c_set_platdata(pdata, sizeof(struct s3c24xx_mci_pdata),
  721. &s3c_device_sdi);
  722. }
  723. #endif /* CONFIG_PLAT_S3C24XX */
  724. /* SPI */
  725. #ifdef CONFIG_PLAT_S3C24XX
  726. static struct resource s3c_spi0_resource[] = {
  727. [0] = DEFINE_RES_MEM(S3C24XX_PA_SPI, SZ_32),
  728. [1] = DEFINE_RES_IRQ(IRQ_SPI0),
  729. };
  730. struct platform_device s3c_device_spi0 = {
  731. .name = "s3c2410-spi",
  732. .id = 0,
  733. .num_resources = ARRAY_SIZE(s3c_spi0_resource),
  734. .resource = s3c_spi0_resource,
  735. .dev = {
  736. .dma_mask = &samsung_device_dma_mask,
  737. .coherent_dma_mask = DMA_BIT_MASK(32),
  738. }
  739. };
  740. static struct resource s3c_spi1_resource[] = {
  741. [0] = DEFINE_RES_MEM(S3C24XX_PA_SPI1, SZ_32),
  742. [1] = DEFINE_RES_IRQ(IRQ_SPI1),
  743. };
  744. struct platform_device s3c_device_spi1 = {
  745. .name = "s3c2410-spi",
  746. .id = 1,
  747. .num_resources = ARRAY_SIZE(s3c_spi1_resource),
  748. .resource = s3c_spi1_resource,
  749. .dev = {
  750. .dma_mask = &samsung_device_dma_mask,
  751. .coherent_dma_mask = DMA_BIT_MASK(32),
  752. }
  753. };
  754. #endif /* CONFIG_PLAT_S3C24XX */
  755. /* Touchscreen */
  756. #ifdef CONFIG_PLAT_S3C24XX
  757. static struct resource s3c_ts_resource[] = {
  758. [0] = DEFINE_RES_MEM(S3C24XX_PA_ADC, S3C24XX_SZ_ADC),
  759. [1] = DEFINE_RES_IRQ(IRQ_TC),
  760. };
  761. struct platform_device s3c_device_ts = {
  762. .name = "s3c2410-ts",
  763. .id = -1,
  764. .dev.parent = &s3c_device_adc.dev,
  765. .num_resources = ARRAY_SIZE(s3c_ts_resource),
  766. .resource = s3c_ts_resource,
  767. };
  768. void __init s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info *hard_s3c2410ts_info)
  769. {
  770. s3c_set_platdata(hard_s3c2410ts_info,
  771. sizeof(struct s3c2410_ts_mach_info), &s3c_device_ts);
  772. }
  773. #endif /* CONFIG_PLAT_S3C24XX */
  774. #ifdef CONFIG_SAMSUNG_DEV_TS
  775. static struct s3c2410_ts_mach_info default_ts_data __initdata = {
  776. .delay = 10000,
  777. .presc = 49,
  778. .oversampling_shift = 2,
  779. };
  780. void __init s3c64xx_ts_set_platdata(struct s3c2410_ts_mach_info *pd)
  781. {
  782. if (!pd)
  783. pd = &default_ts_data;
  784. s3c_set_platdata(pd, sizeof(struct s3c2410_ts_mach_info),
  785. &s3c_device_adc);
  786. }
  787. #endif /* CONFIG_SAMSUNG_DEV_TS */
  788. /* USB */
  789. #ifdef CONFIG_S3C_DEV_USB_HOST
  790. static struct resource s3c_usb_resource[] = {
  791. [0] = DEFINE_RES_MEM(S3C_PA_USBHOST, SZ_256),
  792. [1] = DEFINE_RES_IRQ(IRQ_USBH),
  793. };
  794. struct platform_device s3c_device_ohci = {
  795. .name = "s3c2410-ohci",
  796. .id = -1,
  797. .num_resources = ARRAY_SIZE(s3c_usb_resource),
  798. .resource = s3c_usb_resource,
  799. .dev = {
  800. .dma_mask = &samsung_device_dma_mask,
  801. .coherent_dma_mask = DMA_BIT_MASK(32),
  802. }
  803. };
  804. /*
  805. * s3c_ohci_set_platdata - initialise OHCI device platform data
  806. * @info: The platform data.
  807. *
  808. * This call copies the @info passed in and sets the device .platform_data
  809. * field to that copy. The @info is copied so that the original can be marked
  810. * __initdata.
  811. */
  812. void __init s3c_ohci_set_platdata(struct s3c2410_hcd_info *info)
  813. {
  814. s3c_set_platdata(info, sizeof(struct s3c2410_hcd_info),
  815. &s3c_device_ohci);
  816. }
  817. #endif /* CONFIG_S3C_DEV_USB_HOST */
  818. /* USB Device (Gadget) */
  819. #ifdef CONFIG_PLAT_S3C24XX
  820. static struct resource s3c_usbgadget_resource[] = {
  821. [0] = DEFINE_RES_MEM(S3C24XX_PA_USBDEV, S3C24XX_SZ_USBDEV),
  822. [1] = DEFINE_RES_IRQ(IRQ_USBD),
  823. };
  824. struct platform_device s3c_device_usbgadget = {
  825. .name = "s3c2410-usbgadget",
  826. .id = -1,
  827. .num_resources = ARRAY_SIZE(s3c_usbgadget_resource),
  828. .resource = s3c_usbgadget_resource,
  829. };
  830. void __init s3c24xx_udc_set_platdata(struct s3c2410_udc_mach_info *pd)
  831. {
  832. s3c_set_platdata(pd, sizeof(*pd), &s3c_device_usbgadget);
  833. }
  834. #endif /* CONFIG_PLAT_S3C24XX */
  835. /* USB HSOTG */
  836. #ifdef CONFIG_S3C_DEV_USB_HSOTG
  837. static struct resource s3c_usb_hsotg_resources[] = {
  838. [0] = DEFINE_RES_MEM(S3C_PA_USB_HSOTG, SZ_128K),
  839. [1] = DEFINE_RES_IRQ(IRQ_OTG),
  840. };
  841. struct platform_device s3c_device_usb_hsotg = {
  842. .name = "s3c-hsotg",
  843. .id = -1,
  844. .num_resources = ARRAY_SIZE(s3c_usb_hsotg_resources),
  845. .resource = s3c_usb_hsotg_resources,
  846. .dev = {
  847. .dma_mask = &samsung_device_dma_mask,
  848. .coherent_dma_mask = DMA_BIT_MASK(32),
  849. },
  850. };
  851. void __init dwc2_hsotg_set_platdata(struct dwc2_hsotg_plat *pd)
  852. {
  853. struct dwc2_hsotg_plat *npd;
  854. npd = s3c_set_platdata(pd, sizeof(struct dwc2_hsotg_plat),
  855. &s3c_device_usb_hsotg);
  856. if (!npd->phy_init)
  857. npd->phy_init = s5p_usb_phy_init;
  858. if (!npd->phy_exit)
  859. npd->phy_exit = s5p_usb_phy_exit;
  860. }
  861. #endif /* CONFIG_S3C_DEV_USB_HSOTG */
  862. /* USB High Spped 2.0 Device (Gadget) */
  863. #ifdef CONFIG_PLAT_S3C24XX
  864. static struct resource s3c_hsudc_resource[] = {
  865. [0] = DEFINE_RES_MEM(S3C2416_PA_HSUDC, S3C2416_SZ_HSUDC),
  866. [1] = DEFINE_RES_IRQ(IRQ_USBD),
  867. };
  868. struct platform_device s3c_device_usb_hsudc = {
  869. .name = "s3c-hsudc",
  870. .id = -1,
  871. .num_resources = ARRAY_SIZE(s3c_hsudc_resource),
  872. .resource = s3c_hsudc_resource,
  873. .dev = {
  874. .dma_mask = &samsung_device_dma_mask,
  875. .coherent_dma_mask = DMA_BIT_MASK(32),
  876. },
  877. };
  878. void __init s3c24xx_hsudc_set_platdata(struct s3c24xx_hsudc_platdata *pd)
  879. {
  880. s3c_set_platdata(pd, sizeof(*pd), &s3c_device_usb_hsudc);
  881. }
  882. #endif /* CONFIG_PLAT_S3C24XX */
  883. /* WDT */
  884. #ifdef CONFIG_S3C_DEV_WDT
  885. static struct resource s3c_wdt_resource[] = {
  886. [0] = DEFINE_RES_MEM(S3C_PA_WDT, SZ_1K),
  887. [1] = DEFINE_RES_IRQ(IRQ_WDT),
  888. };
  889. struct platform_device s3c_device_wdt = {
  890. .name = "s3c2410-wdt",
  891. .id = -1,
  892. .num_resources = ARRAY_SIZE(s3c_wdt_resource),
  893. .resource = s3c_wdt_resource,
  894. };
  895. #endif /* CONFIG_S3C_DEV_WDT */
  896. #ifdef CONFIG_S3C64XX_DEV_SPI0
  897. static struct resource s3c64xx_spi0_resource[] = {
  898. [0] = DEFINE_RES_MEM(S3C_PA_SPI0, SZ_256),
  899. [1] = DEFINE_RES_IRQ(IRQ_SPI0),
  900. };
  901. struct platform_device s3c64xx_device_spi0 = {
  902. .name = "s3c6410-spi",
  903. .id = 0,
  904. .num_resources = ARRAY_SIZE(s3c64xx_spi0_resource),
  905. .resource = s3c64xx_spi0_resource,
  906. .dev = {
  907. .dma_mask = &samsung_device_dma_mask,
  908. .coherent_dma_mask = DMA_BIT_MASK(32),
  909. },
  910. };
  911. void __init s3c64xx_spi0_set_platdata(int (*cfg_gpio)(void), int src_clk_nr,
  912. int num_cs)
  913. {
  914. struct s3c64xx_spi_info pd;
  915. /* Reject invalid configuration */
  916. if (!num_cs || src_clk_nr < 0) {
  917. pr_err("%s: Invalid SPI configuration\n", __func__);
  918. return;
  919. }
  920. pd.num_cs = num_cs;
  921. pd.src_clk_nr = src_clk_nr;
  922. pd.cfg_gpio = (cfg_gpio) ? cfg_gpio : s3c64xx_spi0_cfg_gpio;
  923. s3c_set_platdata(&pd, sizeof(pd), &s3c64xx_device_spi0);
  924. }
  925. #endif /* CONFIG_S3C64XX_DEV_SPI0 */
  926. #ifdef CONFIG_S3C64XX_DEV_SPI1
  927. static struct resource s3c64xx_spi1_resource[] = {
  928. [0] = DEFINE_RES_MEM(S3C_PA_SPI1, SZ_256),
  929. [1] = DEFINE_RES_IRQ(IRQ_SPI1),
  930. };
  931. struct platform_device s3c64xx_device_spi1 = {
  932. .name = "s3c6410-spi",
  933. .id = 1,
  934. .num_resources = ARRAY_SIZE(s3c64xx_spi1_resource),
  935. .resource = s3c64xx_spi1_resource,
  936. .dev = {
  937. .dma_mask = &samsung_device_dma_mask,
  938. .coherent_dma_mask = DMA_BIT_MASK(32),
  939. },
  940. };
  941. void __init s3c64xx_spi1_set_platdata(int (*cfg_gpio)(void), int src_clk_nr,
  942. int num_cs)
  943. {
  944. struct s3c64xx_spi_info pd;
  945. /* Reject invalid configuration */
  946. if (!num_cs || src_clk_nr < 0) {
  947. pr_err("%s: Invalid SPI configuration\n", __func__);
  948. return;
  949. }
  950. pd.num_cs = num_cs;
  951. pd.src_clk_nr = src_clk_nr;
  952. pd.cfg_gpio = (cfg_gpio) ? cfg_gpio : s3c64xx_spi1_cfg_gpio;
  953. s3c_set_platdata(&pd, sizeof(pd), &s3c64xx_device_spi1);
  954. }
  955. #endif /* CONFIG_S3C64XX_DEV_SPI1 */
  956. #ifdef CONFIG_S3C64XX_DEV_SPI2
  957. static struct resource s3c64xx_spi2_resource[] = {
  958. [0] = DEFINE_RES_MEM(S3C_PA_SPI2, SZ_256),
  959. [1] = DEFINE_RES_IRQ(IRQ_SPI2),
  960. };
  961. struct platform_device s3c64xx_device_spi2 = {
  962. .name = "s3c6410-spi",
  963. .id = 2,
  964. .num_resources = ARRAY_SIZE(s3c64xx_spi2_resource),
  965. .resource = s3c64xx_spi2_resource,
  966. .dev = {
  967. .dma_mask = &samsung_device_dma_mask,
  968. .coherent_dma_mask = DMA_BIT_MASK(32),
  969. },
  970. };
  971. void __init s3c64xx_spi2_set_platdata(int (*cfg_gpio)(void), int src_clk_nr,
  972. int num_cs)
  973. {
  974. struct s3c64xx_spi_info pd;
  975. /* Reject invalid configuration */
  976. if (!num_cs || src_clk_nr < 0) {
  977. pr_err("%s: Invalid SPI configuration\n", __func__);
  978. return;
  979. }
  980. pd.num_cs = num_cs;
  981. pd.src_clk_nr = src_clk_nr;
  982. pd.cfg_gpio = (cfg_gpio) ? cfg_gpio : s3c64xx_spi2_cfg_gpio;
  983. s3c_set_platdata(&pd, sizeof(pd), &s3c64xx_device_spi2);
  984. }
  985. #endif /* CONFIG_S3C64XX_DEV_SPI2 */