sdhci-pci.c 11 KB

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  1. /* linux/drivers/mmc/host/sdhci-pci.c - SDHCI on PCI bus interface
  2. *
  3. * Copyright (C) 2005-2008 Pierre Ossman, All Rights Reserved.
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation; either version 2 of the License, or (at
  8. * your option) any later version.
  9. *
  10. * Thanks to the following companies for their support:
  11. *
  12. * - JMicron (hardware and technical support)
  13. */
  14. #include <linux/delay.h>
  15. #include <linux/highmem.h>
  16. #include <linux/pci.h>
  17. #include <linux/dma-mapping.h>
  18. #include <linux/mmc/host.h>
  19. #include <asm/scatterlist.h>
  20. #include <asm/io.h>
  21. #include "sdhci.h"
  22. /*
  23. * PCI registers
  24. */
  25. #define PCI_SDHCI_IFPIO 0x00
  26. #define PCI_SDHCI_IFDMA 0x01
  27. #define PCI_SDHCI_IFVENDOR 0x02
  28. #define PCI_SLOT_INFO 0x40 /* 8 bits */
  29. #define PCI_SLOT_INFO_SLOTS(x) ((x >> 4) & 7)
  30. #define PCI_SLOT_INFO_FIRST_BAR_MASK 0x07
  31. #define MAX_SLOTS 8
  32. static const struct pci_device_id pci_ids[] __devinitdata = {
  33. {
  34. .vendor = PCI_VENDOR_ID_RICOH,
  35. .device = PCI_DEVICE_ID_RICOH_R5C822,
  36. .subvendor = PCI_VENDOR_ID_IBM,
  37. .subdevice = PCI_ANY_ID,
  38. .driver_data = SDHCI_QUIRK_CLOCK_BEFORE_RESET |
  39. SDHCI_QUIRK_FORCE_DMA,
  40. },
  41. {
  42. .vendor = PCI_VENDOR_ID_RICOH,
  43. .device = PCI_DEVICE_ID_RICOH_R5C822,
  44. .subvendor = PCI_VENDOR_ID_SAMSUNG,
  45. .subdevice = PCI_ANY_ID,
  46. .driver_data = SDHCI_QUIRK_FORCE_DMA |
  47. SDHCI_QUIRK_NO_CARD_NO_RESET,
  48. },
  49. {
  50. .vendor = PCI_VENDOR_ID_RICOH,
  51. .device = PCI_DEVICE_ID_RICOH_R5C822,
  52. .subvendor = PCI_ANY_ID,
  53. .subdevice = PCI_ANY_ID,
  54. .driver_data = SDHCI_QUIRK_FORCE_DMA,
  55. },
  56. {
  57. .vendor = PCI_VENDOR_ID_TI,
  58. .device = PCI_DEVICE_ID_TI_XX21_XX11_SD,
  59. .subvendor = PCI_ANY_ID,
  60. .subdevice = PCI_ANY_ID,
  61. .driver_data = SDHCI_QUIRK_FORCE_DMA,
  62. },
  63. {
  64. .vendor = PCI_VENDOR_ID_ENE,
  65. .device = PCI_DEVICE_ID_ENE_CB712_SD,
  66. .subvendor = PCI_ANY_ID,
  67. .subdevice = PCI_ANY_ID,
  68. .driver_data = SDHCI_QUIRK_SINGLE_POWER_WRITE |
  69. SDHCI_QUIRK_BROKEN_DMA,
  70. },
  71. {
  72. .vendor = PCI_VENDOR_ID_ENE,
  73. .device = PCI_DEVICE_ID_ENE_CB712_SD_2,
  74. .subvendor = PCI_ANY_ID,
  75. .subdevice = PCI_ANY_ID,
  76. .driver_data = SDHCI_QUIRK_SINGLE_POWER_WRITE |
  77. SDHCI_QUIRK_BROKEN_DMA,
  78. },
  79. {
  80. .vendor = PCI_VENDOR_ID_ENE,
  81. .device = PCI_DEVICE_ID_ENE_CB714_SD,
  82. .subvendor = PCI_ANY_ID,
  83. .subdevice = PCI_ANY_ID,
  84. .driver_data = SDHCI_QUIRK_SINGLE_POWER_WRITE |
  85. SDHCI_QUIRK_RESET_CMD_DATA_ON_IOS |
  86. SDHCI_QUIRK_BROKEN_DMA,
  87. },
  88. {
  89. .vendor = PCI_VENDOR_ID_ENE,
  90. .device = PCI_DEVICE_ID_ENE_CB714_SD_2,
  91. .subvendor = PCI_ANY_ID,
  92. .subdevice = PCI_ANY_ID,
  93. .driver_data = SDHCI_QUIRK_SINGLE_POWER_WRITE |
  94. SDHCI_QUIRK_RESET_CMD_DATA_ON_IOS |
  95. SDHCI_QUIRK_BROKEN_DMA,
  96. },
  97. {
  98. .vendor = PCI_VENDOR_ID_MARVELL,
  99. .device = PCI_DEVICE_ID_MARVELL_CAFE_SD,
  100. .subvendor = PCI_ANY_ID,
  101. .subdevice = PCI_ANY_ID,
  102. .driver_data = SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER |
  103. SDHCI_QUIRK_INCR_TIMEOUT_CONTROL,
  104. },
  105. {
  106. .vendor = PCI_VENDOR_ID_JMICRON,
  107. .device = PCI_DEVICE_ID_JMICRON_JMB38X_SD,
  108. .subvendor = PCI_ANY_ID,
  109. .subdevice = PCI_ANY_ID,
  110. .driver_data = SDHCI_QUIRK_32BIT_DMA_ADDR |
  111. SDHCI_QUIRK_32BIT_DMA_SIZE |
  112. SDHCI_QUIRK_RESET_AFTER_REQUEST,
  113. },
  114. { /* Generic SD host controller */
  115. PCI_DEVICE_CLASS((PCI_CLASS_SYSTEM_SDHCI << 8), 0xFFFF00)
  116. },
  117. { /* end: all zeroes */ },
  118. };
  119. MODULE_DEVICE_TABLE(pci, pci_ids);
  120. struct sdhci_pci_chip;
  121. struct sdhci_pci_slot {
  122. struct sdhci_pci_chip *chip;
  123. struct sdhci_host *host;
  124. int pci_bar;
  125. };
  126. struct sdhci_pci_chip {
  127. struct pci_dev *pdev;
  128. unsigned int quirks;
  129. int num_slots; /* Slots on controller */
  130. struct sdhci_pci_slot *slots[MAX_SLOTS]; /* Pointers to host slots */
  131. };
  132. /*****************************************************************************\
  133. * *
  134. * SDHCI core callbacks *
  135. * *
  136. \*****************************************************************************/
  137. static int sdhci_pci_enable_dma(struct sdhci_host *host)
  138. {
  139. struct sdhci_pci_slot *slot;
  140. struct pci_dev *pdev;
  141. int ret;
  142. slot = sdhci_priv(host);
  143. pdev = slot->chip->pdev;
  144. if (((pdev->class & 0xFFFF00) == (PCI_CLASS_SYSTEM_SDHCI << 8)) &&
  145. ((pdev->class & 0x0000FF) != PCI_SDHCI_IFDMA) &&
  146. (host->flags & SDHCI_USE_DMA)) {
  147. dev_warn(&pdev->dev, "Will use DMA mode even though HW "
  148. "doesn't fully claim to support it.\n");
  149. }
  150. ret = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
  151. if (ret)
  152. return ret;
  153. pci_set_master(pdev);
  154. return 0;
  155. }
  156. static struct sdhci_ops sdhci_pci_ops = {
  157. .enable_dma = sdhci_pci_enable_dma,
  158. };
  159. /*****************************************************************************\
  160. * *
  161. * Suspend/resume *
  162. * *
  163. \*****************************************************************************/
  164. #ifdef CONFIG_PM
  165. static int sdhci_pci_suspend (struct pci_dev *pdev, pm_message_t state)
  166. {
  167. struct sdhci_pci_chip *chip;
  168. struct sdhci_pci_slot *slot;
  169. int i, ret;
  170. chip = pci_get_drvdata(pdev);
  171. if (!chip)
  172. return 0;
  173. for (i = 0;i < chip->num_slots;i++) {
  174. slot = chip->slots[i];
  175. if (!slot)
  176. continue;
  177. ret = sdhci_suspend_host(slot->host, state);
  178. if (ret) {
  179. for (i--;i >= 0;i--)
  180. sdhci_resume_host(chip->slots[i]->host);
  181. return ret;
  182. }
  183. }
  184. pci_save_state(pdev);
  185. pci_enable_wake(pdev, pci_choose_state(pdev, state), 0);
  186. pci_disable_device(pdev);
  187. pci_set_power_state(pdev, pci_choose_state(pdev, state));
  188. return 0;
  189. }
  190. static int sdhci_pci_resume (struct pci_dev *pdev)
  191. {
  192. struct sdhci_pci_chip *chip;
  193. struct sdhci_pci_slot *slot;
  194. int i, ret;
  195. chip = pci_get_drvdata(pdev);
  196. if (!chip)
  197. return 0;
  198. pci_set_power_state(pdev, PCI_D0);
  199. pci_restore_state(pdev);
  200. ret = pci_enable_device(pdev);
  201. if (ret)
  202. return ret;
  203. for (i = 0;i < chip->num_slots;i++) {
  204. slot = chip->slots[i];
  205. if (!slot)
  206. continue;
  207. ret = sdhci_resume_host(slot->host);
  208. if (ret)
  209. return ret;
  210. }
  211. return 0;
  212. }
  213. #else /* CONFIG_PM */
  214. #define sdhci_pci_suspend NULL
  215. #define sdhci_pci_resume NULL
  216. #endif /* CONFIG_PM */
  217. /*****************************************************************************\
  218. * *
  219. * Device probing/removal *
  220. * *
  221. \*****************************************************************************/
  222. static struct sdhci_pci_slot * __devinit sdhci_pci_probe_slot(
  223. struct pci_dev *pdev, struct sdhci_pci_chip *chip, int bar)
  224. {
  225. struct sdhci_pci_slot *slot;
  226. struct sdhci_host *host;
  227. resource_size_t addr;
  228. int ret;
  229. if (!(pci_resource_flags(pdev, bar) & IORESOURCE_MEM)) {
  230. dev_err(&pdev->dev, "BAR %d is not iomem. Aborting.\n", bar);
  231. return ERR_PTR(-ENODEV);
  232. }
  233. if (pci_resource_len(pdev, bar) != 0x100) {
  234. dev_err(&pdev->dev, "Invalid iomem size. You may "
  235. "experience problems.\n");
  236. }
  237. if ((pdev->class & 0x0000FF) == PCI_SDHCI_IFVENDOR) {
  238. dev_err(&pdev->dev, "Vendor specific interface. Aborting.\n");
  239. return ERR_PTR(-ENODEV);
  240. }
  241. if ((pdev->class & 0x0000FF) > PCI_SDHCI_IFVENDOR) {
  242. dev_err(&pdev->dev, "Unknown interface. Aborting.\n");
  243. return ERR_PTR(-ENODEV);
  244. }
  245. host = sdhci_alloc_host(&pdev->dev, sizeof(struct sdhci_pci_slot));
  246. if (IS_ERR(host)) {
  247. ret = PTR_ERR(host);
  248. goto unmap;
  249. }
  250. slot = sdhci_priv(host);
  251. slot->chip = chip;
  252. slot->host = host;
  253. slot->pci_bar = bar;
  254. host->hw_name = "PCI";
  255. host->ops = &sdhci_pci_ops;
  256. host->quirks = chip->quirks;
  257. host->irq = pdev->irq;
  258. ret = pci_request_region(pdev, bar, mmc_hostname(host->mmc));
  259. if (ret) {
  260. dev_err(&pdev->dev, "cannot request region\n");
  261. return ERR_PTR(ret);
  262. }
  263. addr = pci_resource_start(pdev, bar);
  264. host->ioaddr = ioremap_nocache(addr, pci_resource_len(pdev, bar));
  265. if (!host->ioaddr) {
  266. dev_err(&pdev->dev, "failed to remap registers\n");
  267. goto release;
  268. }
  269. ret = sdhci_add_host(host);
  270. if (ret)
  271. goto unmap;
  272. return slot;
  273. unmap:
  274. iounmap(host->ioaddr);
  275. release:
  276. pci_release_region(pdev, bar);
  277. sdhci_free_host(host);
  278. return ERR_PTR(ret);
  279. }
  280. static void sdhci_pci_remove_slot(struct sdhci_pci_slot *slot)
  281. {
  282. sdhci_remove_host(slot->host);
  283. pci_release_region(slot->chip->pdev, slot->pci_bar);
  284. sdhci_free_host(slot->host);
  285. }
  286. static int __devinit sdhci_pci_probe(struct pci_dev *pdev,
  287. const struct pci_device_id *ent)
  288. {
  289. struct sdhci_pci_chip *chip;
  290. struct sdhci_pci_slot *slot;
  291. u8 slots, rev, first_bar;
  292. int ret, i;
  293. BUG_ON(pdev == NULL);
  294. BUG_ON(ent == NULL);
  295. pci_read_config_byte(pdev, PCI_CLASS_REVISION, &rev);
  296. dev_info(&pdev->dev, "SDHCI controller found [%04x:%04x] (rev %x)\n",
  297. (int)pdev->vendor, (int)pdev->device, (int)rev);
  298. ret = pci_read_config_byte(pdev, PCI_SLOT_INFO, &slots);
  299. if (ret)
  300. return ret;
  301. slots = PCI_SLOT_INFO_SLOTS(slots) + 1;
  302. dev_dbg(&pdev->dev, "found %d slot(s)\n", slots);
  303. if (slots == 0)
  304. return -ENODEV;
  305. BUG_ON(slots > MAX_SLOTS);
  306. ret = pci_read_config_byte(pdev, PCI_SLOT_INFO, &first_bar);
  307. if (ret)
  308. return ret;
  309. first_bar &= PCI_SLOT_INFO_FIRST_BAR_MASK;
  310. if (first_bar > 5) {
  311. dev_err(&pdev->dev, "Invalid first BAR. Aborting.\n");
  312. return -ENODEV;
  313. }
  314. ret = pci_enable_device(pdev);
  315. if (ret)
  316. return ret;
  317. chip = kzalloc(sizeof(struct sdhci_pci_chip), GFP_KERNEL);
  318. if (!chip) {
  319. ret = -ENOMEM;
  320. goto err;
  321. }
  322. chip->pdev = pdev;
  323. chip->quirks = ent->driver_data;
  324. chip->num_slots = slots;
  325. pci_set_drvdata(pdev, chip);
  326. for (i = 0;i < slots;i++) {
  327. slot = sdhci_pci_probe_slot(pdev, chip, first_bar + i);
  328. if (IS_ERR(slot)) {
  329. for (i--;i >= 0;i--)
  330. sdhci_pci_remove_slot(chip->slots[i]);
  331. ret = PTR_ERR(slot);
  332. goto free;
  333. }
  334. chip->slots[i] = slot;
  335. }
  336. return 0;
  337. free:
  338. pci_set_drvdata(pdev, NULL);
  339. kfree(chip);
  340. err:
  341. pci_disable_device(pdev);
  342. return ret;
  343. }
  344. static void __devexit sdhci_pci_remove(struct pci_dev *pdev)
  345. {
  346. int i;
  347. struct sdhci_pci_chip *chip;
  348. chip = pci_get_drvdata(pdev);
  349. if (chip) {
  350. for (i = 0;i < chip->num_slots; i++)
  351. sdhci_pci_remove_slot(chip->slots[i]);
  352. pci_set_drvdata(pdev, NULL);
  353. kfree(chip);
  354. }
  355. pci_disable_device(pdev);
  356. }
  357. static struct pci_driver sdhci_driver = {
  358. .name = "sdhci-pci",
  359. .id_table = pci_ids,
  360. .probe = sdhci_pci_probe,
  361. .remove = __devexit_p(sdhci_pci_remove),
  362. .suspend = sdhci_pci_suspend,
  363. .resume = sdhci_pci_resume,
  364. };
  365. /*****************************************************************************\
  366. * *
  367. * Driver init/exit *
  368. * *
  369. \*****************************************************************************/
  370. static int __init sdhci_drv_init(void)
  371. {
  372. return pci_register_driver(&sdhci_driver);
  373. }
  374. static void __exit sdhci_drv_exit(void)
  375. {
  376. pci_unregister_driver(&sdhci_driver);
  377. }
  378. module_init(sdhci_drv_init);
  379. module_exit(sdhci_drv_exit);
  380. MODULE_AUTHOR("Pierre Ossman <drzeus@drzeus.cx>");
  381. MODULE_DESCRIPTION("Secure Digital Host Controller Interface PCI driver");
  382. MODULE_LICENSE("GPL");