arch_timer.h 4.1 KB

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  1. /*
  2. * arch/arm64/include/asm/arch_timer.h
  3. *
  4. * Copyright (C) 2012 ARM Ltd.
  5. * Author: Marc Zyngier <marc.zyngier@arm.com>
  6. *
  7. * This program is free software: you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program. If not, see <http://www.gnu.org/licenses/>.
  18. */
  19. #ifndef __ASM_ARCH_TIMER_H
  20. #define __ASM_ARCH_TIMER_H
  21. #include <asm/barrier.h>
  22. #include <asm/sysreg.h>
  23. #include <linux/bug.h>
  24. #include <linux/init.h>
  25. #include <linux/jump_label.h>
  26. #include <linux/smp.h>
  27. #include <linux/types.h>
  28. #include <clocksource/arm_arch_timer.h>
  29. #if IS_ENABLED(CONFIG_ARM_ARCH_TIMER_OOL_WORKAROUND)
  30. extern struct static_key_false arch_timer_read_ool_enabled;
  31. #define needs_unstable_timer_counter_workaround() \
  32. static_branch_unlikely(&arch_timer_read_ool_enabled)
  33. #else
  34. #define needs_unstable_timer_counter_workaround() false
  35. #endif
  36. enum arch_timer_erratum_match_type {
  37. ate_match_dt,
  38. ate_match_local_cap_id,
  39. ate_match_acpi_oem_info,
  40. };
  41. struct clock_event_device;
  42. struct arch_timer_erratum_workaround {
  43. enum arch_timer_erratum_match_type match_type;
  44. const void *id;
  45. const char *desc;
  46. u32 (*read_cntp_tval_el0)(void);
  47. u32 (*read_cntv_tval_el0)(void);
  48. u64 (*read_cntvct_el0)(void);
  49. int (*set_next_event_phys)(unsigned long, struct clock_event_device *);
  50. int (*set_next_event_virt)(unsigned long, struct clock_event_device *);
  51. };
  52. DECLARE_PER_CPU(const struct arch_timer_erratum_workaround *,
  53. timer_unstable_counter_workaround);
  54. #define arch_timer_reg_read_stable(reg) \
  55. ({ \
  56. u64 _val; \
  57. if (needs_unstable_timer_counter_workaround()) { \
  58. const struct arch_timer_erratum_workaround *wa; \
  59. preempt_disable_notrace(); \
  60. wa = __this_cpu_read(timer_unstable_counter_workaround); \
  61. if (wa && wa->read_##reg) \
  62. _val = wa->read_##reg(); \
  63. else \
  64. _val = read_sysreg(reg); \
  65. preempt_enable_notrace(); \
  66. } else { \
  67. _val = read_sysreg(reg); \
  68. } \
  69. _val; \
  70. })
  71. /*
  72. * These register accessors are marked inline so the compiler can
  73. * nicely work out which register we want, and chuck away the rest of
  74. * the code.
  75. */
  76. static __always_inline
  77. void arch_timer_reg_write_cp15(int access, enum arch_timer_reg reg, u32 val)
  78. {
  79. if (access == ARCH_TIMER_PHYS_ACCESS) {
  80. switch (reg) {
  81. case ARCH_TIMER_REG_CTRL:
  82. write_sysreg(val, cntp_ctl_el0);
  83. break;
  84. case ARCH_TIMER_REG_TVAL:
  85. write_sysreg(val, cntp_tval_el0);
  86. break;
  87. }
  88. } else if (access == ARCH_TIMER_VIRT_ACCESS) {
  89. switch (reg) {
  90. case ARCH_TIMER_REG_CTRL:
  91. write_sysreg(val, cntv_ctl_el0);
  92. break;
  93. case ARCH_TIMER_REG_TVAL:
  94. write_sysreg(val, cntv_tval_el0);
  95. break;
  96. }
  97. }
  98. isb();
  99. }
  100. static __always_inline
  101. u32 arch_timer_reg_read_cp15(int access, enum arch_timer_reg reg)
  102. {
  103. if (access == ARCH_TIMER_PHYS_ACCESS) {
  104. switch (reg) {
  105. case ARCH_TIMER_REG_CTRL:
  106. return read_sysreg(cntp_ctl_el0);
  107. case ARCH_TIMER_REG_TVAL:
  108. return arch_timer_reg_read_stable(cntp_tval_el0);
  109. }
  110. } else if (access == ARCH_TIMER_VIRT_ACCESS) {
  111. switch (reg) {
  112. case ARCH_TIMER_REG_CTRL:
  113. return read_sysreg(cntv_ctl_el0);
  114. case ARCH_TIMER_REG_TVAL:
  115. return arch_timer_reg_read_stable(cntv_tval_el0);
  116. }
  117. }
  118. BUG();
  119. }
  120. static inline u32 arch_timer_get_cntfrq(void)
  121. {
  122. return read_sysreg(cntfrq_el0);
  123. }
  124. static inline u32 arch_timer_get_cntkctl(void)
  125. {
  126. return read_sysreg(cntkctl_el1);
  127. }
  128. static inline void arch_timer_set_cntkctl(u32 cntkctl)
  129. {
  130. write_sysreg(cntkctl, cntkctl_el1);
  131. }
  132. static inline u64 arch_counter_get_cntpct(void)
  133. {
  134. /*
  135. * AArch64 kernel and user space mandate the use of CNTVCT.
  136. */
  137. BUG();
  138. return 0;
  139. }
  140. static inline u64 arch_counter_get_cntvct(void)
  141. {
  142. isb();
  143. return arch_timer_reg_read_stable(cntvct_el0);
  144. }
  145. static inline int arch_timer_arch_init(void)
  146. {
  147. return 0;
  148. }
  149. #endif