stih416.dtsi 6.2 KB

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  1. /*
  2. * Copyright (C) 2012 STMicroelectronics Limited.
  3. * Author: Srinivas Kandagatla <srinivas.kandagatla@st.com>
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License version 2 as
  7. * publishhed by the Free Software Foundation.
  8. */
  9. #include "stih41x.dtsi"
  10. #include "stih416-clock.dtsi"
  11. #include "stih416-pinctrl.dtsi"
  12. #include <dt-bindings/interrupt-controller/arm-gic.h>
  13. #include <dt-bindings/reset-controller/stih416-resets.h>
  14. / {
  15. L2: cache-controller {
  16. compatible = "arm,pl310-cache";
  17. reg = <0xfffe2000 0x1000>;
  18. arm,data-latency = <3 3 3>;
  19. arm,tag-latency = <2 2 2>;
  20. cache-unified;
  21. cache-level = <2>;
  22. };
  23. soc {
  24. #address-cells = <1>;
  25. #size-cells = <1>;
  26. interrupt-parent = <&intc>;
  27. ranges;
  28. compatible = "simple-bus";
  29. powerdown: powerdown-controller {
  30. #reset-cells = <1>;
  31. compatible = "st,stih416-powerdown";
  32. };
  33. softreset: softreset-controller {
  34. #reset-cells = <1>;
  35. compatible = "st,stih416-softreset";
  36. };
  37. syscfg_sbc:sbc-syscfg@fe600000{
  38. compatible = "st,stih416-sbc-syscfg", "syscon";
  39. reg = <0xfe600000 0x1000>;
  40. };
  41. syscfg_front:front-syscfg@fee10000{
  42. compatible = "st,stih416-front-syscfg", "syscon";
  43. reg = <0xfee10000 0x1000>;
  44. };
  45. syscfg_rear:rear-syscfg@fe830000{
  46. compatible = "st,stih416-rear-syscfg", "syscon";
  47. reg = <0xfe830000 0x1000>;
  48. };
  49. /* MPE */
  50. syscfg_fvdp_fe:fvdp-fe-syscfg@fddf0000{
  51. compatible = "st,stih416-fvdp-fe-syscfg", "syscon";
  52. reg = <0xfddf0000 0x1000>;
  53. };
  54. syscfg_fvdp_lite:fvdp-lite-syscfg@fd6a0000{
  55. compatible = "st,stih416-fvdp-lite-syscfg", "syscon";
  56. reg = <0xfd6a0000 0x1000>;
  57. };
  58. syscfg_cpu:cpu-syscfg@fdde0000{
  59. compatible = "st,stih416-cpu-syscfg", "syscon";
  60. reg = <0xfdde0000 0x1000>;
  61. };
  62. syscfg_compo:compo-syscfg@fd320000{
  63. compatible = "st,stih416-compo-syscfg", "syscon";
  64. reg = <0xfd320000 0x1000>;
  65. };
  66. syscfg_transport:transport-syscfg@fd690000{
  67. compatible = "st,stih416-transport-syscfg", "syscon";
  68. reg = <0xfd690000 0x1000>;
  69. };
  70. syscfg_lpm:lpm-syscfg@fe4b5100{
  71. compatible = "st,stih416-lpm-syscfg", "syscon";
  72. reg = <0xfe4b5100 0x8>;
  73. };
  74. serial2: serial@fed32000{
  75. compatible = "st,asc";
  76. status = "disabled";
  77. reg = <0xfed32000 0x2c>;
  78. interrupts = <0 197 0>;
  79. clocks = <&clk_s_a0_ls CLK_ICN_REG>;
  80. pinctrl-names = "default";
  81. pinctrl-0 = <&pinctrl_serial2 &pinctrl_serial2_oe>;
  82. };
  83. /* SBC_UART1 */
  84. sbc_serial1: serial@fe531000 {
  85. compatible = "st,asc";
  86. status = "disabled";
  87. reg = <0xfe531000 0x2c>;
  88. interrupts = <0 210 0>;
  89. pinctrl-names = "default";
  90. pinctrl-0 = <&pinctrl_sbc_serial1>;
  91. clocks = <&clk_sysin>;
  92. };
  93. i2c@fed40000 {
  94. compatible = "st,comms-ssc4-i2c";
  95. reg = <0xfed40000 0x110>;
  96. interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
  97. clocks = <&clk_s_a0_ls CLK_ICN_REG>;
  98. clock-names = "ssc";
  99. clock-frequency = <400000>;
  100. pinctrl-names = "default";
  101. pinctrl-0 = <&pinctrl_i2c0_default>;
  102. status = "disabled";
  103. };
  104. i2c@fed41000 {
  105. compatible = "st,comms-ssc4-i2c";
  106. reg = <0xfed41000 0x110>;
  107. interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
  108. clocks = <&clk_s_a0_ls CLK_ICN_REG>;
  109. clock-names = "ssc";
  110. clock-frequency = <400000>;
  111. pinctrl-names = "default";
  112. pinctrl-0 = <&pinctrl_i2c1_default>;
  113. status = "disabled";
  114. };
  115. i2c@fe540000 {
  116. compatible = "st,comms-ssc4-i2c";
  117. reg = <0xfe540000 0x110>;
  118. interrupts = <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>;
  119. clocks = <&clk_sysin>;
  120. clock-names = "ssc";
  121. clock-frequency = <400000>;
  122. pinctrl-names = "default";
  123. pinctrl-0 = <&pinctrl_sbc_i2c0_default>;
  124. status = "disabled";
  125. };
  126. i2c@fe541000 {
  127. compatible = "st,comms-ssc4-i2c";
  128. reg = <0xfe541000 0x110>;
  129. interrupts = <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>;
  130. clocks = <&clk_sysin>;
  131. clock-names = "ssc";
  132. clock-frequency = <400000>;
  133. pinctrl-names = "default";
  134. pinctrl-0 = <&pinctrl_sbc_i2c1_default>;
  135. status = "disabled";
  136. };
  137. ethernet0: dwmac@fe810000 {
  138. device_type = "network";
  139. compatible = "st,stih416-dwmac", "snps,dwmac", "snps,dwmac-3.710";
  140. status = "disabled";
  141. reg = <0xfe810000 0x8000>, <0x8bc 0x4>;
  142. reg-names = "stmmaceth", "sti-ethconf";
  143. interrupts = <0 133 0>, <0 134 0>, <0 135 0>;
  144. interrupt-names = "macirq", "eth_wake_irq", "eth_lpi";
  145. snps,pbl = <32>;
  146. snps,mixed-burst;
  147. st,syscon = <&syscfg_rear>;
  148. resets = <&softreset STIH416_ETH0_SOFTRESET>;
  149. reset-names = "stmmaceth";
  150. pinctrl-names = "default";
  151. pinctrl-0 = <&pinctrl_mii0>;
  152. clock-names = "stmmaceth", "sti-ethclk";
  153. clocks = <&clk_s_a1_ls CLK_ICN_IF_2>, <&clk_s_a1_ls CLK_GMAC0_PHY>;
  154. };
  155. ethernet1: dwmac@fef08000 {
  156. device_type = "network";
  157. compatible = "st,stih416-dwmac", "snps,dwmac", "snps,dwmac-3.710";
  158. status = "disabled";
  159. reg = <0xfef08000 0x8000>, <0x7f0 0x4>;
  160. reg-names = "stmmaceth", "sti-ethconf";
  161. interrupts = <0 136 0>, <0 137 0>, <0 138 0>;
  162. interrupt-names = "macirq", "eth_wake_irq", "eth_lpi";
  163. snps,pbl = <32>;
  164. snps,mixed-burst;
  165. st,syscon = <&syscfg_sbc>;
  166. resets = <&softreset STIH416_ETH1_SOFTRESET>;
  167. reset-names = "stmmaceth";
  168. pinctrl-names = "default";
  169. pinctrl-0 = <&pinctrl_mii1>;
  170. clock-names = "stmmaceth", "sti-ethclk";
  171. clocks = <&clk_s_a0_ls CLK_ICN_REG>, <&clk_s_a0_ls CLK_ETH1_PHY>;
  172. };
  173. rc: rc@fe518000 {
  174. compatible = "st,comms-irb";
  175. reg = <0xfe518000 0x234>;
  176. interrupts = <0 203 0>;
  177. rx-mode = "infrared";
  178. clocks = <&clk_sysin>;
  179. pinctrl-names = "default";
  180. pinctrl-0 = <&pinctrl_ir>;
  181. resets = <&softreset STIH416_IRB_SOFTRESET>;
  182. };
  183. /* FSM */
  184. spifsm: spifsm@fe902000 {
  185. compatible = "st,spi-fsm";
  186. reg = <0xfe902000 0x1000>;
  187. pinctrl-0 = <&pinctrl_fsm>;
  188. st,syscfg = <&syscfg_rear>;
  189. st,boot-device-reg = <0x958>;
  190. st,boot-device-spi = <0x1a>;
  191. status = "disabled";
  192. };
  193. keyscan: keyscan@fe4b0000 {
  194. compatible = "st,sti-keyscan";
  195. status = "disabled";
  196. reg = <0xfe4b0000 0x2000>;
  197. interrupts = <GIC_SPI 212 IRQ_TYPE_NONE>;
  198. clocks = <&clk_sysin>;
  199. pinctrl-names = "default";
  200. pinctrl-0 = <&pinctrl_keyscan>;
  201. resets = <&powerdown STIH416_KEYSCAN_POWERDOWN>,
  202. <&softreset STIH416_KEYSCAN_SOFTRESET>;
  203. };
  204. };
  205. };