at91sam9261.dtsi 20 KB

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  1. /*
  2. * at91sam9261.dtsi - Device Tree Include file for AT91SAM9261 SoC
  3. *
  4. * Copyright (C) 2013 Jean-Jacques Hiblot <jjhiblot@traphandler.com>
  5. *
  6. * Licensed under GPLv2 only.
  7. */
  8. #include "skeleton.dtsi"
  9. #include <dt-bindings/pinctrl/at91.h>
  10. #include <dt-bindings/interrupt-controller/irq.h>
  11. #include <dt-bindings/gpio/gpio.h>
  12. #include <dt-bindings/clock/at91.h>
  13. / {
  14. model = "Atmel AT91SAM9261 family SoC";
  15. compatible = "atmel,at91sam9261";
  16. interrupt-parent = <&aic>;
  17. aliases {
  18. serial0 = &dbgu;
  19. serial1 = &usart0;
  20. serial2 = &usart1;
  21. serial3 = &usart2;
  22. gpio0 = &pioA;
  23. gpio1 = &pioB;
  24. gpio2 = &pioC;
  25. tcb0 = &tcb0;
  26. i2c0 = &i2c0;
  27. ssc0 = &ssc0;
  28. ssc1 = &ssc1;
  29. ssc2 = &ssc2;
  30. };
  31. cpus {
  32. #address-cells = <0>;
  33. #size-cells = <0>;
  34. cpu {
  35. compatible = "arm,arm926ej-s";
  36. device_type = "cpu";
  37. };
  38. };
  39. memory {
  40. reg = <0x20000000 0x08000000>;
  41. };
  42. main_xtal: main_xtal {
  43. compatible = "fixed-clock";
  44. #clock-cells = <0>;
  45. clock-frequency = <0>;
  46. };
  47. slow_xtal: slow_xtal {
  48. compatible = "fixed-clock";
  49. #clock-cells = <0>;
  50. clock-frequency = <0>;
  51. };
  52. ahb {
  53. compatible = "simple-bus";
  54. #address-cells = <1>;
  55. #size-cells = <1>;
  56. ranges;
  57. usb0: ohci@00500000 {
  58. compatible = "atmel,at91rm9200-ohci", "usb-ohci";
  59. reg = <0x00500000 0x100000>;
  60. interrupts = <20 IRQ_TYPE_LEVEL_HIGH 2>;
  61. clocks = <&usb>, <&ohci_clk>, <&hclk0>, <&uhpck>;
  62. clock-names = "usb_clk", "ohci_clk", "hclk", "uhpck";
  63. status = "disabled";
  64. };
  65. fb0: fb@0x00600000 {
  66. compatible = "atmel,at91sam9261-lcdc";
  67. reg = <0x00600000 0x1000>;
  68. interrupts = <21 IRQ_TYPE_LEVEL_HIGH 3>;
  69. pinctrl-names = "default";
  70. pinctrl-0 = <&pinctrl_fb>;
  71. clocks = <&lcd_clk>, <&hclk1>;
  72. clock-names = "lcdc_clk", "hclk";
  73. status = "disabled";
  74. };
  75. nand0: nand@40000000 {
  76. compatible = "atmel,at91rm9200-nand";
  77. #address-cells = <1>;
  78. #size-cells = <1>;
  79. reg = <0x40000000 0x10000000>;
  80. atmel,nand-addr-offset = <22>;
  81. atmel,nand-cmd-offset = <21>;
  82. pinctrl-names = "default";
  83. pinctrl-0 = <&pinctrl_nand>;
  84. gpios = <&pioC 15 GPIO_ACTIVE_HIGH>,
  85. <&pioC 14 GPIO_ACTIVE_HIGH>,
  86. <0>;
  87. status = "disabled";
  88. };
  89. apb {
  90. compatible = "simple-bus";
  91. #address-cells = <1>;
  92. #size-cells = <1>;
  93. ranges;
  94. tcb0: timer@fffa0000 {
  95. compatible = "atmel,at91rm9200-tcb";
  96. reg = <0xfffa0000 0x100>;
  97. interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>,
  98. <18 IRQ_TYPE_LEVEL_HIGH 0>,
  99. <19 IRQ_TYPE_LEVEL_HIGH 0>;
  100. clocks = <&tc0_clk>, <&tc1_clk>, <&tc2_clk>;
  101. clock-names = "t0_clk", "t1_clk", "t2_clk";
  102. };
  103. usb1: gadget@fffa4000 {
  104. compatible = "atmel,at91rm9200-udc";
  105. reg = <0xfffa4000 0x4000>;
  106. interrupts = <10 IRQ_TYPE_LEVEL_HIGH 2>;
  107. clocks = <&usb>, <&udc_clk>, <&udpck>;
  108. clock-names = "usb_clk", "udc_clk", "udpck";
  109. status = "disabled";
  110. };
  111. mmc0: mmc@fffa8000 {
  112. compatible = "atmel,hsmci";
  113. reg = <0xfffa8000 0x600>;
  114. interrupts = <9 IRQ_TYPE_LEVEL_HIGH 0>;
  115. pinctrl-names = "default";
  116. pinctrl-0 = <&pinctrl_mmc0_clk>, <&pinctrl_mmc0_slot0_cmd_dat0>, <&pinctrl_mmc0_slot0_dat1_3>;
  117. #address-cells = <1>;
  118. #size-cells = <0>;
  119. clocks = <&mci0_clk>;
  120. clock-names = "mci_clk";
  121. status = "disabled";
  122. };
  123. i2c0: i2c@fffac000 {
  124. compatible = "atmel,at91sam9261-i2c";
  125. pinctrl-names = "default";
  126. pinctrl-0 = <&pinctrl_i2c_twi>;
  127. reg = <0xfffac000 0x100>;
  128. interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>;
  129. #address-cells = <1>;
  130. #size-cells = <0>;
  131. clocks = <&twi0_clk>;
  132. status = "disabled";
  133. };
  134. usart0: serial@fffb0000 {
  135. compatible = "atmel,at91sam9260-usart";
  136. reg = <0xfffb0000 0x200>;
  137. interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
  138. atmel,use-dma-rx;
  139. atmel,use-dma-tx;
  140. pinctrl-names = "default";
  141. pinctrl-0 = <&pinctrl_usart0>;
  142. clocks = <&usart0_clk>;
  143. clock-names = "usart";
  144. status = "disabled";
  145. };
  146. usart1: serial@fffb4000 {
  147. compatible = "atmel,at91sam9260-usart";
  148. reg = <0xfffb4000 0x200>;
  149. interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
  150. atmel,use-dma-rx;
  151. atmel,use-dma-tx;
  152. pinctrl-names = "default";
  153. pinctrl-0 = <&pinctrl_usart1>;
  154. clocks = <&usart1_clk>;
  155. clock-names = "usart";
  156. status = "disabled";
  157. };
  158. usart2: serial@fffb8000{
  159. compatible = "atmel,at91sam9260-usart";
  160. reg = <0xfffb8000 0x200>;
  161. interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
  162. atmel,use-dma-rx;
  163. atmel,use-dma-tx;
  164. pinctrl-names = "default";
  165. pinctrl-0 = <&pinctrl_usart2>;
  166. clocks = <&usart2_clk>;
  167. clock-names = "usart";
  168. status = "disabled";
  169. };
  170. ssc0: ssc@fffbc000 {
  171. compatible = "atmel,at91rm9200-ssc";
  172. reg = <0xfffbc000 0x4000>;
  173. interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
  174. pinctrl-names = "default";
  175. pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
  176. clocks = <&ssc0_clk>;
  177. clock-names = "pclk";
  178. status = "disabled";
  179. };
  180. ssc1: ssc@fffc0000 {
  181. compatible = "atmel,at91rm9200-ssc";
  182. reg = <0xfffc0000 0x4000>;
  183. interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
  184. pinctrl-names = "default";
  185. pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
  186. clocks = <&ssc1_clk>;
  187. clock-names = "pclk";
  188. status = "disabled";
  189. };
  190. ssc2: ssc@fffc4000 {
  191. compatible = "atmel,at91rm9200-ssc";
  192. reg = <0xfffc4000 0x4000>;
  193. interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
  194. pinctrl-names = "default";
  195. pinctrl-0 = <&pinctrl_ssc2_tx &pinctrl_ssc2_rx>;
  196. clocks = <&ssc2_clk>;
  197. clock-names = "pclk";
  198. status = "disabled";
  199. };
  200. spi0: spi@fffc8000 {
  201. #address-cells = <1>;
  202. #size-cells = <0>;
  203. compatible = "atmel,at91rm9200-spi";
  204. reg = <0xfffc8000 0x200>;
  205. cs-gpios = <0>, <0>, <0>, <0>;
  206. interrupts = <12 IRQ_TYPE_LEVEL_HIGH 3>;
  207. pinctrl-names = "default";
  208. pinctrl-0 = <&pinctrl_spi0>;
  209. clocks = <&spi0_clk>;
  210. clock-names = "spi_clk";
  211. status = "disabled";
  212. };
  213. spi1: spi@fffcc000 {
  214. #address-cells = <1>;
  215. #size-cells = <0>;
  216. compatible = "atmel,at91rm9200-spi";
  217. reg = <0xfffcc000 0x200>;
  218. interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
  219. pinctrl-names = "default";
  220. pinctrl-0 = <&pinctrl_spi1>;
  221. clocks = <&spi1_clk>;
  222. clock-names = "spi_clk";
  223. status = "disabled";
  224. };
  225. ramc: ramc@ffffea00 {
  226. compatible = "atmel,at91sam9260-sdramc";
  227. reg = <0xffffea00 0x200>;
  228. };
  229. matrix: matrix@ffffee00 {
  230. compatible = "atmel,at91sam9260-bus-matrix";
  231. reg = <0xffffee00 0x200>;
  232. };
  233. aic: interrupt-controller@fffff000 {
  234. #interrupt-cells = <3>;
  235. compatible = "atmel,at91rm9200-aic";
  236. interrupt-controller;
  237. reg = <0xfffff000 0x200>;
  238. atmel,external-irqs = <29 30 31>;
  239. };
  240. dbgu: serial@fffff200 {
  241. compatible = "atmel,at91sam9260-usart";
  242. reg = <0xfffff200 0x200>;
  243. interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
  244. pinctrl-names = "default";
  245. pinctrl-0 = <&pinctrl_dbgu>;
  246. clocks = <&mck>;
  247. clock-names = "usart";
  248. status = "disabled";
  249. };
  250. pinctrl@fffff400 {
  251. #address-cells = <1>;
  252. #size-cells = <1>;
  253. compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
  254. ranges = <0xfffff400 0xfffff400 0x600>;
  255. atmel,mux-mask =
  256. /* A B */
  257. <0xffffffff 0xfffffff7>, /* pioA */
  258. <0xffffffff 0xfffffff4>, /* pioB */
  259. <0xffffffff 0xffffff07>; /* pioC */
  260. /* shared pinctrl settings */
  261. dbgu {
  262. pinctrl_dbgu: dbgu-0 {
  263. atmel,pins =
  264. <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE>,
  265. <AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
  266. };
  267. };
  268. usart0 {
  269. pinctrl_usart0: usart0-0 {
  270. atmel,pins =
  271. <AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
  272. <AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE>;
  273. };
  274. pinctrl_usart0_rts: usart0_rts-0 {
  275. atmel,pins =
  276. <AT91_PIOC 10 AT91_PERIPH_A AT91_PINCTRL_NONE>;
  277. };
  278. pinctrl_usart0_cts: usart0_cts-0 {
  279. atmel,pins =
  280. <AT91_PIOC 11 AT91_PERIPH_A AT91_PINCTRL_NONE>;
  281. };
  282. };
  283. usart1 {
  284. pinctrl_usart1: usart1-0 {
  285. atmel,pins =
  286. <AT91_PIOC 12 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
  287. <AT91_PIOC 13 AT91_PERIPH_A AT91_PINCTRL_NONE>;
  288. };
  289. pinctrl_usart1_rts: usart1_rts-0 {
  290. atmel,pins =
  291. <AT91_PIOA 12 AT91_PERIPH_B AT91_PINCTRL_NONE>;
  292. };
  293. pinctrl_usart1_cts: usart1_cts-0 {
  294. atmel,pins =
  295. <AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_NONE>;
  296. };
  297. };
  298. usart2 {
  299. pinctrl_usart2: usart2-0 {
  300. atmel,pins =
  301. <AT91_PIOC 14 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
  302. <AT91_PIOC 15 AT91_PERIPH_A AT91_PINCTRL_NONE>;
  303. };
  304. pinctrl_usart2_rts: usart2_rts-0 {
  305. atmel,pins =
  306. <AT91_PIOA 15 AT91_PERIPH_B AT91_PINCTRL_NONE>;
  307. };
  308. pinctrl_usart2_cts: usart2_cts-0 {
  309. atmel,pins =
  310. <AT91_PIOA 16 AT91_PERIPH_B AT91_PINCTRL_NONE>;
  311. };
  312. };
  313. nand {
  314. pinctrl_nand: nand-0 {
  315. atmel,pins =
  316. <AT91_PIOC 15 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>,
  317. <AT91_PIOC 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
  318. };
  319. };
  320. mmc0 {
  321. pinctrl_mmc0_clk: mmc0_clk-0 {
  322. atmel,pins =
  323. <AT91_PIOA 2 AT91_PERIPH_B AT91_PINCTRL_NONE>;
  324. };
  325. pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
  326. atmel,pins =
  327. <AT91_PIOA 1 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>,
  328. <AT91_PIOA 0 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;
  329. };
  330. pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
  331. atmel,pins =
  332. <AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>,
  333. <AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>,
  334. <AT91_PIOA 6 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;
  335. };
  336. };
  337. ssc0 {
  338. pinctrl_ssc0_tx: ssc0_tx-0 {
  339. atmel,pins =
  340. <AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_NONE>,
  341. <AT91_PIOB 22 AT91_PERIPH_A AT91_PINCTRL_NONE>,
  342. <AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_NONE>;
  343. };
  344. pinctrl_ssc0_rx: ssc0_rx-0 {
  345. atmel,pins =
  346. <AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE>,
  347. <AT91_PIOB 25 AT91_PERIPH_A AT91_PINCTRL_NONE>,
  348. <AT91_PIOB 26 AT91_PERIPH_A AT91_PINCTRL_NONE>;
  349. };
  350. };
  351. ssc1 {
  352. pinctrl_ssc1_tx: ssc1_tx-0 {
  353. atmel,pins =
  354. <AT91_PIOA 17 AT91_PERIPH_B AT91_PINCTRL_NONE>,
  355. <AT91_PIOA 18 AT91_PERIPH_B AT91_PINCTRL_NONE>,
  356. <AT91_PIOA 19 AT91_PERIPH_B AT91_PINCTRL_NONE>;
  357. };
  358. pinctrl_ssc1_rx: ssc1_rx-0 {
  359. atmel,pins =
  360. <AT91_PIOA 20 AT91_PERIPH_B AT91_PINCTRL_NONE>,
  361. <AT91_PIOA 21 AT91_PERIPH_B AT91_PINCTRL_NONE>,
  362. <AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE>;
  363. };
  364. };
  365. ssc2 {
  366. pinctrl_ssc2_tx: ssc2_tx-0 {
  367. atmel,pins =
  368. <AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE>,
  369. <AT91_PIOC 26 AT91_PERIPH_B AT91_PINCTRL_NONE>,
  370. <AT91_PIOC 27 AT91_PERIPH_B AT91_PINCTRL_NONE>;
  371. };
  372. pinctrl_ssc2_rx: ssc2_rx-0 {
  373. atmel,pins =
  374. <AT91_PIOC 28 AT91_PERIPH_B AT91_PINCTRL_NONE>,
  375. <AT91_PIOC 29 AT91_PERIPH_B AT91_PINCTRL_NONE>,
  376. <AT91_PIOC 30 AT91_PERIPH_B AT91_PINCTRL_NONE>;
  377. };
  378. };
  379. spi0 {
  380. pinctrl_spi0: spi0-0 {
  381. atmel,pins =
  382. <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE>,
  383. <AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE>,
  384. <AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>;
  385. };
  386. };
  387. spi1 {
  388. pinctrl_spi1: spi1-0 {
  389. atmel,pins =
  390. <AT91_PIOB 30 AT91_PERIPH_A AT91_PINCTRL_NONE>,
  391. <AT91_PIOB 31 AT91_PERIPH_A AT91_PINCTRL_NONE>,
  392. <AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;
  393. };
  394. };
  395. tcb0 {
  396. pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
  397. atmel,pins = <AT91_PIOC 16 AT91_PERIPH_B AT91_PINCTRL_NONE>;
  398. };
  399. pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
  400. atmel,pins = <AT91_PIOC 17 AT91_PERIPH_B AT91_PINCTRL_NONE>;
  401. };
  402. pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
  403. atmel,pins = <AT91_PIOC 18 AT91_PERIPH_B AT91_PINCTRL_NONE>;
  404. };
  405. pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
  406. atmel,pins = <AT91_PIOC 19 AT91_PERIPH_B AT91_PINCTRL_NONE>;
  407. };
  408. pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
  409. atmel,pins = <AT91_PIOC 21 AT91_PERIPH_B AT91_PINCTRL_NONE>;
  410. };
  411. pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
  412. atmel,pins = <AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_NONE>;
  413. };
  414. pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
  415. atmel,pins = <AT91_PIOC 20 AT91_PERIPH_B AT91_PINCTRL_NONE>;
  416. };
  417. pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
  418. atmel,pins = <AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE>;
  419. };
  420. pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
  421. atmel,pins = <AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE>;
  422. };
  423. };
  424. i2c0 {
  425. pinctrl_i2c_bitbang: i2c-0-bitbang {
  426. atmel,pins =
  427. <AT91_PIOA 7 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>,
  428. <AT91_PIOA 8 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
  429. };
  430. pinctrl_i2c_twi: i2c-0-twi {
  431. atmel,pins =
  432. <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE>,
  433. <AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE>;
  434. };
  435. };
  436. fb {
  437. pinctrl_fb: fb-0 {
  438. atmel,pins =
  439. <AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE>,
  440. <AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>,
  441. <AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE>,
  442. <AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE>,
  443. <AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE>,
  444. <AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE>,
  445. <AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE>,
  446. <AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE>,
  447. <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE>,
  448. <AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE>,
  449. <AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE>,
  450. <AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE>,
  451. <AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_NONE>,
  452. <AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_NONE>,
  453. <AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_NONE>,
  454. <AT91_PIOB 23 AT91_PERIPH_B AT91_PINCTRL_NONE>,
  455. <AT91_PIOB 24 AT91_PERIPH_B AT91_PINCTRL_NONE>,
  456. <AT91_PIOB 25 AT91_PERIPH_B AT91_PINCTRL_NONE>,
  457. <AT91_PIOB 26 AT91_PERIPH_B AT91_PINCTRL_NONE>,
  458. <AT91_PIOB 27 AT91_PERIPH_B AT91_PINCTRL_NONE>,
  459. <AT91_PIOB 28 AT91_PERIPH_B AT91_PINCTRL_NONE>;
  460. };
  461. };
  462. pioA: gpio@fffff400 {
  463. compatible = "atmel,at91rm9200-gpio";
  464. reg = <0xfffff400 0x200>;
  465. interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
  466. #gpio-cells = <2>;
  467. gpio-controller;
  468. interrupt-controller;
  469. #interrupt-cells = <2>;
  470. clocks = <&pioA_clk>;
  471. };
  472. pioB: gpio@fffff600 {
  473. compatible = "atmel,at91rm9200-gpio";
  474. reg = <0xfffff600 0x200>;
  475. interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
  476. #gpio-cells = <2>;
  477. gpio-controller;
  478. interrupt-controller;
  479. #interrupt-cells = <2>;
  480. clocks = <&pioB_clk>;
  481. };
  482. pioC: gpio@fffff800 {
  483. compatible = "atmel,at91rm9200-gpio";
  484. reg = <0xfffff800 0x200>;
  485. interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
  486. #gpio-cells = <2>;
  487. gpio-controller;
  488. interrupt-controller;
  489. #interrupt-cells = <2>;
  490. clocks = <&pioC_clk>;
  491. };
  492. };
  493. pmc: pmc@fffffc00 {
  494. compatible = "atmel,at91rm9200-pmc";
  495. reg = <0xfffffc00 0x100>;
  496. interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
  497. interrupt-controller;
  498. #address-cells = <1>;
  499. #size-cells = <0>;
  500. #interrupt-cells = <1>;
  501. main_osc: main_osc {
  502. compatible = "atmel,at91rm9200-clk-main-osc";
  503. #clock-cells = <0>;
  504. interrupts-extended = <&pmc AT91_PMC_MOSCS>;
  505. clocks = <&main_xtal>;
  506. };
  507. main: mainck {
  508. compatible = "atmel,at91rm9200-clk-main";
  509. #clock-cells = <0>;
  510. clocks = <&main_osc>;
  511. };
  512. plla: pllack {
  513. compatible = "atmel,at91rm9200-clk-pll";
  514. #clock-cells = <0>;
  515. interrupts-extended = <&pmc AT91_PMC_LOCKA>;
  516. clocks = <&main>;
  517. reg = <0>;
  518. atmel,clk-input-range = <1000000 32000000>;
  519. #atmel,pll-clk-output-range-cells = <4>;
  520. atmel,pll-clk-output-ranges = <80000000 200000000 0 1>,
  521. <190000000 240000000 2 1>;
  522. };
  523. pllb: pllbck {
  524. compatible = "atmel,at91rm9200-clk-pll";
  525. #clock-cells = <0>;
  526. interrupts-extended = <&pmc AT91_PMC_LOCKB>;
  527. clocks = <&main>;
  528. reg = <1>;
  529. atmel,clk-input-range = <1000000 5000000>;
  530. #atmel,pll-clk-output-range-cells = <4>;
  531. atmel,pll-clk-output-ranges = <70000000 130000000 1 1>;
  532. };
  533. mck: masterck {
  534. compatible = "atmel,at91rm9200-clk-master";
  535. #clock-cells = <0>;
  536. interrupts-extended = <&pmc AT91_PMC_MCKRDY>;
  537. clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>;
  538. atmel,clk-output-range = <0 94000000>;
  539. atmel,clk-divisors = <1 2 4 0>;
  540. };
  541. usb: usbck {
  542. compatible = "atmel,at91rm9200-clk-usb";
  543. #clock-cells = <0>;
  544. atmel,clk-divisors = <1 2 4 0>;
  545. clocks = <&pllb>;
  546. };
  547. prog: progck {
  548. compatible = "atmel,at91rm9200-clk-programmable";
  549. #address-cells = <1>;
  550. #size-cells = <0>;
  551. interrupt-parent = <&pmc>;
  552. clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>;
  553. prog0: prog0 {
  554. #clock-cells = <0>;
  555. reg = <0>;
  556. interrupts = <AT91_PMC_PCKRDY(0)>;
  557. };
  558. prog1: prog1 {
  559. #clock-cells = <0>;
  560. reg = <1>;
  561. interrupts = <AT91_PMC_PCKRDY(1)>;
  562. };
  563. prog2: prog2 {
  564. #clock-cells = <0>;
  565. reg = <2>;
  566. interrupts = <AT91_PMC_PCKRDY(2)>;
  567. };
  568. prog3: prog3 {
  569. #clock-cells = <0>;
  570. reg = <3>;
  571. interrupts = <AT91_PMC_PCKRDY(3)>;
  572. };
  573. };
  574. systemck {
  575. compatible = "atmel,at91rm9200-clk-system";
  576. #address-cells = <1>;
  577. #size-cells = <0>;
  578. uhpck: uhpck {
  579. #clock-cells = <0>;
  580. reg = <6>;
  581. clocks = <&usb>;
  582. };
  583. udpck: udpck {
  584. #clock-cells = <0>;
  585. reg = <7>;
  586. clocks = <&usb>;
  587. };
  588. pck0: pck0 {
  589. #clock-cells = <0>;
  590. reg = <8>;
  591. clocks = <&prog0>;
  592. };
  593. pck1: pck1 {
  594. #clock-cells = <0>;
  595. reg = <9>;
  596. clocks = <&prog1>;
  597. };
  598. pck2: pck2 {
  599. #clock-cells = <0>;
  600. reg = <10>;
  601. clocks = <&prog2>;
  602. };
  603. pck3: pck3 {
  604. #clock-cells = <0>;
  605. reg = <11>;
  606. clocks = <&prog3>;
  607. };
  608. hclk0: hclk0 {
  609. #clock-cells = <0>;
  610. reg = <16>;
  611. clocks = <&mck>;
  612. };
  613. hclk1: hclk1 {
  614. #clock-cells = <0>;
  615. reg = <17>;
  616. clocks = <&mck>;
  617. };
  618. };
  619. periphck {
  620. compatible = "atmel,at91rm9200-clk-peripheral";
  621. #address-cells = <1>;
  622. #size-cells = <0>;
  623. clocks = <&mck>;
  624. pioA_clk: pioA_clk {
  625. #clock-cells = <0>;
  626. reg = <2>;
  627. };
  628. pioB_clk: pioB_clk {
  629. #clock-cells = <0>;
  630. reg = <3>;
  631. };
  632. pioC_clk: pioC_clk {
  633. #clock-cells = <0>;
  634. reg = <4>;
  635. };
  636. usart0_clk: usart0_clk {
  637. #clock-cells = <0>;
  638. reg = <6>;
  639. };
  640. usart1_clk: usart1_clk {
  641. #clock-cells = <0>;
  642. reg = <7>;
  643. };
  644. usart2_clk: usart2_clk {
  645. #clock-cells = <0>;
  646. reg = <8>;
  647. };
  648. mci0_clk: mci0_clk {
  649. #clock-cells = <0>;
  650. reg = <9>;
  651. };
  652. udc_clk: udc_clk {
  653. #clock-cells = <0>;
  654. reg = <10>;
  655. };
  656. twi0_clk: twi0_clk {
  657. reg = <11>;
  658. #clock-cells = <0>;
  659. };
  660. spi0_clk: spi0_clk {
  661. #clock-cells = <0>;
  662. reg = <12>;
  663. };
  664. spi1_clk: spi1_clk {
  665. #clock-cells = <0>;
  666. reg = <13>;
  667. };
  668. ssc0_clk: ssc0_clk {
  669. #clock-cells = <0>;
  670. reg = <14>;
  671. };
  672. ssc1_clk: ssc1_clk {
  673. #clock-cells = <0>;
  674. reg = <15>;
  675. };
  676. ssc2_clk: ssc2_clk {
  677. #clock-cells = <0>;
  678. reg = <16>;
  679. };
  680. tc0_clk: tc0_clk {
  681. #clock-cells = <0>;
  682. reg = <17>;
  683. };
  684. tc1_clk: tc1_clk {
  685. #clock-cells = <0>;
  686. reg = <18>;
  687. };
  688. tc2_clk: tc2_clk {
  689. #clock-cells = <0>;
  690. reg = <19>;
  691. };
  692. ohci_clk: ohci_clk {
  693. #clock-cells = <0>;
  694. reg = <20>;
  695. };
  696. lcd_clk: lcd_clk {
  697. #clock-cells = <0>;
  698. reg = <21>;
  699. };
  700. };
  701. };
  702. rstc@fffffd00 {
  703. compatible = "atmel,at91sam9260-rstc";
  704. reg = <0xfffffd00 0x10>;
  705. };
  706. shdwc@fffffd10 {
  707. compatible = "atmel,at91sam9260-shdwc";
  708. reg = <0xfffffd10 0x10>;
  709. };
  710. pit: timer@fffffd30 {
  711. compatible = "atmel,at91sam9260-pit";
  712. reg = <0xfffffd30 0xf>;
  713. interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
  714. clocks = <&mck>;
  715. };
  716. watchdog@fffffd40 {
  717. compatible = "atmel,at91sam9260-wdt";
  718. reg = <0xfffffd40 0x10>;
  719. interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
  720. status = "disabled";
  721. };
  722. };
  723. };
  724. i2c@0 {
  725. compatible = "i2c-gpio";
  726. pinctrl-names = "default";
  727. pinctrl-0 = <&pinctrl_i2c_bitbang>;
  728. gpios = <&pioA 7 GPIO_ACTIVE_HIGH>, /* sda */
  729. <&pioA 8 GPIO_ACTIVE_HIGH>; /* scl */
  730. i2c-gpio,sda-open-drain;
  731. i2c-gpio,scl-open-drain;
  732. i2c-gpio,delay-us = <2>; /* ~100 kHz */
  733. #address-cells = <1>;
  734. #size-cells = <0>;
  735. status = "disabled";
  736. };
  737. };